gr55xx_ll_usb.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_usb.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of usb LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2020 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_USB Usb Module Driver
47 * @brief USB LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55xx_LL_USB_H__
53 #define __GR55xx_LL_USB_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx.h"
61
62 #if defined (USB)
63
64 /** @defgroup LL_USB_DRIVER_STRUCTURES Structures
65 * @{
66 */
67
68 /* Exported types ------------------------------------------------------------*/
69 /** @defgroup USB_LL_ES_INTT USB Exported init structure
70 * @{
71 */
72
73 /**
74 * @brief LL USB init structures definition
75 */
76 typedef struct _ll_usb_init_t
77 {
78 uint32_t pwr_mode; /**< Specifies power mode of usb modlue.
79 This parameter can be a value of @ref USB_LL_EC_PWR_MODE */
80
81 uint32_t speed; /**< Specifies the USB Transceiver speed.
82 This parameter can be a value of @ref USB_LL_EC_XCRV_CTRL_SPEED.
83 This feature can be modified afterwards using unitary function @ref ll_usb_set_xcrv_speed().*/
84
85 uint32_t enum_type; /**< Specifies the USB enumeration type( hardware enumeration and MCU enumeration).
86 This parameter can be a value of @ref USB_LL_EC_ENUM_TYPE.
87 This feature can be modified afterwards using unitary function @ref ll_usb_set_usb_enum_type().*/
88 } ll_usb_init_t;
89
90 /** @} */
91
92 /** @} */
93
94 /**
95 * @defgroup USB_LL_MACRO Defines
96 * @{
97 */
98
99 /* Exported constants --------------------------------------------------------*/
100 /** @defgroup USB_LL_Exported_Constants USB Exported Constants
101 * @{
102 */
103
104 /** @defgroup USB_LL_EC_PWR_MODE USB poewr mode select
105 * @{
106 */
107 #define LL_USB_PWR_MODE_LP (0UL) /**< USB runing in low power mode */
108 #define LL_USB_PWR_MODE_NORMAL (1UL) /**< USB runing in normal mode */
109
110 /** @} */
111
112 /** @defgroup USB_LL_EC_ENUM_TYPE USB enumeration type
113 * @{
114 */
115 #define LL_USB_ENUM_TYPE_HW (0x00000000UL) /**< USB hardware enumeration type */
116 #define LL_USB_ENUM_TYPE_MCU (1UL << USB_CTRL_MCU_ENUM_Pos) /**< USB MCU enumeration type */
117
118 /** @} */
119
120 /** @defgroup USB_LL_EC_XCRV_LDO_BIAS_SEL Transceiver LDO_3.3V vout trimming signal select
121 * @{
122 */
123 #define LL_USB_TRX_LDO_BIAS_SEL0 (0x00000000UL) /**< LDO_3.3V vout trimming signal select: 0 */
124 #define LL_USB_TRX_LDO_BIAS_SEL1 (1UL << AON_PMU_USB_TRX_LDO_BIAS_SEL_Pos) /**< LDO_3.3V vout trimming signal select: 1 */
125 #define LL_USB_TRX_LDO_BIAS_SEL2 (2UL << AON_PMU_USB_TRX_LDO_BIAS_SEL_Pos) /**< LDO_3.3V vout trimming signal select: 2 */
126 #define LL_USB_TRX_LDO_BIAS_SEL3 (3UL << AON_PMU_USB_TRX_LDO_BIAS_SEL_Pos) /**< LDO_3.3V vout trimming signal select: 3 */
127 #define LL_USB_TRX_LDO_BIAS_SEL4 (4UL << AON_PMU_USB_TRX_LDO_BIAS_SEL_Pos) /**< LDO_3.3V vout trimming signal select: 4 */
128 #define LL_USB_TRX_LDO_BIAS_SEL5 (5UL << AON_PMU_USB_TRX_LDO_BIAS_SEL_Pos) /**< LDO_3.3V vout trimming signal select: 5 */
129 #define LL_USB_TRX_LDO_BIAS_SEL6 (6UL << AON_PMU_USB_TRX_LDO_BIAS_SEL_Pos) /**< LDO_3.3V vout trimming signal select: 6 */
130 #define LL_USB_TRX_LDO_BIAS_SEL7 (7UL << AON_PMU_USB_TRX_LDO_BIAS_SEL_Pos) /**< LDO_3.3V vout trimming signal select: 7 */
131 /** @} */
132
133
134 /** @defgroup USB_LL_EC_XCRV_LDO_VSEL Transceiver LDO_3.3V offer XCVR's current select
135 * @{
136 */
137 #define LL_USB_TRX_LDO_VSEL0 (0x00000000UL) /**< LDO_3.3V offer XCVR's select: 0 */
138 #define LL_USB_TRX_LDO_VSEL1 (1UL << AON_PMU_USB_TRX_LDO_VSEL_Pos) /**< LDO_3.3V offer XCVR's select: 1 */
139 #define LL_USB_TRX_LDO_VSEL2 (2UL << AON_PMU_USB_TRX_LDO_VSEL_Pos) /**< LDO_3.3V offer XCVR's select: 2 */
140 #define LL_USB_TRX_LDO_VSEL3 (3UL << AON_PMU_USB_TRX_LDO_VSEL_Pos) /**< LDO_3.3V offer XCVR's select: 3 */
141 #define LL_USB_TRX_LDO_VSEL4 (4UL << AON_PMU_USB_TRX_LDO_VSEL_Pos) /**< LDO_3.3V offer XCVR's select: 4 */
142 #define LL_USB_TRX_LDO_VSEL5 (5UL << AON_PMU_USB_TRX_LDO_VSEL_Pos) /**< LDO_3.3V offer XCVR's select: 5 */
143 #define LL_USB_TRX_LDO_VSEL6 (6UL << AON_PMU_USB_TRX_LDO_VSEL_Pos) /**< LDO_3.3V offer XCVR's select: 6 */
144 #define LL_USB_TRX_LDO_VSEL7 (7UL << AON_PMU_USB_TRX_LDO_VSEL_Pos) /**< LDO_3.3V offer XCVR's select: 7 */
145 /** @} */
146
147 /** @defgroup USB_LL_EC_XCRV_CTRL_SPEED Transceiver speed select
148 * @{
149 */
150 #define LL_USB_XCRV_CTRL_SPEED_LOW (0x00000000UL) /**< USB Transceiver speed select: low speed */
151 #define LL_USB_XCRV_CTRL_SPEED_FULL (1UL << MCU_SUB_USB_XCRV_CTRL_SPEED_Pos) /**< USB Transceiver speed select: full speed */
152 /** @} */
153
154 /** @defgroup USB_LL_EC_XCRV_CTRL_RTRIMN Transceiver D- output impedance trim
155 * @{
156 */
157 #define LL_USB_XCRV_CTRL_RTRIMN0 (0x00000000UL) /**< Transceiver D- output impedance trim: 0 */
158 #define LL_USB_XCRV_CTRL_RTRIMN1 (1UL << MCU_SUB_USB_XCRV_CTRL_RTRIMN_Pos) /**< Transceiver D- output impedance trim: 1 */
159 #define LL_USB_XCRV_CTRL_RTRIMN2 (2UL << MCU_SUB_USB_XCRV_CTRL_RTRIMN_Pos) /**< Transceiver D- output impedance trim: 2 */
160 #define LL_USB_XCRV_CTRL_RTRIMN3 (3UL << MCU_SUB_USB_XCRV_CTRL_RTRIMN_Pos) /**< Transceiver D- output impedance trim: 3 */
161 #define LL_USB_XCRV_CTRL_RTRIMN4 (4UL << MCU_SUB_USB_XCRV_CTRL_RTRIMN_Pos) /**< Transceiver D- output impedance trim: 4 */
162 #define LL_USB_XCRV_CTRL_RTRIMN5 (5UL << MCU_SUB_USB_XCRV_CTRL_RTRIMN_Pos) /**< Transceiver D- output impedance trim: 5 */
163 #define LL_USB_XCRV_CTRL_RTRIMN6 (6UL << MCU_SUB_USB_XCRV_CTRL_RTRIMN_Pos) /**< Transceiver D- output impedance trim: 6 */
164 #define LL_USB_XCRV_CTRL_RTRIMN7 (7UL << MCU_SUB_USB_XCRV_CTRL_RTRIMN_Pos) /**< Transceiver D- output impedance trim: 7 */
165 /** @} */
166
167 /** @defgroup USB_LL_EC_XCRV_CTRL_RTRIMP Transceiver D+ output impedance trim
168 * @{
169 */
170 #define LL_USB_XCRV_CTRL_RTRIMP0 (0x00000000UL) /**< Transceiver D+ output impedance trim: 0 */
171 #define LL_USB_XCRV_CTRL_RTRIMP1 (1UL << MCU_SUB_USB_XCRV_CTRL_RTRIMP_Pos) /**< Transceiver D+ output impedance trim: 1 */
172 #define LL_USB_XCRV_CTRL_RTRIMP2 (2UL << MCU_SUB_USB_XCRV_CTRL_RTRIMP_Pos) /**< Transceiver D+ output impedance trim: 2 */
173 #define LL_USB_XCRV_CTRL_RTRIMP3 (3UL << MCU_SUB_USB_XCRV_CTRL_RTRIMP_Pos) /**< Transceiver D+ output impedance trim: 3 */
174 #define LL_USB_XCRV_CTRL_RTRIMP4 (4UL << MCU_SUB_USB_XCRV_CTRL_RTRIMP_Pos) /**< Transceiver D+ output impedance trim: 4 */
175 #define LL_USB_XCRV_CTRL_RTRIMP5 (5UL << MCU_SUB_USB_XCRV_CTRL_RTRIMP_Pos) /**< Transceiver D+ output impedance trim: 5 */
176 #define LL_USB_XCRV_CTRL_RTRIMP6 (6UL << MCU_SUB_USB_XCRV_CTRL_RTRIMP_Pos) /**< Transceiver D+ output impedance trim: 6 */
177 #define LL_USB_XCRV_CTRL_RTRIMP7 (7UL << MCU_SUB_USB_XCRV_CTRL_RTRIMP_Pos) /**< Transceiver D+ output impedance trim: 7 */
178 /** @} */
179
180 /** @defgroup USB_LL_EC_EP_ATTR_EP1 Endpoint 1 attribute setting
181 * @{
182 */
183 #define LL_USB_EP_ATTR_EP1_INT (0x00000000UL) /**< Endpoint 1 attribute setting: interrupt */
184 #define LL_USB_EP_ATTR_EP1_ISO (1UL << USB_EP_ATTR_EP1_Pos) /**< Endpoint 1 attribute setting: Isochronous */
185 #define LL_USB_EP_ATTR_EP1_BULK (2UL << USB_EP_ATTR_EP1_Pos) /**< Endpoint 1 attribute setting: bulk */
186 /** @} */
187
188 /** @defgroup USB_LL_EC_EP_ATTR_EP2 Endpoint 2 attribute setting
189 * @{
190 */
191 #define LL_USB_EP_ATTR_EP2_INT (0x00000000UL) /**< Endpoint 2 attribute setting: interrupt */
192 #define LL_USB_EP_ATTR_EP2_ISO (1UL << USB_EP_ATTR_EP2_Pos) /**< Endpoint 2 attribute setting: Isochronous */
193 #define LL_USB_EP_ATTR_EP2_BULK (2UL << USB_EP_ATTR_EP2_Pos) /**< Endpoint 2 attribute setting: bulk */
194 /** @} */
195
196 /** @defgroup USB_LL_EC_EP_ATTR_EP3 Endpoint 3 attribute setting
197 * @{
198 */
199 #define LL_USB_EP_ATTR_EP3_INT (0x00000000UL) /**< Endpoint 3 attribute setting: interrupt */
200 #define LL_USB_EP_ATTR_EP3_ISO (1UL << USB_EP_ATTR_EP3_Pos) /**< Endpoint 3 attribute setting: Isochronous */
201 #define LL_USB_EP_ATTR_EP3_BULK (2UL << USB_EP_ATTR_EP3_Pos) /**< Endpoint 3 attribute setting: bulk */
202 /** @} */
203
204 /** @defgroup USB_LL_EC_INT_STAT USB interrupt status
205 * @{
206 */
207 #define LL_USB_INT_STAT_ALL USB_INT_STAT_ALL /**< USB interrupt status all bit status */
208 #define LL_USB_INT_STAT_SUSPEND USB_INT_STAT_SUSPEND /**< USB suspend status interrupt active */
209 #define LL_USB_INT_STAT_EP0_OUT_READY USB_INT_STAT_EP0_OUT_READY /**< USB ep0 data out ready interrupt active */
210 #define LL_USB_INT_STAT_EP1_OUT_READY USB_INT_STAT_EP1_OUT_READY /**< USB ep1 data out ready interrupt active */
211 #define LL_USB_INT_STAT_CRC16_ERR USB_INT_STAT_CRC16_ERR /**< USB receive CRC error data interrupt active */
212 #define LL_USB_INT_STAT_UPID_ERR USB_INT_STAT_UPID_ERR /**< USB receive unsupported PID interrupt active */
213 #define LL_USB_INT_STAT_TIMEOUT_ERR USB_INT_STAT_TIMEOUT_ERR /**< USB rx/tx timeout error interrupt active */
214 #define LL_USB_INT_STAT_SEQ_ERR USB_INT_STAT_SEQ_ERR /**< USB DATA0/DATA1 PID sequence error interrupt active */
215 #define LL_USB_INT_STAT_PID_CKS_ERR USB_INT_STAT_PID_CKS_ERR /**< USB PID checksum error interrupt active */
216 #define LL_USB_INT_STAT_PID_CRC_ERR USB_INT_STAT_PID_CRC_ERR /**< USB PID CRC error interrupt active */
217 #define LL_USB_INT_STAT_HOST_RESET USB_INT_STAT_HOST_RESET /**< USB host reset interrupt active */
218 #define LL_USB_INT_STAT_AHB_XFER_ERR USB_INT_STAT_AHB_XFER_ERR /**< USB ep3 and ep4 AHB master receive error interrupt active */
219 #define LL_USB_INT_STAT_NSE_ERR USB_INT_STAT_NSE_ERR /**< USB no such endpoint error interrupt active */
220 #define LL_USB_INT_STAT_EP3_AHB_XFER_DONE USB_INT_STAT_EP3_AHB_XFER_DONE /**< USB ep3 AHB master transfer done interrupt active */
221 #define LL_USB_INT_STAT_SYNC_ERR USB_INT_STAT_SYNC_ERR /**< USB SYNC error interrupt active */
222 #define LL_USB_INT_STAT_BIT_STUFF_ERR USB_INT_STAT_BIT_STUFF_ERR /**< USB bit stuff error interrupt active */
223 #define LL_USB_INT_STAT_BYTE_ERR USB_INT_STAT_BYTE_ERR /**< USB byte error interrupt active */
224 #define LL_USB_INT_STAT_SOF USB_INT_STAT_SOF /**< USB SOF interrupt active */
225 #define LL_USB_INT_STAT_EP0_TX_DONE USB_INT_STAT_EP0_TX_DONE /**< USB ep0 TX done interrupt active */
226 #define LL_USB_INT_STAT_EP2_TX_DONE USB_INT_STAT_EP2_TX_DONE /**< USB ep2 TX done interrupt active */
227 #define LL_USB_INT_STAT_EP3_TX_DONE USB_INT_STAT_EP3_TX_DONE /**< USB ep3 TX done interrupt active */
228 #define LL_USB_INT_STAT_INTO_CONFIG USB_INT_STAT_INTO_CONFIG /**< USB into cofig status interrupt active */
229 #define LL_USB_INT_STAT_EP5_OUT_READY USB_INT_STAT_EP5_OUT_READY /**< USB ep5 data out ready interrupt active */
230 #define LL_USB_INT_STAT_EP4_AHB_XFER_DONE USB_INT_STAT_EP4_AHB_XFER_DONE /**< USB ep4 AHB master transfer done interrupt active */
231 #define LL_USB_INT_STAT_EP4_TX_DONE USB_INT_STAT_EP4_TX_DONE /**< USB ep4 TX done interrupt active */
232 #define LL_USB_INT_STAT_EP5_AHB_XFER_DONE USB_INT_STAT_EP5_AHB_XFER_DONE /**< USB ep5 AHB master transfer done interrupt active */
233 #define LL_USB_INT_STAT_EP5_TIMER_OUT_ERR USB_INT_STAT_EP5_TIMER_OUT_ERR /**< USB ep5 timer out error interrupt active */
234 /** @} */
235
236 /** @defgroup USB_LL_EC_INT_EN USB interrupt enable
237 * @{
238 */
239 #define LL_USB_INT_EN_ALL USB_INT_EN_ALL /**< USB all interrupt enable */
240 #define LL_USB_INT_RESET_VAL USB_INT_EN_RESET_VAL /**< USB interrupt control reset value */
241 #define LL_USB_INT_EN_SUSPEND USB_INT_EN_SUSPEND /**< USB suspend status interrupt enable */
242 #define LL_USB_INT_EN_EP0_OUT_READY USB_INT_EN_EP0_OUT_READY /**< USB ep0 data out ready interrupt enable */
243 #define LL_USB_INT_EN_EP1_OUT_READY USB_INT_EN_EP1_OUT_READY /**< USB ep1 data out ready interrupt enable */
244 #define LL_USB_INT_EN_CRC16_ERR USB_INT_EN_CRC16_ERR /**< USB receive CRC error data interrupt enable */
245 #define LL_USB_INT_EN_UPID_ERR USB_INT_EN_UPID_ERR /**< USB receive unsupported PID interrupt enable */
246 #define LL_USB_INT_EN_TIMEOUT_ERR USB_INT_EN_TIMEOUT_ERR /**< USB rx/tx timeout error interrupt enable */
247 #define LL_USB_INT_EN_SEQ_ERR USB_INT_EN_SEQ_ERR /**< USB DATA0/DATA1 PID sequence error interrupt enable */
248 #define LL_USB_INT_EN_PID_CKS_ERR USB_INT_EN_PID_CKS_ERR /**< USB PID checksum error interrupt enable */
249 #define LL_USB_INT_EN_PID_CRC_ERR USB_INT_EN_PID_CRC_ERR /**< USB PID CRC error interrupt enable */
250 #define LL_USB_INT_EN_HOST_RESET USB_INT_EN_HOST_RESET /**< USB host reset interrupt enable */
251 #define LL_USB_INT_EN_AHB_XFER_ERR USB_INT_EN_AHB_XFER_ERR /**< USB ep3 and ep4 AHB master receive error interrupt enable */
252 #define LL_USB_INT_EN_NSE_ERR USB_INT_EN_NSE_ERR /**< USB no such endpoint error interrupt enable */
253 #define LL_USB_INT_EN_EP3_AHB_XFER_DONE USB_INT_EN_EP3_AHB_XFER_DONE /**< USB ep3 AHB master transfer done interrupt enable */
254 #define LL_USB_INT_EN_SYNC_ERR USB_INT_EN_SYNC_ERR /**< USB SYNC error interrupt enable */
255 #define LL_USB_INT_EN_BIT_STUFF_ERR USB_INT_EN_BIT_STUFF_ERR /**< USB bit stuff error interrupt enable */
256 #define LL_USB_INT_EN_BYTE_ERR USB_INT_EN_BYTE_ERR /**< USB byte error interrupt enable */
257 #define LL_USB_INT_EN_SOF USB_INT_EN_SOF /**< USB SOF interrupt enable */
258 #define LL_USB_INT_EN_EP0_TX_DONE USB_INT_EN_EP0_TX_DONE /**< USB ep0 TX done interrupt enable */
259 #define LL_USB_INT_EN_EP2_TX_DONE USB_INT_EN_EP2_TX_DONE /**< USB ep2 TX done interrupt enable */
260 #define LL_USB_INT_EN_EP3_TX_DONE USB_INT_EN_EP3_TX_DONE /**< USB ep3 TX done interrupt enable */
261 #define LL_USB_INT_EN_INTO_CONFIG USB_INT_EN_INTO_CONFIG /**< USB into cofig status enable */
262 #define LL_USB_INT_EN_EP5_OUT_READY USB_INT_EN_EP5_OUT_READY /**< USB ep5 data out ready interrupt enable */
263 #define LL_USB_INT_EN_EP4_AHB_XFER_DONE USB_INT_EN_EP4_AHB_XFER_DONE /**< USB ep4 AHB master transfer done interrupt enable */
264 #define LL_USB_INT_EN_EP4_TX_DONE USB_INT_EN_EP4_TX_DONE /**< USB ep4 TX done interrupt enable */
265 #define LL_USB_INT_EN_EP5_AHB_XFER_DONE USB_INT_EN_EP5_AHB_XFER_DONE /**< USB ep5 AHB master transfer done interrupt enable */
266 #define LL_USB_INT_EN_EP5_TIMER_OUT_ERR USB_INT_EN_EP5_TIMER_OUT_ERR /**< USB ep5 timer out error interrupt enable */
267 /** @} */
268
269 /** @defgroup USB_LL_EC_INT_CLR USB interrupt clear
270 * @{
271 */
272 #define LL_USB_INT_CLR_ALL USB_INT_CLR_ALL /**< USB all interrupt clear */
273 #define LL_USB_INT_CLR_SUSPEND USB_INT_CLR_SUSPEND /**< USB suspend status interrupt clear */
274 #define LL_USB_INT_CLR_EP0_OUT_READY USB_INT_CLR_EP0_OUT_READY /**< USB ep0 data out ready interrupt clear */
275 #define LL_USB_INT_CLR_EP1_OUT_READY USB_INT_CLR_EP1_OUT_READY /**< USB ep1 data out ready interrupt clear */
276 #define LL_USB_INT_CLR_CRC16_ERR USB_INT_CLR_CRC16_ERR /**< USB receive CRC error data interrupt clear */
277 #define LL_USB_INT_CLR_UPID_ERR USB_INT_CLR_UPID_ERR /**< USB receive unsupported PID interrupt clear */
278 #define LL_USB_INT_CLR_TIMEOUT_ERR USB_INT_CLR_TIMEOUT_ERR /**< USB rx/tx timeout error interrupt clear */
279 #define LL_USB_INT_CLR_SEQ_ERR USB_INT_CLR_SEQ_ERR /**< USB DATA0/DATA1 PID sequence error interrupt clear */
280 #define LL_USB_INT_CLR_PID_CKS_ERR USB_INT_CLR_PID_CKS_ERR /**< USB PID checksum error interrupt clear */
281 #define LL_USB_INT_CLR_PID_CRC_ERR USB_INT_CLR_PID_CRC_ERR /**< USB PID CRC error interrupt clear */
282 #define LL_USB_INT_CLR_HOST_RESET USB_INT_CLR_HOST_RESET /**< USB host reset interrupt clear */
283 #define LL_USB_INT_CLR_AHB_XFER_ERR USB_INT_CLR_AHB_XFER_ERR /**< USB ep3 and ep4 AHB master receive error interrupt clear */
284 #define LL_USB_INT_CLR_NSE_ERR USB_INT_CLR_NSE_ERR /**< USB no such endpoint error interrupt clear */
285 #define LL_USB_INT_CLR_EP3_AHB_XFER_DONE USB_INT_CLR_EP3_AHB_XFER_DONE /**< USB ep3 AHB master transfer done interrupt clear */
286 #define LL_USB_INT_CLR_SYNC_ERR USB_INT_CLR_SYNC_ERR /**< USB SYNC error interrupt clear */
287 #define LL_USB_INT_CLR_BIT_STUFF_ERR USB_INT_CLR_BIT_STUFF_ERR /**< USB bit stuff error interrupt clear */
288 #define LL_USB_INT_CLR_BYTE_ERR USB_INT_CLR_BYTE_ERR /**< USB byte error interrupt clear */
289 #define LL_USB_INT_CLR_SOF USB_INT_CLR_SOF /**< USB SOF interrupt clear */
290 #define LL_USB_INT_CLR_EP0_TX_DONE USB_INT_CLR_EP0_TX_DONE /**< USB ep0 TX done interrupt clear */
291 #define LL_USB_INT_CLR_EP2_TX_DONE USB_INT_CLR_EP2_TX_DONE /**< USB ep2 TX done interrupt clear */
292 #define LL_USB_INT_CLR_EP3_TX_DONE USB_INT_CLR_EP3_TX_DONE /**< USB ep3 TX done interrupt clear */
293 #define LL_USB_INT_CLR_INTO_CONFIG USB_INT_CLR_INTO_CONFIG /**< USB into cofig status interrupt clear */
294 #define LL_USB_INT_CLR_EP5_OUT_READY USB_INT_CLR_EP5_OUT_READY /**< USB ep5 data out ready interrupt clear */
295 #define LL_USB_INT_CLR_EP4_AHB_XFER_DONE USB_INT_CLR_EP4_AHB_XFER_DONE /**< USB ep4 AHB master transfer done interrupt clear */
296 #define LL_USB_INT_CLR_EP4_TX_DONE USB_INT_CLR_EP4_TX_DONE /**< USB ep4 TX done interrupt clear */
297 #define LL_USB_INT_CLR_EP5_AHB_XFER_DONE USB_INT_CLR_EP5_AHB_XFER_DONE /**< USB ep5 AHB master transfer done interrupt clear */
298 #define LL_USB_INT_CLR_EP5_TIMER_OUT_ERR USB_INT_CLR_EP5_TIMER_OUT_ERR /**< USB ep5 timer out error interrupt clear */
299 /** @} */
300
301 /** @defgroup USB_LL_EC_CTRL0_OUTPUT_ENDIAN_CTRL USB output data endian
302 * @{
303 */
304 #define LL_USB_CTRL0_OUTPUT_ENDIAN_CTRL_SMALL (0x00000000UL) /**< USB output data is small endian */
305 #define LL_USB_CTRL0_OUTPUT_ENDIAN_CTRL_BIG (1UL << USB_CTRL0_OUTPUT_ENDIAN_CTRL_Pos) /**< USB output data is big endian */
306 /** @} */
307
308 /** @defgroup USB_LL_EC_CTRL0_INPUT_ENDIAN_CTRL USB input data endian
309 * @{
310 */
311 #define LL_USB_CTRL0_INPUT_ENDIAN_CTRL_SMALL (0x00000000UL) /**< USB input data is small endian */
312 #define LL_USB_CTRL0_INPUT_ENDIAN_CTRL_BIG (1UL << USB_CTRL0_INPUT_ENDIAN_CTRL_Pos) /**< USB input data is big endian */
313 /** @} */
314
315 /** @defgroup USB_LL_EC_CTRL0_PROBE_SEL USB probe select signal
316 * @{
317 */
318 #define LL_USB_CTRL0_PROBE_SEL_PROTOCAL_STAT (0x00000000UL) /**< USB main protocal state machine */
319 #define LL_USB_CTRL0_PROBE_SEL_RX_STAT (1UL << USB_CTRL0_PROBE_SEL_Pos) /**< USB RX state machine */
320 #define LL_USB_CTRL0_PROBE_SEL_UTMI_SIGNALS (2UL << USB_CTRL0_PROBE_SEL_Pos) /**< USB UTMI signals */
321 #define LL_USB_CTRL0_PROBE_SEL_SYNC_STAT (3UL << USB_CTRL0_PROBE_SEL_Pos) /**< USB SYNC state machine, and RxError */
322 #define LL_USB_CTRL0_PROBE_SEL_TX_STAT (4UL << USB_CTRL0_PROBE_SEL_Pos) /**< USB TX state machine */
323 #define LL_USB_CTRL0_PROBE_SEL_DPLL_STAT (5UL << USB_CTRL0_PROBE_SEL_Pos) /**< USB DPLL state machine */
324 /** @} */
325
326 /** @defgroup USB_LL_EC_USB_EP4_FIFO_WEN USB ep4 write fifo effective byte
327 * @{
328 */
329 #define LL_USB_EP4_FIFO_WEN_DEFAULT (15UL << USB_EP4_FIFO_WR_EN_Pos) /**< USB ep4 write fifo enable default value */
330 #define LL_USB_EP4_FIFO_WEN_1BYTE (1UL << USB_EP4_FIFO_WR_EN_Pos) /**< USB ep4 write fifo 1 byte effective */
331 #define LL_USB_EP4_FIFO_WEN_2BYTE (3UL << USB_EP4_FIFO_WR_EN_Pos) /**< USB ep4 write fifo 2 byte effective */
332 #define LL_USB_EP4_FIFO_WEN_3BYTE (7UL << USB_EP4_FIFO_WR_EN_Pos) /**< USB ep4 write fifo 3 byte effective */
333 #define LL_USB_EP4_FIFO_WEN_4BYTE (15UL << USB_EP4_FIFO_WR_EN_Pos) /**< USB ep4 write fifo 4 byte effective */
334 /** @} */
335
336 /** @} */
337
338 /* Exported macro ------------------------------------------------------------*/
339 /** @defgroup USB_LL_Exported_Macros USB Exported Macros
340 * @{
341 */
342
343 /** @defgroup USB_LL_EM_WRITE_READ Common Write and read registers Macros
344 * @{
345 */
346
347 /**
348 * @brief Write a value in USB register
349 * @param __instance__ USB instance
350 * @param __REG__ Register to be written
351 * @param __VALUE__ Value to be written in the register
352 * @retval None
353 */
354 #define LL_USB_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG(__instance__->__REG__, (__VALUE__))
355
356 /**
357 * @brief Read a value in USB register
358 * @param __instance__ USB instance
359 * @param __REG__ Register to be read
360 * @retval Register value
361 */
362 #define LL_USB_ReadReg(__instance__, __REG__) READ_REG(__instance__->__REG__)
363
364 /** @} */
365
366 /** @} */
367
368 /** @} */
369
370 /* Exported functions --------------------------------------------------------*/
371 /** @defgroup USB_LL_DRIVER_FUNCTIONS Functions
372 * @{
373 */
374
375 /** @defgroup USB_LL_EF_Configuration Configuration functions
376 * @{
377 */
378
379
380 /**
381 * @brief Enable USB Transceiver LDO_3.3V low power mode
382 *
383 * Register|BitsName
384 * --------|--------
385 * USB_TRX_LDO | LP_EN
386 *
387 * @param AON_PMUx AON_PMU instance
388 * @retval None
389 */
390 __STATIC_INLINE void ll_usb_enable_xcvr_ldo33_lp(aon_pmu_regs_t *AON_PMUx)
391 {
392 SET_BITS(AON_PMUx->USB_TRX_LDO, AON_PMU_USB_TRX_LDO_LP_EN);
393 }
394
395 /**
396 * @brief Disable USB Transceiver LDO_3.3V low power mode
397 *
398 * Register|BitsName
399 * --------|--------
400 * USB_TRX_LDO | LP_EN
401 *
402 * @param AON_PMUx AON_PMU instance
403 * @retval None
404 */
405 __STATIC_INLINE void ll_usb_disable_xcvr_ldo33_lp(aon_pmu_regs_t *AON_PMUx)
406 {
407 CLEAR_BITS(AON_PMUx->USB_TRX_LDO, AON_PMU_USB_TRX_LDO_LP_EN);
408 }
409
410 /**
411 * @brief Check if USB Transceiver LDO_3.3V low power mode is enabled
412 *
413 * Register|BitsName
414 * --------|--------
415 * USB_TRX_LDO | LP_EN
416 *
417 * @param AON_PMUx AON_PMU instance
418 * @retval State of bit (1 or 0).
419 */
420 __STATIC_INLINE uint32_t ll_usb_is_enabled_xcvr_ldo33_lp(aon_pmu_regs_t *AON_PMUx)
421 {
422 return (READ_BITS(AON_PMUx->USB_TRX_LDO, AON_PMU_USB_TRX_LDO_LP_EN) == (AON_PMU_USB_TRX_LDO_LP_EN));
423 }
424
425 /**
426 * @brief Enable USB Transceiver LDO_3.3V internal vref probe to test
427 *
428 * Register|BitsName
429 * --------|--------
430 * USB_XCRV_LDO | VREF_TEST_EN
431 *
432 * @param MCU_SUBx MCU_SUB instance
433 * @retval None
434 */
435 __STATIC_INLINE void ll_usb_enable_xcvr_ldo33_vref_test(mcu_sub_regs_t *MCU_SUBx)
436 {
437 SET_BITS(MCU_SUBx->USB_XCRV_LDO, MCU_SUB_USB_XCRV_LDO_VREF_TEST_EN);
438 }
439
440 /**
441 * @brief Disable USB Transceiver LDO_3.3V internal vref probe to test
442 *
443 * Register|BitsName
444 * --------|--------
445 * USB_XCRV_LDO | VREF_TEST_EN
446 *
447 * @param MCU_SUBx MCU_SUB instance
448 * @retval None
449 */
450 __STATIC_INLINE void ll_usb_disable_xcvr_ldo33_vref_test(mcu_sub_regs_t *MCU_SUBx)
451 {
452 CLEAR_BITS(MCU_SUBx->USB_XCRV_LDO, MCU_SUB_USB_XCRV_LDO_VREF_TEST_EN);
453 }
454
455 /**
456 * @brief Check if USB Transceiver LDO_3.3V internal vref probe to test is enabled
457 *
458 * Register|BitsName
459 * --------|--------
460 * USB_XCRV_LDO | VREF_TEST_EN
461 *
462 * @param MCU_SUBx MCU_SUB instance
463 * @retval State of bit (1 or 0).
464 */
465 __STATIC_INLINE uint32_t ll_usb_is_enabled_xcvr_ldo33_vref_test(mcu_sub_regs_t *MCU_SUBx)
466 {
467 return (READ_BITS(MCU_SUBx->USB_XCRV_LDO, MCU_SUB_USB_XCRV_LDO_VREF_TEST_EN) == (MCU_SUB_USB_XCRV_LDO_VREF_TEST_EN));
468 }
469
470 /**
471 * @brief Set USB Transceiver LDO_3.3V vout trimming signal
472 *
473 * Register|BitsName
474 * --------|--------
475 * USB_TRX_LDO | BIAS_SEL
476 *
477 * @param AON_PMUx AON_PMU instance
478 * @param value This parameter can be one of the following values:
479 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL0
480 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL1
481 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL2
482 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL3
483 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL4
484 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL5
485 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL6
486 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL7
487 * @retval None
488 */
489 __STATIC_INLINE void ll_usb_set_xcrv_ldo33_bias(aon_pmu_regs_t *AON_PMUx, uint32_t value)
490 {
491 MODIFY_REG(AON_PMUx->USB_TRX_LDO, AON_PMU_USB_TRX_LDO_BIAS_SEL, value);
492 }
493
494 /**
495 * @brief Get USB Transceiver LDO_3.3V vout trimming signal
496 *
497 * Register|BitsName
498 * --------|--------
499 * USB_TRX_LDO | BIAS_SEL
500 *
501 * @param AON_PMUx AON_PMU instance
502 * @retval Returned Value can be one of the following values:
503 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL0
504 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL1
505 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL2
506 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL3
507 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL4
508 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL5
509 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL6
510 * @arg @ref LL_USB_TRX_LDO_BIAS_SEL7
511 */
512 __STATIC_INLINE uint32_t ll_usb_get_xcrv_ldo33_bias(aon_pmu_regs_t *AON_PMUx)
513 {
514 return (uint32_t)(READ_BITS(AON_PMUx->USB_TRX_LDO, AON_PMU_USB_TRX_LDO_BIAS_SEL));
515 }
516
517 /**
518 * @brief Set USB Transceiver LDO_3.3V offer XCVR's current
519 *
520 * Register|BitsName
521 * --------|--------
522 * USB_TRX_LDO | VSEL
523 *
524 * @param AON_PMUx AON_PMU instance
525 * @param value This parameter can be one of the following values:
526 * @arg @ref LL_USB_TRX_LDO_VSEL0
527 * @arg @ref LL_USB_TRX_LDO_VSEL1
528 * @arg @ref LL_USB_TRX_LDO_VSEL2
529 * @arg @ref LL_USB_TRX_LDO_VSEL3
530 * @arg @ref LL_USB_TRX_LDO_VSEL4
531 * @arg @ref LL_USB_TRX_LDO_VSEL5
532 * @arg @ref LL_USB_TRX_LDO_VSEL6
533 * @arg @ref LL_USB_TRX_LDO_VSEL7
534 * @retval None
535 */
536 __STATIC_INLINE void ll_usb_set_xcrv_ldo33_VSEL(aon_pmu_regs_t *AON_PMUx, uint32_t value)
537 {
538 MODIFY_REG(AON_PMUx->USB_TRX_LDO, AON_PMU_USB_TRX_LDO_BIAS_SEL, value);
539 }
540
541 /**
542 * @brief Get USB Transceiver LDO_3.3V offer XCVR's current
543 *
544 * Register|BitsName
545 * --------|--------
546 * USB_TRX_LDO | VSEL
547 *
548 * @param AON_PMUx AON_PMU instance
549 * @retval Returned Value can be one of the following values:
550 * @arg @ref LL_USB_TRX_LDO_VSEL0
551 * @arg @ref LL_USB_TRX_LDO_VSEL1
552 * @arg @ref LL_USB_TRX_LDO_VSEL2
553 * @arg @ref LL_USB_TRX_LDO_VSEL3
554 * @arg @ref LL_USB_TRX_LDO_VSEL4
555 * @arg @ref LL_USB_TRX_LDO_VSEL5
556 * @arg @ref LL_USB_TRX_LDO_VSEL6
557 * @arg @ref LL_USB_TRX_LDO_VSEL7
558 */
559 __STATIC_INLINE uint32_t ll_usb_get_xcrv_ldo33_VSEL(aon_pmu_regs_t *AON_PMUx)
560 {
561 return (uint32_t)(READ_BITS(AON_PMUx->USB_TRX_LDO, AON_PMU_USB_TRX_LDO_BIAS_SEL));
562 }
563
564
565 /**
566 * @brief Enable Turn off USB clock during USB suspend
567 *
568 * Register|BitsName
569 * --------|--------
570 * USB_LP_CTRL | SUSPEND_CLK_OFF
571 *
572 * @param MCU_SUBx MCU_SUB instance
573 * @retval None
574 */
575 __STATIC_INLINE void ll_usb_enable_suspend_clk_off(mcu_sub_regs_t *MCU_SUBx)
576 {
577 SET_BITS(MCU_SUBx->USB_LP_CTRL, MCU_SUB_USB_LP_CTRL_SUSPEND_CLK_OFF);
578 }
579
580 /**
581 * @brief Disable Turn off USB clock during USB suspend
582 *
583 * Register|BitsName
584 * --------|--------
585 * USB_LP_CTRL | SUSPEND_CLK_OFF
586 *
587 * @param MCU_SUBx MCU_SUB instance
588 * @retval None
589 */
590 __STATIC_INLINE void ll_usb_disable_suspend_clk_off(mcu_sub_regs_t *MCU_SUBx)
591 {
592 CLEAR_BITS(MCU_SUBx->USB_LP_CTRL, MCU_SUB_USB_LP_CTRL_SUSPEND_CLK_OFF);
593 }
594
595 /**
596 * @brief Check if Turn off USB clock during USB suspend is enabled
597 *
598 * Register|BitsName
599 * --------|--------
600 * USB_LP_CTRL | SUSPEND_CLK_OFF
601 *
602 * @param MCU_SUBx MCU_SUB instance
603 * @retval State of bit (1 or 0).
604 */
605 __STATIC_INLINE uint32_t ll_usb_is_enabled_suspend_clk_off(mcu_sub_regs_t *MCU_SUBx)
606 {
607 return (READ_BITS(MCU_SUBx->USB_LP_CTRL, MCU_SUB_USB_LP_CTRL_SUSPEND_CLK_OFF) == (MCU_SUB_USB_LP_CTRL_SUSPEND_CLK_OFF));
608 }
609
610 /**
611 * @brief Enable USB low power
612 *
613 * Register|BitsName
614 * --------|--------
615 * USB_LP_CTRL | PMU_LP_EN
616 *
617 * @param MCU_SUBx MCU_SUB instance
618 * @retval None
619 */
620 __STATIC_INLINE void ll_usb_enable_pmu_lp(mcu_sub_regs_t *MCU_SUBx)
621 {
622 SET_BITS(MCU_SUBx->USB_LP_CTRL, MCU_SUB_USB_LP_CTRL_PMU_LP_EN);
623 }
624
625 /**
626 * @brief Disable USB low power
627 *
628 * Register|BitsName
629 * --------|--------
630 * USB_LP_CTRL | PMU_LP_EN
631 *
632 * @param MCU_SUBx MCU_SUB instance
633 * @retval None
634 */
635 __STATIC_INLINE void ll_usb_disable_pmu_lp(mcu_sub_regs_t *MCU_SUBx)
636 {
637 CLEAR_BITS(MCU_SUBx->USB_LP_CTRL, MCU_SUB_USB_LP_CTRL_PMU_LP_EN);
638 }
639
640 /**
641 * @brief Check if USB low power is enabled
642 *
643 * Register|BitsName
644 * --------|--------
645 * USB_LP_CTRL | PMU_LP_EN
646 *
647 * @param MCU_SUBx MCU_SUB instance
648 * @retval State of bit (1 or 0).
649 */
650 __STATIC_INLINE uint32_t ll_usb_is_enabled_pmu_lp(mcu_sub_regs_t *MCU_SUBx)
651 {
652 return (READ_BITS(MCU_SUBx->USB_LP_CTRL, MCU_SUB_USB_LP_CTRL_PMU_LP_EN) == (MCU_SUB_USB_LP_CTRL_PMU_LP_EN));
653 }
654
655
656 /**
657 * @brief Enable USB clock force off
658 *
659 * Register|BitsName
660 * --------|--------
661 * USB_LP_CTRL | CLK_FORCE_OFF
662 *
663 * @param MCU_SUBx MCU_SUB instance
664 * @retval None
665 */
666 __STATIC_INLINE void ll_usb_enable_clk_force_off(mcu_sub_regs_t *MCU_SUBx)
667 {
668 SET_BITS(MCU_SUBx->USB_LP_CTRL, MCU_SUB_USB_LP_CTRL_CLK_FORCE_OFF);
669 }
670
671 /**
672 * @brief Disable USB clock force off
673 *
674 * Register|BitsName
675 * --------|--------
676 * USB_LP_CTRL | CLK_FORCE_OFF
677 *
678 * @param MCU_SUBx MCU_SUB instance
679 * @retval None
680 */
681 __STATIC_INLINE void ll_usb_disable_clk_force_off(mcu_sub_regs_t *MCU_SUBx)
682 {
683 CLEAR_BITS(MCU_SUBx->USB_LP_CTRL, MCU_SUB_USB_LP_CTRL_CLK_FORCE_OFF);
684 }
685
686 /**
687 * @brief Check if USB clock force off is enabled
688 *
689 * Register|BitsName
690 * --------|--------
691 * USB_LP_CTRL | CLK_FORCE_OFF
692 *
693 * @param MCU_SUBx MCU_SUB instance
694 * @retval State of bit (1 or 0).
695 */
696 __STATIC_INLINE uint32_t ll_usb_enabled_clk_force_off_is(mcu_sub_regs_t *MCU_SUBx)
697 {
698 return (READ_BITS(MCU_SUBx->USB_LP_CTRL, MCU_SUB_USB_LP_CTRL_CLK_FORCE_OFF) == (MCU_SUB_USB_LP_CTRL_CLK_FORCE_OFF));
699 }
700
701 /**
702 * @brief Enable USB Transceiver single end comparator power down
703 *
704 * Register|BitsName
705 * --------|--------
706 * USB_XCRV_CTRL | SECMP_PD
707 *
708 * @param MCU_SUBx MCU_SUB instance
709 * @retval None
710 */
711 __STATIC_INLINE void ll_usb_enable_xcvr_secmp_pd(mcu_sub_regs_t *MCU_SUBx)
712 {
713 SET_BITS(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_SECMP_PD);
714 }
715
716 /**
717 * @brief Disable USB Transceiver single end comparator power down
718 *
719 * Register|BitsName
720 * --------|--------
721 * USB_XCRV_CTRL | SECMP_PD
722 *
723 * @param MCU_SUBx MCU_SUB instance
724 * @retval None
725 */
726 __STATIC_INLINE void ll_usb_disable_xcvr_secmp_pd(mcu_sub_regs_t *MCU_SUBx)
727 {
728 CLEAR_BITS(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_SECMP_PD);
729 }
730
731 /**
732 * @brief Check if USB Transceiver single end comparator power down is enabled
733 *
734 * Register|BitsName
735 * --------|--------
736 * USB_XCRV_CTRL | SECMP_PD
737 *
738 * @param MCU_SUBx MCU_SUB instance
739 * @retval State of bit (1 or 0).
740 */
741 __STATIC_INLINE uint32_t ll_usb_is_enabled_xcvr_secmp_pd(mcu_sub_regs_t *MCU_SUBx)
742 {
743 return (READ_BITS(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_SECMP_PD) == (MCU_SUB_USB_XCRV_CTRL_SECMP_PD));
744 }
745
746 /**
747 * @brief Set USB Transceiver speed
748 *
749 * Register|BitsName
750 * --------|--------
751 * USB_XCRV_CTRL | SPEED
752 *
753 * @param MCU_SUBx MCU_SUB instance
754 * @param speed This parameter can be one of the following values:
755 * @arg @ref LL_USB_XCRV_CTRL_SPEED_LOW
756 * @arg @ref LL_USB_XCRV_CTRL_SPEED_FULL
757 * @retval None
758 */
759 __STATIC_INLINE void ll_usb_set_xcrv_speed(mcu_sub_regs_t *MCU_SUBx, uint32_t speed)
760 {
761 MODIFY_REG(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_SPEED, speed);
762 }
763
764 /**
765 * @brief Get USB Transceiver speed
766 *
767 * Register|BitsName
768 * --------|--------
769 * USB_XCRV_CTRL | SPEED
770 *
771 * @param MCU_SUBx MCU_SUB instance
772 * @retval Returned Value can be one of the following values:
773 * @arg @ref LL_USB_XCRV_CTRL_SPEED_LOW
774 * @arg @ref LL_USB_XCRV_CTRL_SPEED_FULL
775 */
776 __STATIC_INLINE uint32_t ll_usb_get_xcrv_speed(mcu_sub_regs_t *MCU_SUBx)
777 {
778 return (uint32_t)(READ_BITS(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_SPEED));
779 }
780
781 /**
782 * @brief Enable USB Transceiver suspend
783 *
784 * Register|BitsName
785 * --------|--------
786 * USB_XCRV_CTRL | SUSPEND
787 *
788 * @param MCU_SUBx MCU_SUB instance
789 * @retval None
790 */
791 __STATIC_INLINE void ll_usb_enable_xcvr_suspend(mcu_sub_regs_t *MCU_SUBx)
792 {
793 SET_BITS(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_SUSPEND);
794 }
795
796 /**
797 * @brief Disable USB Transceiver suspend
798 *
799 * Register|BitsName
800 * --------|--------
801 * USB_XCRV_CTRL | SUSPEND
802 *
803 * @param MCU_SUBx MCU_SUB instance
804 * @retval None
805 */
806 __STATIC_INLINE void ll_usb_disable_xcvr_suspend(mcu_sub_regs_t *MCU_SUBx)
807 {
808 CLEAR_BITS(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_SUSPEND);
809 }
810
811 /**
812 * @brief Check if USB Transceiver suspend is enabled
813 *
814 * Register|BitsName
815 * --------|--------
816 * USB_XCRV_CTRL | SUSPEND
817 *
818 * @param MCU_SUBx MCU_SUB instance
819 * @retval State of bit (1 or 0).
820 */
821 __STATIC_INLINE uint32_t ll_usb_is_enabled_xcvr_suspend(mcu_sub_regs_t *MCU_SUBx)
822 {
823 return (READ_BITS(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_SUSPEND) == (MCU_SUB_USB_XCRV_CTRL_SUSPEND));
824 }
825
826 /**
827 * @brief Enable USB Transceiver bias
828 *
829 * Register|BitsName
830 * --------|--------
831 * USB_XCRV_CTRL | BIAS_EN
832 *
833 * @param MCU_SUBx MCU_SUB instance
834 * @retval None
835 */
836 __STATIC_INLINE void ll_usb_enable_xcvr_bias(mcu_sub_regs_t *MCU_SUBx)
837 {
838 SET_BITS(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_BIAS_EN);
839 }
840
841 /**
842 * @brief Disable USB Transceiver bias
843 *
844 * Register|BitsName
845 * --------|--------
846 * USB_XCRV_CTRL | BIAS_EN
847 *
848 * @param MCU_SUBx MCU_SUB instance
849 * @retval None
850 */
851 __STATIC_INLINE void ll_usb_disable_xcvr_bias(mcu_sub_regs_t *MCU_SUBx)
852 {
853 CLEAR_BITS(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_BIAS_EN);
854 }
855
856 /**
857 * @brief Check if USB Transceiver bias is enabled
858 *
859 * Register|BitsName
860 * --------|--------
861 * USB_XCRV_CTRL | BIAS_EN
862 *
863 * @param MCU_SUBx MCU_SUB instance
864 * @retval State of bit (1 or 0).
865 */
866 __STATIC_INLINE uint32_t ll_usb_is_enabled_xcvr_bias(mcu_sub_regs_t *MCU_SUBx)
867 {
868 return (READ_BITS(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_BIAS_EN) == (MCU_SUB_USB_XCRV_CTRL_BIAS_EN));
869 }
870
871 /**
872 * @brief Set USB Transceiver D- output impedance trim
873 *
874 * Register|BitsName
875 * --------|--------
876 * USB_XCRV_CTRL | RTRIMN
877 *
878 * @param MCU_SUBx MCU_SUB instance
879 * @param value This parameter can be one of the following values:
880 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN0
881 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN1
882 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN2
883 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN3
884 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN4
885 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN5
886 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN6
887 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN7
888 * @retval None
889 */
890 __STATIC_INLINE void ll_usb_set_xcrv_rtrimn(mcu_sub_regs_t *MCU_SUBx, uint32_t value)
891 {
892 MODIFY_REG(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_RTRIMN, value);
893 }
894
895 /**
896 * @brief Get USB Transceiver D- output impedance trim
897 *
898 * Register|BitsName
899 * --------|--------
900 * USB_XCRV_CTRL | RTRIMN
901 *
902 * @param MCU_SUBx MCU_SUB instance
903 * @retval Returned Value can be one of the following values:
904 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN0
905 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN1
906 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN2
907 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN3
908 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN4
909 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN5
910 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN6
911 * @arg @ref LL_USB_XCRV_CTRL_RTRIMN7
912 */
913 __STATIC_INLINE uint32_t ll_usb_get_xcrv_rtrimn(mcu_sub_regs_t *MCU_SUBx)
914 {
915 return (uint32_t)(READ_BITS(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_RTRIMN));
916 }
917
918 /**
919 * @brief Set USB Transceiver D+ output impedance trim
920 *
921 * Register|BitsName
922 * --------|--------
923 * USB_XCRV_CTRL | RTRIMP
924 *
925 * @param MCU_SUBx MCU_SUB instance
926 * @param value This parameter can be one of the following values:
927 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP0
928 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP1
929 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP2
930 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP3
931 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP4
932 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP5
933 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP6
934 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP7
935 * @retval None
936 */
937 __STATIC_INLINE void ll_usb_set_xcrv_rtrimp(mcu_sub_regs_t *MCU_SUBx, uint32_t value)
938 {
939 MODIFY_REG(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_RTRIMP, value);
940 }
941
942 /**
943 * @brief Get USB Transceiver D+ output impedance trim
944 *
945 * Register|BitsName
946 * --------|--------
947 * USB_XCRV_CTRL | RTRIMP
948 *
949 * @param MCU_SUBx MCU_SUB instance
950 * @retval Returned Value can be one of the following values:
951 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP0
952 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP1
953 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP2
954 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP3
955 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP4
956 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP5
957 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP6
958 * @arg @ref LL_USB_XCRV_CTRL_RTRIMP7
959 */
960 __STATIC_INLINE uint32_t ll_usb_get_xcrv_rtrimp(mcu_sub_regs_t *MCU_SUBx)
961 {
962 return (uint32_t)(READ_BITS(MCU_SUBx->USB_XCRV_CTRL, MCU_SUB_USB_XCRV_CTRL_RTRIMP));
963 }
964
965 /**
966 * @brief Enable USB software reset
967 *
968 * Register|BitsName
969 * --------|--------
970 * USB_SW_RST | usb_software_reset
971 *
972 * @param MCU_SUBx MCU_SUB instance
973 * @retval None
974 */
975 __STATIC_INLINE void ll_usb_enable_sw_reset(mcu_sub_regs_t *MCU_SUBx)
976 {
977 SET_BITS(MCU_SUBx->USB_SW_RST, MCU_SUB_USB_SW_RST_EN);
978 }
979
980 /**
981 * @brief Disable USB software reset
982 *
983 * Register|BitsName
984 * --------|--------
985 * USB_SW_RST | usb_software_reset
986 *
987 * @param MCU_SUBx MCU_SUB instance
988 * @retval None
989 */
990 __STATIC_INLINE void ll_usb_disable_sw_reset(mcu_sub_regs_t *MCU_SUBx)
991 {
992 CLEAR_BITS(MCU_SUBx->USB_SW_RST, MCU_SUB_USB_SW_RST_EN);
993 }
994
995 /**
996 * @brief Check if USB software reset is enabled
997 *
998 * Register|BitsName
999 * --------|--------
1000 * USB_SW_RST | usb_software_reset
1001 *
1002 * @param MCU_SUBx MCU_SUB instance
1003 * @retval State of bit (1 or 0).
1004 */
1005 __STATIC_INLINE uint32_t ll_usb_is_enabled_sw_reset(mcu_sub_regs_t *MCU_SUBx)
1006 {
1007 return (READ_BITS(MCU_SUBx->USB_SW_RST, MCU_SUB_USB_SW_RST_EN) == (MCU_SUB_USB_SW_RST_EN));
1008 }
1009
1010 /**
1011 * @brief Set USB enumeration type
1012 *
1013 * Register|BitsName
1014 * --------|--------
1015 * CTRL | MCU_ENUM
1016 *
1017 * @param USBx USB instance
1018 * @param type This parameter can be one of the following values:
1019 * @arg @ref LL_USB_ENUM_TYPE_HW
1020 * @arg @ref LL_USB_ENUM_TYPE_MCU
1021 * @retval None
1022 */
1023 __STATIC_INLINE void ll_usb_set_usb_enum_type(usb_regs_t *USBx, uint32_t type)
1024 {
1025 MODIFY_REG(USBx->CTRL, USB_CTRL_MCU_ENUM, type);
1026 }
1027
1028 /**
1029 * @brief Get USB enumeration type
1030 *
1031 * Register|BitsName
1032 * --------|--------
1033 * CTRL | MCU_ENUM
1034 *
1035 * @param USBx USB instance
1036 * @retval Returned Value can be one of the following values:
1037 * @arg @ref LL_USB_ENUM_TYPE_HW
1038 * @arg @ref LL_USB_ENUM_TYPE_MCU
1039 */
1040 __STATIC_INLINE uint32_t ll_usb_get_enum_type(usb_regs_t *USBx)
1041 {
1042 return (uint32_t)(READ_BITS(USBx->CTRL, USB_CTRL_MCU_ENUM));
1043 }
1044
1045 /**
1046 * @brief Enable USB OUT data in EP0 is ready
1047 *
1048 * Register|BitsName
1049 * --------|--------
1050 * CTRL | EP0_OUT_DATA_RDY
1051 *
1052 * @param USBx USB instance
1053 * @retval None
1054 */
1055 __STATIC_INLINE void ll_usb_enable_ep0_out_dat_rdy(usb_regs_t *USBx)
1056 {
1057 SET_BITS(USBx->CTRL, USB_CTRL_EP0_OUT_DATA_RDY);
1058 }
1059
1060 /**
1061 * @brief Disable USB OUT data in EP0 is ready
1062 *
1063 * Register|BitsName
1064 * --------|--------
1065 * CTRL | EP0_OUT_DATA_RDY
1066 *
1067 * @param USBx USB instance
1068 * @retval None
1069 */
1070 __STATIC_INLINE void ll_usb_disable_ep0_out_dat_rdy(usb_regs_t *USBx)
1071 {
1072 CLEAR_BITS(USBx->CTRL, USB_CTRL_EP0_OUT_DATA_RDY);
1073 }
1074
1075 /**
1076 * @brief Check if USB OUT data in EP0 is ready is enabled
1077 *
1078 * Register|BitsName
1079 * --------|--------
1080 * CTRL | EP0_OUT_DATA_RDY
1081 *
1082 * @param USBx USB instance
1083 * @retval State of bit (1 or 0).
1084 */
1085 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep0_out_dat_rdy(usb_regs_t *USBx)
1086 {
1087 return (READ_BITS(USBx->CTRL, USB_CTRL_EP0_OUT_DATA_RDY) == (USB_CTRL_EP0_OUT_DATA_RDY));
1088 }
1089
1090 /**
1091 * @brief Enable USB MCU remote wakeup USB host
1092 *
1093 * Register|BitsName
1094 * --------|--------
1095 * CTRL | MCU_WAKEUP
1096 *
1097 * @param USBx USB instance
1098 * @retval None
1099 */
1100 __STATIC_INLINE void ll_usb_enable_mcu_wakeup(usb_regs_t *USBx)
1101 {
1102 SET_BITS(USBx->CTRL, USB_CTRL_MCU_WAKEUP);
1103 }
1104
1105 /**
1106 * @brief Disable USB MCU remote wakeup USB host
1107 *
1108 * Register|BitsName
1109 * --------|--------
1110 * CTRL | MCU_WAKEUP
1111 *
1112 * @param USBx USB instance
1113 * @retval None
1114 */
1115 __STATIC_INLINE void ll_usb_disable_mcu_wakeup(usb_regs_t *USBx)
1116 {
1117 CLEAR_BITS(USBx->CTRL, USB_CTRL_MCU_WAKEUP);
1118 }
1119
1120
1121 /**
1122 * @brief Enable USB REMOTE_WAKEUP feature
1123 *
1124 * Register|BitsName
1125 * --------|--------
1126 * CTRL | DEV_REMOTE_WAKEUP
1127 *
1128 * @param USBx USB instance
1129 * @retval None
1130 */
1131 __STATIC_INLINE void ll_usb_enable_dev_remote_wakeup(usb_regs_t *USBx)
1132 {
1133 SET_BITS(USBx->CTRL, USB_CTRL_DEV_REMOTE_WAKEUP);
1134 }
1135
1136 /**
1137 * @brief Disable USB REMOTE_WAKEUP feature
1138 *
1139 * Register|BitsName
1140 * --------|--------
1141 * CTRL | DEV_REMOTE_WAKEUP
1142 *
1143 * @param USBx USB instance
1144 * @retval None
1145 */
1146 __STATIC_INLINE void ll_usb_disable_dev_remote_wakeup(usb_regs_t *USBx)
1147 {
1148 CLEAR_BITS(USBx->CTRL, USB_CTRL_DEV_REMOTE_WAKEUP);
1149 }
1150
1151 /**
1152 * @brief Check if USB REMOTE_WAKEUP feature is enabled
1153 *
1154 * Register|BitsName
1155 * --------|--------
1156 * CTRL | DEV_REMOTE_WAKEUP
1157 *
1158 * @param USBx USB instance
1159 * @retval State of bit (1 or 0).
1160 */
1161 __STATIC_INLINE uint32_t ll_usb_is_enabled_dev_remote_wakeup(usb_regs_t *USBx)
1162 {
1163 return (READ_BITS(USBx->CTRL, USB_CTRL_DEV_REMOTE_WAKEUP) == (USB_CTRL_DEV_REMOTE_WAKEUP));
1164 }
1165
1166 /**
1167 * @brief Enable USB is in addressed status
1168 *
1169 * Register|BitsName
1170 * --------|--------
1171 * CTRL | ADDR_STAT
1172 *
1173 * @param USBx USB instance
1174 * @retval None
1175 */
1176 __STATIC_INLINE void ll_usb_enable_addr_stat(usb_regs_t *USBx)
1177 {
1178 SET_BITS(USBx->CTRL, USB_CTRL_ADDR_STAT);
1179 }
1180
1181 /**
1182 * @brief Disable USB is in addressed status
1183 *
1184 * Register|BitsName
1185 * --------|--------
1186 * CTRL | ADDR_STAT
1187 *
1188 * @param USBx USB instance
1189 * @retval None
1190 */
1191 __STATIC_INLINE void ll_usb_disable_addr_stat(usb_regs_t *USBx)
1192 {
1193 CLEAR_BITS(USBx->CTRL, USB_CTRL_ADDR_STAT);
1194 }
1195
1196 /**
1197 * @brief Check if USB is in addressed status is enabled
1198 *
1199 * Register|BitsName
1200 * --------|--------
1201 * CTRL | ADDR_STAT
1202 *
1203 * @param USBx USB instance
1204 * @retval State of bit (1 or 0).
1205 */
1206 __STATIC_INLINE uint32_t ll_usb_is_enabled_addr_stat(usb_regs_t *USBx)
1207 {
1208 return (READ_BITS(USBx->CTRL, USB_CTRL_ADDR_STAT) == (USB_CTRL_ADDR_STAT));
1209 }
1210
1211 /**
1212 * @brief Enable USB is in addressed status
1213 *
1214 * Register|BitsName
1215 * --------|--------
1216 * CTRL | CFG_STAT
1217 *
1218 * @param USBx USB instance
1219 * @retval None
1220 */
1221 __STATIC_INLINE void ll_usb_enable_cfg_stat(usb_regs_t *USBx)
1222 {
1223 SET_BITS(USBx->CTRL, USB_CTRL_CFG_STAT);
1224 }
1225
1226 /**
1227 * @brief Disable USB is in addressed status
1228 *
1229 * Register|BitsName
1230 * --------|--------
1231 * CTRL | CFG_STAT
1232 *
1233 * @param USBx USB instance
1234 * @retval None
1235 */
1236 __STATIC_INLINE void ll_usb_disable_cfg_stat(usb_regs_t *USBx)
1237 {
1238 CLEAR_BITS(USBx->CTRL, USB_CTRL_CFG_STAT);
1239 }
1240
1241 /**
1242 * @brief Check if USB is in addressed status is enabled
1243 *
1244 * Register|BitsName
1245 * --------|--------
1246 * CTRL | CFG_STAT
1247 *
1248 * @param USBx USB instance
1249 * @retval State of bit (1 or 0).
1250 */
1251 __STATIC_INLINE uint32_t ll_usb_is_enabled_cfg_stat(usb_regs_t *USBx)
1252 {
1253 return (READ_BITS(USBx->CTRL, USB_CTRL_CFG_STAT) == (USB_CTRL_CFG_STAT));
1254 }
1255
1256 /**
1257 * @brief Enable MCU interpret USB device ok
1258 *
1259 * Register|BitsName
1260 * --------|--------
1261 * CTRL | CMD_OK
1262 *
1263 * @param USBx USB instance
1264 * @retval None
1265 */
1266 __STATIC_INLINE void ll_usb_enable_cmd_ok(usb_regs_t *USBx)
1267 {
1268 SET_BITS(USBx->CTRL, USB_CTRL_CMD_OK);
1269 }
1270
1271 /**
1272 * @brief Disable MCU interpret USB device ok
1273 *
1274 * Register|BitsName
1275 * --------|--------
1276 * CTRL | CMD_OK
1277 *
1278 * @param USBx USB instance
1279 * @retval None
1280 */
1281 __STATIC_INLINE void ll_usb_disable_cmd_ok(usb_regs_t *USBx)
1282 {
1283 CLEAR_BITS(USBx->CTRL, USB_CTRL_CMD_OK);
1284 }
1285
1286 /**
1287 * @brief Enable MCU interpret USB device error
1288 *
1289 * Register|BitsName
1290 * --------|--------
1291 * CTRL | CMD_ERR
1292 *
1293 * @param USBx USB instance
1294 * @retval None
1295 */
1296 __STATIC_INLINE void ll_usb_enable_cmd_err(usb_regs_t *USBx)
1297 {
1298 SET_BITS(USBx->CTRL, USB_CTRL_CMD_ERR);
1299 }
1300
1301 /**
1302 * @brief Disable MCU interpret USB device error
1303 *
1304 * Register|BitsName
1305 * --------|--------
1306 * CTRL | CMD_ERR
1307 *
1308 * @param USBx USB instance
1309 * @retval None
1310 */
1311 __STATIC_INLINE void ll_usb_disable_cmd_err(usb_regs_t *USBx)
1312 {
1313 CLEAR_BITS(USBx->CTRL, USB_CTRL_CMD_ERR);
1314 }
1315
1316 /**
1317 * @brief Set USB function address
1318 *
1319 * Register|BitsName
1320 * --------|--------
1321 * CTRL | FUNC_ADDR
1322 *
1323 * @param USBx USB instance
1324 * @param addr This parameter can be one of the following values:
1325 * 1 ~127
1326 * @retval None
1327 */
1328 __STATIC_INLINE void ll_usb_set_func_addr(usb_regs_t *USBx, uint32_t addr)
1329 {
1330 MODIFY_REG(USBx->CTRL, USB_CTRL_FUNC_ADDR, addr << USB_CTRL_FUNC_ADDR_Pos);
1331 }
1332
1333 /**
1334 * @brief Get USB function address
1335 *
1336 * Register|BitsName
1337 * --------|--------
1338 * CTRL | FUNC_ADDR
1339 *
1340 * @param USBx USB instance
1341 * @retval Returned Value can be one of the following values:
1342 * 1 ~127
1343 */
1344 __STATIC_INLINE uint32_t ll_usb_get_func_addr(usb_regs_t *USBx)
1345 {
1346 return (uint32_t)(READ_BITS(USBx->CTRL, USB_CTRL_FUNC_ADDR) >> USB_CTRL_FUNC_ADDR_Pos);
1347 }
1348
1349 /**
1350 * @brief Enable USB OUT data in EP1 is ready
1351 *
1352 * Register|BitsName
1353 * --------|--------
1354 * CTRL | EP1_OUT_DATA_RDY
1355 *
1356 * @param USBx USB instance
1357 * @retval None
1358 */
1359 __STATIC_INLINE void ll_usb_enable_ep1_out_dat_rdy(usb_regs_t *USBx)
1360 {
1361 SET_BITS(USBx->CTRL, USB_CTRL_EP1_OUT_DATA_RDY);
1362 }
1363
1364 /**
1365 * @brief Disable USB OUT data in EP1 is ready
1366 *
1367 * Register|BitsName
1368 * --------|--------
1369 * CTRL | EP1_OUT_DATA_RDY
1370 *
1371 * @param USBx USB instance
1372 * @retval None
1373 */
1374 __STATIC_INLINE void ll_usb_disable_ep1_out_dat_rdy(usb_regs_t *USBx)
1375 {
1376 CLEAR_BITS(USBx->CTRL, USB_CTRL_EP1_OUT_DATA_RDY);
1377 }
1378
1379 /**
1380 * @brief Check if USB OUT data in EP1 is ready is enabled
1381 *
1382 * Register|BitsName
1383 * --------|--------
1384 * CTRL | EP1_OUT_DATA_RDY
1385 *
1386 * @param USBx USB instance
1387 * @retval State of bit (1 or 0).
1388 */
1389 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep1_out_dat_rdy(usb_regs_t *USBx)
1390 {
1391 return (READ_BITS(USBx->CTRL, USB_CTRL_EP1_OUT_DATA_RDY) == (USB_CTRL_EP1_OUT_DATA_RDY));
1392 }
1393
1394 /**
1395 * @brief Enable USB OUT data in EP5 is ready
1396 *
1397 * Register|BitsName
1398 * --------|--------
1399 * CTRL | EP5_OUT_DATA_RDY
1400 *
1401 * @param USBx USB instance
1402 * @retval None
1403 */
1404 __STATIC_INLINE void ll_usb_enable_ep5_out_dat_rdy(usb_regs_t *USBx)
1405 {
1406 SET_BITS(USBx->CTRL, USB_CTRL_EP5_OUT_DATA_RDY);
1407 }
1408
1409 /**
1410 * @brief Disable USB OUT data in EP1 is ready
1411 *
1412 * Register|BitsName
1413 * --------|--------
1414 * CTRL | EP5_OUT_DATA_RDY
1415 *
1416 * @param USBx USB instance
1417 * @retval None
1418 */
1419 __STATIC_INLINE void ll_usb_disable_ep5_out_dat_rdy(usb_regs_t *USBx)
1420 {
1421 CLEAR_BITS(USBx->CTRL, USB_CTRL_EP5_OUT_DATA_RDY);
1422 }
1423
1424 /**
1425 * @brief Check if USB OUT data in EP1 is ready is enabled
1426 *
1427 * Register|BitsName
1428 * --------|--------
1429 * CTRL | EP5_OUT_DATA_RDY
1430 *
1431 * @param USBx USB instance
1432 * @retval State of bit (1 or 0).
1433 */
1434 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep5_out_dat_rdy(usb_regs_t *USBx)
1435 {
1436 return (READ_BITS(USBx->CTRL, USB_CTRL_EP5_OUT_DATA_RDY) == (USB_CTRL_EP5_OUT_DATA_RDY));
1437 }
1438
1439 /**
1440 * @brief Enable USB EP0 FIFO switch
1441 *
1442 * Register|BitsName
1443 * --------|--------
1444 * CTRL | EP0_FIFO_SWITCH
1445 *
1446 * @param USBx USB instance
1447 * @retval None
1448 */
1449 __STATIC_INLINE void ll_usb_enable_ep0_fifo_switch(usb_regs_t *USBx)
1450 {
1451 SET_BITS(USBx->CTRL, USB_CTRL_EP0_FIFO_SWITCH);
1452 }
1453
1454 /**
1455 * @brief Disable USB EP0 FIFO switch
1456 *
1457 * Register|BitsName
1458 * --------|--------
1459 * CTRL | EP0_FIFO_SWITCH
1460 *
1461 * @param USBx USB instance
1462 * @retval None
1463 */
1464 __STATIC_INLINE void ll_usb_disable_ep0_fifo_switch(usb_regs_t *USBx)
1465 {
1466 CLEAR_BITS(USBx->CTRL, USB_CTRL_EP0_FIFO_SWITCH);
1467 }
1468
1469 /**
1470 * @brief Check if USB EP0 FIFO switch is enabled
1471 *
1472 * Register|BitsName
1473 * --------|--------
1474 * CTRL | EP0_FIFO_SWITCH
1475 *
1476 * @param USBx USB instance
1477 * @retval State of bit (1 or 0).
1478 */
1479 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep0_fifo_switch(usb_regs_t *USBx)
1480 {
1481 return (READ_BITS(USBx->CTRL, USB_CTRL_EP0_FIFO_SWITCH) == (USB_CTRL_EP0_FIFO_SWITCH));
1482 }
1483
1484
1485 /**
1486 * @brief Enable USB has sent all data to EP0 IN FIFO
1487 *
1488 * Register|BitsName
1489 * --------|--------
1490 * EP0_1_CTRL | EP0_DATA_RDY
1491 *
1492 * @param USBx USB instance
1493 * @retval None
1494 */
1495 __STATIC_INLINE void ll_usb_enable_ep0_dat_rdy(usb_regs_t *USBx)
1496 {
1497 SET_BITS(USBx->EP0_1_CTRL, USB_EP0_CTRL_DATA_RDY);
1498 }
1499
1500 /**
1501 * @brief Disable USB has sent all data to EP0 IN FIFO
1502 *
1503 * Register|BitsName
1504 * --------|--------
1505 * EP0_1_CTRL | EP0_DATA_RDY
1506 *
1507 * @param USBx USB instance
1508 * @retval None
1509 */
1510 __STATIC_INLINE void ll_usb_disable_ep0_dat_rdy(usb_regs_t *USBx)
1511 {
1512 CLEAR_BITS(USBx->EP0_1_CTRL, USB_EP0_CTRL_DATA_RDY);
1513 }
1514
1515 /**
1516 * @brief Check if USB has sent all data to EP0 IN FIFO is enabled
1517 *
1518 * Register|BitsName
1519 * --------|--------
1520 * EP0_1_CTRL | EP0_DATA_RDY
1521 *
1522 * @param USBx USB instance
1523 * @retval State of bit (1 or 0).
1524 */
1525 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep0_dat_rdy(usb_regs_t *USBx)
1526 {
1527 return (READ_BITS(USBx->EP0_1_CTRL, USB_EP0_CTRL_DATA_RDY) == (USB_EP0_CTRL_DATA_RDY));
1528 }
1529
1530 /**
1531 * @brief Enable Clear USB EP0 IN FIFO
1532 *
1533 * Register|BitsName
1534 * --------|--------
1535 * EP0_1_CTRL | EP0_IFIFO_CLR
1536 *
1537 * @param USBx USB instance
1538 * @retval None
1539 */
1540 __STATIC_INLINE void ll_usb_enable_clr_ep0_fifo(usb_regs_t *USBx)
1541 {
1542 SET_BITS(USBx->EP0_1_CTRL, USB_EP0_CTRL_IFIFO_CLR);
1543 }
1544
1545 /**
1546 * @brief Disable Clear USB EP0 IN FIFO
1547 *
1548 * Register|BitsName
1549 * --------|--------
1550 * EP0_1_CTRL | EP0_IFIFO_CLR
1551 *
1552 * @param USBx USB instance
1553 * @retval None
1554 */
1555 __STATIC_INLINE void ll_usb_disable_clr_ep0_fifo(usb_regs_t *USBx)
1556 {
1557 CLEAR_BITS(USBx->EP0_1_CTRL, USB_EP0_CTRL_IFIFO_CLR);
1558 }
1559
1560 /**
1561 * @brief Enable Clear USB EP1 OUT FIFO
1562 *
1563 * Register|BitsName
1564 * --------|--------
1565 * EP0_1_CTRL | EP1_IFIFO_CLR
1566 *
1567 * @param USBx USB instance
1568 * @retval None
1569 */
1570 __STATIC_INLINE void ll_usb_enable_clr_ep1_fifo(usb_regs_t *USBx)
1571 {
1572 SET_BITS(USBx->EP0_1_CTRL, USB_EP1_CTRL_IFIFO_CLR);
1573 }
1574
1575 /**
1576 * @brief Disable Clear USB EP1 OUT FIFO
1577 *
1578 * Register|BitsName
1579 * --------|--------
1580 * EP0_1_CTRL | EP1_IFIFO_CLR
1581 *
1582 * @param USBx USB instance
1583 * @retval None
1584 */
1585 __STATIC_INLINE void ll_usb_disable_clr_ep1_fifo(usb_regs_t *USBx)
1586 {
1587 CLEAR_BITS(USBx->EP0_1_CTRL, USB_EP1_CTRL_IFIFO_CLR);
1588 }
1589
1590 /**
1591 * @brief Enable USB has sent all data to EP2 IN FIFO
1592 *
1593 * Register|BitsName
1594 * --------|--------
1595 * EP2_CTRL | DATA_RDY
1596 *
1597 * @param USBx USB instance
1598 * @retval None
1599 */
1600 __STATIC_INLINE void ll_usb_enable_ep2_dat_rdy(usb_regs_t *USBx)
1601 {
1602 SET_BITS(USBx->EP2_CTRL, USB_EP2_CTRL_DATA_RDY);
1603 }
1604
1605 /**
1606 * @brief Disable USB has sent all data to EP2 IN FIFO
1607 *
1608 * Register|BitsName
1609 * --------|--------
1610 * EP2_CTRL | DATA_RDY
1611 *
1612 * @param USBx USB instance
1613 * @retval None
1614 */
1615 __STATIC_INLINE void ll_usb_disable_ep2_dat_rdy(usb_regs_t *USBx)
1616 {
1617 CLEAR_BITS(USBx->EP2_CTRL, USB_EP2_CTRL_DATA_RDY);
1618 }
1619
1620 /**
1621 * @brief Check if USB has sent all data to EP2 IN FIFO is enabled
1622 *
1623 * Register|BitsName
1624 * --------|--------
1625 * EP2_CTRL | DATA_RDY
1626 *
1627 * @param USBx USB instance
1628 * @retval State of bit (1 or 0).
1629 */
1630 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep2_dat_rdy(usb_regs_t *USBx)
1631 {
1632 return (READ_BITS(USBx->EP2_CTRL, USB_EP2_CTRL_DATA_RDY) == (USB_EP2_CTRL_DATA_RDY));
1633 }
1634
1635 /**
1636 * @brief Enable Clear USB EP2 IN FIFO
1637 *
1638 * Register|BitsName
1639 * --------|--------
1640 * EP2_CTRL | IFIFO_CLR
1641 *
1642 * @param USBx USB instance
1643 * @retval None
1644 */
1645 __STATIC_INLINE void ll_usb_enable_clr_ep2_fifo(usb_regs_t *USBx)
1646 {
1647 SET_BITS(USBx->EP2_CTRL, USB_EP2_CTRL_IFIFO_CLR);
1648 }
1649
1650 /**
1651 * @brief Disable Clear USB EP2 IN FIFO
1652 *
1653 * Register|BitsName
1654 * --------|--------
1655 * EP2_CTRL | IFIFO_CLR
1656 *
1657 * @param USBx USB instance
1658 * @retval None
1659 */
1660 __STATIC_INLINE void ll_usb_disable_clr_ep2_fifo(usb_regs_t *USBx)
1661 {
1662 CLEAR_BITS(USBx->EP2_CTRL, USB_EP2_CTRL_IFIFO_CLR);
1663 }
1664
1665 /**
1666 * @brief Enable USB has sent all data to EP3 IN FIFO
1667 *
1668 * Register|BitsName
1669 * --------|--------
1670 * EP3_CTRL | DATA_RDY
1671 *
1672 * @param USBx USB instance
1673 * @retval None
1674 */
1675 __STATIC_INLINE void ll_usb_enable_ep3_dat_rdy(usb_regs_t *USBx)
1676 {
1677 SET_BITS(USBx->EP3_CTRL, USB_EP3_CTRL_DATA_RDY);
1678 }
1679
1680 /**
1681 * @brief Disable USB has sent all data to EP3 IN FIFO
1682 *
1683 * Register|BitsName
1684 * --------|--------
1685 * EP3_CTRL | DATA_RDY
1686 *
1687 * @param USBx USB instance
1688 * @retval None
1689 */
1690 __STATIC_INLINE void ll_usb_disable_ep3_dat_rdy(usb_regs_t *USBx)
1691 {
1692 CLEAR_BITS(USBx->EP3_CTRL, USB_EP3_CTRL_DATA_RDY);
1693 }
1694
1695 /**
1696 * @brief Check if USB has sent all data to EP3 IN FIFO is enabled
1697 *
1698 * Register|BitsName
1699 * --------|--------
1700 * EP3_CTRL | DATA_RDY
1701 *
1702 * @param USBx USB instance
1703 * @retval State of bit (1 or 0).
1704 */
1705 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep3_dat_rdy(usb_regs_t *USBx)
1706 {
1707 return (READ_BITS(USBx->EP3_CTRL, USB_EP3_CTRL_DATA_RDY) == (USB_EP3_CTRL_DATA_RDY));
1708 }
1709
1710 /**
1711 * @brief Enable Clear USB EP3 IN FIFO
1712 *
1713 * Register|BitsName
1714 * --------|--------
1715 * EP3_CTRL | IFIFO_CLR
1716 *
1717 * @param USBx USB instance
1718 * @retval None
1719 */
1720 __STATIC_INLINE void ll_usb_enable_clr_ep3_fifo(usb_regs_t *USBx)
1721 {
1722 SET_BITS(USBx->EP3_CTRL, USB_EP3_CTRL_IFIFO_CLR);
1723 }
1724
1725 /**
1726 * @brief Disable Clear USB EP3 IN FIFO
1727 *
1728 * Register|BitsName
1729 * --------|--------
1730 * EP3_CTRL | IFIFO_CLR
1731 *
1732 * @param USBx USB instance
1733 * @retval None
1734 */
1735 __STATIC_INLINE void ll_usb_disable_clr_ep3_fifo(usb_regs_t *USBx)
1736 {
1737 CLEAR_BITS(USBx->EP3_CTRL, USB_EP3_CTRL_IFIFO_CLR);
1738 }
1739
1740 /**
1741 * @brief Enable USB has sent all data to EP4 IN FIFO
1742 *
1743 * Register|BitsName
1744 * --------|--------
1745 * EP4_CTRL | DATA_RDY
1746 *
1747 * @param USBx USB instance
1748 * @retval None
1749 */
1750 __STATIC_INLINE void ll_usb_enable_ep4_dat_rdy(usb_regs_t *USBx)
1751 {
1752 SET_BITS(USBx->EP4_CTRL, USB_EP4_CTRL_DATA_RDY);
1753 }
1754
1755 /**
1756 * @brief Disable USB has sent all data to EP4 IN FIFO
1757 *
1758 * Register|BitsName
1759 * --------|--------
1760 * EP4_CTRL | DATA_RDY
1761 *
1762 * @param USBx USB instance
1763 * @retval None
1764 */
1765 __STATIC_INLINE void ll_usb_disable_ep4_dat_rdy(usb_regs_t *USBx)
1766 {
1767 CLEAR_BITS(USBx->EP4_CTRL, USB_EP4_CTRL_DATA_RDY);
1768 }
1769
1770 /**
1771 * @brief Check if USB has sent all data to EP4 IN FIFO is enabled
1772 *
1773 * Register|BitsName
1774 * --------|--------
1775 * EP4_CTRL | DATA_RDY
1776 *
1777 * @param USBx USB instance
1778 * @retval State of bit (1 or 0).
1779 */
1780 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep4_dat_rdy(usb_regs_t *USBx)
1781 {
1782 return (READ_BITS(USBx->EP4_CTRL, USB_EP4_CTRL_DATA_RDY) == (USB_EP4_CTRL_DATA_RDY));
1783 }
1784
1785 /**
1786 * @brief Enable Clear USB EP4 IN FIFO
1787 *
1788 * Register|BitsName
1789 * --------|--------
1790 * EP4_CTRL | IFIFO_CLR
1791 *
1792 * @param USBx USB instance
1793 * @retval None
1794 */
1795 __STATIC_INLINE void ll_usb_enable_clr_ep4_fifo(usb_regs_t *USBx)
1796 {
1797 SET_BITS(USBx->EP4_CTRL, USB_EP4_CTRL_IFIFO_CLR);
1798 }
1799
1800 /**
1801 * @brief Disable Clear USB EP4 IN FIFO
1802 *
1803 * Register|BitsName
1804 * --------|--------
1805 * EP4_CTRL | IFIFO_CLR
1806 *
1807 * @param USBx USB instance
1808 * @retval None
1809 */
1810 __STATIC_INLINE void ll_usb_disable_clr_ep4_fifo(usb_regs_t *USBx)
1811 {
1812 CLEAR_BITS(USBx->EP4_CTRL, USB_EP4_CTRL_IFIFO_CLR);
1813 }
1814
1815 /**
1816 * @brief Enable USB EP4 empty packet
1817 *
1818 * Register|BitsName
1819 * --------|--------
1820 * EP4_CTRL | EMPTY_PACKET_EN
1821 *
1822 * @param USBx USB instance
1823 * @retval None
1824 */
1825 __STATIC_INLINE void ll_usb_enable_ep4_empty_packet(usb_regs_t *USBx)
1826 {
1827 SET_BITS(USBx->EP4_CTRL, USB_EP4_CTRL_EMPTY_PACKET_EN);
1828 }
1829
1830 /**
1831 * @brief Disable USB EP4 empty packet
1832 *
1833 * Register|BitsName
1834 * --------|--------
1835 * EP4_CTRL | EMPTY_PACKET_EN
1836 *
1837 * @param USBx USB instance
1838 * @retval None
1839 */
1840 __STATIC_INLINE void ll_usb_disable_ep4_empty_packet(usb_regs_t *USBx)
1841 {
1842 CLEAR_BITS(USBx->EP4_CTRL, USB_EP4_CTRL_EMPTY_PACKET_EN);
1843 }
1844
1845 /**
1846 * @brief Check if USB EP4 empty packet is enabled
1847 *
1848 * Register|BitsName
1849 * --------|--------
1850 * EP4_CTRL | EMPTY_PACKET_EN
1851 *
1852 * @param USBx USB instance
1853 * @retval State of bit (1 or 0).
1854 */
1855 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep4_empty_packet(usb_regs_t *USBx)
1856 {
1857 return (READ_BITS(USBx->EP4_CTRL, USB_EP4_CTRL_EMPTY_PACKET_EN) == (USB_EP4_CTRL_EMPTY_PACKET_EN));
1858 }
1859
1860 /**
1861 * @brief Enable Clear USB EP4 IN FIFO
1862 *
1863 * Register|BitsName
1864 * --------|--------
1865 * EP4_CTRL | IFIFO_CLR
1866 *
1867 * @param USBx USB instance
1868 * @retval None
1869 */
1870 __STATIC_INLINE void ll_usb_enable_clr_ep5_fifo(usb_regs_t *USBx)
1871 {
1872 SET_BITS(USBx->EP5_CTRL, USB_EP5_CTRL_FIFO_CLR);
1873 }
1874
1875 /**
1876 * @brief Disable Clear USB EP4 IN FIFO
1877 *
1878 * Register|BitsName
1879 * --------|--------
1880 * EP4_CTRL | IFIFO_CLR
1881 *
1882 * @param USBx USB instance
1883 * @retval None
1884 */
1885 __STATIC_INLINE void ll_usb_disable_clr_ep5_fifo(usb_regs_t *USBx)
1886 {
1887 CLEAR_BITS(USBx->EP5_CTRL, USB_EP5_CTRL_FIFO_CLR);
1888 }
1889 /**
1890 * @brief Set USB Endpoint 1 attribute
1891 *
1892 * Register|BitsName
1893 * --------|--------
1894 * EP_ATTR | EP1
1895 *
1896 * @param USBx USB instance
1897 * @param attr This parameter can be one of the following values:
1898 * @arg @ref LL_USB_EP_ATTR_EP1_INT
1899 * @arg @ref LL_USB_EP_ATTR_EP1_ISO
1900 * @arg @ref LL_USB_EP_ATTR_EP1_BULK
1901 * @retval None
1902 */
1903 __STATIC_INLINE void ll_usb_set_ep1_attr(usb_regs_t *USBx, uint32_t attr)
1904 {
1905 MODIFY_REG(USBx->EP_ATTR, USB_EP_ATTR_EP1, attr);
1906 }
1907
1908 /**
1909 * @brief Get USB Endpoint 1 attribute
1910 *
1911 * Register|BitsName
1912 * --------|--------
1913 * EP_ATTR | EP1
1914 *
1915 * @param USBx USB instance
1916 * @retval Returned Value can be one of the following values:
1917 * @arg @ref LL_USB_EP_ATTR_EP1_INT
1918 * @arg @ref LL_USB_EP_ATTR_EP1_ISO
1919 * @arg @ref LL_USB_EP_ATTR_EP1_BULK
1920 */
1921 __STATIC_INLINE uint32_t ll_usb_get_ep1_attr(usb_regs_t *USBx)
1922 {
1923 return (uint32_t)(READ_BITS(USBx->EP_ATTR, USB_EP_ATTR_EP1));
1924 }
1925
1926 /**
1927 * @brief Set USB Endpoint 2 attribute
1928 *
1929 * Register|BitsName
1930 * --------|--------
1931 * EP_ATTR | EP2
1932 *
1933 * @param USBx USB instance
1934 * @param attr This parameter can be one of the following values:
1935 * @arg @ref LL_USB_EP_ATTR_EP2_INT
1936 * @arg @ref LL_USB_EP_ATTR_EP2_ISO
1937 * @arg @ref LL_USB_EP_ATTR_EP2_BULK
1938 * @retval None
1939 */
1940 __STATIC_INLINE void ll_usb_set_ep2_attr(usb_regs_t *USBx, uint32_t attr)
1941 {
1942 MODIFY_REG(USBx->EP_ATTR, USB_EP_ATTR_EP2, attr);
1943 }
1944
1945 /**
1946 * @brief Get USB Endpoint 2 attribute
1947 *
1948 * Register|BitsName
1949 * --------|--------
1950 * EP_ATTR | EP2
1951 *
1952 * @param USBx USB instance
1953 * @retval Returned Value can be one of the following values:
1954 * @arg @ref LL_USB_EP_ATTR_EP2_INT
1955 * @arg @ref LL_USB_EP_ATTR_EP2_ISO
1956 * @arg @ref LL_USB_EP_ATTR_EP2_BULK
1957 */
1958 __STATIC_INLINE uint32_t ll_usb_get_ep2_attr(usb_regs_t *USBx)
1959 {
1960 return (uint32_t)(READ_BITS(USBx->EP_ATTR, USB_EP_ATTR_EP2));
1961 }
1962
1963 /**
1964 * @brief Set USB Endpoint 3 attribute
1965 *
1966 * Register|BitsName
1967 * --------|--------
1968 * EP_ATTR | EP3
1969 *
1970 * @param USBx USB instance
1971 * @param attr This parameter can be one of the following values:
1972 * @arg @ref LL_USB_EP_ATTR_EP3_INT
1973 * @arg @ref LL_USB_EP_ATTR_EP3_ISO
1974 * @arg @ref LL_USB_EP_ATTR_EP3_BULK
1975 * @retval None
1976 */
1977 __STATIC_INLINE void ll_usb_set_ep3_attr(usb_regs_t *USBx, uint32_t attr)
1978 {
1979 MODIFY_REG(USBx->EP_ATTR, USB_EP_ATTR_EP3, attr);
1980 }
1981
1982 /**
1983 * @brief Get USB Endpoint 1 attribute
1984 *
1985 * Register|BitsName
1986 * --------|--------
1987 * EP_ATTR | EP3
1988 *
1989 * @param USBx USB instance
1990 * @retval Returned Value can be one of the following values:
1991 * @arg @ref LL_USB_EP_ATTR_EP3_INT
1992 * @arg @ref LL_USB_EP_ATTR_EP3_ISO
1993 * @arg @ref LL_USB_EP_ATTR_EP3_BULK
1994 */
1995 __STATIC_INLINE uint32_t ll_usb_get_ep3_attr(usb_regs_t *USBx)
1996 {
1997 return (uint32_t)(READ_BITS(USBx->EP_ATTR, USB_EP_ATTR_EP3));
1998 }
1999
2000 /**
2001 * @brief Enable USB halt EP1
2002 *
2003 * Register|BitsName
2004 * --------|--------
2005 * EP_ATTR | EP1_HALT_MCU
2006 *
2007 * @param USBx USB instance
2008 * @retval None
2009 */
2010 __STATIC_INLINE void ll_usb_enable_ep1_halt_mcu(usb_regs_t *USBx)
2011 {
2012 SET_BITS(USBx->EP_ATTR, USB_EP_ATTR_EP1_HALT_MCU);
2013 }
2014
2015 /**
2016 * @brief Disable USB halt EP1
2017 *
2018 * Register|BitsName
2019 * --------|--------
2020 * EP_ATTR | EP1_HALT_MCU
2021 *
2022 * @param USBx USB instance
2023 * @retval None
2024 */
2025 __STATIC_INLINE void ll_usb_disable_ep1_halt_mcu(usb_regs_t *USBx)
2026 {
2027 CLEAR_BITS(USBx->EP_ATTR, USB_EP_ATTR_EP1_HALT_MCU);
2028 }
2029
2030 /**
2031 * @brief Check if USB halt EP1 is enabled
2032 *
2033 * Register|BitsName
2034 * --------|--------
2035 * EP_ATTR | EP1_HALT_MCU
2036 *
2037 * @param USBx USB instance
2038 * @retval State of bit (1 or 0).
2039 */
2040 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep1_halt_mcu(usb_regs_t *USBx)
2041 {
2042 return (READ_BITS(USBx->EP_ATTR, USB_EP_ATTR_EP1_HALT_MCU) == (USB_EP_ATTR_EP1_HALT_MCU));
2043 }
2044
2045 /**
2046 * @brief Enable USB halt EP2
2047 *
2048 * Register|BitsName
2049 * --------|--------
2050 * EP_ATTR | EP2_HALT_MCU
2051 *
2052 * @param USBx USB instance
2053 * @retval None
2054 */
2055 __STATIC_INLINE void ll_usb_enable_ep2_halt_mcu(usb_regs_t *USBx)
2056 {
2057 SET_BITS(USBx->EP_ATTR, USB_EP_ATTR_EP2_HALT_MCU);
2058 }
2059
2060 /**
2061 * @brief Disable USB halt EP2
2062 *
2063 * Register|BitsName
2064 * --------|--------
2065 * EP_ATTR | EP2_HALT_MCU
2066 *
2067 * @param USBx USB instance
2068 * @retval None
2069 */
2070 __STATIC_INLINE void ll_usb_disable_ep2_halt_mcu(usb_regs_t *USBx)
2071 {
2072 CLEAR_BITS(USBx->EP_ATTR, USB_EP_ATTR_EP2_HALT_MCU);
2073 }
2074
2075 /**
2076 * @brief Check if USB halt EP2 is enabled
2077 *
2078 * Register|BitsName
2079 * --------|--------
2080 * EP_ATTR | EP2_HALT_MCU
2081 *
2082 * @param USBx USB instance
2083 * @retval State of bit (1 or 0).
2084 */
2085 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep2_halt_mcu(usb_regs_t *USBx)
2086 {
2087 return (READ_BITS(USBx->EP_ATTR, USB_EP_ATTR_EP2_HALT_MCU) == (USB_EP_ATTR_EP2_HALT_MCU));
2088 }
2089
2090 /**
2091 * @brief Enable USB halt EP3
2092 *
2093 * Register|BitsName
2094 * --------|--------
2095 * EP_ATTR | EP3_HALT_MCU
2096 *
2097 * @param USBx USB instance
2098 * @retval None
2099 */
2100 __STATIC_INLINE void ll_usb_enable_ep3_halt_mcu(usb_regs_t *USBx)
2101 {
2102 SET_BITS(USBx->EP_ATTR, USB_EP_ATTR_EP3_HALT_MCU);
2103 }
2104
2105 /**
2106 * @brief Disable USB halt EP3
2107 *
2108 * Register|BitsName
2109 * --------|--------
2110 * EP_ATTR | EP3_HALT_MCU
2111 *
2112 * @param USBx USB instance
2113 * @retval None
2114 */
2115 __STATIC_INLINE void ll_usb_disable_ep3_halt_mcu(usb_regs_t *USBx)
2116 {
2117 CLEAR_BITS(USBx->EP_ATTR, USB_EP_ATTR_EP3_HALT_MCU);
2118 }
2119
2120 /**
2121 * @brief Check if USB halt EP3 is enabled
2122 *
2123 * Register|BitsName
2124 * --------|--------
2125 * EP_ATTR | EP3_HALT_MCU
2126 *
2127 * @param USBx USB instance
2128 * @retval State of bit (1 or 0).
2129 */
2130 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep3_halt_mcu(usb_regs_t *USBx)
2131 {
2132 return (READ_BITS(USBx->EP_ATTR, USB_EP_ATTR_EP3_HALT_MCU) == (USB_EP_ATTR_EP3_HALT_MCU));
2133 }
2134
2135 /**
2136 * @brief Check USB interrupt flag is actived
2137 *
2138 * Register|BitsName
2139 * --------|--------
2140 * INT_STAT | SUSPEND
2141 * INT_STAT | EP0_OUT_READY
2142 * INT_STAT | EP1_OUT_READY
2143 * INT_STAT | CRC16_ERR
2144 * INT_STAT | UPID_ERR
2145 * INT_STAT | TIMEOUT_ERR
2146 * INT_STAT | SEQ_ERR
2147 * INT_STAT | PID_CKS_ERR
2148 * INT_STAT | PID_CRC_ERR
2149 * INT_STAT | HOST_RESET
2150 * INT_STAT | AHB_XFER_ERR
2151 * INT_STAT | NSE_ERR
2152 * INT_STAT | EP3 AHB_XFER_DONE
2153 * INT_STAT | SYNC_ERR
2154 * INT_STAT | BIT_STUFF_ERR
2155 * INT_STAT | BYTE_ERR
2156 * INT_STAT | SOF
2157 * INT_STAT | EP0_TX_DONE
2158 * INT_STAT | EP2_TX_DONE
2159 * INT_STAT | EP3_TX_DONE
2160 * INT_STAT | INTO_CONFIG
2161 * INT_STAT | EP5_OUT_READY
2162 * INT_STAT | EP4_AHB_XFER_DONE
2163 * INT_STAT | EP4_TX_DONE
2164 * INT_STAT | EP5_AHB_XFER_DONE
2165 * INT_STAT | EP5_TIMER_OUT_ERR
2166 *
2167 * @param USBx USB instance
2168 * @param flag This parameter can be one or more of the following values:
2169 * @arg @ref LL_USB_INT_STAT_SUSPEND
2170 * @arg @ref LL_USB_INT_STAT_EP0_OUT_READY
2171 * @arg @ref LL_USB_INT_STAT_EP1_OUT_READY
2172 * @arg @ref LL_USB_INT_STAT_CRC16_ERR
2173 * @arg @ref LL_USB_INT_STAT_UPID_ERR
2174 * @arg @ref LL_USB_INT_STAT_TIMEOUT_ERR
2175 * @arg @ref LL_USB_INT_STAT_SEQ_ERR
2176 * @arg @ref LL_USB_INT_STAT_PID_CKS_ERR
2177 * @arg @ref LL_USB_INT_STAT_PID_CRC_ERR
2178 * @arg @ref LL_USB_INT_STAT_HOST_RESET
2179 * @arg @ref LL_USB_INT_STAT_AHB_XFER_ERR
2180 * @arg @ref LL_USB_INT_STAT_NSE_ERR
2181 * @arg @ref LL_USB_INT_STAT_EP3_AHB_XFER_DONE
2182 * @arg @ref LL_USB_INT_STAT_SYNC_ERR
2183 * @arg @ref LL_USB_INT_STAT_BIT_STUFF_ERR
2184 * @arg @ref LL_USB_INT_STAT_BYTE_ERR
2185 * @arg @ref LL_USB_INT_STAT_SOF
2186 * @arg @ref LL_USB_INT_STAT_EP0_TX_DONE
2187 * @arg @ref LL_USB_INT_STAT_EP2_TX_DONE
2188 * @arg @ref LL_USB_INT_STAT_EP3_TX_DONE
2189 * @arg @ref LL_USB_INT_STAT_INTO_CONFIG
2190 * @arg @ref LL_USB_INT_STAT_EP5_OUT_READY
2191 * @arg @ref LL_USB_INT_STAT_EP4_AHB_XFER_DONE
2192 * @arg @ref LL_USB_INT_STAT_EP4_TX_DONE
2193 * @arg @ref LL_USB_INT_STAT_EP5_AHB_XFER_DONE
2194 * @arg @ref LL_USB_INT_STAT_EP5_TIMER_OUT_ERR
2195 * @retval State of bit (1 or 0).
2196 */
2197 __STATIC_INLINE uint32_t ll_usb_is_active_it_flag(usb_regs_t *USBx, uint32_t flag)
2198 {
2199 return (uint32_t)(READ_BITS(USBx->INT_STAT, flag) == flag);
2200 }
2201
2202 /**
2203 * @brief get USB interrupt flag
2204 *
2205 * Register|BitsName
2206 * --------|--------
2207 * INT_STAT | SUSPEND
2208 * INT_STAT | EP0_OUT_READY
2209 * INT_STAT | EP1_OUT_READY
2210 * INT_STAT | CRC16_ERR
2211 * INT_STAT | UPID_ERR
2212 * INT_STAT | TIMEOUT_ERR
2213 * INT_STAT | SEQ_ERR
2214 * INT_STAT | PID_CKS_ERR
2215 * INT_STAT | PID_CRC_ERR
2216 * INT_STAT | HOST_RESET
2217 * INT_STAT | AHB_XFER_ERR
2218 * INT_STAT | NSE_ERR
2219 * INT_STAT | EP3_AHB_XFER_DONE
2220 * INT_STAT | SYNC_ERR
2221 * INT_STAT | BIT_STUFF_ERR
2222 * INT_STAT | BYTE_ERR
2223 * INT_STAT | SOF
2224 * INT_STAT | EP0_TX_DONE
2225 * INT_STAT | EP2_TX_DONE
2226 * INT_STAT | EP3_TX_DONE
2227 * INT_STAT | INTO_CONFIG
2228 * INT_STAT | EP5_OUT_READY
2229 * INT_STAT | EP4_AHB_XFER_DONE
2230 * INT_STAT | EP4_TX_DONE
2231 * INT_STAT | EP5_AHB_XFER_DONE
2232 * INT_STAT | EP5_TIMER_OUT_ERR
2233 *
2234 * @param USBx USB instance
2235 * @retval intterupt status register value.
2236 */
2237 __STATIC_INLINE uint32_t ll_usb_get_it_flag(usb_regs_t *USBx)
2238 {
2239 return (uint32_t)(READ_BITS(USBx->INT_STAT, LL_USB_INT_STAT_ALL));
2240 }
2241
2242 /**
2243 * @brief Enable USB interrupt
2244 *
2245 * Register|BitsName
2246 * --------|--------
2247 * INT_EN | SUSPEND
2248 * INT_EN | EP0_OUT_READY
2249 * INT_EN | EP1_OUT_READY
2250 * INT_EN | CRC16_ERR
2251 * INT_EN | UPID_ERR
2252 * INT_EN | TIMEOUT_ERR
2253 * INT_EN | SEQ_ERR
2254 * INT_EN | PID_CKS_ERR
2255 * INT_EN | PID_CRC_ERR
2256 * INT_EN | HOST_RESET
2257 * INT_EN | AHB_XFER_ERR
2258 * INT_EN | NSE_ERR
2259 * INT_EN | EP3_AHB_XFER_DONE
2260 * INT_EN | SYNC_ERR
2261 * INT_EN | BIT_STUFF_ERR
2262 * INT_EN | BYTE_ERR
2263 * INT_EN | SOF
2264 * INT_EN | EP0_TX_DONE
2265 * INT_EN | EP2_TX_DONE
2266 * INT_EN | EP3_TX_DONE
2267 * INT_EN | INTO_CONFIG
2268 * INT_EN | EP5_OUT_READY
2269 * INT_EN | EP4_AHB_XFER_DONE
2270 * INT_EN | EP4_TX_DONE
2271 * INT_EN | EP5_AHB_XFER_DONE
2272 * INT_EN | EP5_TIMER_OUT_ERR
2273 *
2274 * @param USBx USB instance
2275 * @param mask This parameter can be one or more of the following values:
2276 * @arg @ref LL_USB_INT_EN_ALL
2277 * @arg @ref LL_USB_INT_RESET_VAL
2278 * @arg @ref LL_USB_INT_EN_SUSPEND
2279 * @arg @ref LL_USB_INT_EN_EP0_OUT_READY
2280 * @arg @ref LL_USB_INT_EN_EP1_OUT_READY
2281 * @arg @ref LL_USB_INT_EN_CRC16_ERR
2282 * @arg @ref LL_USB_INT_EN_UPID_ERR
2283 * @arg @ref LL_USB_INT_EN_TIMEOUT_ERR
2284 * @arg @ref LL_USB_INT_EN_SEQ_ERR
2285 * @arg @ref LL_USB_INT_EN_PID_CKS_ERR
2286 * @arg @ref LL_USB_INT_EN_PID_CRC_ERR
2287 * @arg @ref LL_USB_INT_EN_HOST_RESET
2288 * @arg @ref LL_USB_INT_EN_AHB_XFER_ERR
2289 * @arg @ref LL_USB_INT_EN_NSE_ERR
2290 * @arg @ref LL_USB_INT_EN_EP3_AHB_XFER_DONE
2291 * @arg @ref LL_USB_INT_EN_SYNC_ERR
2292 * @arg @ref LL_USB_INT_EN_BIT_STUFF_ERR
2293 * @arg @ref LL_USB_INT_EN_BYTE_ERR
2294 * @arg @ref LL_USB_INT_EN_SOF
2295 * @arg @ref LL_USB_INT_EN_EP0_TX_DONE
2296 * @arg @ref LL_USB_INT_EN_EP2_TX_DONE
2297 * @arg @ref LL_USB_INT_EN_EP3_TX_DONE
2298 * @arg @ref LL_USB_INT_EN_INTO_CONFIG
2299 * @arg @ref LL_USB_INT_EN_EP5_OUT_READY
2300 * @arg @ref LL_USB_INT_EN_EP4_AHB_XFER_DONE
2301 * @arg @ref LL_USB_INT_EN_EP4_TX_DONE
2302 * @arg @ref LL_USB_INT_EN_EP5_AHB_XFER_DONE
2303 * @arg @ref LL_USB_INT_EN_EP5_TIMER_OUT_ERR
2304 * @retval None
2305 */
2306 __STATIC_INLINE void ll_usb_enable_it(usb_regs_t *USBx, uint32_t mask)
2307 {
2308 SET_BITS(USBx->INT_EN, mask);
2309 }
2310
2311 /**
2312 * @brief Disable USB interrupt
2313 *
2314 * Register|BitsName
2315 * --------|--------
2316 * INT_EN | SUSPEND
2317 * INT_EN | EP0_OUT_READY
2318 * INT_EN | EP1_OUT_READY
2319 * INT_EN | CRC16_ERR
2320 * INT_EN | UPID_ERR
2321 * INT_EN | TIMEOUT_ERR
2322 * INT_EN | SEQ_ERR
2323 * INT_EN | PID_CKS_ERR
2324 * INT_EN | PID_CRC_ERR
2325 * INT_EN | HOST_RESET
2326 * INT_EN | AHB_XFER_ERR
2327 * INT_EN | NSE_ERR
2328 * INT_EN | EP3_AHB_XFER_DONE
2329 * INT_EN | SYNC_ERR
2330 * INT_EN | BIT_STUFF_ERR
2331 * INT_EN | BYTE_ERR
2332 * INT_EN | SOF
2333 * INT_EN | EP0_TX_DONE
2334 * INT_EN | EP2_TX_DONE
2335 * INT_EN | EP3_TX_DONE
2336 * INT_EN | INTO_CONFIG
2337 * INT_EN | EP5_OUT_READY
2338 * INT_EN | EP4_AHB_XFER_DONE
2339 * INT_EN | EP4_TX_DONE
2340 * INT_EN | EP5_AHB_XFER_DONE
2341 * INT_EN | EP5_TIMER_OUT_ERR
2342 *
2343 * @param USBx USB instance
2344 * @param mask This parameter can be one or more of the following values:
2345 * @arg @ref LL_USB_INT_EN_ALL
2346 * @arg @ref LL_USB_INT_RESET_VAL
2347 * @arg @ref LL_USB_INT_EN_SUSPEND
2348 * @arg @ref LL_USB_INT_EN_EP0_OUT_READY
2349 * @arg @ref LL_USB_INT_EN_EP1_OUT_READY
2350 * @arg @ref LL_USB_INT_EN_CRC16_ERR
2351 * @arg @ref LL_USB_INT_EN_UPID_ERR
2352 * @arg @ref LL_USB_INT_EN_TIMEOUT_ERR
2353 * @arg @ref LL_USB_INT_EN_SEQ_ERR
2354 * @arg @ref LL_USB_INT_EN_PID_CKS_ERR
2355 * @arg @ref LL_USB_INT_EN_PID_CRC_ERR
2356 * @arg @ref LL_USB_INT_EN_HOST_RESET
2357 * @arg @ref LL_USB_INT_EN_AHB_XFER_ERR
2358 * @arg @ref LL_USB_INT_EN_NSE_ERR
2359 * @arg @ref LL_USB_INT_EN_EP3_AHB_XFER_DONE
2360 * @arg @ref LL_USB_INT_EN_SYNC_ERR
2361 * @arg @ref LL_USB_INT_EN_BIT_STUFF_ERR
2362 * @arg @ref LL_USB_INT_EN_BYTE_ERR
2363 * @arg @ref LL_USB_INT_EN_SOF
2364 * @arg @ref LL_USB_INT_EN_EP0_TX_DONE
2365 * @arg @ref LL_USB_INT_EN_EP2_TX_DONE
2366 * @arg @ref LL_USB_INT_EN_EP3_TX_DONE
2367 * @arg @ref LL_USB_INT_EN_INTO_CONFIG
2368 * @arg @ref LL_USB_INT_EN_EP5_OUT_READY
2369 * @arg @ref LL_USB_INT_EN_EP4_AHB_XFER_DONE
2370 * @arg @ref LL_USB_INT_EN_EP4_TX_DONE
2371 * @arg @ref LL_USB_INT_EN_EP5_AHB_XFER_DONE
2372 * @arg @ref LL_USB_INT_EN_EP5_TIMER_OUT_ERR
2373 * @retval None
2374 */
2375 __STATIC_INLINE void ll_usb_disable_it(usb_regs_t *USBx, uint32_t mask)
2376 {
2377 CLEAR_BITS(USBx->INT_EN, mask);
2378 }
2379
2380 /**
2381 * @brief Check if USB interrupt is enabled
2382 *
2383 * Register|BitsName
2384 * --------|--------
2385 * INT_EN | SUSPEND
2386 * INT_EN | EP0_OUT_READY
2387 * INT_EN | EP1_OUT_READY
2388 * INT_EN | CRC16_ERR
2389 * INT_EN | UPID_ERR
2390 * INT_EN | TIMEOUT_ERR
2391 * INT_EN | SEQ_ERR
2392 * INT_EN | PID_CKS_ERR
2393 * INT_EN | PID_CRC_ERR
2394 * INT_EN | HOST_RESET
2395 * INT_EN | AHB_XFER_ERR
2396 * INT_EN | NSE_ERR
2397 * INT_EN | EP3_AHB_XFER_DONE
2398 * INT_EN | SYNC_ERR
2399 * INT_EN | BIT_STUFF_ERR
2400 * INT_EN | BYTE_ERR
2401 * INT_EN | SOF
2402 * INT_EN | EP0_TX_DONE
2403 * INT_EN | EP2_TX_DONE
2404 * INT_EN | EP3_TX_DONE
2405 * INT_EN | INTO_CONFIG
2406 * INT_EN | EP5_OUT_READY
2407 * INT_EN | EP4_AHB_XFER_DONE
2408 * INT_EN | EP4_TX_DONE
2409 * INT_EN | EP5_AHB_XFER_DONE
2410 * INT_EN | EP5_TIMER_OUT_ERR
2411 *
2412 * @param USBx USB instance
2413 * @param mask This parameter can be one or more of the following values:
2414 * @arg @ref LL_USB_INT_EN_ALL
2415 * @arg @ref LL_USB_INT_RESET_VAL
2416 * @arg @ref LL_USB_INT_EN_SUSPEND
2417 * @arg @ref LL_USB_INT_EN_EP0_OUT_READY
2418 * @arg @ref LL_USB_INT_EN_EP1_OUT_READY
2419 * @arg @ref LL_USB_INT_EN_CRC16_ERR
2420 * @arg @ref LL_USB_INT_EN_UPID_ERR
2421 * @arg @ref LL_USB_INT_EN_TIMEOUT_ERR
2422 * @arg @ref LL_USB_INT_EN_SEQ_ERR
2423 * @arg @ref LL_USB_INT_EN_PID_CKS_ERR
2424 * @arg @ref LL_USB_INT_EN_PID_CRC_ERR
2425 * @arg @ref LL_USB_INT_EN_HOST_RESET
2426 * @arg @ref LL_USB_INT_EN_AHB_XFER_ERR
2427 * @arg @ref LL_USB_INT_EN_NSE_ERR
2428 * @arg @ref LL_USB_INT_EN_EP3_AHB_XFER_DONE
2429 * @arg @ref LL_USB_INT_EN_SYNC_ERR
2430 * @arg @ref LL_USB_INT_EN_BIT_STUFF_ERR
2431 * @arg @ref LL_USB_INT_EN_BYTE_ERR
2432 * @arg @ref LL_USB_INT_EN_SOF
2433 * @arg @ref LL_USB_INT_EN_EP0_TX_DONE
2434 * @arg @ref LL_USB_INT_EN_EP2_TX_DONE
2435 * @arg @ref LL_USB_INT_EN_EP3_TX_DONE
2436 * @arg @ref LL_USB_INT_EN_INTO_CONFIG
2437 * @arg @ref LL_USB_INT_EN_EP5_OUT_READY
2438 * @arg @ref LL_USB_INT_EN_EP4_AHB_XFER_DONE
2439 * @arg @ref LL_USB_INT_EN_EP4_TX_DONE
2440 * @arg @ref LL_USB_INT_EN_EP5_AHB_XFER_DONE
2441 * @arg @ref LL_USB_INT_EN_EP5_TIMER_OUT_ERR
2442 * @retval State of bit (1 or 0).
2443 */
2444 __STATIC_INLINE uint32_t ll_usb_is_enabled_it(usb_regs_t *USBx, uint32_t mask)
2445 {
2446 return (READ_BITS(USBx->INT_EN, mask) == (mask));
2447 }
2448
2449 /**
2450 * @brief Clear USB interrupt
2451 *
2452 * Register|BitsName
2453 * --------|--------
2454 * INT_CLR | SUSPEND
2455 * INT_CLR | EP0_OUT_READY
2456 * INT_CLR | EP1_OUT_READY
2457 * INT_CLR | CRC16_ERR
2458 * INT_CLR | UPID_ERR
2459 * INT_CLR | TIMEOUT_ERR
2460 * INT_CLR | SEQ_ERR
2461 * INT_CLR | PID_CKS_ERR
2462 * INT_CLR | PID_CRC_ERR
2463 * INT_CLR | HOST_RESET
2464 * INT_CLR | AHB_XFER_ERR
2465 * INT_CLR | NSE_ERR
2466 * INT_CLR | EP3_AHB_XFER_DONE
2467 * INT_CLR | SYNC_ERR
2468 * INT_CLR | BIT_STUFF_ERR
2469 * INT_CLR | BYTE_ERR
2470 * INT_CLR | SOF
2471 * INT_CLR | EP0_TX_DONE
2472 * INT_CLR | EP2_TX_DONE
2473 * INT_CLR | EP3_TX_DONE
2474 * INT_CLR | INTO_CONFIG
2475 * INT_CLR | EP5_OUT_READY
2476 * INT_CLR | EP4_AHB_XFER_DONE
2477 * INT_CLR | EP4_TX_DONE
2478 * INT_CLR | EP5_AHB_XFER_DONE
2479 * INT_CLR | EP5_TIMER_OUT_ERR
2480 *
2481 * @param USBx USB instance
2482 * @param mask This parameter can be one or more of the following values:
2483 * @arg @ref LL_USB_INT_CLR_ALL
2484 * @arg @ref LL_USB_INT_CLR_SUSPEND
2485 * @arg @ref LL_USB_INT_CLR_EP0_OUT_READY
2486 * @arg @ref LL_USB_INT_CLR_EP1_OUT_READY
2487 * @arg @ref LL_USB_INT_CLR_CRC16_ERR
2488 * @arg @ref LL_USB_INT_CLR_UPID_ERR
2489 * @arg @ref LL_USB_INT_CLR_TIMEOUT_ERR
2490 * @arg @ref LL_USB_INT_CLR_SEQ_ERR
2491 * @arg @ref LL_USB_INT_CLR_PID_CKS_ERR
2492 * @arg @ref LL_USB_INT_CLR_PID_CRC_ERR
2493 * @arg @ref LL_USB_INT_CLR_HOST_RESET
2494 * @arg @ref LL_USB_INT_CLR_AHB_XFER_ERR
2495 * @arg @ref LL_USB_INT_CLR_NSE_ERR
2496 * @arg @ref LL_USB_INT_CLR_EP3_AHB_XFER_DONE
2497 * @arg @ref LL_USB_INT_CLR_SYNC_ERR
2498 * @arg @ref LL_USB_INT_CLR_BIT_STUFF_ERR
2499 * @arg @ref LL_USB_INT_CLR_BYTE_ERR
2500 * @arg @ref LL_USB_INT_CLR_SOF
2501 * @arg @ref LL_USB_INT_CLR_EP0_TX_DONE
2502 * @arg @ref LL_USB_INT_CLR_EP2_TX_DONE
2503 * @arg @ref LL_USB_INT_CLR_EP3_TX_DONE
2504 * @arg @ref LL_USB_INT_CLR_INTO_CONFIG
2505 * @arg @ref LL_USB_INT_CLR_EP5_OUT_READY
2506 * @arg @ref LL_USB_INT_CLR_EP4_AHB_XFER_DONE
2507 * @arg @ref LL_USB_INT_CLR_EP4_TX_DONE
2508 * @arg @ref LL_USB_INT_CLR_EP5_AHB_XFER_DONE
2509 * @arg @ref LL_USB_INT_CLR_EP5_TIMER_OUT_ERR
2510 * @retval State of bit (1 or 0).
2511 */
2512 __STATIC_INLINE void ll_usb_clear_it(usb_regs_t *USBx, uint32_t mask)
2513 {
2514 SET_BITS(USBx->INT_CLR, mask);
2515 }
2516
2517 /**
2518 * @brief Set USB ep3 AHB master read start address
2519 *
2520 * Register|BitsName
2521 * --------|--------
2522 * EP3_AHBM_RADDR | RD_START_ADDR
2523 *
2524 * @param USBx USB instance
2525 * @param addr This parameter can be one of the following values:
2526 * 32 bit address
2527 * @retval None
2528 */
2529 __STATIC_INLINE void ll_usb_set_ep3_ahb_m_rd_start_addr(usb_regs_t *USBx, uint32_t addr)
2530 {
2531 MODIFY_REG(USBx->EP3_AHBM_RADDR, USB_EP3_AHBM_RADDR_RD_START_ADDR, addr);
2532 }
2533
2534 /**
2535 * @brief Get USB ep3 AHB master read start address
2536 *
2537 * Register|BitsName
2538 * --------|--------
2539 * EP3_AHBM_RADDR | RD_START_ADDR
2540 *
2541 * @param USBx USB instance
2542 * @retval Returned Value can be one of the following values:
2543 * 32 bit address
2544 */
2545 __STATIC_INLINE uint32_t ll_usb_get_ep3_ahb_m_rd_start_addr(usb_regs_t *USBx)
2546 {
2547 return (uint32_t)(READ_BITS(USBx->EP3_AHBM_RADDR, USB_EP3_AHBM_RADDR_RD_START_ADDR));
2548 }
2549
2550 /**
2551 * @brief Enable USB ep3 AHB master
2552 *
2553 * Register|BitsName
2554 * --------|--------
2555 * EP3_AHBM_CTRL | EN
2556 *
2557 * @param USBx USB instance
2558 * @retval None
2559 */
2560 __STATIC_INLINE void ll_usb_enable_ep3_ahb_m(usb_regs_t *USBx)
2561 {
2562 SET_BITS(USBx->EP3_AHBM_CTRL, USB_EP3_AHBM_CTRL_EN);
2563 }
2564
2565 /**
2566 * @brief Disable USB ep3 AHB master
2567 *
2568 * Register|BitsName
2569 * --------|--------
2570 * EP3_AHBM_CTRL | EN
2571 *
2572 * @param USBx USB instance
2573 * @retval None
2574 */
2575 __STATIC_INLINE void ll_usb_disable_ep3_ahb_m(usb_regs_t *USBx)
2576 {
2577 CLEAR_BITS(USBx->EP3_AHBM_CTRL, USB_EP3_AHBM_CTRL_EN);
2578 }
2579
2580 /**
2581 * @brief Check if USB ep3 AHB master is enabled
2582 *
2583 * Register|BitsName
2584 * --------|--------
2585 * EP3_AHBM_CTRL | EN
2586 *
2587 * @param USBx USB instance
2588 * @retval State of bit (1 or 0).
2589 */
2590 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep3_ahb_m(usb_regs_t *USBx)
2591 {
2592 return (READ_BITS(USBx->EP3_AHBM_CTRL, USB_EP3_AHBM_CTRL_EN) == (USB_EP3_AHBM_CTRL_EN));
2593 }
2594
2595 /**
2596 * @brief Set USB ep3 AHB master burst length;(default 64)
2597 *
2598 * Register|BitsName
2599 * --------|--------
2600 * EP3_AHBM_CTRL | BURST_SIZE
2601 *
2602 * @param USBx USB instance
2603 * @param size This parameter can be one of the following values:
2604 * 0x0 ~ 0xFF
2605 * @retval None
2606 */
2607 __STATIC_INLINE void ll_usb_set_ep3_ahb_m_burst_size(usb_regs_t *USBx, uint32_t size)
2608 {
2609 MODIFY_REG(USBx->EP3_AHBM_CTRL, USB_EP3_AHBM_CTRL_BURST_SIZE, size << USB_EP3_AHBM_CTRL_BURST_SIZE_Pos);
2610 }
2611
2612 /**
2613 * @brief Get USB ep3 AHB master burst length;(default 64)
2614 *
2615 * Register|BitsName
2616 * --------|--------
2617 * EP3_AHBM_CTRL | BURST_SIZE
2618 *
2619 * @param USBx USB instance
2620 * @retval Returned Value can be one of the following values:
2621 * 0x0 ~ 0xFF
2622 */
2623 __STATIC_INLINE uint32_t ll_usb_get_ep3_ahb_m_burst_size(usb_regs_t *USBx)
2624 {
2625 return (uint32_t)(READ_BITS(USBx->EP3_AHBM_CTRL, USB_EP3_AHBM_CTRL_BURST_SIZE) >> USB_EP3_AHBM_CTRL_BURST_SIZE_Pos);
2626 }
2627
2628 /**
2629 * @brief Set USB ep4 AHB master read start address
2630 *
2631 * Register|BitsName
2632 * --------|--------
2633 * EP4_AHBM_RADDR | RD_START_ADDR
2634 *
2635 * @param USBx USB instance
2636 * @param addr This parameter can be one of the following values:
2637 * 32 bit address
2638 * @retval None
2639 */
2640 __STATIC_INLINE void ll_usb_set_ep4_ahb_m_rd_start_addr(usb_regs_t *USBx, uint32_t addr)
2641 {
2642 MODIFY_REG(USBx->EP4_AHBM_RADDR, USB_EP4_AHBM_RADDR_RD_START_ADDR, addr);
2643 }
2644
2645 /**
2646 * @brief Get USB ep4 AHB master read start address
2647 *
2648 * Register|BitsName
2649 * --------|--------
2650 * EP4_AHBM_RADDR | RD_START_ADDR
2651 *
2652 * @param USBx USB instance
2653 * @retval Returned Value can be one of the following values:
2654 * 32 bit address
2655 */
2656 __STATIC_INLINE uint32_t ll_usb_get_ep4_ahb_m_rd_start_addr(usb_regs_t *USBx)
2657 {
2658 return (uint32_t)(READ_BITS(USBx->EP4_AHBM_RADDR, USB_EP4_AHBM_RADDR_RD_START_ADDR));
2659 }
2660
2661 /**
2662 * @brief Enable USB ep4 AHB master
2663 *
2664 * Register|BitsName
2665 * --------|--------
2666 * EP4_AHBM_CTRL | EN
2667 *
2668 * @param USBx USB instance
2669 * @retval None
2670 */
2671 __STATIC_INLINE void ll_usb_enable_ep4_ahb_m(usb_regs_t *USBx)
2672 {
2673 SET_BITS(USBx->EP4_AHBM_CTRL, USB_EP4_AHBM_CTRL_EN);
2674 }
2675
2676 /**
2677 * @brief Disable USB ep4 AHB master
2678 *
2679 * Register|BitsName
2680 * --------|--------
2681 * EP4_AHBM_CTRL | EN
2682 *
2683 * @param USBx USB instance
2684 * @retval None
2685 */
2686 __STATIC_INLINE void ll_usb_disable_ep4_ahb_m(usb_regs_t *USBx)
2687 {
2688 CLEAR_BITS(USBx->EP4_AHBM_CTRL, USB_EP4_AHBM_CTRL_EN);
2689 }
2690
2691 /**
2692 * @brief Check if USB ep4 AHB master is enabled
2693 *
2694 * Register|BitsName
2695 * --------|--------
2696 * EP4_AHBM_CTRL | EN
2697 *
2698 * @param USBx USB instance
2699 * @retval State of bit (1 or 0).
2700 */
2701 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep4_ahb_m(usb_regs_t *USBx)
2702 {
2703 return (READ_BITS(USBx->EP4_AHBM_CTRL, USB_EP4_AHBM_CTRL_EN) == (USB_EP4_AHBM_CTRL_EN));
2704 }
2705
2706 /**
2707 * @brief Set USB ep4 AHB master burst length;(default 64)
2708 *
2709 * Register|BitsName
2710 * --------|--------
2711 * EP4_AHBM_CTRL | BURST_SIZE
2712 *
2713 * @param USBx USB instance
2714 * @param size This parameter can be one of the following values:
2715 * 32 ~ 1023
2716 * @retval None
2717 */
2718 __STATIC_INLINE void ll_usb_set_ep4_ahb_m_burst_size(usb_regs_t *USBx, uint32_t size)
2719 {
2720 MODIFY_REG(USBx->EP4_AHBM_CTRL, USB_EP4_AHBM_CTRL_BURST_SIZE, size << USB_EP4_AHBM_CTRL_BURST_SIZE_Pos);
2721 }
2722
2723 /**
2724 * @brief Get USB ep4 AHB master burst length;(default 64)
2725 *
2726 * Register|BitsName
2727 * --------|--------
2728 * EP4_AHBM_CTRL | BURST_SIZE
2729 *
2730 * @param USBx USB instance
2731 * @retval Returned Value can be one of the following values:
2732 * 32 ~ 1023
2733 */
2734 __STATIC_INLINE uint32_t ll_usb_get_ep4_ahb_m_burst_size(usb_regs_t *USBx)
2735 {
2736 return (uint32_t)(READ_BITS(USBx->EP4_AHBM_CTRL, USB_EP4_AHBM_CTRL_BURST_SIZE) >> USB_EP4_AHBM_CTRL_BURST_SIZE_Pos);
2737 }
2738
2739 /**
2740 * @brief Set USB ep5 AHB master read start address
2741 *
2742 * Register|BitsName
2743 * --------|--------
2744 * EP5_AHBM_RADDR | RD_START_ADDR
2745 *
2746 * @param USBx USB instance
2747 * @param addr This parameter can be one of the following values:
2748 * 32 bit address
2749 * @retval None
2750 */
2751 __STATIC_INLINE void ll_usb_set_ep5_ahb_m_rd_start_addr(usb_regs_t *USBx, uint32_t addr)
2752 {
2753 MODIFY_REG(USBx->EP5_AHBM_RADDR, USB_EP5_AHBM_RADDR_RD_START_ADDR, addr);
2754 }
2755
2756 /**
2757 * @brief Get USB ep5 AHB master read start address
2758 *
2759 * Register|BitsName
2760 * --------|--------
2761 * EP5_AHBM_RADDR | RD_START_ADDR
2762 *
2763 * @param USBx USB instance
2764 * @retval Returned Value can be one of the following values:
2765 * 32 bit address
2766 */
2767 __STATIC_INLINE uint32_t ll_usb_get_ep5_ahb_m_rd_start_addr(usb_regs_t *USBx)
2768 {
2769 return (uint32_t)(READ_BITS(USBx->EP5_AHBM_RADDR, USB_EP5_AHBM_RADDR_RD_START_ADDR));
2770 }
2771
2772 /**
2773 * @brief Enable USB ep5 AHB master
2774 *
2775 * Register|BitsName
2776 * --------|--------
2777 * EP5_CTRL | AHBM_EN
2778 *
2779 * @param USBx USB instance
2780 * @retval None
2781 */
2782 __STATIC_INLINE void ll_usb_enable_ep5_ahb_m(usb_regs_t *USBx)
2783 {
2784 SET_BITS(USBx->EP5_CTRL, USB_EP5_CTRL_AHBM_EN);
2785 }
2786
2787 /**
2788 * @brief Disable USB ep5 AHB master
2789 *
2790 * Register|BitsName
2791 * --------|--------
2792 * EP5_CTRL | AHBM_EN
2793 *
2794 * @param USBx USB instance
2795 * @retval None
2796 */
2797 __STATIC_INLINE void ll_usb_disable_ep5_ahb_m(usb_regs_t *USBx)
2798 {
2799 CLEAR_BITS(USBx->EP5_CTRL, USB_EP5_CTRL_AHBM_EN);
2800 }
2801
2802 /**
2803 * @brief Check if USB ep5 AHB master is enabled
2804 *
2805 * Register|BitsName
2806 * --------|--------
2807 * EP5_CTRL | AHBM_EN
2808 *
2809 * @param USBx USB instance
2810 * @retval State of bit (1 or 0).
2811 */
2812 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep5_ahb_m(usb_regs_t *USBx)
2813 {
2814 return (READ_BITS(USBx->EP5_CTRL, USB_EP5_CTRL_AHBM_EN) == (USB_EP5_CTRL_AHBM_EN));
2815 }
2816
2817 /**
2818 * @brief Enable USB ep5 OUT FIFO clear
2819 *
2820 * Register|BitsName
2821 * --------|--------
2822 * EP5_CTRL | AHBM_EN
2823 *
2824 * @param USBx USB instance
2825 * @retval None
2826 */
2827 __STATIC_INLINE void ll_usb_enable_ep5_fifo_clr(usb_regs_t *USBx)
2828 {
2829 SET_BITS(USBx->EP5_CTRL, USB_EP5_CTRL_FIFO_CLR);
2830 }
2831
2832 /**
2833 * @brief Disable USB ep5 OUT FIFO clear
2834 *
2835 * Register|BitsName
2836 * --------|--------
2837 * EP5_CTRL | AHBM_EN
2838 *
2839 * @param USBx USB instance
2840 * @retval None
2841 */
2842 __STATIC_INLINE void ll_usb_disable_ep5_fifo_clr(usb_regs_t *USBx)
2843 {
2844 CLEAR_BITS(USBx->EP5_CTRL, USB_EP5_CTRL_FIFO_CLR);
2845 }
2846
2847 /**
2848 * @brief Check if USB ep5 OUT FIFO clear is enabled
2849 *
2850 * Register|BitsName
2851 * --------|--------
2852 * EP5_CTRL | AHBM_EN
2853 *
2854 * @param USBx USB instance
2855 * @retval State of bit (1 or 0).
2856 */
2857 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep5_fifo_clr(usb_regs_t *USBx)
2858 {
2859 return (READ_BITS(USBx->EP5_CTRL, USB_EP5_CTRL_FIFO_CLR) == (USB_EP5_CTRL_FIFO_CLR));
2860 }
2861
2862 /**
2863 * @brief USB ep5 RX data sum can't be overwritten
2864 *
2865 * Register|BitsName
2866 * --------|--------
2867 * EP5_CTRL | RX_CNT_NO_OVERWRITE
2868 *
2869 * @param USBx USB instance
2870 * @retval None
2871 */
2872 __STATIC_INLINE void ll_usb_enable_ep5_rx_cnt_no_overwrite(usb_regs_t *USBx)
2873 {
2874 SET_BITS(USBx->EP5_CTRL, USB_EP5_CTRL_RX_CNT_NO_OVERWRITE);
2875 }
2876
2877 /**
2878 * @brief USB ep5 RX data sum can be overwritten
2879 *
2880 * Register|BitsName
2881 * --------|--------
2882 * EP5_CTRL | RX_CNT_NO_OVERWRITE
2883 *
2884 * @param USBx USB instance
2885 * @retval None
2886 */
2887 __STATIC_INLINE void ll_usb_disable_ep5_rx_cnt_no_overwrite(usb_regs_t *USBx)
2888 {
2889 CLEAR_BITS(USBx->EP5_CTRL, USB_EP5_CTRL_RX_CNT_NO_OVERWRITE);
2890 }
2891
2892 /**
2893 * @brief Check if USB ep5 RX data sum can't be overwritten is enabled
2894 *
2895 * Register|BitsName
2896 * --------|--------
2897 * EP5_CTRL | RX_CNT_NO_OVERWRITE
2898 *
2899 * @param USBx USB instance
2900 * @retval State of bit (1 or 0).
2901 */
2902 __STATIC_INLINE uint32_t ll_usb_is_enabled_ep5_rx_cnt_no_overwrite(usb_regs_t *USBx)
2903 {
2904 return (READ_BITS(USBx->EP5_CTRL, USB_EP5_CTRL_RX_CNT_NO_OVERWRITE) == (USB_EP5_CTRL_RX_CNT_NO_OVERWRITE));
2905 }
2906
2907 /**
2908 * @brief Enable USB test mode
2909 *
2910 * Register|BitsName
2911 * --------|--------
2912 * CTRL0 | EN
2913 *
2914 * @param USBx USB instance
2915 * @retval None
2916 */
2917 __STATIC_INLINE void ll_usb_enable_test_mode(usb_regs_t *USBx)
2918 {
2919 SET_BITS(USBx->CTRL0, USB_CTRL0_TEST_MODE);
2920 }
2921
2922 /**
2923 * @brief Disable USB test mode
2924 *
2925 * Register|BitsName
2926 * --------|--------
2927 * CTRL0 | EN
2928 *
2929 * @param USBx USB instance
2930 * @retval None
2931 */
2932 __STATIC_INLINE void ll_usb_disable_test_mode(usb_regs_t *USBx)
2933 {
2934 CLEAR_BITS(USBx->CTRL0, USB_CTRL0_TEST_MODE);
2935 }
2936
2937 /**
2938 * @brief Check if USB test mode is enabled
2939 *
2940 * Register|BitsName
2941 * --------|--------
2942 * CTRL0 | EN
2943 *
2944 * @param USBx USB instance
2945 * @retval State of bit (1 or 0).
2946 */
2947 __STATIC_INLINE uint32_t ll_usb_is_enabled_test_mode(usb_regs_t *USBx)
2948 {
2949 return (READ_BITS(USBx->CTRL0, USB_CTRL0_TEST_MODE) == (USB_CTRL0_TEST_MODE));
2950 }
2951
2952 /**
2953 * @brief Enable USB drive DP during transceiver test mode
2954 *
2955 * Register|BitsName
2956 * --------|--------
2957 * CTRL0 | DRIVE_DP
2958 *
2959 * @param USBx USB instance
2960 * @retval None
2961 */
2962 __STATIC_INLINE void ll_usb_enable_drive_dp(usb_regs_t *USBx)
2963 {
2964 SET_BITS(USBx->CTRL0, USB_CTRL0_DRIVE_DP);
2965 }
2966
2967 /**
2968 * @brief Disable USB drive DP during transceiver test mode
2969 *
2970 * Register|BitsName
2971 * --------|--------
2972 * CTRL0 | DRIVE_DP
2973 *
2974 * @param USBx USB instance
2975 * @retval None
2976 */
2977 __STATIC_INLINE void ll_usb_disable_drive_dp(usb_regs_t *USBx)
2978 {
2979 CLEAR_BITS(USBx->CTRL0, USB_CTRL0_DRIVE_DP);
2980 }
2981
2982 /**
2983 * @brief Check if USB tdrive DP during transceiver test mode is enabled
2984 *
2985 * Register|BitsName
2986 * --------|--------
2987 * CTRL0 | DRIVE_DP
2988 *
2989 * @param USBx USB instance
2990 * @retval State of bit (1 or 0).
2991 */
2992 __STATIC_INLINE uint32_t ll_usb_is_enabled_drive_dp(usb_regs_t *USBx)
2993 {
2994 return (READ_BITS(USBx->CTRL0, USB_CTRL0_DRIVE_DP) == (USB_CTRL0_DRIVE_DP));
2995 }
2996
2997 /**
2998 * @brief Enable USB drive DM during transceiver test mode
2999 *
3000 * Register|BitsName
3001 * --------|--------
3002 * CTRL0 | DRIVE_DM
3003 *
3004 * @param USBx USB instance
3005 * @retval None
3006 */
3007 __STATIC_INLINE void ll_usb_enable_drive_dm(usb_regs_t *USBx)
3008 {
3009 SET_BITS(USBx->CTRL0, USB_CTRL0_DRIVE_DM);
3010 }
3011
3012 /**
3013 * @brief Disable USB drive DM during transceiver test mode
3014 *
3015 * Register|BitsName
3016 * --------|--------
3017 * CTRL0 | DRIVE_DM
3018 *
3019 * @param USBx USB instance
3020 * @retval None
3021 */
3022 __STATIC_INLINE void ll_usb_disable_drive_dm(usb_regs_t *USBx)
3023 {
3024 CLEAR_BITS(USBx->CTRL0, USB_CTRL0_DRIVE_DM);
3025 }
3026
3027 /**
3028 * @brief Check if USB tdrive DM during transceiver test mode is enabled
3029 *
3030 * Register|BitsName
3031 * --------|--------
3032 * CTRL0 | DRIVE_DP
3033 *
3034 * @param USBx USB instance
3035 * @retval State of bit (1 or 0).
3036 */
3037 __STATIC_INLINE uint32_t ll_usb_is_enabled_drive_dm(usb_regs_t *USBx)
3038 {
3039 return (READ_BITS(USBx->CTRL0, USB_CTRL0_DRIVE_DM) == (USB_CTRL0_DRIVE_DM));
3040 }
3041
3042 /**
3043 * @brief Enable USB drive transceiver output enable bar during transceiver test mode
3044 *
3045 * Register|BitsName
3046 * --------|--------
3047 * CTRL0 | XCVR_OEB
3048 *
3049 * @param USBx USB instance
3050 * @retval None
3051 */
3052 __STATIC_INLINE void ll_usb_enable_xcvr_oeb(usb_regs_t *USBx)
3053 {
3054 SET_BITS(USBx->CTRL0, USB_CTRL0_XCVR_OEB);
3055 }
3056
3057 /**
3058 * @brief Disable USB drive transceiver output enable bar during transceiver test mode
3059 *
3060 * Register|BitsName
3061 * --------|--------
3062 * CTRL0 | XCVR_OEB
3063 *
3064 * @param USBx USB instance
3065 * @retval None
3066 */
3067 __STATIC_INLINE void ll_usb_disable_xcvr_oeb(usb_regs_t *USBx)
3068 {
3069 CLEAR_BITS(USBx->CTRL0, USB_CTRL0_XCVR_OEB);
3070 }
3071
3072 /**
3073 * @brief Check if USB drive transceiver output enable bar during transceiver test mode is enabled
3074 *
3075 * Register|BitsName
3076 * --------|--------
3077 * CTRL0 | XCVR_OEB
3078 *
3079 * @param USBx USB instance
3080 * @retval State of bit (1 or 0).
3081 */
3082 __STATIC_INLINE uint32_t ll_usb_is_enabled_xcvr_oeb(usb_regs_t *USBx)
3083 {
3084 return (READ_BITS(USBx->CTRL0, USB_CTRL0_XCVR_OEB) == (USB_CTRL0_XCVR_OEB));
3085 }
3086
3087 /**
3088 * @brief Enable USB drive DP pullup during transceiver test mode
3089 *
3090 * Register|BitsName
3091 * --------|--------
3092 * CTRL0 | XCVR_DP_RPU_EN
3093 *
3094 * @param USBx USB instance
3095 * @retval None
3096 */
3097 __STATIC_INLINE void ll_usb_enable_xcvr_dp_rpu(usb_regs_t *USBx)
3098 {
3099 SET_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DP_RPU_EN);
3100 }
3101
3102 /**
3103 * @brief Disable USB drive DP pullup during transceiver test mode
3104 *
3105 * Register|BitsName
3106 * --------|--------
3107 * CTRL0 | XCVR_DP_RPU_EN
3108 *
3109 * @param USBx USB instance
3110 * @retval None
3111 */
3112 __STATIC_INLINE void ll_usb_disable_xcvr_dp_rpu(usb_regs_t *USBx)
3113 {
3114 CLEAR_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DP_RPU_EN);
3115 }
3116
3117 /**
3118 * @brief Check if USB drive DP pullup during transceiver test mode is enabled
3119 *
3120 * Register|BitsName
3121 * --------|--------
3122 * CTRL0 | XCVR_DP_RPU_EN
3123 *
3124 * @param USBx USB instance
3125 * @retval State of bit (1 or 0).
3126 */
3127 __STATIC_INLINE uint32_t ll_usb_is_enabled_xcvr_dp_rpu(usb_regs_t *USBx)
3128 {
3129 return (READ_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DP_RPU_EN) == (USB_CTRL0_XCVR_DP_RPU_EN));
3130 }
3131
3132 /**
3133 * @brief Enable USB drive DM pullup during transceiver test mode
3134 *
3135 * Register|BitsName
3136 * --------|--------
3137 * CTRL0 | XCVR_DM_RPU_EN
3138 *
3139 * @param USBx USB instance
3140 * @retval None
3141 */
3142 __STATIC_INLINE void ll_usb_enable_xcvr_dm_rpu(usb_regs_t *USBx)
3143 {
3144 SET_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DM_RPU_EN);
3145 }
3146
3147 /**
3148 * @brief Disable USB drive DM pullup during transceiver test mode
3149 *
3150 * Register|BitsName
3151 * --------|--------
3152 * CTRL0 | XCVR_DM_RPU_EN
3153 *
3154 * @param USBx USB instance
3155 * @retval None
3156 */
3157 __STATIC_INLINE void ll_usb_disable_xcvr_dm_rpu(usb_regs_t *USBx)
3158 {
3159 CLEAR_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DM_RPU_EN);
3160 }
3161
3162 /**
3163 * @brief Check if USB drive DM pullup during transceiver test mode is enabled
3164 *
3165 * Register|BitsName
3166 * --------|--------
3167 * CTRL0 | XCVR_DM_RPU_EN
3168 *
3169 * @param USBx USB instance
3170 * @retval State of bit (1 or 0).
3171 */
3172 __STATIC_INLINE uint32_t ll_usb_is_enabled_xcvr_dm_rpu(usb_regs_t *USBx)
3173 {
3174 return (READ_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DM_RPU_EN) == (USB_CTRL0_XCVR_DM_RPU_EN));
3175 }
3176
3177 /**
3178 * @brief Enable USB drive DP SW pullup during transceiver test mode
3179 *
3180 * Register|BitsName
3181 * --------|--------
3182 * CTRL0 | XCVR_DP_RPUSW_EN
3183 *
3184 * @param USBx USB instance
3185 * @retval None
3186 */
3187 __STATIC_INLINE void ll_usb_enable_xcvr_dp_rpusw(usb_regs_t *USBx)
3188 {
3189 SET_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DP_RPUSW_EN);
3190 }
3191
3192 /**
3193 * @brief Disable USB drive DP SW pullup during transceiver test mode
3194 *
3195 * Register|BitsName
3196 * --------|--------
3197 * CTRL0 | XCVR_DP_RPUSW_EN
3198 *
3199 * @param USBx USB instance
3200 * @retval None
3201 */
3202 __STATIC_INLINE void ll_usb_disable_xcvr_dp_rpusw(usb_regs_t *USBx)
3203 {
3204 CLEAR_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DP_RPUSW_EN);
3205 }
3206
3207 /**
3208 * @brief Check if USB drive DP SW pullup during transceiver test mode is enabled
3209 *
3210 * Register|BitsName
3211 * --------|--------
3212 * CTRL0 | XCVR_DP_RPUSW_EN
3213 *
3214 * @param USBx USB instance
3215 * @retval State of bit (1 or 0).
3216 */
3217 __STATIC_INLINE uint32_t ll_usb_is_enabled_xcvr_dp_rpusw(usb_regs_t *USBx)
3218 {
3219 return (READ_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DP_RPUSW_EN) == (USB_CTRL0_XCVR_DP_RPUSW_EN));
3220 }
3221
3222 /**
3223 * @brief Enable USB drive DM SW pullup during transceiver test mode
3224 *
3225 * Register|BitsName
3226 * --------|--------
3227 * CTRL0 | XCVR_DM_RPUSW_EN
3228 *
3229 * @param USBx USB instance
3230 * @retval None
3231 */
3232 __STATIC_INLINE void ll_usb_enable_xcvr_dm_rpusw(usb_regs_t *USBx)
3233 {
3234 SET_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DM_RPUSW_EN);
3235 }
3236
3237 /**
3238 * @brief Disable USB drive DM SW pullup during transceiver test mode
3239 *
3240 * Register|BitsName
3241 * --------|--------
3242 * CTRL0 | XCVR_DM_RPUSW_EN
3243 *
3244 * @param USBx USB instance
3245 * @retval None
3246 */
3247 __STATIC_INLINE void ll_usb_disable_xcvr_dm_rpusw(usb_regs_t *USBx)
3248 {
3249 CLEAR_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DM_RPUSW_EN);
3250 }
3251
3252 /**
3253 * @brief Check if USB drive DM SW pullup during transceiver test mode is enabled
3254 *
3255 * Register|BitsName
3256 * --------|--------
3257 * CTRL0 | XCVR_DM_RPUSW_EN
3258 *
3259 * @param USBx USB instance
3260 * @retval State of bit (1 or 0).
3261 */
3262 __STATIC_INLINE uint32_t ll_usb_is_enabled_xcvr_dm_rpusw(usb_regs_t *USBx)
3263 {
3264 return (READ_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DM_RPUSW_EN) == (USB_CTRL0_XCVR_DM_RPUSW_EN));
3265 }
3266
3267 /**
3268 * @brief Enable USB drive DP pull down during transceiver test mode
3269 *
3270 * Register|BitsName
3271 * --------|--------
3272 * CTRL0 | XCVR_DP_RPD_EN
3273 *
3274 * @param USBx USB instance
3275 * @retval None
3276 */
3277 __STATIC_INLINE void ll_usb_enable_xcvr_dp_rpd(usb_regs_t *USBx)
3278 {
3279 SET_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DP_RPD_EN);
3280 }
3281
3282 /**
3283 * @brief Disable USB drive DP pull down during transceiver test mode
3284 *
3285 * Register|BitsName
3286 * --------|--------
3287 * CTRL0 | XCVR_DP_RPD_EN
3288 *
3289 * @param USBx USB instance
3290 * @retval None
3291 */
3292 __STATIC_INLINE void ll_usb_disable_xcvr_dp_rpd(usb_regs_t *USBx)
3293 {
3294 CLEAR_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DP_RPD_EN);
3295 }
3296
3297 /**
3298 * @brief Check if USB drive DP pull down during transceiver test mode is enabled
3299 *
3300 * Register|BitsName
3301 * --------|--------
3302 * CTRL0 | XCVR_DP_RPD_EN
3303 *
3304 * @param USBx USB instance
3305 * @retval State of bit (1 or 0).
3306 */
3307 __STATIC_INLINE uint32_t ll_usb_is_enabled_xcvr_dp_rpd(usb_regs_t *USBx)
3308 {
3309 return (READ_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DP_RPD_EN) == (USB_CTRL0_XCVR_DP_RPD_EN));
3310 }
3311
3312 /**
3313 * @brief Enable USB drive DM pull down during transceiver test mode
3314 *
3315 * Register|BitsName
3316 * --------|--------
3317 * CTRL0 | XCVR_DM_RPD_EN
3318 *
3319 * @param USBx USB instance
3320 * @retval None
3321 */
3322 __STATIC_INLINE void ll_usb_enable_xcvr_dm_rpd(usb_regs_t *USBx)
3323 {
3324 SET_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DM_RPD_EN);
3325 }
3326
3327 /**
3328 * @brief Disable USB drive DM pull down during transceiver test mode
3329 *
3330 * Register|BitsName
3331 * --------|--------
3332 * CTRL0 | XCVR_DM_RPD_EN
3333 *
3334 * @param USBx USB instance
3335 * @retval None
3336 */
3337 __STATIC_INLINE void ll_usb_disable_xcvr_dm_rpd(usb_regs_t *USBx)
3338 {
3339 CLEAR_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DM_RPD_EN);
3340 }
3341
3342 /**
3343 * @brief Check if USB drive DM pull down during transceiver test mode is enabled
3344 *
3345 * Register|BitsName
3346 * --------|--------
3347 * CTRL0 | XCVR_DM_RPD_EN
3348 *
3349 * @param USBx USB instance
3350 * @retval State of bit (1 or 0).
3351 */
3352 __STATIC_INLINE uint32_t ll_usb_is_enabled_xcvr_dm_rpd(usb_regs_t *USBx)
3353 {
3354 return (READ_BITS(USBx->CTRL0, USB_CTRL0_XCVR_DM_RPD_EN) == (USB_CTRL0_XCVR_DM_RPD_EN));
3355 }
3356
3357 /**
3358 * @brief Set USB output endian mode
3359 *
3360 * Register|BitsName
3361 * --------|--------
3362 * CTRL0 | OUTPUT_ENDIAN_CTRL
3363 *
3364 * @param USBx USB instance
3365 * @param mode This parameter can be one of the following values:
3366 * @arg @ref LL_USB_CTRL0_OUTPUT_ENDIAN_CTRL_SMALL
3367 * @arg @ref LL_USB_CTRL0_OUTPUT_ENDIAN_CTRL_BIG
3368 * @retval None
3369 */
3370 __STATIC_INLINE void ll_usb_set_output_endian_mode(usb_regs_t *USBx, uint32_t mode)
3371 {
3372 MODIFY_REG(USBx->CTRL0, USB_CTRL0_OUTPUT_ENDIAN_CTRL, mode);
3373 }
3374
3375 /**
3376 * @brief Get USB output endian mode
3377 *
3378 * Register|BitsName
3379 * --------|--------
3380 * CTRL0 | OUTPUT_ENDIAN_CTRL
3381 *
3382 * @param USBx USB instance
3383 * @retval Returned Value can be one of the following values:
3384 * @arg @ref LL_USB_CTRL0_OUTPUT_ENDIAN_CTRL_SMALL
3385 * @arg @ref LL_USB_CTRL0_OUTPUT_ENDIAN_CTRL_BIG
3386 */
3387 __STATIC_INLINE uint32_t ll_usb_get_output_endian_mode(usb_regs_t *USBx)
3388 {
3389 return (uint32_t)(READ_BITS(USBx->CTRL0, USB_CTRL0_OUTPUT_ENDIAN_CTRL));
3390 }
3391
3392 /**
3393 * @brief Set USB input endian mode
3394 *
3395 * Register|BitsName
3396 * --------|--------
3397 * CTRL0 | INPUT_ENDIAN_CTRL
3398 *
3399 * @param USBx USB instance
3400 * @param mode This parameter can be one of the following values:
3401 * @arg @ref LL_USB_CTRL0_INPUT_ENDIAN_CTRL_SMALL
3402 * @arg @ref LL_USB_CTRL0_INPUT_ENDIAN_CTRL_BIG
3403 * @retval None
3404 */
3405 __STATIC_INLINE void ll_usb_set_input_endian_mode(usb_regs_t *USBx, uint32_t mode)
3406 {
3407 MODIFY_REG(USBx->CTRL0, USB_CTRL0_INPUT_ENDIAN_CTRL, mode);
3408 }
3409
3410 /**
3411 * @brief Get USB input endian mode
3412 *
3413 * Register|BitsName
3414 * --------|--------
3415 * CTRL0 | INPUT_ENDIAN_CTRL
3416 *
3417 * @param USBx USB instance
3418 * @retval Returned Value can be one of the following values:
3419 * @arg @ref LL_USB_CTRL0_INPUT_ENDIAN_CTRL_SMALL
3420 * @arg @ref LL_USB_CTRL0_INPUT_ENDIAN_CTRL_BIG
3421 */
3422 __STATIC_INLINE uint32_t ll_usb_get_input_endian_mode(usb_regs_t *USBx)
3423 {
3424 return (uint32_t)(READ_BITS(USBx->CTRL0, USB_CTRL0_INPUT_ENDIAN_CTRL));
3425 }
3426
3427 /**
3428 * @brief Set USB probe select signal
3429 *
3430 * Register|BitsName
3431 * --------|--------
3432 * CTRL0 | INPUT_ENDIAN_CTRL
3433 *
3434 * @param USBx USB instance
3435 * @param sel This parameter can be one of the following values:
3436 * @arg @ref LL_USB_CTRL0_PROBE_SEL_PROTOCAL_STAT
3437 * @arg @ref LL_USB_CTRL0_PROBE_SEL_RX_STAT
3438 * @arg @ref LL_USB_CTRL0_PROBE_SEL_UTMI_SIGNALS
3439 * @arg @ref LL_USB_CTRL0_PROBE_SEL_SYNC_STAT
3440 * @arg @ref LL_USB_CTRL0_PROBE_SEL_TX_STAT
3441 * @arg @ref LL_USB_CTRL0_PROBE_SEL_DPLL_STAT
3442 * @retval None
3443 */
3444 __STATIC_INLINE void ll_usb_set_probe_sel(usb_regs_t *USBx, uint32_t sel)
3445 {
3446 MODIFY_REG(USBx->CTRL0, USB_CTRL0_PROBE_SEL, sel);
3447 }
3448
3449 /**
3450 * @brief Get USB probe select signal
3451 *
3452 * Register|BitsName
3453 * --------|--------
3454 * CTRL0 | INPUT_ENDIAN_CTRL
3455 *
3456 * @param USBx USB instance
3457 * @retval Returned Value can be one of the following values:
3458 * @arg @ref LL_USB_CTRL0_PROBE_SEL_PROTOCAL_STAT
3459 * @arg @ref LL_USB_CTRL0_PROBE_SEL_RX_STAT
3460 * @arg @ref LL_USB_CTRL0_PROBE_SEL_UTMI_SIGNALS
3461 * @arg @ref LL_USB_CTRL0_PROBE_SEL_SYNC_STAT
3462 * @arg @ref LL_USB_CTRL0_PROBE_SEL_TX_STAT
3463 * @arg @ref LL_USB_CTRL0_PROBE_SEL_DPLL_STAT
3464 */
3465 __STATIC_INLINE uint32_t ll_usb_get_probe_sel(usb_regs_t *USBx)
3466 {
3467 return (uint32_t)(READ_BITS(USBx->CTRL0, USB_CTRL0_PROBE_SEL));
3468 }
3469
3470 /**
3471 * @brief Set USB ep3 DMA total transfer length
3472 *
3473 * Register|BitsName
3474 * --------|--------
3475 * EP3_XFER_LEN | EP3_XFER_LEN
3476 *
3477 * @param USBx USB instance
3478 * @param len This parameter can be one of the following values:
3479 * 0x0 ~ 0xFFFF
3480 * @retval None
3481 */
3482 __STATIC_INLINE void ll_usb_set_ep3_xfer_len(usb_regs_t *USBx, uint32_t len)
3483 {
3484 MODIFY_REG(USBx->EP3_XFER_LEN, USB_EP3_XFER_LEN, len);
3485 }
3486
3487 /**
3488 * @brief Get USB ep3 DMA total transfer length
3489 *
3490 * Register|BitsName
3491 * --------|--------
3492 * EP3_XFER_LEN | EP3_XFER_LEN
3493 *
3494 * @param USBx USB instance
3495 * @retval Returned Value can be one of the following values:
3496 * 0x0 ~ 0xFFFF
3497 */
3498 __STATIC_INLINE uint32_t ll_usb_get_ep3_xfer_len(usb_regs_t *USBx)
3499 {
3500 return (uint32_t)(READ_BITS(USBx->EP3_XFER_LEN, USB_EP3_XFER_LEN));
3501 }
3502
3503 /**
3504 * @brief Set USB ep4 DMA total transfer length
3505 *
3506 * Register|BitsName
3507 * --------|--------
3508 * EP4_XFER_LEN | EP4_XFER_LEN
3509 *
3510 * @param USBx USB instance
3511 * @param len This parameter can be one of the following values:
3512 * 0x0 ~ 0xFFFF
3513 * @retval None
3514 */
3515 __STATIC_INLINE void ll_usb_set_ep4_xfer_len(usb_regs_t *USBx, uint32_t len)
3516 {
3517 MODIFY_REG(USBx->EP4_XFER_LEN, USB_EP4_XFER_LEN, len);
3518 }
3519
3520 /**
3521 * @brief Get USB ep4 DMA total transfer length
3522 *
3523 * Register|BitsName
3524 * --------|--------
3525 * EP4_XFER_LEN | EP4_XFER_LEN
3526 *
3527 * @param USBx USB instance
3528 * @retval Returned Value can be one of the following values:
3529 * 0x0 ~ 0xFFFF
3530 */
3531 __STATIC_INLINE uint32_t ll_usb_get_ep4_xfer_len(usb_regs_t *USBx)
3532 {
3533 return (uint32_t)(READ_BITS(USBx->EP4_XFER_LEN, USB_EP4_XFER_LEN));
3534 }
3535
3536 /**
3537 * @brief Set USB ep5 DMA total transfer length
3538 *
3539 * Register|BitsName
3540 * --------|--------
3541 * EP5_XFER_LEN | EP5_XFER_LEN
3542 *
3543 * @param USBx USB instance
3544 * @param len This parameter can be one of the following values:
3545 * 0x0 ~ 0xFFFF
3546 * @retval None
3547 */
3548 __STATIC_INLINE void ll_usb_set_ep5_xfer_len(usb_regs_t *USBx, uint32_t len)
3549 {
3550 MODIFY_REG(USBx->EP5_XFER_LEN, USB_EP5_XFER_LEN, len);
3551 }
3552
3553 /**
3554 * @brief Get USB ep5 DMA total transfer length
3555 *
3556 * Register|BitsName
3557 * --------|--------
3558 * EP5_XFER_LEN | EP5_XFER_LEN
3559 *
3560 * @param USBx USB instance
3561 * @retval Returned Value can be one of the following values:
3562 * 0x0 ~ 0xFFFF
3563 */
3564 __STATIC_INLINE uint32_t ll_usb_get_ep5_xfer_len(usb_regs_t *USBx)
3565 {
3566 return (uint32_t)(READ_BITS(USBx->EP5_XFER_LEN, USB_EP5_XFER_LEN));
3567 }
3568
3569 /**
3570 * @brief Set USB ep5 DMA recieve data time out value
3571 *
3572 * Register|BitsName
3573 * --------|--------
3574 * EP5_TIMER | EP5_TIMER
3575 *
3576 * @param USBx USB instance
3577 * @param len This parameter can be one of the following values:
3578 * 0x0 ~ 0x3FF
3579 * @retval None
3580 */
3581 __STATIC_INLINE void ll_usb_set_ep5_timer_val(usb_regs_t *USBx, uint32_t len)
3582 {
3583 MODIFY_REG(USBx->EP5_TIMER, USB_EP5_TIMER_VAL, len);
3584 }
3585
3586 /**
3587 * @brief Get USB ep5 DMA total transfer length
3588 *
3589 * Register|BitsName
3590 * --------|--------
3591 * EP5_TIMER | EP5_TIMER
3592 *
3593 * @param USBx USB instance
3594 * @retval Returned Value can be one of the following values:
3595 * 0x0 ~ 0xFFFF
3596 */
3597 __STATIC_INLINE uint32_t ll_usb_get_ep5_timer_val(usb_regs_t *USBx)
3598 {
3599 return (uint32_t)(READ_BITS(USBx->EP5_TIMER, USB_EP5_TIMER_VAL));
3600 }
3601
3602 /**
3603 * @brief Get USB received data sum in the EP0 IN FIFO
3604 *
3605 * Register|BitsName
3606 * --------|--------
3607 * RX_CNT | EP0_RX_DATA_SUM
3608 *
3609 * @param USBx USB instance
3610 * @retval Returned Value can be one of the following values:
3611 * 0x0 ~ 0xFF
3612 */
3613 __STATIC_INLINE uint32_t ll_usb_get_ep0_rx_data_sum(usb_regs_t *USBx)
3614 {
3615 return (uint32_t)(READ_BITS(USBx->RX_CNT, USB_RX_CNT_EP0_RX_DATA_SUM));
3616 }
3617
3618 /**
3619 * @brief Get USB received data sum in the EP1 IN FIFO
3620 *
3621 * Register|BitsName
3622 * --------|--------
3623 * RX_CNT | EP1_RX_DATA_SUM
3624 *
3625 * @param USBx USB instance
3626 * @retval Returned Value can be one of the following values:
3627 * 0x0 ~ 0xFF
3628 */
3629 __STATIC_INLINE uint32_t ll_usb_get_ep1_rx_data_sum(usb_regs_t *USBx)
3630 {
3631 return (uint32_t)(READ_BITS(USBx->RX_CNT, USB_RX_CNT_EP1_RX_DATA_SUM) >> USB_RX_CNT_EP1_RX_DATA_SUM_Pos);
3632 }
3633
3634 /**
3635 * @brief Get USB received data sum in the EP5 IN FIFO
3636 *
3637 * Register|BitsName
3638 * --------|--------
3639 * EP5_RX_CNT | EP5_RX_CNT
3640 *
3641 * @param USBx USB instance
3642 * @retval Returned Value can be one of the following values:
3643 * 0x0 ~ 0xFFFFFFFFUL
3644 */
3645 __STATIC_INLINE uint32_t ll_usb_get_ep5_rx_data_sum(usb_regs_t *USBx)
3646 {
3647 return (uint32_t)(READ_BITS(USBx->EP5_RX_CNT, USB_EP5_RX_CNT));
3648 }
3649
3650 /**
3651 * @brief Set USB config descriptor start address
3652 *
3653 * Register|BitsName
3654 * --------|--------
3655 * CFG_DESC_CTRL | START
3656 *
3657 * @param USBx USB instance
3658 * @param addr This parameter can be one of the following values:
3659 * 0x0 ~ 0xFF
3660 * @retval None
3661 */
3662 __STATIC_INLINE void ll_usb_set_cfg_desc_ctrl_start(usb_regs_t *USBx, uint32_t addr)
3663 {
3664 MODIFY_REG(USBx->CFG_DESC_CTRL, USB_CFG_DESC_CTRL_START, addr);
3665 }
3666
3667 /**
3668 * @brief Get USB config descriptor start address
3669 *
3670 * Register|BitsName
3671 * --------|--------
3672 * CFG_DESC_CTRL | START
3673 *
3674 * @param USBx USB instance
3675 * @retval Returned Value can be one of the following values:
3676 * 0x0 ~ 0xFF
3677 */
3678 __STATIC_INLINE uint32_t ll_usb_get_cfg_desc_ctrl_start(usb_regs_t *USBx)
3679 {
3680 return (uint32_t)(READ_BITS(USBx->CFG_DESC_CTRL, USB_CFG_DESC_CTRL_START));
3681 }
3682
3683 /**
3684 * @brief Set USB config descriptor size
3685 *
3686 * Register|BitsName
3687 * --------|--------
3688 * CFG_DESC_CTRL | SIZE
3689 *
3690 * @param USBx USB instance
3691 * @param size This parameter can be one of the following values:
3692 * 0x0 ~ 0xFF
3693 * @retval None
3694 */
3695 __STATIC_INLINE void ll_usb_set_cfg_desc_ctrl_size(usb_regs_t *USBx, uint32_t size)
3696 {
3697 MODIFY_REG(USBx->CFG_DESC_CTRL, USB_CFG_DESC_CTRL_SIZE, size << USB_CFG_DESC_CTRL_SIZE_Pos);
3698 }
3699
3700 /**
3701 * @brief Get USB config descriptor size
3702 *
3703 * Register|BitsName
3704 * --------|--------
3705 * CFG_DESC_CTRL | SIZE
3706 *
3707 * @param USBx USB instance
3708 * @retval Returned Value can be one of the following values:
3709 * 0x0 ~ 0xFF
3710 */
3711 __STATIC_INLINE uint32_t ll_usb_get_cfg_desc_ctrl_size(usb_regs_t *USBx)
3712 {
3713 return (uint32_t)(READ_BITS(USBx->CFG_DESC_CTRL, USB_CFG_DESC_CTRL_SIZE) >> USB_CFG_DESC_CTRL_SIZE_Pos);
3714 }
3715
3716 /**
3717 * @brief Set USB Language ID descriptor start address
3718 *
3719 * Register|BitsName
3720 * --------|--------
3721 * STR_DESC0_CTRL | START
3722 *
3723 * @param USBx USB instance
3724 * @param addr This parameter can be one of the following values:
3725 * 0x0 ~ 0xFF
3726 * @retval None
3727 */
3728 __STATIC_INLINE void ll_usb_set_str_desc0_ctrl_start(usb_regs_t *USBx, uint32_t addr)
3729 {
3730 MODIFY_REG(USBx->STR_DESC0_CTRL, USB_STR_DESC0_CTRL_START, addr);
3731 }
3732
3733 /**
3734 * @brief Get USB Language ID descriptor start address
3735 *
3736 * Register|BitsName
3737 * --------|--------
3738 * STR_DESC0_CTRL | START
3739 *
3740 * @param USBx USB instance
3741 * @retval Returned Value can be one of the following values:
3742 * 0x0 ~ 0xFF
3743 */
3744 __STATIC_INLINE uint32_t ll_usb_get_str_desc0_ctrl_start(usb_regs_t *USBx)
3745 {
3746 return (uint32_t)(READ_BITS(USBx->STR_DESC0_CTRL, USB_STR_DESC0_CTRL_START));
3747 }
3748
3749 /**
3750 * @brief Set USB Language ID descriptor size
3751 *
3752 * Register|BitsName
3753 * --------|--------
3754 * STR_DESC0_CTRL | SIZE
3755 *
3756 * @param USBx USB instance
3757 * @param size This parameter can be one of the following values:
3758 * 0x0 ~ 0xFF
3759 * @retval None
3760 */
3761 __STATIC_INLINE void ll_usb_set_str_desc0_ctrl_size(usb_regs_t *USBx, uint32_t size)
3762 {
3763 MODIFY_REG(USBx->STR_DESC0_CTRL, USB_STR_DESC0_CTRL_SIZE, size << USB_STR_DESC0_CTRL_SIZE_Pos);
3764 }
3765
3766 /**
3767 * @brief Get USB Language ID descriptor size
3768 *
3769 * Register|BitsName
3770 * --------|--------
3771 * STR_DESC0_CTRL | SIZE
3772 *
3773 * @param USBx USB instance
3774 * @retval Returned Value can be one of the following values:
3775 * 0x0 ~ 0xFF
3776 */
3777 __STATIC_INLINE uint32_t ll_usb_get_str_desc0_ctrl_size(usb_regs_t *USBx)
3778 {
3779 return (uint32_t)(READ_BITS(USBx->STR_DESC0_CTRL, USB_STR_DESC0_CTRL_SIZE) >> USB_STR_DESC0_CTRL_SIZE_Pos);
3780 }
3781
3782 /**
3783 * @brief Set USB string descriptor start address
3784 *
3785 * Register|BitsName
3786 * --------|--------
3787 * STR_DESC1_CTRL | START
3788 *
3789 * @param USBx USB instance
3790 * @param addr This parameter can be one of the following values:
3791 * 0x0 ~ 0xFF
3792 * @retval None
3793 */
3794 __STATIC_INLINE void ll_usb_set_str_desc1_ctrl_start(usb_regs_t *USBx, uint32_t addr)
3795 {
3796 MODIFY_REG(USBx->STR_DESC1_CTRL, USB_STR_DESC1_CTRL_START, addr);
3797 }
3798
3799 /**
3800 * @brief Get USB string descriptor start address
3801 *
3802 * Register|BitsName
3803 * --------|--------
3804 * STR_DESC1_CTRL | START
3805 *
3806 * @param USBx USB instance
3807 * @retval Returned Value can be one of the following values:
3808 * 0x0 ~ 0xFF
3809 */
3810 __STATIC_INLINE uint32_t ll_usb_get_str_desc1_ctrl_start(usb_regs_t *USBx)
3811 {
3812 return (uint32_t)(READ_BITS(USBx->STR_DESC1_CTRL, USB_STR_DESC1_CTRL_START));
3813 }
3814
3815 /**
3816 * @brief Set USB string descriptor size
3817 *
3818 * Register|BitsName
3819 * --------|--------
3820 * STR_DESC1_CTRL | SIZE
3821 *
3822 * @param USBx USB instance
3823 * @param size This parameter can be one of the following values:
3824 * 0x0 ~ 0xFF
3825 * @retval None
3826 */
3827 __STATIC_INLINE void ll_usb_set_str_desc1_ctrl_size(usb_regs_t *USBx, uint32_t size)
3828 {
3829 MODIFY_REG(USBx->STR_DESC1_CTRL, USB_STR_DESC1_CTRL_SIZE, size << USB_STR_DESC1_CTRL_SIZE_Pos);
3830 }
3831
3832 /**
3833 * @brief Get USB string descriptor size
3834 *
3835 * Register|BitsName
3836 * --------|--------
3837 * STR_DESC1_CTRL | SIZE
3838 *
3839 * @param USBx USB instance
3840 * @retval Returned Value can be one of the following values:
3841 * 0x0 ~ 0xFF
3842 */
3843 __STATIC_INLINE uint32_t ll_usb_get_str_desc1_ctrl_size(usb_regs_t *USBx)
3844 {
3845 return (uint32_t)(READ_BITS(USBx->STR_DESC1_CTRL, USB_STR_DESC1_CTRL_SIZE) >> USB_STR_DESC1_CTRL_SIZE_Pos);
3846 }
3847
3848 /**
3849 * @brief Set USB endpoint 0 FIFO address
3850 *
3851 * Register|BitsName
3852 * --------|--------
3853 * EP0_FIFO_ADDR | EP0_FIFO_ADDR
3854 *
3855 * @param USBx USB instance
3856 * @param value This parameter can be one of the following values:
3857 * 32 bit address
3858 * @retval None
3859 */
3860 __STATIC_INLINE void ll_usb_set_usb_ep0_fifo(usb_regs_t *USBx, uint32_t value)
3861 {
3862 MODIFY_REG(USBx->EP0_FIFO_ADDR, USB_EP0_FIFO_ADDR, value);
3863 }
3864
3865 /**
3866 * @brief Get USB endpoint 0 FIFO value
3867 *
3868 * Register|BitsName
3869 * --------|--------
3870 * EP0_FIFO_ADDR | EP0_FIFO_ADDR
3871 *
3872 * @param USBx USB instance
3873 * @retval Returned Value can be one of the following values:
3874 * 32 bit address
3875 */
3876 __STATIC_INLINE uint32_t ll_usb_get_usb_ep0_fifo(usb_regs_t *USBx)
3877 {
3878 return (uint32_t)(READ_BITS(USBx->EP0_FIFO_ADDR, USB_EP0_FIFO_ADDR));
3879 }
3880
3881 /**
3882 * @brief Get USB endpoint 1 FIFO value
3883 *
3884 * Register|BitsName
3885 * --------|--------
3886 * EP1_FIFO_ADDR | EP1_FIFO_ADDR
3887 *
3888 * @param USBx USB instance
3889 * @retval Returned Value can be one of the following values:
3890 * 32 bit value
3891 */
3892 __STATIC_INLINE uint32_t ll_usb_get_usb_ep1_fifo(usb_regs_t *USBx)
3893 {
3894 return (uint32_t)(READ_BITS(USBx->EP1_FIFO_ADDR, USB_EP1_FIFO_ADDR));
3895 }
3896
3897 /**
3898 * @brief Set USB endpoint 2 FIFO value
3899 *
3900 * Register|BitsName
3901 * --------|--------
3902 * EP2_FIFO_ADDR | EP2_FIFO_ADDR
3903 *
3904 * @param USBx USB instance
3905 * @param value This parameter can be one of the following values:
3906 * 32 bit value
3907 * @retval None
3908 */
3909 __STATIC_INLINE void ll_usb_set_usb_ep2_fifo(usb_regs_t *USBx, uint32_t value)
3910 {
3911 MODIFY_REG(USBx->EP2_FIFO_ADDR, USB_EP2_FIFO_ADDR, value);
3912 }
3913
3914 /**
3915 * @brief Set USB endpoint 3 FIFO value
3916 *
3917 * Register|BitsName
3918 * --------|--------
3919 * EP3_FIFO_ADDR | EP3_FIFO_ADDR
3920 *
3921 * @param USBx USB instance
3922 * @param value This parameter can be one of the following values:
3923 * 32 bit value
3924 * @retval None
3925 */
3926 __STATIC_INLINE void ll_usb_set_usb_ep3_fifo(usb_regs_t *USBx, uint32_t value)
3927 {
3928 MODIFY_REG(USBx->EP3_FIFO_ADDR, USB_EP3_FIFO_ADDR, value);
3929 }
3930
3931 /**
3932 * @brief Set USB endpoint 4 FIFO value
3933 *
3934 * Register|BitsName
3935 * --------|--------
3936 * EP4_FIFO_ADDR | EP4_FIFO_ADDR
3937 *
3938 * @param USBx USB instance
3939 * @param value This parameter can be one of the following values:
3940 * 32 bit value
3941 * @retval None
3942 */
3943 __STATIC_INLINE void ll_usb_set_usb_ep4_fifo(usb_regs_t *USBx, uint32_t value)
3944 {
3945 MODIFY_REG(USBx->EP4_FIFO_ADDR, USB_EP4_FIFO_ADDR, value);
3946 }
3947
3948 /**
3949 * @brief Get USB endpoint 5 FIFO value
3950 *
3951 * Register|BitsName
3952 * --------|--------
3953 * EP5_FIFO_ADDR | EP5_FIFO_ADDR
3954 *
3955 * @param USBx USB instance
3956 * @retval Returned Value can be one of the following values:
3957 * 32 bit value
3958 */
3959 __STATIC_INLINE uint32_t ll_usb_get_usb_ep5_fifo(usb_regs_t *USBx)
3960 {
3961 return (uint32_t)(READ_BITS(USBx->EP5_FIFO_ADDR, USB_EP5_FIFO_ADDR));
3962 }
3963
3964 /**
3965 * @brief Set USB ep4 FIFO write byte enable value
3966 *
3967 * Register|BitsName
3968 * --------|--------
3969 * EP4_FIFO_WR_EN | EP4_FIFO_WR_EN
3970 *
3971 * @param USBx USB instance
3972 * @param len This parameter can be one of the following values:
3973 * @arg @ref USB_LL_EC_USB_EP4_FIFO_WEN
3974 * @arg @ref LL_USB_EP4_FIFO_WEN_DEFAULT
3975 * @arg @ref LL_USB_EP4_FIFO_WEN_1BYTE
3976 * @arg @ref LL_USB_EP4_FIFO_WEN_2BYTE
3977 * @arg @ref LL_USB_EP4_FIFO_WEN_3BYTE
3978 * @arg @ref LL_USB_EP4_FIFO_WEN_4BYTE
3979 * @retval None
3980 */
3981 __STATIC_INLINE void ll_usb_set_ep4_fifo_wr_en(usb_regs_t *USBx, uint32_t len)
3982 {
3983 MODIFY_REG(USBx->EP4_FIFO_WR_EN, USB_EP4_FIFO_WR_EN, len);
3984 }
3985
3986 /**
3987 * @brief Get USB ep4 FIFO write byte enable value
3988 *
3989 * Register|BitsName
3990 * --------|--------
3991 * EP4_FIFO_WR_EN | EP4_FIFO_WR_EN
3992 *
3993 * @param USBx USB instance
3994 * @retval Returned Value can be one of the following values:
3995 * @arg @ref USB_LL_EC_USB_EP4_FIFO_WEN
3996 * @arg @ref LL_USB_EP4_FIFO_WEN_DEFAULT
3997 * @arg @ref LL_USB_EP4_FIFO_WEN_1BYTE
3998 * @arg @ref LL_USB_EP4_FIFO_WEN_2BYTE
3999 * @arg @ref LL_USB_EP4_FIFO_WEN_3BYTE
4000 * @arg @ref LL_USB_EP4_FIFO_WEN_4BYTE
4001 */
4002 __STATIC_INLINE uint32_t ll_usb_get_ep4_fifo_wr_en(usb_regs_t *USBx)
4003 {
4004 return (uint32_t)(READ_BITS(USBx->EP4_FIFO_WR_EN, USB_EP4_FIFO_WR_EN));
4005 }
4006
4007 /**
4008 * @brief Set USB descriptor SRAM value
4009 *
4010 * Register|BitsName
4011 * --------|--------
4012 * SRAM_ADDR | DESC_SRAM
4013 *
4014 * @param USBx USB instance
4015 * @param addr This parameter can be one of the following values:
4016 * 32 bit value
4017 * @retval None
4018 */
4019 __STATIC_INLINE void ll_usb_set_usb_desc_sram_addr(usb_regs_t *USBx, uint32_t addr)
4020 {
4021 MODIFY_REG(USBx->SRAM_ADDR, USB_SRAM_ADDR_DESC_SRAM, addr);
4022 }
4023
4024 /**
4025 * @brief Set USB string descriptor(302) start address
4026 *
4027 * Register|BitsName
4028 * --------|--------
4029 * STR_DESC1_CTRL | START
4030 *
4031 * @param USBx USB instance
4032 * @param addr This parameter can be one of the following values:
4033 * 0x0 ~ 0xFF
4034 * @retval None
4035 */
4036 __STATIC_INLINE void ll_usb_set_str_desc2_ctrl_start(usb_regs_t *USBx, uint32_t addr)
4037 {
4038 MODIFY_REG(USBx->STR_DESC2_CTRL, USB_STR_DESC2_CTRL_START, addr);
4039 }
4040
4041 /**
4042 * @brief Get USB string descriptor(302) start address
4043 *
4044 * Register|BitsName
4045 * --------|--------
4046 * STR_DESC1_CTRL | START
4047 *
4048 * @param USBx USB instance
4049 * @retval Returned Value can be one of the following values:
4050 * 0x0 ~ 0xFF
4051 */
4052 __STATIC_INLINE uint32_t ll_usb_get_str_desc2_ctrl_start(usb_regs_t *USBx)
4053 {
4054 return (uint32_t)(READ_BITS(USBx->STR_DESC2_CTRL, USB_STR_DESC2_CTRL_START));
4055 }
4056
4057 /**
4058 * @brief Set USB string descriptor(302) size
4059 *
4060 * Register|BitsName
4061 * --------|--------
4062 * STR_DESC1_CTRL | SIZE
4063 *
4064 * @param USBx USB instance
4065 * @param size This parameter can be one of the following values:
4066 * 0x0 ~ 0xFF
4067 * @retval None
4068 */
4069 __STATIC_INLINE void ll_usb_set_str_desc2_ctrl_size(usb_regs_t *USBx, uint32_t size)
4070 {
4071 MODIFY_REG(USBx->STR_DESC2_CTRL, USB_STR_DESC2_CTRL_SIZE, size << USB_STR_DESC2_CTRL_SIZE_Pos);
4072 }
4073
4074 /**
4075 * @brief Get USB string descriptor(302) size
4076 *
4077 * Register|BitsName
4078 * --------|--------
4079 * STR_DESC1_CTRL | SIZE
4080 *
4081 * @param USBx USB instance
4082 * @retval Returned Value can be one of the following values:
4083 * 0x0 ~ 0xFF
4084 */
4085 __STATIC_INLINE uint32_t ll_usb_get_str_desc2_ctrl_size(usb_regs_t *USBx)
4086 {
4087 return (uint32_t)(READ_BITS(USBx->STR_DESC2_CTRL, USB_STR_DESC1_CTRL_SIZE) >> USB_STR_DESC2_CTRL_SIZE_Pos);
4088 }
4089
4090 /**
4091 * @brief Set USB string descriptor(303) start address
4092 *
4093 * Register|BitsName
4094 * --------|--------
4095 * STR_DESC1_CTRL | START
4096 *
4097 * @param USBx USB instance
4098 * @param addr This parameter can be one of the following values:
4099 * 0x0 ~ 0xFF
4100 * @retval None
4101 */
4102 __STATIC_INLINE void ll_usb_set_str_desc3_ctrl_start(usb_regs_t *USBx, uint32_t addr)
4103 {
4104 MODIFY_REG(USBx->STR_DESC3_CTRL, USB_STR_DESC3_CTRL_START, addr);
4105 }
4106
4107 /**
4108 * @brief Get USB string descriptor(303) start address
4109 *
4110 * Register|BitsName
4111 * --------|--------
4112 * STR_DESC1_CTRL | START
4113 *
4114 * @param USBx USB instance
4115 * @retval Returned Value can be one of the following values:
4116 * 0x0 ~ 0xFF
4117 */
4118 __STATIC_INLINE uint32_t ll_usb_get_str_desc3_ctrl_start(usb_regs_t *USBx)
4119 {
4120 return (uint32_t)(READ_BITS(USBx->STR_DESC3_CTRL, USB_STR_DESC3_CTRL_START));
4121 }
4122
4123 /**
4124 * @brief Set USB string descriptor(303) size
4125 *
4126 * Register|BitsName
4127 * --------|--------
4128 * STR_DESC1_CTRL | SIZE
4129 *
4130 * @param USBx USB instance
4131 * @param size This parameter can be one of the following values:
4132 * 0x0 ~ 0xFF
4133 * @retval None
4134 */
4135 __STATIC_INLINE void ll_usb_set_str_desc3_ctrl_size(usb_regs_t *USBx, uint32_t size)
4136 {
4137 MODIFY_REG(USBx->STR_DESC3_CTRL, USB_STR_DESC3_CTRL_SIZE, size << USB_STR_DESC3_CTRL_SIZE_Pos);
4138 }
4139
4140 /**
4141 * @brief Get USB string descriptor(303) size
4142 *
4143 * Register|BitsName
4144 * --------|--------
4145 * STR_DESC1_CTRL | SIZE
4146 *
4147 * @param USBx USB instance
4148 * @retval Returned Value can be one of the following values:
4149 * 0x0 ~ 0xFF
4150 */
4151 __STATIC_INLINE uint32_t ll_usb_get_str_desc3_ctrl_size(usb_regs_t *USBx)
4152 {
4153 return (uint32_t)(READ_BITS(USBx->STR_DESC3_CTRL, USB_STR_DESC1_CTRL_SIZE) >> USB_STR_DESC3_CTRL_SIZE_Pos);
4154 }
4155
4156 /**
4157 * @brief Enable USB interrupt
4158 *
4159 * @retval None
4160 */
4161 void ll_usb_enable(void);
4162
4163
4164 /**
4165 * @brief Disable USB interrupt
4166 *
4167 * @retval None
4168 */
4169 void ll_usb_disable(void);
4170
4171 /** @} */
4172
4173 /** @defgroup USB_LL_EF_Init Initialization and de-initialization functions
4174 * @{
4175 */
4176
4177 /**
4178 * @brief De-initialize USB registers (Registers restored to their default values).
4179 * @param USBx USB instance
4180 * @retval An error_status_t enumeration value:
4181 * - SUCCESS: USB registers are de-initialized
4182 * - ERROR: USB registers are not de-initialized
4183 */
4184 error_status_t ll_usb_deinit(usb_regs_t *USBx);
4185
4186 /**
4187 * @brief Initialize USB registers according to the specified
4188 * parameters in p_usb_init.
4189 * @param USBx USB instance
4190 * @param p_usb_init Pointer to a ll_usb_init_t structure that contains the configuration
4191 * information for the specified USB peripheral.
4192 * @retval An error_status_t enumeration value:
4193 * - SUCCESS: USB registers are initialized according to p_usb_init content
4194 * - ERROR: Problem occurred during US Registers initialization
4195 */
4196 error_status_t ll_usb_init(usb_regs_t *USBx, ll_usb_init_t *p_usb_init);
4197
4198 /**
4199 * @brief Set each field of a @ref ll_usb_init_t type structure to default value.
4200 * @param p_usb_init Pointer to a @ref ll_usb_init_t structure
4201 * whose fields will be set to default values.
4202 * @retval None
4203 */
4204 void ll_usb_struct_init(ll_usb_init_t *p_usb_init);
4205
4206 /** @} */
4207
4208 /** @} */
4209
4210 #endif /* USB */
4211
4212 #ifdef __cplusplus
4213 }
4214 #endif
4215
4216 #endif /* __GR55xx_LL_USB_H__ */
4217
4218 /** @} */
4219
4220 /** @} */
4221
4222 /** @} */