Macros
XQSPI Private Macros
Peripheral Driver » HAL Driver » XQSPI » Defines
Collaboration diagram for XQSPI Private Macros:

## Macros
#define | IS_XQSPI_WORK_MODE(__MODE__)
| Check if XQSPI Work Mode is valid. More...
#define | IS_XQSPI_CACHE_MODE(__MODE__)
| Check if XQSPI Cache Mode is valid. More...
#define | IS_XQSPI_CACHE_MAPPING(__MODE__)
| Check if XQSPI Cache Direct Map is valid. More...
#define | IS_XQSPI_CACHE_FLUSH(__MODE__)
| Check if XQSPI Cache Flush is valid. More...
#define | IS_XQSPI_READ_CMD(__CMD__)
| Check if XQSPI Read CMD is valid. More...
#define | IS_XQSPI_BAUD_RATE(__BAUD__)
| Check if XQSPI Clock Baud Rate is valid. More...
#define | IS_XQSPI_CLOCK_MODE(__CLKMODE__)
| Check if XQSPI Clock Mode is valid. More...
#define | IS_XQSPI_FIFO_THRESHOLD(__THR__)
| Check if XQSPI FIFO Threshold is valid. More...
#define | IS_XQSPI_INSTRUCTION_SIZE(__INST_SIZE__)
| Check if XQSPI Instruction Size is valid. More...
#define | IS_XQSPI_ADDRESS_SIZE(__ADDR_SIZE__)
| Check if XQSPI Address Size is valid. More...
#define | IS_XQSPI_INSTADDR_MODE(__MODE__)
| Check if XQSPI Instruction and Address Mode is valid. More...
#define | IS_XQSPI_DATA_MODE(__MODE__)
| Check if XQSPI Data Mode is valid. More...

## Detailed Description

## Macro Definition Documentation

## ◆ IS_XQSPI_ADDRESS_SIZE

#define IS_XQSPI_ADDRESS_SIZE | ( |  | __ADDR_SIZE__ | ) |

Value:
(((__ADDR_SIZE__) == XQSPI_ADDRSIZE_00_BITS) || \
((__ADDR_SIZE__) == XQSPI_ADDRSIZE_08_BITS) || \
((__ADDR_SIZE__) == XQSPI_ADDRSIZE_16_BITS) || \
((__ADDR_SIZE__) == XQSPI_ADDRSIZE_24_BITS) || \
((__ADDR_SIZE__) == XQSPI_ADDRSIZE_32_BITS))

Check if XQSPI Address Size is valid.

Parameters

  <strong>ADDR_SIZE</strong> | XQSPI Address Size .

Return values

  SET | (ADDR_SIZE is valid) or RESET (ADDR_SIZE is invalid)

Definition at line 539 of file gr55xx_hal_xqspi.h.

## ◆ IS_XQSPI_BAUD_RATE

#define IS_XQSPI_BAUD_RATE | ( |  | __BAUD__ | ) |

Value:
(((__BAUD__) == XQSPI_BAUD_RATE_64M) || \
((__BAUD__) == XQSPI_BAUD_RATE_48M) || \
((__BAUD__) == XQSPI_BAUD_RATE_32M) || \
((__BAUD__) == XQSPI_BAUD_RATE_24M) || \
((__BAUD__) == XQSPI_BAUD_RATE_16M))

Check if XQSPI Clock Baud Rate is valid.

Parameters

  <strong>BAUD</strong> | XQSPI Clock Baud Rate.

Return values

  SET | (BAUD is valid) or RESET (BAUD is invalid)

Definition at line 503 of file gr55xx_hal_xqspi.h.

## ◆ IS_XQSPI_CACHE_FLUSH

#define IS_XQSPI_CACHE_FLUSH | ( |  | __MODE__ | ) |

Value:
(((__MODE__) == XQSPI_CACHE_FLUSH_DIS) || \
((__MODE__) == XQSPI_CACHE_FLUSH_EN))

Check if XQSPI Cache Flush is valid.

Parameters

  <strong>MODE</strong> | XQSPI Cache Flush Enable Flag.

Return values

  SET | (MODE is valid) or RESET (MODE is invalid)

Definition at line 485 of file gr55xx_hal_xqspi.h.

## ◆ IS_XQSPI_CACHE_MAPPING

#define IS_XQSPI_CACHE_MAPPING | ( |  | __MODE__ | ) |

Value:
(((__MODE__) == XQSPI_CACHE_DIRECT_MAP_DIS) || \
((__MODE__) == XQSPI_CACHE_DIRECT_MAP_EN))

Check if XQSPI Cache Direct Map is valid.

Parameters

  <strong>MODE</strong> | XQSPI Cache Direct Map Enable Flag.

Return values

  SET | (MODE is valid) or RESET (MODE is invalid)

Definition at line 478 of file gr55xx_hal_xqspi.h.

## ◆ IS_XQSPI_CACHE_MODE

#define IS_XQSPI_CACHE_MODE | ( |  | __MODE__ | ) |

Value:
(((__MODE__) == XQSPI_CACHE_MODE_DIS) || \
((__MODE__) == XQSPI_CACHE_MODE_EN))

Check if XQSPI Cache Mode is valid.

Parameters

  <strong>MODE</strong> | XQSPI Cache Mode.

Return values

  SET | (MODE is valid) or RESET (MODE is invalid)

Definition at line 471 of file gr55xx_hal_xqspi.h.

## ◆ IS_XQSPI_CLOCK_MODE

#define IS_XQSPI_CLOCK_MODE | ( |  | __CLKMODE__ | ) |

Value:
(((__CLKMODE__) == XQSPI_CLOCK_MODE_0) || \
((__CLKMODE__) == XQSPI_CLOCK_MODE_1) || \
((__CLKMODE__) == XQSPI_CLOCK_MODE_2) || \
((__CLKMODE__) == XQSPI_CLOCK_MODE_3))

Check if XQSPI Clock Mode is valid.

Parameters

  <strong>CLKMODE</strong> | XQSPI Clock Mode.

Return values

  SET | (CLKMODE is valid) or RESET (CLKMODE is invalid)

Definition at line 513 of file gr55xx_hal_xqspi.h.

## ◆ IS_XQSPI_DATA_MODE

#define IS_XQSPI_DATA_MODE | ( |  | __MODE__ | ) |

Value:
(((__MODE__) == XQSPI_DATA_MODE_SPI) || \
((__MODE__) == XQSPI_DATA_MODE_DUALSPI) || \
((__MODE__) == XQSPI_DATA_MODE_QUADSPI))

Check if XQSPI Data Mode is valid.

Parameters

  <strong>MODE</strong> | XQSPI Data Mode.

Return values

  SET | (MODE is valid) or RESET (MODE is invalid)

Definition at line 557 of file gr55xx_hal_xqspi.h.

## ◆ IS_XQSPI_FIFO_THRESHOLD

#define IS_XQSPI_FIFO_THRESHOLD | ( |  | __THR__ | ) |

Value:
(((__THR__) == XQSPI_FIFO_THRESHOLD_1_8) || \
((__THR__) == XQSPI_FIFO_THRESHOLD_1_4) || \
((__THR__) == XQSPI_FIFO_THRESHOLD_1_2) || \
((__THR__) == XQSPI_FIFO_THRESHOLD_3_4))

Check if XQSPI FIFO Threshold is valid.

Parameters

  <strong>THR</strong> | XQSPI FIFO Threshold.

Return values

  SET | (THR is valid) or RESET (THR is invalid)

Definition at line 522 of file gr55xx_hal_xqspi.h.

## ◆ IS_XQSPI_INSTADDR_MODE

#define IS_XQSPI_INSTADDR_MODE | ( |  | __MODE__ | ) |

Value:
(((__MODE__) == XQSPI_INST_ADDR_ALL_IN_SPI) || \
((__MODE__) == XQSPI_INST_IN_SPI_ADDR_IN_SPIFRF) || \
((__MODE__) == XQSPI_INST_ADDR_ALL_IN_SPIFRF))

Check if XQSPI Instruction and Address Mode is valid.

Parameters

  <strong>MODE</strong> | XQSPI Instruction and Address Mode.

Return values

  SET | (MODE is valid) or RESET (MODE is invalid)

Definition at line 549 of file gr55xx_hal_xqspi.h.

## ◆ IS_XQSPI_INSTRUCTION_SIZE

#define IS_XQSPI_INSTRUCTION_SIZE | ( |  | __INST_SIZE__ | ) |

Value:
(((__INST_SIZE__) == XQSPI_INSTSIZE_00_BITS) || \
((__INST_SIZE__) == XQSPI_INSTSIZE_08_BITS) || \
((__INST_SIZE__) == XQSPI_INSTSIZE_16_BITS))

Check if XQSPI Instruction Size is valid.

Parameters

  <strong>INST_SIZE</strong> | XQSPI Instruction Size.

Return values

  SET | (INST_SIZE is valid) or RESET (INST_SIZE is invalid)

Definition at line 531 of file gr55xx_hal_xqspi.h.

## ◆ IS_XQSPI_READ_CMD

#define IS_XQSPI_READ_CMD | ( |  | __CMD__ | ) |

Value:
(((__CMD__) == XQSPI_READ_CMD_READ ) || \
((__CMD__) == XQSPI_READ_CMD_FAST_READ ) || \
((__CMD__) == XQSPI_READ_CMD_DUAL_OUT_READ) || \
((__CMD__) == XQSPI_READ_CMD_DUAL_IO_READ ) || \
((__CMD__) == XQSPI_READ_CMD_QUAD_OUT_READ) || \
((__CMD__) == XQSPI_READ_CMD_QUAD_IO_READ ))

Check if XQSPI Read CMD is valid.

Parameters

  <strong>CMD</strong> | XQSPI Cache Mode.

Return values

  SET | (CMD is valid) or RESET (CMD is invalid)

Definition at line 492 of file gr55xx_hal_xqspi.h.

## ◆ IS_XQSPI_WORK_MODE

#define IS_XQSPI_WORK_MODE | ( |  | __MODE__ | ) |

Value:
(((__MODE__) == XQSPI_WORK_MODE_QSPI) || \
((__MODE__) == XQSPI_WORK_MODE_XIP))

Check if XQSPI Work Mode is valid.

Parameters

  <strong>MODE</strong> | XQSPI Work Mode.

Return values

  SET | (MODE is valid) or RESET (MODE is invalid)

Definition at line 464 of file gr55xx_hal_xqspi.h.

XQSPI_FIFO_THRESHOLD_1_8
#define XQSPI_FIFO_THRESHOLD_1_8
FIFO depth/8
Definition: gr55xx_hal_xqspi.h:327
XQSPI_WORK_MODE_QSPI
#define XQSPI_WORK_MODE_QSPI
Work in QSPI mode
Definition: gr55xx_hal_xqspi.h:257
XQSPI_INSTSIZE_08_BITS
#define XQSPI_INSTSIZE_08_BITS
8-bit Instruction
Definition: gr55xx_hal_xqspi.h:338
XQSPI_CLOCK_MODE_3
#define XQSPI_CLOCK_MODE_3
Inactive state of CLK is high, CLK toggles in the middle of first data bit
Definition: gr55xx_hal_xqspi.h:302
XQSPI_READ_CMD_READ
#define XQSPI_READ_CMD_READ
Read mode
Definition: gr55xx_hal_xqspi.h:285
XQSPI_READ_CMD_QUAD_IO_READ
#define XQSPI_READ_CMD_QUAD_IO_READ
Quad-IO Fast Read mode
Definition: gr55xx_hal_xqspi.h:290
XQSPI_BAUD_RATE_32M
#define XQSPI_BAUD_RATE_32M
Serial clock speed is 32 MHz
Definition: gr55xx_hal_xqspi.h:311
XQSPI_CLOCK_MODE_2
#define XQSPI_CLOCK_MODE_2
Inactive state of CLK is high, CLK toggles at the start of first data bit
Definition: gr55xx_hal_xqspi.h:300
XQSPI_ADDRSIZE_32_BITS
#define XQSPI_ADDRSIZE_32_BITS
32-bit Address
Definition: gr55xx_hal_xqspi.h:349
XQSPI_BAUD_RATE_48M
#define XQSPI_BAUD_RATE_48M
Serial clock speed is 48 MHz
Definition: gr55xx_hal_xqspi.h:310
XQSPI_FIFO_THRESHOLD_3_4
#define XQSPI_FIFO_THRESHOLD_3_4
FIFO depth*3/4
Definition: gr55xx_hal_xqspi.h:330
XQSPI_CACHE_MODE_DIS
#define XQSPI_CACHE_MODE_DIS
Cache off in XIP mode.
Definition: gr55xx_hal_xqspi.h:264
XQSPI_INST_ADDR_ALL_IN_SPIFRF
#define XQSPI_INST_ADDR_ALL_IN_SPIFRF
Instruction and address are sent in Daul/Quad SPI mode.
Definition: gr55xx_hal_xqspi.h:357
XQSPI_FIFO_THRESHOLD_1_4
#define XQSPI_FIFO_THRESHOLD_1_4
FIFO depth/4
Definition: gr55xx_hal_xqspi.h:328
XQSPI_DATA_MODE_SPI
#define XQSPI_DATA_MODE_SPI
Standard SPI Frame Format
Definition: gr55xx_hal_xqspi.h:319
XQSPI_CACHE_MODE_EN
#define XQSPI_CACHE_MODE_EN
Cache on in XIP mode.
Definition: gr55xx_hal_xqspi.h:265
XQSPI_CLOCK_MODE_1
#define XQSPI_CLOCK_MODE_1
Inactive state of CLK is low, CLK toggles in the middle of first data bit
Definition: gr55xx_hal_xqspi.h:298
XQSPI_DATA_MODE_QUADSPI
#define XQSPI_DATA_MODE_QUADSPI
Quad-SPI Frame Format
Definition: gr55xx_hal_xqspi.h:321
XQSPI_BAUD_RATE_64M
#define XQSPI_BAUD_RATE_64M
Serial clock speed is 64 MHz
Definition: gr55xx_hal_xqspi.h:309
XQSPI_READ_CMD_DUAL_OUT_READ
#define XQSPI_READ_CMD_DUAL_OUT_READ
Dual-Out Fast Read mode
Definition: gr55xx_hal_xqspi.h:287
XQSPI_INST_IN_SPI_ADDR_IN_SPIFRF
#define XQSPI_INST_IN_SPI_ADDR_IN_SPIFRF
Instruction is sent in SPI mode, and address is sent in Daul/Quad SPI mode.
Definition: gr55xx_hal_xqspi.h:356
XQSPI_WORK_MODE_XIP
#define XQSPI_WORK_MODE_XIP
Work in XIP mode
Definition: gr55xx_hal_xqspi.h:258
XQSPI_CACHE_DIRECT_MAP_EN
#define XQSPI_CACHE_DIRECT_MAP_EN
Cache work on Direct Map.
Definition: gr55xx_hal_xqspi.h:272
XQSPI_BAUD_RATE_24M
#define XQSPI_BAUD_RATE_24M
Serial clock speed is 24 MHz
Definition: gr55xx_hal_xqspi.h:312
XQSPI_READ_CMD_FAST_READ
#define XQSPI_READ_CMD_FAST_READ
Fast Read mode
Definition: gr55xx_hal_xqspi.h:286
XQSPI_ADDRSIZE_00_BITS
#define XQSPI_ADDRSIZE_00_BITS
0-bit (No Address)
Definition: gr55xx_hal_xqspi.h:345
XQSPI_BAUD_RATE_16M
#define XQSPI_BAUD_RATE_16M
Serial clock speed is 16 MHz
Definition: gr55xx_hal_xqspi.h:313
XQSPI_DATA_MODE_DUALSPI
#define XQSPI_DATA_MODE_DUALSPI
Dual-SPI Frame Format
Definition: gr55xx_hal_xqspi.h:320
XQSPI_READ_CMD_QUAD_OUT_READ
#define XQSPI_READ_CMD_QUAD_OUT_READ
Quad-Out Fast Read mode
Definition: gr55xx_hal_xqspi.h:289
XQSPI_ADDRSIZE_08_BITS
#define XQSPI_ADDRSIZE_08_BITS
8-bit Address
Definition: gr55xx_hal_xqspi.h:346
XQSPI_CACHE_DIRECT_MAP_DIS
#define XQSPI_CACHE_DIRECT_MAP_DIS
Cache work on 4-Way Set Associative.
Definition: gr55xx_hal_xqspi.h:271
XQSPI_INSTSIZE_16_BITS
#define XQSPI_INSTSIZE_16_BITS
16-bit Instruction
Definition: gr55xx_hal_xqspi.h:339
XQSPI_CLOCK_MODE_0
#define XQSPI_CLOCK_MODE_0
Inactive state of CLK is low, CLK toggles at the start of first data bit
Definition: gr55xx_hal_xqspi.h:296
XQSPI_FIFO_THRESHOLD_1_2
#define XQSPI_FIFO_THRESHOLD_1_2
FIFO depth/2
Definition: gr55xx_hal_xqspi.h:329
XQSPI_ADDRSIZE_16_BITS
#define XQSPI_ADDRSIZE_16_BITS
16-bit Address
Definition: gr55xx_hal_xqspi.h:347
XQSPI_CACHE_FLUSH_EN
#define XQSPI_CACHE_FLUSH_EN
Cache Flush Enable
Definition: gr55xx_hal_xqspi.h:279
XQSPI_INST_ADDR_ALL_IN_SPI
#define XQSPI_INST_ADDR_ALL_IN_SPI
Instruction and address are sent in SPI mode.
Definition: gr55xx_hal_xqspi.h:355
XQSPI_CACHE_FLUSH_DIS
#define XQSPI_CACHE_FLUSH_DIS
Cache Flush Disable.
Definition: gr55xx_hal_xqspi.h:278
XQSPI_INSTSIZE_00_BITS
#define XQSPI_INSTSIZE_00_BITS
0-bit (No Instruction)
Definition: gr55xx_hal_xqspi.h:337
XQSPI_ADDRSIZE_24_BITS
#define XQSPI_ADDRSIZE_24_BITS
24-bit Address
Definition: gr55xx_hal_xqspi.h:348
XQSPI_READ_CMD_DUAL_IO_READ
#define XQSPI_READ_CMD_DUAL_IO_READ
Dual-IO Fast Read mode
Definition: gr55xx_hal_xqspi.h:288