gr55xx_ll_aon_wdt.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_aon_wdt.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of AON WDT LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_AON_WDT AON_WDT
47 * @brief AON_WDT LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55XX_LL_AON_WDT_H__
53 #define __GR55XX_LL_AON_WDT_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx.h"
61
62 /** @defgroup AON_WDT_LL_MACRO Defines
63 * @{
64 */
65 /** @defgroup AON_WDT_LL_Exported_Constants Exported Constants
66 * @{
67 */
68 /** @defgroup AON_WDT_LL_TIMER_CLK_SEL Watchdog Timer clock select defines
69 * @{
70 */
71 #define LL_AON_WD_TIMER_CLK_SEL_RNG (0x0U << AON_WDT_CLK_SEL_Pos) /**< Select RNG clcok source */
72 #define LL_AON_WD_TIMER_CLK_SEL_XO (0x1U << AON_WDT_CLK_SEL_Pos) /**< Select XO clcok source */
73 #define LL_AON_WD_TIMER_CLK_SEL_RNG2 (0x2U << AON_WDT_CLK_SEL_Pos) /**< Select RNG2 clcok source */
74 #define LL_AON_WD_TIMER_CLK_SEL_RTC (0x3U << AON_WDT_CLK_SEL_Pos) /**< Select RTC clcok source */
75
76 /** @} */
77 /** @} */
78
79 /** @defgroup AON_WDT_LL_Exported_Macros Exported Macros
80 * @{
81 */
82
83 /** @defgroup AON_WDT_LL_CFG_READ_REG config read
84 * @{
85 */
86 #define AON_WDT_REG_READ (READ_BITS(AON_WDT->CFG0, AON_WDT_CFG0_EN | \
87 AON_WDT_CFG0_ALARM_EN)) /**< read register config */
88 /** @} */
89 /** @} */
90 /** @} */
91
92
93 /* Exported functions --------------------------------------------------------*/
94 /** @defgroup AON_WDT_LL_DRIVER_FUNCTIONS Functions
95 * @{
96 */
97
98 /** @defgroup AON_WDT_LL_EF_Configuration Configuration functions
99 * @{
100 */
101
102 /**
103 * @brief Enable AON watchdog counter and interrupt event.
104 *
105 * Register|BitsName
106 * --------|--------
107 * AON_WDT_CFG0 | WDT_EN
108 */
109 __STATIC_INLINE void ll_aon_wdt_enable(void)
110 {
111 WRITE_REG(AON_WDT->CFG0,AON_WDT_CFG0_CFG | AON_WDT_CFG0_EN | AON_WDT_REG_READ);
112 }
113
114 /**
115 * @brief Disable AON watchdog counter and interrupt event.
116 *
117 * Register|BitsName
118 * --------|--------
119 * AON_WDT_CFG0 | WDT_EN
120 *
121 */
122 __STATIC_INLINE void ll_aon_wdt_disable(void)
123 {
124 MODIFY_REG(AON_WDT->CFG0, 0xFFFFFFFF, AON_WDT_CFG0_CFG);
125 }
126
127 /**
128 * @brief Check if the AON_WDT peripheral is enabled or disabled.
129 *
130 * Register|BitsName
131 * --------|--------
132 * AON_WDT_CFG0 | WDT_EN
133 *
134 * @retval State of bit (1 or 0).
135 */
136 __STATIC_INLINE uint32_t ll_aon_wdt_is_enabled(void)
137 {
138 return (READ_BITS(AON_WDT->CFG0, AON_WDT_CFG0_EN) == (AON_WDT_CFG0_EN));
139 }
140
141 /**
142 * @brief Set Watchdog Timer clock
143 *
144 * Register|BitsName
145 * --------|--------
146 * AON_WDT_CLK | wd_timer_clk_sel
147 * @param value: This parameter can be a one of the following values:
148 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_RNG
149 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_XO
150 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_RNG2
151 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_RTC
152 * @retval None
153 */
154 __STATIC_INLINE void ll_aon_wdt_set_clk(uint32_t value)
155 {
156 MODIFY_REG(AON_WDT->CLK, AON_WDT_CLK_SEL, value);
157 }
158
159 /**
160 * @brief Get Watchdog Timer clock
161 *
162 * Register|BitsName
163 * --------|--------
164 * AON_WDT_CLK | wd_timer_clk_sel
165 *
166 * @retval Watchdog Timer clock source,the value can be one of the following:
167 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_RNG
168 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_XO
169 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_RNG2
170 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_RTC
171 */
172 __STATIC_INLINE uint32_t ll_aon_wdt_get_clk(void)
173 {
174 return (READ_BITS(AON_WDT->CLK, AON_WDT_CLK_SEL));
175 }
176
177 /**
178 * @brief Specify the AON WDT down-counter reload value.
179 *
180 * Register|BitsName
181 * --------|--------
182 * TIMER_VALUE | TIMER_VALUE
183 * @param counter: Value for reload down-counter which should ranging between 0 ~ 0xFFFF_FFFF
184 * @retval None
185 */
186 __STATIC_INLINE void ll_aon_wdt_set_reload_counter(uint32_t counter)
187 {
188 WRITE_REG(AON_WDT->TIMER_W, counter);
189 }
190
191 /**
192 * @brief Get the AON WDT down-counter reload value.
193 *
194 * Register|BitsName
195 * --------|--------
196 * WD_TIMER_VAL_W | TIMER_VALUE
197 *
198 * @retval counter Value for reload down-counter which should ranging between 0 ~ 0xFFFF_FFFF.
199 */
200 __STATIC_INLINE uint32_t ll_aon_wdt_get_reload_counter(void)
201 {
202 return (uint32_t)READ_BITS(AON_WDT->TIMER_W, AON_WDT_TIMER_W_VAL);
203 }
204
205 /**
206 * @brief Get the AON WDT down-counter read reload value.
207 *
208 * Register|BitsName
209 * --------|--------
210 * WD_TIMER_STS_0 | TIMER_VALUE
211 *
212 * @retval counter Value for reload down-counter which should ranging between 0 ~ 0xFFFF_FFFF.
213 */
214 __STATIC_INLINE uint32_t ll_aon_wdt_get_reload_read_counter()
215 {
216 return (uint32_t)READ_BITS(AON_WDT->TIMER_R, AON_WDT_TIMER_R_VAL);
217 }
218
219 /**
220 * @brief Reloads AON WDT counter.
221 * @note The value in TIMER_VALUE register will be reloaded into AON WDT down-counter
222 * after enable this bit, so ll_aon_wdt_set_reload_counter() should be called before
223 * every reload.
224 *
225 * Register|BitsName
226 * --------|--------
227 * WD_TIMER_CFG_0 | WDT_RELOAD
228 */
229 __STATIC_INLINE void ll_aon_wdt_reload_counter(void)
230 {
231 WRITE_REG(AON_WDT->CFG0, AON_WDT_CFG0_CFG | AON_WDT_CFG0_TIMER_SET | AON_WDT_REG_READ);
232 }
233
234 /**
235 * @brief Read the AON WDT counter current value.
236 *
237 * Register|BitsName
238 * --------|--------
239 * AON_PAD_CTL1 | AON_WDT_TIMER
240 * TIMER_VAL | TIMER_VAL_READ
241 *
242 * @retval Value for current counter which should ranging between 0 ~ 0xFFFF_FFFF
243 */
244 __STATIC_INLINE uint32_t ll_aon_wdt_get_counter(void)
245 {
246 return (uint32_t)READ_BITS(AON_WDT->TIMER_R, AON_WDT_TIMER_R_VAL);
247 }
248
249 /**
250 * @brief Specify the AON_WDT down-counter alarm value
251 * @note AON watchdog will generate an interrupt when it counts down to the
252 * alarm value to alram that it is almost expired.
253 *
254 * Register|BitsName
255 * --------|--------
256 * EXT_WKUP_CTL | WDT_ALARM
257 *
258 * @param counter: Value between Min_Data=0 and Max_Data=0xFF
259 * @retval None
260 */
261 __STATIC_INLINE void ll_aon_wdt_set_alarm_counter(uint32_t counter)
262 {
263 WRITE_REG(AON_WDT->ALARM_W, (counter & AON_WDT_ALARM_W_VAL));
264 }
265
266 /**
267 * @brief Specify the AON_WDT down-counter alarm value and request
268 * @note AON watchdog will generate an interrupt when it counts down to the
269 * alarm value to alram that it is almost expired.
270 *
271 * Register|BitsName
272 * --------|--------
273 * EXT_WKUP_CTL | WDT_ALARM
274 *
275 * @param counter: Value between Min_Data=0 and Max_Data=0xFF
276 * @retval None
277 */
278 __STATIC_INLINE void ll_aon_wdt_set_alarm_counter_and_request(uint32_t counter)
279 {
280 WRITE_REG(AON_WDT->ALARM_W, (counter & AON_WDT_ALARM_W_VAL));
281 WRITE_REG(AON_WDT->CFG0, AON_WDT_CFG0_CFG | AON_WDT_CFG0_ALARM_SET | AON_WDT_REG_READ);
282 }
283
284 /**
285 * @brief Get the AON_WDT down-counter alarm value
286 * @note AON watchdog will generate an interrupt when it counts down to the
287 * alarm value to alram that it is almost expired.
288 *
289 * Register|BitsName
290 * --------|--------
291 * WD_TIMER_ALARM | WDT_ALARM
292 *
293 * @retval Value between Min_Data=0 and Max_Data=0xFF
294 */
295 __STATIC_INLINE uint32_t ll_aon_wdt_get_alarm_counter(void)
296 {
297 return (uint32_t)(READ_BITS(AON_WDT->ALARM_W, AON_WDT_ALARM_W_VAL));
298 }
299
300 /**
301 * @brief Get the AON_WDT down-counter alarm value
302 *
303 * Register|BitsName
304 * --------|--------
305 * WD_TIMER_STS_1 | WDT_ALARM
306 *
307 * @retval Value between Min_Data=0 and Max_Data=0xFF
308 */
309 __STATIC_INLINE uint32_t ll_aon_wdt_get_alarm_read_counter(void)
310 {
311 return (uint32_t)(READ_BITS(AON_WDT->ALARM_R, AON_WDT_ALARM_R_VAL));
312 }
313
314 /**
315 * @brief AON WDT busy status flag.
316 *
317 * Register|BitsName
318 * --------|--------
319 * WD_TIMER_STS| WD_TIMER_STAT_BUSY
320 *
321 * @retval AON WDT busy status flag.
322 */
323 __STATIC_INLINE uint32_t ll_aon_wdt_is_busy(void)
324 {
325 return (uint32_t)(READ_BITS(AON_WDT->STAT, AON_WDT_STAT_BUSY) == (AON_WDT_STAT_BUSY));
326 }
327
328 /**
329 * @brief Enable aon wdt alarm interrupt.
330 *
331 * Register|BitsName
332 * --------|--------
333 * AON_WDT_CFG0 | ALARM_INT_EN
334 *
335 * @retval None
336 */
337 __STATIC_INLINE void ll_aon_wdt_it_enable_alarm(void)
338 {
339 WRITE_REG(AON_WDT->CFG0, AON_WDT_CFG0_CFG | AON_WDT_CFG0_ALARM_EN | AON_WDT_REG_READ);
340 }
341
342 /**
343 * @brief Disable aon wdt alarm interrupt.
344 *
345 * Register|BitsName
346 * --------|--------
347 * AON_WDT_CFG0 | ALARM_INT_EN
348 *
349 * @retval None
350 */
351 __STATIC_INLINE void ll_aon_wdt_it_disable_alarm(void)
352 {
353 WRITE_REG(AON_WDT->CFG0, (AON_WDT_REG_READ & (~AON_WDT_CFG0_ALARM_EN)) | AON_WDT_CFG0_CFG);
354 }
355
356 /**
357 * @brief Check if the aon wdt alarm interrupt is enabled or disabled.
358 *
359 * Register|BitsName
360 * --------|--------
361 * AON_WDT_CFG0 | ALARM_INT_EN
362 *
363 * @retval State of bit (1 or 0).
364 */
365 __STATIC_INLINE uint32_t ll_aon_wdt_it_is_enabled_alarm(void)
366 {
367 return (uint32_t)(READ_BITS(AON_WDT->CFG0, AON_WDT_CFG0_ALARM_EN) == AON_WDT_CFG0_ALARM_EN);
368 }
369
370 /** @} */
371
372 /** @defgroup AON_WDT_LL_EF_FLAG_Management FLAG_Management
373 * @{
374 */
375
376 /**
377 * @brief Indicate if the AON Watchdog Running Flag is set or not.
378 * @note This bit can be used to check if AON Watchdog is in running state.
379 *
380 * Register|BitsName
381 * --------|--------
382 * WD_TIMER_STS | WDT_RUNNING
383 *
384 * @retval State of bit (1 or 0).
385 */
386 __STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_running(void)
387 {
388 return (uint32_t)(READ_BITS(AON_WDT->STAT, AON_WDT_STAT_STAT) == (AON_WDT_STAT_STAT));
389 }
390
391 /**
392 * @brief Indicate if the AON WDT Reboot Event Flag is set or not.
393 * @note This bit is set by hardware when the counter has reached alarm value.
394 * It can be cleared by writing 0 to this bit.
395 *
396 * Register|BitsName
397 * --------|--------
398 * AON_IRQ | WD_TIMER_REBOOT
399 *
400 * @retval State of bit (1 or 0).
401 */
402 __STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_reboot(void)
403 {
404 return (uint32_t)(READ_BITS(AON_CTL->AON_IRQ, AON_CTL_AON_IRQ_AON_WDT) == AON_CTL_AON_IRQ_AON_WDT);
405 }
406
407 /**
408 * @brief Clear Interrupt Status flag.
409 *
410 * Register|BitsName
411 * --------|--------
412 * AON_IRQ| WD_TIMER_REBOOT
413 *
414 * @retval None
415 */
416 __STATIC_INLINE void ll_aon_wdt_clear_flag_reboot(void)
417 {
418 WRITE_REG(AON_CTL->AON_IRQ, ~AON_CTL_AON_IRQ_AON_WDT);
419 }
420
421 /**
422 * @brief Indicate if the AON WDT Alarm Event Flag is set or not.
423 * @note This bit is set by hardware when the counter has reached alarm value.
424 * It can be cleared by writing 0 to this bit.
425 *
426 * Register|BitsName
427 * --------|--------
428 * SLP_EVENT | SLP_EVENT_WDT
429 *
430 * @retval State of bit (1 or 0).
431 */
432 __STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_alarm(void)
433 {
434 return (uint32_t)(READ_BITS(AON_CTL->AON_SLP_EVENT, AON_CTL_SLP_EVENT_AON_WDT) == AON_CTL_SLP_EVENT_AON_WDT);
435 }
436
437 /**
438 * @brief Clear Interrupt Status flag.
439 *
440 * Register|BitsName
441 * --------|--------
442 * SLP_EVENT| SLP_EVENT_WDT
443 *
444 * @retval None
445 */
446 __STATIC_INLINE void ll_aon_wdt_clear_flag_alarm(void)
447 {
448 WRITE_REG(AON_CTL->AON_SLP_EVENT, ~AON_CTL_SLP_EVENT_AON_WDT);
449 }
450
451 /**
452 * @brief Enable write access.
453 *
454 * @retval None
455 */
456 __STATIC_INLINE void ll_aon_wdt_enable_write_access(void)
457 {
458 WRITE_REG(AON_WDT->LOCK, 0x15CC5A51 << 1);
459 }
460
461 /**
462 * @brief Disable write access.
463 *
464 * @retval None
465 */
466 __STATIC_INLINE void ll_aon_wdt_disable_write_access(void)
467 {
468 WRITE_REG(AON_WDT->LOCK, 0 << 1);
469 }
470
471 /** @} */
472
473 /** @} */
474
475
476 #ifdef __cplusplus
477 }
478 #endif
479
480 #endif /* __GR55XX_LL_AON_WDT_PATCH_H__ */
481
482 /** @} */
483
484 /** @} */
485
486 /** @} */
ll_aon_wdt_set_alarm_counter_and_request
__STATIC_INLINE void ll_aon_wdt_set_alarm_counter_and_request(uint32_t counter)
Specify the AON_WDT down-counter alarm value and request.
Definition: gr55xx_ll_aon_wdt.h:278
ll_aon_wdt_clear_flag_alarm
__STATIC_INLINE void ll_aon_wdt_clear_flag_alarm(void)
Clear Interrupt Status flag.
Definition: gr55xx_ll_aon_wdt.h:446
ll_aon_wdt_it_disable_alarm
__STATIC_INLINE void ll_aon_wdt_it_disable_alarm(void)
Disable aon wdt alarm interrupt.
Definition: gr55xx_ll_aon_wdt.h:351
ll_aon_wdt_get_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_counter(void)
Read the AON WDT counter current value.
Definition: gr55xx_ll_aon_wdt.h:244
ll_aon_wdt_set_alarm_counter
__STATIC_INLINE void ll_aon_wdt_set_alarm_counter(uint32_t counter)
Specify the AON_WDT down-counter alarm value.
Definition: gr55xx_ll_aon_wdt.h:261
ll_aon_wdt_is_active_flag_alarm
__STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_alarm(void)
Indicate if the AON WDT Alarm Event Flag is set or not.
Definition: gr55xx_ll_aon_wdt.h:432
ll_aon_wdt_reload_counter
__STATIC_INLINE void ll_aon_wdt_reload_counter(void)
Reloads AON WDT counter.
Definition: gr55xx_ll_aon_wdt.h:229
ll_aon_wdt_enable_write_access
__STATIC_INLINE void ll_aon_wdt_enable_write_access(void)
Enable write access.
Definition: gr55xx_ll_aon_wdt.h:456
ll_aon_wdt_is_enabled
__STATIC_INLINE uint32_t ll_aon_wdt_is_enabled(void)
Check if the AON_WDT peripheral is enabled or disabled.
Definition: gr55xx_ll_aon_wdt.h:136
ll_aon_wdt_get_clk
__STATIC_INLINE uint32_t ll_aon_wdt_get_clk(void)
Get Watchdog Timer clock.
Definition: gr55xx_ll_aon_wdt.h:172
AON_WDT_REG_READ
#define AON_WDT_REG_READ
read register config
Definition: gr55xx_ll_aon_wdt.h:86
ll_aon_wdt_it_enable_alarm
__STATIC_INLINE void ll_aon_wdt_it_enable_alarm(void)
Enable aon wdt alarm interrupt.
Definition: gr55xx_ll_aon_wdt.h:337
ll_aon_wdt_get_reload_read_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_reload_read_counter()
Get the AON WDT down-counter read reload value.
Definition: gr55xx_ll_aon_wdt.h:214
ll_aon_wdt_clear_flag_reboot
__STATIC_INLINE void ll_aon_wdt_clear_flag_reboot(void)
Clear Interrupt Status flag.
Definition: gr55xx_ll_aon_wdt.h:416
ll_aon_wdt_is_active_flag_running
__STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_running(void)
Indicate if the AON Watchdog Running Flag is set or not.
Definition: gr55xx_ll_aon_wdt.h:386
ll_aon_wdt_enable
__STATIC_INLINE void ll_aon_wdt_enable(void)
Enable AON watchdog counter and interrupt event.
Definition: gr55xx_ll_aon_wdt.h:109
ll_aon_wdt_get_alarm_read_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_alarm_read_counter(void)
Get the AON_WDT down-counter alarm value.
Definition: gr55xx_ll_aon_wdt.h:309
ll_aon_wdt_get_reload_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_reload_counter(void)
Get the AON WDT down-counter reload value.
Definition: gr55xx_ll_aon_wdt.h:200
ll_aon_wdt_get_alarm_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_alarm_counter(void)
Get the AON_WDT down-counter alarm value.
Definition: gr55xx_ll_aon_wdt.h:295
ll_aon_wdt_set_reload_counter
__STATIC_INLINE void ll_aon_wdt_set_reload_counter(uint32_t counter)
Specify the AON WDT down-counter reload value.
Definition: gr55xx_ll_aon_wdt.h:186
ll_aon_wdt_disable
__STATIC_INLINE void ll_aon_wdt_disable(void)
Disable AON watchdog counter and interrupt event.
Definition: gr55xx_ll_aon_wdt.h:122
ll_aon_wdt_set_clk
__STATIC_INLINE void ll_aon_wdt_set_clk(uint32_t value)
Set Watchdog Timer clock.
Definition: gr55xx_ll_aon_wdt.h:154
ll_aon_wdt_is_active_flag_reboot
__STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_reboot(void)
Indicate if the AON WDT Reboot Event Flag is set or not.
Definition: gr55xx_ll_aon_wdt.h:402
ll_aon_wdt_is_busy
__STATIC_INLINE uint32_t ll_aon_wdt_is_busy(void)
AON WDT busy status flag.
Definition: gr55xx_ll_aon_wdt.h:323
ll_aon_wdt_it_is_enabled_alarm
__STATIC_INLINE uint32_t ll_aon_wdt_it_is_enabled_alarm(void)
Check if the aon wdt alarm interrupt is enabled or disabled.
Definition: gr55xx_ll_aon_wdt.h:365
ll_aon_wdt_disable_write_access
__STATIC_INLINE void ll_aon_wdt_disable_write_access(void)
Disable write access.
Definition: gr55xx_ll_aon_wdt.h:466