gr55xx_ll_bod.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_bod.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of CALENDAR LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_BOD BOD
47 * @brief BOD LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55XX_LL_BOD_H_
53 #define __GR55XX_LL_BOD_H_
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx.h"
61
62 /** @defgroup BOD_LL_STRUCTURES Structures
63 * @{
64 */
65
66 /* Exported types ------------------------------------------------------------*/
67 /** @defgroup BOD_LL_ES_INIT BOD Exported init structures
68 * @{
69 */
70
71 /**
72 * @brief LL BOD init Structure definition
73 */
74 typedef struct _ll_bod_init
75 {
76 uint8_t bod_en; /**< Specifies the bod enable.
77 This parament can be modified afterwards using unitary function @ref ll_bod_enable() and ll_bod_disable(). */
78
79 uint8_t bod2_en; /**< Specifies the bod2 enable.
80
81 This parament can be modified afterwards using unitary function @ref ll_bod2_enable() and ll_bod2_disable().. */
82 uint8_t bod2_lvl; /**< Specifies the bod2 level.
83 This parameter can be a value of ADC_LL_EC_INPUT_MODE.
84 This parament can be modified afterwards using unitary function @ref ll_bod2_lvl_ctrl_lv_set(). */
85
86 uint8_t bod_static_en; /**< Specifies the bod static enbale.
87 This parameter can be a value of @ref LL_BOD_STATIC_ENABLE.
88 This parament can be modified afterwards using unitary function @ref ll_bod_static_lv_enable() and ll_bod_static_lv_disable(). */
89 } ll_bod_init_t;
90
91 /** @} */
92
93 /** @} */
94
95 /**
96 * @defgroup BOD_LL_MACRO Defines
97 * @{
98 */
99
100 /* Exported constants --------------------------------------------------------*/
101 /** @defgroup BOD_LL_Exported_Constants BOD Exported Constants
102 * @{
103 */
104
105 /** @defgroup BOD_LL_ENABLE BOD ENABLE
106 * @{
107 */
108 #define LL_BOD_ENABLE 0x1 /**< BOD enable */
109 #define LL_BOD_DISABLE 0x0 /**< BOD disable */
110 /** @} */
111
112 /** @defgroup BOD2_LL_ENABLE BOD2 ENABLE
113 * @{
114 */
115 #define LL_BOD2_ENABLE 0x1 /**< BOD2 enable */
116 #define LL_BOD2_DISABLE 0x0 /**< BOD2 disable */
117 /** @} */
118
119 /** @defgroup BOD_LL_STATIC_ENABLE BOD STATIC ENABLE
120 * @{
121 */
122 #define LL_BOD_STATIC_ENABLE (0x1) /**< BOD STATIC enable */
123 #define LL_BOD_STATIC_DISABLE (0x0) /**< BOD STATIC disable */
124 /** @} */
125
126 /** @defgroup BOD2_LL_LEVEL BOD2 LVEVL
127 * @{
128 */
129 #define LL_BOD2_LEVEL_0 0x0 /**< BOD2 Level 0 */
130 #define LL_BOD2_LEVEL_1 0x1 /**< BOD2 Level 1 */
131 #define LL_BOD2_LEVEL_2 0x2 /**< BOD2 Level 2 */
132 #define LL_BOD2_LEVEL_3 0x3 /**< BOD2 Level 3 */
133 #define LL_BOD2_LEVEL_4 0x4 /**< BOD2 Level 4 */
134 #define LL_BOD2_LEVEL_5 0x5 /**< BOD2 Level 5 */
135 #define LL_BOD2_LEVEL_6 0x6 /**< BOD2 Level 6 */
136 #define LL_BOD2_LEVEL_7 0x7 /**< BOD2 Level 7 */
137 #define LL_BOD2_LEVEL_8 0x8 /**< BOD2 Level 8 */
138 #define LL_BOD2_LEVEL_9 0x9 /**< BOD2 Level 9 */
139 #define LL_BOD2_LEVEL_10 0xA /**< BOD2 Level 10 */
140 #define LL_BOD2_LEVEL_11 0xB /**< BOD2 Level 11 */
141 #define LL_BOD2_LEVEL_12 0xC /**< BOD2 Level 12 */
142 #define LL_BOD2_LEVEL_13 0xD /**< BOD2 Level 13 */
143 #define LL_BOD2_LEVEL_14 0xE /**< BOD2 Level 14 */
144 #define LL_BOD2_LEVEL_15 0xF /**< BOD2 Level 15 */
145 /** @} */
146
147 /** @} */
148
149 /** @} */
150
151 /** @defgroup BOD_LL_DRIVER_FUNCTIONS Functions
152 * @{
153 */
154 /**
155 * @brief Enable the bod
156 *
157 * Register|BitsName
158 * --------|--------
159 * RF_REG_3 | bod_en_lv
160 *
161 */
162 __STATIC_FORCEINLINE void ll_bod_enable(void)
163 {
164 #if defined(BIT_BAND_SUPPORT)
165 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_EN_Pos) = 1;
166 #else
167 SET_BITS(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_EN);
168 #endif
169 }
170
171 /**
172 * @brief Disable the bod
173 *
174 * Register|BitsName
175 * --------|--------
176 * RF_REG_3 | bod_en_lv
177 *
178 */
179 __STATIC_FORCEINLINE void ll_bod_disable(void)
180 {
181 #if defined(BIT_BAND_SUPPORT)
182 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_EN_Pos) = 0;
183 #else
184 CLEAR_BITS(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_EN);
185 #endif
186 }
187
188 /**
189 * @brief Enable the bod2
190 *
191 * Register|BitsName
192 * --------|--------
193 * RF_REG_3 | bod2_en_lv
194 *
195 */
196 __STATIC_INLINE void ll_bod2_enable(void)
197 {
198 #if defined(BIT_BAND_SUPPORT)
199 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD2_EN_Pos) = 1;
200 #else
201 SET_BITS(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD2_EN);
202 #endif
203 }
204
205 /**
206 * @brief Disable the bod2
207 *
208 * Register|BitsName
209 * --------|--------
210 * RF_REG_3 | bod2_en_lv
211 *
212 */
213 __STATIC_INLINE void ll_bod2_disable(void)
214 {
215 #if defined(BIT_BAND_SUPPORT)
216 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD2_EN_Pos) = 0;
217 #else
218 CLEAR_BITS(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD2_EN);
219 #endif
220 }
221
222 /**
223 * @brief Set bod control level
224 *
225 * Register|BitsName
226 * --------|--------
227 * RF_REG_3 | bod_lvl_ctrl_lv_3_0
228 * @param lvl_ctrl_lv: 0x0 ~ 0xF
229 */
230 __STATIC_INLINE void ll_bod2_lvl_ctrl_lv_set(uint8_t lvl_ctrl_lv)
231 {
232 #if defined(BIT_BAND_SUPPORT)
233 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_LVL_CTRL_LV_Pos) = (lvl_ctrl_lv & 0x01);
234 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_LVL_CTRL_LV_Pos+1) = ((lvl_ctrl_lv>>1) & 0x01);
235 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_LVL_CTRL_LV_Pos+2) = ((lvl_ctrl_lv>>2) & 0x01);
236 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_LVL_CTRL_LV_Pos+3) = ((lvl_ctrl_lv>>3) & 0x01);
237 #else
238 MODIFY_REG(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_LVL_CTRL_LV, (lvl_ctrl_lv << AON_PMU_RF_REG_3_BOD_LVL_CTRL_LV_Pos));
239 #endif
240 }
241
242 /**
243 * @brief enable bod static lv
244 *
245 * Register|BitsName
246 * --------|--------
247 * RF_REG_3 | bod_static_lv
248 */
249 __STATIC_INLINE void ll_bod_static_lv_enable(void)
250 {
251 #if defined(BIT_BAND_SUPPORT)
252 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_STATIC_LV_Pos) = 1;
253 #else
254 SET_BITS(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_STATIC_LV_EN);
255 #endif
256 }
257
258 /**
259 * @brief disable bod static lv
260 *
261 * Register|BitsName
262 * --------|--------
263 * RF_REG_3 | bod_static_lv
264 */
265 __STATIC_INLINE void ll_bod_static_lv_disable(void)
266 {
267 #if defined(BIT_BAND_SUPPORT)
268 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_STATIC_LV_Pos) = 0;
269 #else
270 CLEAR_BITS(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_STATIC_LV_EN);
271 #endif
272 }
273
274 /**
275 * @brief enable BOD FEDGE Event.
276 *
277 * Register|BitsName
278 * --------|--------
279 * AON_IRQ | PMU_BOD_FEDGE
280 *
281 * @retval State of bit (1 or 0).
282 */
283 __STATIC_INLINE void ll_bod_enable_fedge(void)
284 {
285 SET_BITS(AON_CTL->AON_IRQ_EN, AON_CTL_AON_IRQ_PMU_BOD);
286 }
287
288 /**
289 * @brief disable BOD FEDGE Event.
290 *
291 * Register|BitsName
292 * --------|--------
293 * AON_IRQ | PMU_BOD_FEDGE
294 *
295 * @retval State of bit (1 or 0).
296 */
297 __STATIC_INLINE void ll_bod_disable_fedge(void)
298 {
299 CLEAR_BITS(AON_CTL->AON_IRQ_EN, AON_CTL_AON_IRQ_PMU_BOD);
300 }
301
302
303 /**
304 * @brief Indicate if the BOD REDGE Event Flag is set or not.
305 *
306 * Register|BitsName
307 * --------|--------
308 * AON_IRQ | PMU_BOD_REDGE
309 *
310 * @retval State of bit (1 or 0).
311 */
312 __STATIC_INLINE uint32_t ll_bod_is_active_flag_fedge(void)
313 {
314 return (uint32_t)(READ_BITS(AON_CTL->AON_IRQ, AON_CTL_AON_IRQ_PMU_BOD) == AON_CTL_AON_IRQ_PMU_BOD);
315 }
316
317 /**
318 * @brief Clear Interrupt Status flag.
319 *
320 * Register|BitsName
321 * --------|--------
322 * AON_IRQ| PMU_BOD_REDGE
323 *
324 * @retval None
325 */
326 __STATIC_INLINE void ll_bod_clear_flag_fedge(void)
327 {
328 WRITE_REG(AON_CTL->AON_IRQ, ~AON_CTL_AON_IRQ_PMU_BOD);
329 }
330
331 /**
332 * @brief Indicate if the BOD FEDGE Event Flag is set or not.
333 *
334 * Register|BitsName
335 * --------|--------
336 * SLP_EVENT | SLP_EVENT_BOD
337 *
338 * @retval State of bit (1 or 0).
339 */
340 __STATIC_INLINE uint32_t ll_bod_is_active_flag_redge(void)
341 {
342 return (uint32_t)(READ_BITS(AON_CTL->AON_SLP_EVENT, AON_CTL_SLP_EVENT_PMU_BOD) == AON_CTL_SLP_EVENT_PMU_BOD);
343 }
344
345 /**
346 * @brief Clear Interrupt Status flag.
347 *
348 * Register|BitsName
349 * --------|--------
350 * SLP_EVENT| SLP_EVENT_BOD
351 *
352 * @retval None
353 */
354 __STATIC_INLINE void ll_bod_clear_flag_redge(void)
355 {
356 WRITE_REG(AON_CTL->AON_SLP_EVENT, ~AON_CTL_SLP_EVENT_PMU_BOD);
357 }
358
359 /**
360 * @brief De-initialize the BOD registers to their default reset values.
361 * @retval An error_status_t enumeration value:
362 * - SUCCESS: PDM registers are de-initialized
363 * - ERROR: PDM registers are not de-initialized
364 */
365 error_status_t ll_bod_deinit(void);
366
367 /**
368 * @brief Initialize the BOD registers according to the specified parameters in p_bod_init.
369 * @param p_bod_init pointer to a @ref ll_bod_init_t structure.
370 * @retval An error_status_t enumeration value:
371 * - SUCCESS: BOD registers are initialized
372 * - ERROR: Not applicable
373 */
374 error_status_t ll_bod_init(ll_bod_init_t *p_bod_init);
375
376 /**
377 * @brief Set each field of a @ref ll_bod_init_t type structure to default value.
378 * @param p_bod_init Pointer to a @ref ll_bod_init_t structure
379 * whose fields will be set to default values.
380 * @retval None
381 */
382 void ll_bod_struct_init(ll_bod_init_t *p_bod_init);
383 /** @} */
384 #endif
385 /** @} */
386
387 /** @} */
388
389 /** @} */
_ll_bod_init::bod_static_en
uint8_t bod_static_en
Specifies the bod static enbale.
Definition: gr55xx_ll_bod.h:86
ll_bod_enable
__STATIC_FORCEINLINE void ll_bod_enable(void)
Enable the bod.
Definition: gr55xx_ll_bod.h:162
ll_bod_static_lv_disable
__STATIC_INLINE void ll_bod_static_lv_disable(void)
disable bod static lv
Definition: gr55xx_ll_bod.h:265
ll_bod_is_active_flag_redge
__STATIC_INLINE uint32_t ll_bod_is_active_flag_redge(void)
Indicate if the BOD FEDGE Event Flag is set or not.
Definition: gr55xx_ll_bod.h:340
_ll_bod_init
LL BOD init Structure definition.
Definition: gr55xx_ll_bod.h:75
ll_bod2_disable
__STATIC_INLINE void ll_bod2_disable(void)
Disable the bod2.
Definition: gr55xx_ll_bod.h:213
_ll_bod_init::bod2_en
uint8_t bod2_en
Specifies the bod2 enable.
Definition: gr55xx_ll_bod.h:79
ll_bod_init_t
struct _ll_bod_init ll_bod_init_t
LL BOD init Structure definition.
_ll_bod_init::bod_en
uint8_t bod_en
Specifies the bod enable.
Definition: gr55xx_ll_bod.h:76
ll_bod_disable_fedge
__STATIC_INLINE void ll_bod_disable_fedge(void)
disable BOD FEDGE Event.
Definition: gr55xx_ll_bod.h:297
ll_bod_clear_flag_fedge
__STATIC_INLINE void ll_bod_clear_flag_fedge(void)
Clear Interrupt Status flag.
Definition: gr55xx_ll_bod.h:326
ll_bod2_lvl_ctrl_lv_set
__STATIC_INLINE void ll_bod2_lvl_ctrl_lv_set(uint8_t lvl_ctrl_lv)
Set bod control level.
Definition: gr55xx_ll_bod.h:230
ll_bod_static_lv_enable
__STATIC_INLINE void ll_bod_static_lv_enable(void)
enable bod static lv
Definition: gr55xx_ll_bod.h:249
ll_bod_struct_init
void ll_bod_struct_init(ll_bod_init_t *p_bod_init)
Set each field of a ll_bod_init_t type structure to default value.
ll_bod_is_active_flag_fedge
__STATIC_INLINE uint32_t ll_bod_is_active_flag_fedge(void)
Indicate if the BOD REDGE Event Flag is set or not.
Definition: gr55xx_ll_bod.h:312
ll_bod_clear_flag_redge
__STATIC_INLINE void ll_bod_clear_flag_redge(void)
Clear Interrupt Status flag.
Definition: gr55xx_ll_bod.h:354
ll_bod_init
error_status_t ll_bod_init(ll_bod_init_t *p_bod_init)
Initialize the BOD registers according to the specified parameters in p_bod_init.
ll_bod_deinit
error_status_t ll_bod_deinit(void)
De-initialize the BOD registers to their default reset values.
_ll_bod_init::bod2_lvl
uint8_t bod2_lvl
Specifies the bod2 level.
Definition: gr55xx_ll_bod.h:82
ll_bod2_enable
__STATIC_INLINE void ll_bod2_enable(void)
Enable the bod2.
Definition: gr55xx_ll_bod.h:196
ll_bod_enable_fedge
__STATIC_INLINE void ll_bod_enable_fedge(void)
enable BOD FEDGE Event.
Definition: gr55xx_ll_bod.h:283
ll_bod_disable
__STATIC_FORCEINLINE void ll_bod_disable(void)
Disable the bod.
Definition: gr55xx_ll_bod.h:179