gr55xx_ll_hmac.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_hmac.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of HMAC LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_HMAC HMAC
47 * @brief HMAC LL module driver.
48 * @{
49 */
50 /* Define to prevent recursive inclusion -------------------------------------*/
51 #ifndef __GR55XX_LL_HMAC_H__
52 #define __GR55XX_LL_HMAC_H__
53
54 #ifdef __cplusplus
55 extern "C" {
56 #endif
57
58 /* Includes ------------------------------------------------------------------*/
59 #include "gr55xx.h"
60
61 #if defined (HMAC)
62
63 /** @defgroup HMAC_LL_STRUCTURES Structures
64 * @{
65 */
66
67 /* Exported types ------------------------------------------------------------*/
68 /** @defgroup HMAC_LL_ES_INIT HMAC Exported Init structures
69 * @{
70 */
71
72 /**
73 * @brief LL HMAC Init Structure definition
74 */
75 typedef struct _ll_hmac_init_t
76 {
77 uint32_t *p_key; /**< Key */
78
79 uint32_t *p_hash; /**< HASH value */
80
81 } ll_hmac_init_t;
82
83 /** @} */
84
85 /** @} */
86
87 /**
88 * @defgroup HMAC_LL_MACRO Defines
89 * @{
90 */
91
92 /* Exported constants --------------------------------------------------------*/
93 /** @defgroup HMAC_LL_Exported_Constants HMAC Exported Constants
94 * @{
95 */
96
97 /** @defgroup HMAC_LL_EC_GET_FLAG Get Flags Defines
98 * @brief Flags definitions which can be used with LL_HMAC_ReadReg function
99 * @{
100 */
101 #define LL_HMAC_FLAG_DATAREADY_SHA HMAC_STAT_HASH_READY /**< HMAC data ready(SHA mode) */
102 #define LL_HMAC_FLAG_DATAREADY_HMAC HMAC_STAT_HMAC_READY /**< HMAC data ready(HAMC mode) */
103 #define LL_HMAC_FLAG_DMA_MESSAGEDONE HMAC_STAT_DMA_MSG_DONE /**< HMAC dma message done */
104 #define LL_HMAC_FLAG_DMA_DONE HMAC_STAT_DMA_TX_DONE /**< HMAC dma transfer done */
105 #define LL_HMAC_FLAG_DMA_ERR HMAC_STAT_DMA_TX_ERR /**< HMAC dma transfer error */
106 #define LL_HMAC_FLAG_KEY_VALID HMAC_STAT_KEY_VALID /**< HMAC has fetched key */
107 /** @} */
108
109 /** @defgroup HMAC_LL_EC_HASH_MODE Hash Mode
110 * @{
111 */
112 #define LL_HMAC_HASH_STANDARD 0x00000000U /**< Standard Mode */
113 #define LL_HMAC_HASH_USER (1UL << HMAC_CFG_HASH_POS) /**< User Mode */
114 /** @} */
115
116 /** @defgroup HMAC_LL_EC_CALCULATE_TYPE Calculate Type
117 * @{
118 */
119 #define LL_HMAC_CALCULATETYPE_HMAC 0x00000000U /**< HMAC mode */
120 #define LL_HMAC_CALCULATETYPE_SHA (1UL << HMAC_CFG_CALC_TYPE_POS) /**< SHA moe */
121 /** @} */
122
123 /** @defgroup HMAC_LL_EC_KEY_TYPE Key Type
124 * @{
125 */
126 #define LL_HMAC_KEYTYPE_MCU 0x00000000U /**< MCU */
127 #define LL_HMAC_KEYTYPE_AHB (1UL << HMAC_CFG_KEY_TYPE_POS) /**< AHB master */
128 #define LL_HMAC_KEYTYPE_KRAM (2UL << HMAC_CFG_KEY_TYPE_POS) /**< Key Port */
129 /** @} */
130
131 /** @defgroup HMAC_LL_EC_TRANSFER_SIZE Transfer Size
132 * @{
133 */
134 #define LL_HMAC_DMA_TRANSIZE_MIN (1) /**< Min size = 1 block */
135 #define LL_HMAC_DMA_TRANSIZE_MAX (512) /**< Min size = 512 blocks */
136 /** @} */
137
138 /** @} */
139
140 /* Exported macro ------------------------------------------------------------*/
141 /** @defgroup HMAC_LL_Exported_Macros HMAC Exported Macros
142 * @{
143 */
144
145 /** @defgroup HMAC_LL_EM_WRITE_READ Common Write and read registers Macros
146 * @{
147 */
148
149 /**
150 * @brief Write a value in HMAC register
151 * @param __INSTANCE__ HMAC Instance
152 * @param __REG__ Register to be written
153 * @param __VALUE__ Value to be written in the register
154 * @retval None
155 */
156 #define LL_HMAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
157
158 /**
159 * @brief Read a value in HMAC register
160 * @param __INSTANCE__ HMAC Instance
161 * @param __REG__ Register to be read
162 * @retval Register value
163 */
164 #define LL_HMAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
165
166 /** @} */
167
168 /** @} */
169
170 /** @} */
171
172 /* Exported functions --------------------------------------------------------*/
173 /** @defgroup HMAC_LL_DRIVER_FUNCTIONS Functions
174 * @{
175 */
176
177 /** @defgroup HMAC_LL_EF_Configuration Configuration functions
178 * @{
179 */
180
181 /**
182 * @brief Enable HMAC.
183
184 * Register|BitsName
185 * ---------------|---------------
186 * CTRL | EN
187
188 * @param HMACx HMAC instance
189 * @retval None
190 */
191 __STATIC_INLINE void ll_hmac_enable(hmac_regs_t *HMACx)
192 {
193 SET_BITS(HMACx->CTRL, HMAC_CTRL_EN);
194 }
195
196 /**
197 * @brief Disable HMAC.
198
199 * Register|BitsName
200 * ---------------|---------------
201 * CTRL | EN
202
203 * @param HMACx HMAC instance
204 * @retval None
205 */
206 __STATIC_INLINE void ll_hmac_disable(hmac_regs_t *HMACx)
207 {
208 CLEAR_BITS(HMACx->CTRL, HMAC_CTRL_EN);
209 }
210
211 /**
212 * @brief Indicate whether the HMAC is enabled.
213
214 * Register|BitsName
215 * ---------------|---------------
216 * CTRL | EN
217
218 * @param HMACx HMAC instance
219 * @retval State of bit (1 or 0).
220 */
221 __STATIC_INLINE uint32_t ll_hmac_is_enabled(hmac_regs_t *HMACx)
222 {
223 return (READ_BITS(HMACx->CTRL, HMAC_CTRL_EN) == (HMAC_CTRL_EN));
224 }
225
226 /**
227 * @brief Enable HMAC DMA mode.
228
229 * Register|BitsName
230 * ---------------|---------------
231 * CTRL | DMA_START
232
233 * @param HMACx HMAC instance
234 * @retval None
235 */
236 __STATIC_INLINE void ll_hmac_enable_dma_start(hmac_regs_t *HMACx)
237 {
238 SET_BITS(HMACx->CTRL, HMAC_CTRL_DMA_START);
239 }
240
241 /**
242 * @brief Disable HMAC DMA mode.
243
244 * Register|BitsName
245 * ---------------|---------------
246 * CTRL | DMA_START
247
248 * @param HMACx HMAC instance
249 * @retval None
250 */
251 __STATIC_INLINE void ll_hmac_disable_dma_start(hmac_regs_t *HMACx)
252 {
253 CLEAR_BITS(HMACx->CTRL, HMAC_CTRL_DMA_START);
254 }
255
256 /**
257 * @brief Indicate whether the HMAC DMA mode is enabled.
258
259 * Register|BitsName
260 * ---------------|---------------
261 * CTRL | DMA_START
262
263 * @param HMACx HMAC instance
264 * @retval State of bit (1 or 0).
265 */
266 __STATIC_INLINE uint32_t ll_hmac_is_enabled_dma_start(hmac_regs_t *HMACx)
267 {
268 return (READ_BITS(HMACx->CTRL, HMAC_CTRL_DMA_START) == (HMAC_CTRL_DMA_START));
269 }
270
271 /**
272 * @brief Enable fetch key through AHB/key port.
273
274 * Register|BitsName
275 * ---------------|---------------
276 * CTRL | KEY_EN
277
278 * @param HMACx HMAC instance
279 * @retval None
280 */
281 __STATIC_INLINE void ll_hmac_enable_read_key(hmac_regs_t *HMACx)
282 {
283 SET_BITS(HMACx->CTRL, HMAC_CTRL_KEY_EN);
284 }
285
286 /**
287 * @brief Enable last block transfer in MCU/DMA mode.
288
289 * Register|BitsName
290 * ---------------|---------------
291 * CTRL | LST_TX
292
293 * @param HMACx HMAC instance
294 * @retval None
295 */
296 __STATIC_INLINE void ll_hmac_enable_last_transfer(hmac_regs_t *HMACx)
297 {
298 SET_BITS(HMACx->CTRL, HMAC_CTRL_LST_TX);
299 }
300
301 /**
302 * @brief Enable user HASH.
303
304 * Register|BitsName
305 * ---------------|---------------
306 * CFG | HASH
307
308 * @param HMACx HMAC instance
309 * @retval None
310 */
311 __STATIC_INLINE void ll_hmac_enable_user_hash(hmac_regs_t *HMACx)
312 {
313 SET_BITS(HMACx->CFG, HMAC_CFG_HASH);
314 }
315
316 /**
317 * @brief Disable user HASH.
318
319 * Register|BitsName
320 * ---------------|---------------
321 * CFG | HASH
322
323 * @param HMACx HMAC instance
324 * @retval None
325 */
326 __STATIC_INLINE void ll_hmac_disable_user_hash(hmac_regs_t *HMACx)
327 {
328 CLEAR_BITS(HMACx->CFG, HMAC_CFG_HASH);
329 }
330
331 /**
332 * @brief Indicate whether the user HASH is enabled.
333
334 * Register|BitsName
335 * ---------------|---------------
336 * CFG | HASH
337
338 * @param HMACx HMAC instance
339 * @retval State of bit (1 or 0).
340 */
341 __STATIC_INLINE uint32_t ll_hmac_is_enabled_user_hash(hmac_regs_t *HMACx)
342 {
343 return (READ_BITS(HMACx->CFG, HMAC_CFG_HASH) == (HMAC_CFG_HASH));
344 }
345
346 /**
347 * @brief Enable HMAC in little endian.
348
349 * Register|BitsName
350 * ---------------|---------------
351 * CFG | ENDIAN
352
353 * @param HMACx HMAC instance
354 * @retval None
355 */
356 __STATIC_INLINE void ll_hmac_enable_little_endian(hmac_regs_t *HMACx)
357 {
358 SET_BITS(HMACx->CFG, HMAC_CFG_ENDIAN);
359 }
360
361 /**
362 * @brief Disable HMAC in little endian.
363
364 * Register|BitsName
365 * ---------------|---------------
366 * CFG | ENDIAN
367
368 * @param HMACx HMAC instance
369 * @retval None
370 */
371 __STATIC_INLINE void ll_hmac_disable_little_endian(hmac_regs_t *HMACx)
372 {
373 CLEAR_BITS(HMACx->CFG, HMAC_CFG_ENDIAN);
374 }
375
376 /**
377 * @brief Indicate whether the HMAC is in little endian.
378
379 * Register|BitsName
380 * ---------------|---------------
381 * CFG | ENDIAN
382
383 * @param HMACx HMAC instance
384 * @retval State of bit (1 or 0).
385 */
386 __STATIC_INLINE uint32_t ll_hmac_is_enabled_little_endian(hmac_regs_t *HMACx)
387 {
388 return (READ_BITS(HMACx->CFG, HMAC_CFG_ENDIAN) == (HMAC_CFG_ENDIAN));
389 }
390
391 /**
392 * @brief Set ways to obtain HMAC key.
393
394 * Register|BitsName
395 * ---------------|---------------
396 * CFG | KEY_TYPE
397
398 * @param HMACx HMAC instance
399 * @param type This parameter can be one of the following values:
400 * @arg @ref LL_HMAC_KEYTYPE_MCU
401 * @arg @ref LL_HMAC_KEYTYPE_AHB
402 * @arg @ref LL_HMAC_KEYTYPE_KRAM
403 * @retval None
404 */
405 __STATIC_INLINE void ll_hmac_set_key_type(hmac_regs_t *HMACx, uint32_t type)
406 {
407 MODIFY_REG(HMACx->CFG, HMAC_CFG_KEY_TYPE, type);
408 }
409
410 /**
411 * @brief Get ways to obtain HMAC key.
412
413 * Register|BitsName
414 * ---------------|---------------
415 * CFG | KEY_TYPE
416
417 * @param HMACx HMAC instance
418 * @retval Returned value can be one of the following values:
419 * @arg @ref LL_HMAC_KEYTYPE_MCU
420 * @arg @ref LL_HMAC_KEYTYPE_AHB
421 * @arg @ref LL_HMAC_KEYTYPE_KRAM
422 */
423 __STATIC_INLINE uint32_t ll_hmac_get_key_type(hmac_regs_t *HMACx)
424 {
425 return (READ_BITS(HMACx->CFG, HMAC_CFG_KEY_TYPE));
426 }
427
428 /**
429 * @brief Enable SHA mode.
430
431 * Register|BitsName
432 * ---------------|---------------
433 * CFG | CALC_TYPE
434
435 * @param HMACx HMAC instance
436 * @retval None
437 */
438 __STATIC_INLINE void ll_hmac_enable_sha(hmac_regs_t *HMACx)
439 {
440 SET_BITS(HMACx->CFG, HMAC_CFG_CALC_TYPE);
441 }
442
443 /**
444 * @brief Disable SHA mode.
445
446 * Register|BitsName
447 * ---------------|---------------
448 * CFG | CALC_TYPE
449
450 * @param HMACx HMAC instance
451 * @retval None
452 */
453 __STATIC_INLINE void ll_hmac_disable_sha(hmac_regs_t *HMACx)
454 {
455 CLEAR_BITS(HMACx->CFG, HMAC_CFG_CALC_TYPE);
456 }
457
458 /**
459 * @brief Indicate whether the SHA mode is enabled.
460
461 * Register|BitsName
462 * ---------------|---------------
463 * CFG | CALC_TYPE
464
465 * @param HMACx HMAC instance
466 * @retval State of bit (1 or 0).
467 */
468 __STATIC_INLINE uint32_t ll_hmac_is_enabled_sha(hmac_regs_t *HMACx)
469 {
470 return (READ_BITS(HMACx->CFG, HMAC_CFG_CALC_TYPE) == (HMAC_CFG_CALC_TYPE));
471 }
472
473 /**
474 * @brief Enable private mode.
475
476 * Register|BitsName
477 * ---------------|---------------
478 * CFG | PRIVT_MODE
479
480 * @param HMACx HMAC instance
481 * @retval None
482 */
483 __STATIC_INLINE void ll_hmac_enable_private(hmac_regs_t *HMACx)
484 {
485 SET_BITS(HMACx->CFG, HMAC_CFG_PRIVT_MODE);
486 }
487
488 /**
489 * @brief Disable private mode.
490
491 * Register|BitsName
492 * ---------------|---------------
493 * CFG | PRIVT_MODE
494
495 * @param HMACx HMAC instance
496 * @retval None
497 */
498 __STATIC_INLINE void ll_hmac_disable_private(hmac_regs_t *HMACx)
499 {
500 CLEAR_BITS(HMACx->CFG, HMAC_CFG_PRIVT_MODE);
501 }
502
503 /**
504 * @brief Indicate whether the private mode is enabled.
505
506 * Register|BitsName
507 * ---------------|---------------
508 * CFG | PRIVT_MODE
509
510 * @param HMACx HMAC instance
511 * @retval State of bit (1 or 0).
512 */
513 __STATIC_INLINE uint32_t ll_hmac_is_enabled_private(hmac_regs_t *HMACx)
514 {
515 return (READ_BITS(HMACx->CFG, HMAC_CFG_PRIVT_MODE) == (HMAC_CFG_PRIVT_MODE));
516 }
517
518 /** @} */
519
520 /** @defgroup HMAC_LL_EF_IT_Management IT_Management
521 * @{
522 */
523
524 /**
525 * @brief Enable the done interrupt for HMAC.
526
527 * Register|BitsName
528 * ---------------|---------------
529 * INT | EN
530
531 * @param HMACx HMAC instance
532 * @retval None
533 */
534 __STATIC_INLINE void ll_hmac_enable_it_done(hmac_regs_t *HMACx)
535 {
536 SET_BITS(HMACx->INT, HMAC_INT_EN);
537 }
538
539 /**
540 * @brief Disable the done interrupt for HMAC.
541
542 * Register|BitsName
543 * ---------------|---------------
544 * INT | EN
545
546 * @param HMACx HMAC instance
547 * @retval None
548 */
549 __STATIC_INLINE void ll_hmac_disable_it_done(hmac_regs_t *HMACx)
550 {
551 CLEAR_BITS(HMACx->INT, HMAC_INT_EN);
552 }
553
554 /**
555 * @brief Indicate whether Done Interrupt is enabled.
556
557 * Register|BitsName
558 * ---------------|---------------
559 * INT | EN
560
561 * @param HMACx HMAC instance
562 * @retval State of bit (1 or 0).
563 */
564 __STATIC_INLINE uint32_t ll_hmac_is_enabled_it_done(hmac_regs_t *HMACx)
565 {
566 return (READ_BITS(HMACx->INT, HMAC_INT_EN) == (HMAC_INT_EN));
567 }
568
569 /** @} */
570
571 /** @defgroup HMAC_LL_EF_IT_Management IT_Management
572 * @{
573 */
574
575 /**
576 * @brief Indicate whether SHA Ready flag is set.
577
578 * Register|BitsName
579 * ---------------|---------------
580 * STAT | HASH_READY
581
582 * @param HMACx HMAC instance
583 * @retval State of bit (1 or 0).
584 */
585 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_sha_ready(hmac_regs_t *HMACx)
586 {
587 return (READ_BITS(HMACx->STAT, HMAC_STAT_HASH_READY) == HMAC_STAT_HASH_READY);
588 }
589
590 /**
591 * @brief Indicate whether HMAC Ready flag is set.
592
593 * Register|BitsName
594 * ---------------|---------------
595 * STAT | HMAC_READY
596
597 * @param HMACx HMAC instance
598 * @retval State of bit (1 or 0).
599 */
600 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_hmac_ready(hmac_regs_t *HMACx)
601 {
602 return (READ_BITS(HMACx->STAT, HMAC_STAT_HMAC_READY) == HMAC_STAT_HMAC_READY);
603 }
604
605 /**
606 * @brief Indicate whether DMA Transmit Message Done flag is set.
607
608 * Register|BitsName
609 * ---------------|---------------
610 * STAT | DMA_MSG_DONE
611
612 * @param HMACx HMAC instance
613 * @retval State of bit (1 or 0).
614 */
615 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_message_done(hmac_regs_t *HMACx)
616 {
617 return (READ_BITS(HMACx->STAT, HMAC_STAT_DMA_MSG_DONE) == HMAC_STAT_DMA_MSG_DONE);
618 }
619
620 /**
621 * @brief Indicate whether DMA Transfer Done flag is set.
622
623 * Register|BitsName
624 * ---------------|---------------
625 * STAT | DMA_TX_DONE
626
627 * @param HMACx HMAC instance
628 * @retval State of bit (1 or 0).
629 */
630 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_done(hmac_regs_t *HMACx)
631 {
632 return (READ_BITS(HMACx->STAT, HMAC_STAT_DMA_TX_DONE) == HMAC_STAT_DMA_TX_DONE);
633 }
634
635 /**
636 * @brief Indicate whether DMA Transfer Error flag is set.
637
638 * Register|BitsName
639 * ---------------|---------------
640 * STAT | DMA_TX_ERR
641
642 * @param HMACx HMAC instance
643 * @retval State of bit (1 or 0).
644 */
645 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_error(hmac_regs_t *HMACx)
646 {
647 return (READ_BITS(HMACx->STAT, HMAC_STAT_DMA_TX_ERR) == HMAC_STAT_DMA_TX_ERR);
648 }
649
650 /**
651 * @brief Indicate whether Key Valid flag is set.
652
653 * Register|BitsName
654 * ---------------|---------------
655 * STAT | KEY_VALID
656
657 * @param HMACx HMAC instance
658 * @retval State of bit (1 or 0).
659 */
660 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_key_valid(hmac_regs_t *HMACx)
661 {
662 return (READ_BITS(HMACx->STAT, HMAC_STAT_KEY_VALID) == HMAC_STAT_KEY_VALID);
663 }
664
665 /**
666 * @brief Indicate whether Done interrupt flag is set.
667
668 * Register|BitsName
669 * ---------------|---------------
670 * INT | DONE
671
672 * @param HMACx HMAC instance
673 * @retval State of bit (1 or 0).
674 */
675 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_it_done(hmac_regs_t *HMACx)
676 {
677 return (READ_BITS(HMACx->INT, HMAC_INT_DONE) == HMAC_INT_DONE);
678 }
679
680 /**
681 * @brief Clear Done interrupt flag.
682
683 * Register|BitsName
684 * ---------------|---------------
685 * INT | DONE
686
687 * @param HMACx HMAC instance
688 * @retval None
689 */
690 __STATIC_INLINE void ll_hmac_clear_flag_it_done(hmac_regs_t *HMACx)
691 {
692 CLEAR_BITS(HMACx->INT, HMAC_INT_DONE);
693 }
694
695 /** @} */
696
697 /** @defgroup HMAC_LL_EF_DMA_Management DMA_Management
698 * @{
699 */
700
701 /**
702 * @brief Set HMAC transfer blocks in DMA mode.
703
704 * Register|BitsName
705 * ---------------|---------------
706 * XFE_SIZE | SIZE
707
708 * @param HMACx HMAC instance
709 * @param block This parameter can be one of the following values: 1 ~ 512
710 * @retval None
711 */
712 __STATIC_INLINE void ll_hmac_set_dma_transfer_block(hmac_regs_t *HMACx, uint32_t block)
713 {
714 MODIFY_REG(HMACx->XFE_SIZE, HMAC_XFE_SIZE_SIZE, (block << 6) - 1);
715 }
716
717 /**
718 * @brief Get HMAC transfer blocks in DMA mode.
719
720 * Register|BitsName
721 * ---------------|---------------
722 * XFE_SIZE | SIZE
723
724 * @param HMACx HMAC instance
725 * @retval Return value is between: 1 ~ 512
726 */
727 __STATIC_INLINE uint32_t ll_hmac_get_dma_transfer_block(hmac_regs_t *HMACx)
728 {
729 return ((READ_BITS(HMACx->XFE_SIZE, HMAC_XFE_SIZE_SIZE) + 1) >> 6);
730 }
731
732 /**
733 * @brief Set HMAC read address of RAM in DMA mode.
734
735 * Register|BitsName
736 * ---------------|---------------
737 * RD_START_ADDR | ADDR
738
739 * @param HMACx HMAC instance
740 * @param address This parameter can be one of the address in RAM
741 * @retval None
742 */
743 __STATIC_INLINE void ll_hmac_set_dma_read_address(hmac_regs_t *HMACx, uint32_t address)
744 {
745 WRITE_REG(HMACx->RD_START_ADDR, address);
746 }
747
748 /**
749 * @brief Get HMAC read address of RAM in DMA mode.
750
751 * Register|BitsName
752 * ---------------|---------------
753 * RD_START_ADDR | ADDR
754
755 * @param HMACx HMAC instance
756 * @retval Return value is the address in RAM
757 */
758 __STATIC_INLINE uint32_t ll_hmac_get_dma_read_address(hmac_regs_t *HMACx)
759 {
760 return (READ_REG(HMACx->RD_START_ADDR));
761 }
762
763 /**
764 * @brief Set HMAC write address of RAM in DMA mode.
765
766 * Register|BitsName
767 * ---------------|---------------
768 * WR_START_ADDR | ADDR
769
770 * @param HMACx HMAC instance
771 * @param address This parameter can be one of the address in RAM
772 * @retval None
773 */
774 __STATIC_INLINE void ll_hmac_set_dma_write_address(hmac_regs_t *HMACx, uint32_t address)
775 {
776 WRITE_REG(HMACx->WR_START_ADDR, address);
777 }
778
779 /**
780 * @brief Get HMAC write address of RAM in DMA mode.
781
782 * Register|BitsName
783 * ---------------|---------------
784 * WR_START_ADDR | ADDR
785
786 * @param HMACx HMAC instance
787 * @retval Return value is the address in RAM
788 */
789 __STATIC_INLINE uint32_t ll_hmac_get_dma_write_address(hmac_regs_t *HMACx)
790 {
791 return (READ_REG(HMACx->WR_START_ADDR));
792 }
793
794 /** @} */
795
796 /** @defgroup HMAC_LL_EF_Data_Management Data_Management
797 * @{
798 */
799
800 /**
801 * @brief Set user HASH[255:224].
802
803 * Register|BitsName
804 * ---------------|---------------
805 * USER_HASH_0 | USER_HASH
806
807 * @param HMACx HMAC instance
808 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
809 * @retval None
810 */
811 __STATIC_INLINE void ll_hmac_set_user_hash_255_224(hmac_regs_t *HMACx, uint32_t hash)
812 {
813 WRITE_REG(HMACx->USER_HASH_0, hash);
814 }
815
816 /**
817 * @brief Set user HASH[223:192].
818
819 * Register|BitsName
820 * ---------------|---------------
821 * USER_HASH_1 | USER_HASH
822
823 * @param HMACx HMAC instance
824 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
825 * @retval None
826 */
827 __STATIC_INLINE void ll_hmac_set_user_hash_223_192(hmac_regs_t *HMACx, uint32_t hash)
828 {
829 WRITE_REG(HMACx->USER_HASH_1, hash);
830 }
831
832 /**
833 * @brief Set user HASH[191:160].
834
835 * Register|BitsName
836 * ---------------|---------------
837 * USER_HASH_2 | USER_HASH
838
839 * @param HMACx HMAC instance
840 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
841 * @retval None
842 */
843 __STATIC_INLINE void ll_hmac_set_user_hash_191_160(hmac_regs_t *HMACx, uint32_t hash)
844 {
845 WRITE_REG(HMACx->USER_HASH_2, hash);
846 }
847
848 /**
849 * @brief Set user HASH[159:128].
850
851 * Register|BitsName
852 * ---------------|---------------
853 * USER_HASH_3 | USER_HASH
854
855 * @param HMACx HMAC instance
856 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
857 * @retval None
858 */
859 __STATIC_INLINE void ll_hmac_set_user_hash_159_128(hmac_regs_t *HMACx, uint32_t hash)
860 {
861 WRITE_REG(HMACx->USER_HASH_3, hash);
862 }
863
864 /**
865 * @brief Set user HASH[127:96].
866
867 * Register|BitsName
868 * ---------------|---------------
869 * USER_HASH_4 | USER_HASH
870
871 * @param HMACx HMAC instance
872 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
873 * @retval None
874 */
875 __STATIC_INLINE void ll_hmac_set_user_hash_127_96(hmac_regs_t *HMACx, uint32_t hash)
876 {
877 WRITE_REG(HMACx->USER_HASH_4, hash);
878 }
879
880 /**
881 * @brief Set user HASH[95:64].
882
883 * Register|BitsName
884 * ---------------|---------------
885 * USER_HASH_5 | USER_HASH
886
887 * @param HMACx HMAC instance
888 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
889 * @retval None
890 */
891 __STATIC_INLINE void ll_hmac_set_user_hash_95_64(hmac_regs_t *HMACx, uint32_t hash)
892 {
893 WRITE_REG(HMACx->USER_HASH_5, hash);
894 }
895
896 /**
897 * @brief Set user HASH[63:32].
898
899 * Register|BitsName
900 * ---------------|---------------
901 * USER_HASH_6 | USER_HASH
902
903 * @param HMACx HMAC instance
904 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
905 * @retval None
906 */
907 __STATIC_INLINE void ll_hmac_set_user_hash_63_32(hmac_regs_t *HMACx, uint32_t hash)
908 {
909 WRITE_REG(HMACx->USER_HASH_6, hash);
910 }
911
912 /**
913 * @brief Set user HASH[31:0].
914
915 * Register|BitsName
916 * ---------------|---------------
917 * USER_HASH_7 | USER_HASH
918
919 * @param HMACx HMAC instance
920 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
921 * @retval None
922 */
923 __STATIC_INLINE void ll_hmac_set_user_hash_31_0(hmac_regs_t *HMACx, uint32_t hash)
924 {
925 WRITE_REG(HMACx->USER_HASH_7, hash);
926 }
927
928 /**
929 * @brief Get abstract from HMAC.
930
931 * Register|BitsName
932 * ---------------|---------------
933 * DATA_OUT | DATA
934
935 * @param HMACx HMAC instance
936 * @retval Abstract
937 */
938 __STATIC_INLINE uint32_t ll_hmac_get_data(hmac_regs_t *HMACx)
939 {
940 return (READ_REG(HMACx->DATA_OUT));
941 }
942
943 /**
944 * @brief Send data to calculate.
945
946 * Register|BitsName
947 * ---------------|---------------
948 * DATA_IN | DATA
949
950 * @param HMACx HMAC instance
951 * @param data This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
952 * @retval None
953 */
954 __STATIC_INLINE void ll_hmac_set_data(hmac_regs_t *HMACx, uint32_t data)
955 {
956 WRITE_REG(HMACx->DATA_IN, data);
957 }
958
959 /**
960 * @brief Set HMAC key0.
961
962 * Register|BitsName
963 * ---------------|---------------
964 * KEY0 | KEY
965
966 * @param HMACx HMAC instance
967 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
968 * @retval None
969 */
970 __STATIC_INLINE void ll_hmac_set_key0(hmac_regs_t *HMACx, uint32_t key)
971 {
972 WRITE_REG(HMACx->KEY0, key);
973 }
974
975 /**
976 * @brief Set HMAC key1.
977
978 * Register|BitsName
979 * ---------------|---------------
980 * KEY1 | KEY
981
982 * @param HMACx HMAC instance
983 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
984 * @retval None
985 */
986 __STATIC_INLINE void ll_hmac_set_key1(hmac_regs_t *HMACx, uint32_t key)
987 {
988 WRITE_REG(HMACx->KEY1, key);
989 }
990
991 /**
992 * @brief Set HMAC key2.
993
994 * Register|BitsName
995 * ---------------|---------------
996 * KEY2 | KEY
997
998 * @param HMACx HMAC instance
999 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1000 * @retval None
1001 */
1002 __STATIC_INLINE void ll_hmac_set_key2(hmac_regs_t *HMACx, uint32_t key)
1003 {
1004 WRITE_REG(HMACx->KEY2, key);
1005 }
1006
1007 /**
1008 * @brief Set HMAC key3.
1009
1010 * Register|BitsName
1011 * ---------------|---------------
1012 * KEY3 | KEY
1013
1014 * @param HMACx HMAC instance
1015 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1016 * @retval None
1017 */
1018 __STATIC_INLINE void ll_hmac_set_key3(hmac_regs_t *HMACx, uint32_t key)
1019 {
1020 WRITE_REG(HMACx->KEY3, key);
1021 }
1022
1023 /**
1024 * @brief Set HMAC key4.
1025
1026 * Register|BitsName
1027 * ---------------|---------------
1028 * KEY4 | KEY
1029
1030 * @param HMACx HMAC instance
1031 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1032 * @retval None
1033 */
1034 __STATIC_INLINE void ll_hmac_set_key4(hmac_regs_t *HMACx, uint32_t key)
1035 {
1036 WRITE_REG(HMACx->KEY4, key);
1037 }
1038
1039 /**
1040 * @brief Set HMAC key5.
1041
1042 * Register|BitsName
1043 * ---------------|---------------
1044 * KEY5 | KEY
1045
1046 * @param HMACx HMAC instance
1047 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1048 * @retval None
1049 */
1050 __STATIC_INLINE void ll_hmac_set_key5(hmac_regs_t *HMACx, uint32_t key)
1051 {
1052 WRITE_REG(HMACx->KEY5, key);
1053 }
1054
1055 /**
1056 * @brief Set HMAC key6.
1057
1058 * Register|BitsName
1059 * ---------------|---------------
1060 * KEY6 | KEY
1061
1062 * @param HMACx HMAC instance
1063 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1064 * @retval None
1065 */
1066 __STATIC_INLINE void ll_hmac_set_key6(hmac_regs_t *HMACx, uint32_t key)
1067 {
1068 WRITE_REG(HMACx->KEY6, key);
1069 }
1070
1071 /**
1072 * @brief Set HMAC key7.
1073
1074 * Register|BitsName
1075 * ---------------|---------------
1076 * KEY7 | KEY
1077
1078 * @param HMACx HMAC instance
1079 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1080 * @retval None
1081 */
1082 __STATIC_INLINE void ll_hmac_set_key7(hmac_regs_t *HMACx, uint32_t key)
1083 {
1084 WRITE_REG(HMACx->KEY7, key);
1085 }
1086
1087 /**
1088 * @brief Set HMAC key address in memory.
1089
1090 * Register|BitsName
1091 * ---------------|---------------
1092 * KEY_ADDR | ADDR
1093
1094 * @param HMACx HMAC instance
1095 * @param address This parameter can be one of the address in RAM
1096 * @retval None
1097 */
1098 __STATIC_INLINE void ll_hmac_set_key_address(hmac_regs_t *HMACx, uint32_t address)
1099 {
1100 WRITE_REG(HMACx->KEY_ADDR, address);
1101 }
1102
1103 /**
1104 * @brief Get HMAC key address in memory.
1105
1106 * Register|BitsName
1107 * ---------------|---------------
1108 * KEY_ADDR | ADDR
1109
1110 * @param HMACx HMAC instance
1111 * @retval Return value is the address in RAM
1112 */
1113 __STATIC_INLINE uint32_t ll_hmac_get_key_address(hmac_regs_t *HMACx)
1114 {
1115 return (READ_REG(HMACx->KEY_ADDR));
1116 }
1117
1118 /**
1119 * @brief Set HMAC fetch key port mask.
1120
1121 * Register|BitsName
1122 * ---------------|---------------
1123 * KEYPORT_MASK | MASK
1124
1125 * @param HMACx HMAC instance
1126 * @param mask This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1127 * @retval None
1128 */
1129 __STATIC_INLINE void ll_hmac_set_key_port_mask(hmac_regs_t *HMACx, uint32_t mask)
1130 {
1131 WRITE_REG(HMACx->KEYPORT_MASK, mask);
1132 }
1133
1134 /** @} */
1135
1136 /** @defgroup HMAC_LL_EF_Init Initialization and de-initialization functions
1137 * @{
1138 */
1139
1140 /**
1141 * @brief De-initialize HMAC registers (Registers restored to their default values).
1142 * @param HMACx HMAC Instance
1143 * @retval An error_status_t enumeration value:
1144 * - SUCCESS: HMAC registers are de-initialized
1145 * - ERROR: HMAC registers are not de-initialized
1146 */
1147 error_status_t ll_hmac_deinit(hmac_regs_t *HMACx);
1148
1149 /**
1150 * @brief Initialize HMAC registers according to the specified
1151 * parameters in p_hmac_init.
1152 * @param HMACx HMAC Instance
1153 * @param p_hmac_init Pointer to a ll_hmac_init_t structure that contains the configuration
1154 * information for the specified HMAC peripheral.
1155 * @retval An error_status_t enumeration value:
1156 * - SUCCESS: HMAC registers are initialized according to p_hmac_init content
1157 * - ERROR: Problem occurred during HMAC Registers initialization
1158 */
1159 error_status_t ll_hmac_init(hmac_regs_t *HMACx, ll_hmac_init_t *p_hmac_init);
1160
1161 /**
1162 * @brief Set each field of a @ref ll_hmac_init_t type structure to default value.
1163 * @param p_hmac_init Pointer to a @ref ll_hmac_init_t structure
1164 * whose fields will be set to default values.
1165 * @retval None
1166 */
1167 void ll_hmac_struct_init(ll_hmac_init_t *p_hmac_init);
1168
1169 /** @} */
1170
1171 /** @} */
1172
1173 #endif /* HMAC */
1174
1175 #ifdef __cplusplus
1176 }
1177 #endif
1178
1179 #endif /* __GR55XX_LL_HMAC_H__ */
1180
1181 /** @} */
1182
1183 /** @} */
1184
1185 /** @} */
ll_hmac_set_data
__STATIC_INLINE void ll_hmac_set_data(hmac_regs_t *HMACx, uint32_t data)
Send data to calculate.
Definition: gr55xx_ll_hmac.h:954
ll_hmac_set_key_type
__STATIC_INLINE void ll_hmac_set_key_type(hmac_regs_t *HMACx, uint32_t type)
Set ways to obtain HMAC key.
Definition: gr55xx_ll_hmac.h:405
ll_hmac_is_enabled_private
__STATIC_INLINE uint32_t ll_hmac_is_enabled_private(hmac_regs_t *HMACx)
Indicate whether the private mode is enabled.
Definition: gr55xx_ll_hmac.h:513
ll_hmac_enable_read_key
__STATIC_INLINE void ll_hmac_enable_read_key(hmac_regs_t *HMACx)
Enable fetch key through AHB/key port.
Definition: gr55xx_ll_hmac.h:281
ll_hmac_init_t
struct _ll_hmac_init_t ll_hmac_init_t
LL HMAC Init Structure definition.
ll_hmac_set_key_port_mask
__STATIC_INLINE void ll_hmac_set_key_port_mask(hmac_regs_t *HMACx, uint32_t mask)
Set HMAC fetch key port mask.
Definition: gr55xx_ll_hmac.h:1129
ll_hmac_is_action_flag_sha_ready
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_sha_ready(hmac_regs_t *HMACx)
Indicate whether SHA Ready flag is set.
Definition: gr55xx_ll_hmac.h:585
ll_hmac_is_enabled
__STATIC_INLINE uint32_t ll_hmac_is_enabled(hmac_regs_t *HMACx)
Indicate whether the HMAC is enabled.
Definition: gr55xx_ll_hmac.h:221
ll_hmac_set_user_hash_223_192
__STATIC_INLINE void ll_hmac_set_user_hash_223_192(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[223:192].
Definition: gr55xx_ll_hmac.h:827
ll_hmac_clear_flag_it_done
__STATIC_INLINE void ll_hmac_clear_flag_it_done(hmac_regs_t *HMACx)
Clear Done interrupt flag.
Definition: gr55xx_ll_hmac.h:690
ll_hmac_disable_dma_start
__STATIC_INLINE void ll_hmac_disable_dma_start(hmac_regs_t *HMACx)
Disable HMAC DMA mode.
Definition: gr55xx_ll_hmac.h:251
ll_hmac_is_enabled_it_done
__STATIC_INLINE uint32_t ll_hmac_is_enabled_it_done(hmac_regs_t *HMACx)
Indicate whether Done Interrupt is enabled.
Definition: gr55xx_ll_hmac.h:564
ll_hmac_set_key7
__STATIC_INLINE void ll_hmac_set_key7(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key7.
Definition: gr55xx_ll_hmac.h:1082
ll_hmac_disable_sha
__STATIC_INLINE void ll_hmac_disable_sha(hmac_regs_t *HMACx)
Disable SHA mode.
Definition: gr55xx_ll_hmac.h:453
ll_hmac_set_key_address
__STATIC_INLINE void ll_hmac_set_key_address(hmac_regs_t *HMACx, uint32_t address)
Set HMAC key address in memory.
Definition: gr55xx_ll_hmac.h:1098
ll_hmac_is_action_flag_key_valid
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_key_valid(hmac_regs_t *HMACx)
Indicate whether Key Valid flag is set.
Definition: gr55xx_ll_hmac.h:660
ll_hmac_get_dma_write_address
__STATIC_INLINE uint32_t ll_hmac_get_dma_write_address(hmac_regs_t *HMACx)
Get HMAC write address of RAM in DMA mode.
Definition: gr55xx_ll_hmac.h:789
ll_hmac_set_key4
__STATIC_INLINE void ll_hmac_set_key4(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key4.
Definition: gr55xx_ll_hmac.h:1034
ll_hmac_enable
__STATIC_INLINE void ll_hmac_enable(hmac_regs_t *HMACx)
Enable HMAC.
Definition: gr55xx_ll_hmac.h:191
ll_hmac_is_enabled_little_endian
__STATIC_INLINE uint32_t ll_hmac_is_enabled_little_endian(hmac_regs_t *HMACx)
Indicate whether the HMAC is in little endian.
Definition: gr55xx_ll_hmac.h:386
ll_hmac_set_key1
__STATIC_INLINE void ll_hmac_set_key1(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key1.
Definition: gr55xx_ll_hmac.h:986
ll_hmac_enable_user_hash
__STATIC_INLINE void ll_hmac_enable_user_hash(hmac_regs_t *HMACx)
Enable user HASH.
Definition: gr55xx_ll_hmac.h:311
ll_hmac_is_enabled_sha
__STATIC_INLINE uint32_t ll_hmac_is_enabled_sha(hmac_regs_t *HMACx)
Indicate whether the SHA mode is enabled.
Definition: gr55xx_ll_hmac.h:468
ll_hmac_enable_last_transfer
__STATIC_INLINE void ll_hmac_enable_last_transfer(hmac_regs_t *HMACx)
Enable last block transfer in MCU/DMA mode.
Definition: gr55xx_ll_hmac.h:296
ll_hmac_enable_little_endian
__STATIC_INLINE void ll_hmac_enable_little_endian(hmac_regs_t *HMACx)
Enable HMAC in little endian.
Definition: gr55xx_ll_hmac.h:356
ll_hmac_init
error_status_t ll_hmac_init(hmac_regs_t *HMACx, ll_hmac_init_t *p_hmac_init)
Initialize HMAC registers according to the specified parameters in p_hmac_init.
ll_hmac_set_dma_transfer_block
__STATIC_INLINE void ll_hmac_set_dma_transfer_block(hmac_regs_t *HMACx, uint32_t block)
Set HMAC transfer blocks in DMA mode.
Definition: gr55xx_ll_hmac.h:712
ll_hmac_set_user_hash_63_32
__STATIC_INLINE void ll_hmac_set_user_hash_63_32(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[63:32].
Definition: gr55xx_ll_hmac.h:907
ll_hmac_is_enabled_dma_start
__STATIC_INLINE uint32_t ll_hmac_is_enabled_dma_start(hmac_regs_t *HMACx)
Indicate whether the HMAC DMA mode is enabled.
Definition: gr55xx_ll_hmac.h:266
ll_hmac_get_key_type
__STATIC_INLINE uint32_t ll_hmac_get_key_type(hmac_regs_t *HMACx)
Get ways to obtain HMAC key.
Definition: gr55xx_ll_hmac.h:423
ll_hmac_set_user_hash_31_0
__STATIC_INLINE void ll_hmac_set_user_hash_31_0(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[31:0].
Definition: gr55xx_ll_hmac.h:923
ll_hmac_disable_little_endian
__STATIC_INLINE void ll_hmac_disable_little_endian(hmac_regs_t *HMACx)
Disable HMAC in little endian.
Definition: gr55xx_ll_hmac.h:371
ll_hmac_is_action_flag_hmac_ready
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_hmac_ready(hmac_regs_t *HMACx)
Indicate whether HMAC Ready flag is set.
Definition: gr55xx_ll_hmac.h:600
ll_hmac_get_key_address
__STATIC_INLINE uint32_t ll_hmac_get_key_address(hmac_regs_t *HMACx)
Get HMAC key address in memory.
Definition: gr55xx_ll_hmac.h:1113
ll_hmac_is_action_flag_dma_message_done
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_message_done(hmac_regs_t *HMACx)
Indicate whether DMA Transmit Message Done flag is set.
Definition: gr55xx_ll_hmac.h:615
ll_hmac_is_action_flag_dma_error
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_error(hmac_regs_t *HMACx)
Indicate whether DMA Transfer Error flag is set.
Definition: gr55xx_ll_hmac.h:645
ll_hmac_set_key2
__STATIC_INLINE void ll_hmac_set_key2(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key2.
Definition: gr55xx_ll_hmac.h:1002
ll_hmac_enable_private
__STATIC_INLINE void ll_hmac_enable_private(hmac_regs_t *HMACx)
Enable private mode.
Definition: gr55xx_ll_hmac.h:483
ll_hmac_set_key3
__STATIC_INLINE void ll_hmac_set_key3(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key3.
Definition: gr55xx_ll_hmac.h:1018
ll_hmac_set_key5
__STATIC_INLINE void ll_hmac_set_key5(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key5.
Definition: gr55xx_ll_hmac.h:1050
ll_hmac_set_user_hash_191_160
__STATIC_INLINE void ll_hmac_set_user_hash_191_160(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[191:160].
Definition: gr55xx_ll_hmac.h:843
ll_hmac_is_enabled_user_hash
__STATIC_INLINE uint32_t ll_hmac_is_enabled_user_hash(hmac_regs_t *HMACx)
Indicate whether the user HASH is enabled.
Definition: gr55xx_ll_hmac.h:341
ll_hmac_struct_init
void ll_hmac_struct_init(ll_hmac_init_t *p_hmac_init)
Set each field of a ll_hmac_init_t type structure to default value.
ll_hmac_disable
__STATIC_INLINE void ll_hmac_disable(hmac_regs_t *HMACx)
Disable HMAC.
Definition: gr55xx_ll_hmac.h:206
ll_hmac_disable_user_hash
__STATIC_INLINE void ll_hmac_disable_user_hash(hmac_regs_t *HMACx)
Disable user HASH.
Definition: gr55xx_ll_hmac.h:326
ll_hmac_is_action_flag_dma_done
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_done(hmac_regs_t *HMACx)
Indicate whether DMA Transfer Done flag is set.
Definition: gr55xx_ll_hmac.h:630
ll_hmac_is_action_flag_it_done
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_it_done(hmac_regs_t *HMACx)
Indicate whether Done interrupt flag is set.
Definition: gr55xx_ll_hmac.h:675
_ll_hmac_init_t::p_key
uint32_t * p_key
Key
Definition: gr55xx_ll_hmac.h:77
ll_hmac_enable_sha
__STATIC_INLINE void ll_hmac_enable_sha(hmac_regs_t *HMACx)
Enable SHA mode.
Definition: gr55xx_ll_hmac.h:438
ll_hmac_set_key6
__STATIC_INLINE void ll_hmac_set_key6(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key6.
Definition: gr55xx_ll_hmac.h:1066
_ll_hmac_init_t::p_hash
uint32_t * p_hash
HASH value
Definition: gr55xx_ll_hmac.h:79
ll_hmac_deinit
error_status_t ll_hmac_deinit(hmac_regs_t *HMACx)
De-initialize HMAC registers (Registers restored to their default values).
ll_hmac_enable_it_done
__STATIC_INLINE void ll_hmac_enable_it_done(hmac_regs_t *HMACx)
Enable the done interrupt for HMAC.
Definition: gr55xx_ll_hmac.h:534
ll_hmac_get_data
__STATIC_INLINE uint32_t ll_hmac_get_data(hmac_regs_t *HMACx)
Get abstract from HMAC.
Definition: gr55xx_ll_hmac.h:938
ll_hmac_set_user_hash_255_224
__STATIC_INLINE void ll_hmac_set_user_hash_255_224(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[255:224].
Definition: gr55xx_ll_hmac.h:811
ll_hmac_set_dma_write_address
__STATIC_INLINE void ll_hmac_set_dma_write_address(hmac_regs_t *HMACx, uint32_t address)
Set HMAC write address of RAM in DMA mode.
Definition: gr55xx_ll_hmac.h:774
_ll_hmac_init_t
LL HMAC Init Structure definition.
Definition: gr55xx_ll_hmac.h:76
ll_hmac_set_user_hash_95_64
__STATIC_INLINE void ll_hmac_set_user_hash_95_64(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[95:64].
Definition: gr55xx_ll_hmac.h:891
ll_hmac_disable_private
__STATIC_INLINE void ll_hmac_disable_private(hmac_regs_t *HMACx)
Disable private mode.
Definition: gr55xx_ll_hmac.h:498
ll_hmac_set_user_hash_127_96
__STATIC_INLINE void ll_hmac_set_user_hash_127_96(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[127:96].
Definition: gr55xx_ll_hmac.h:875
ll_hmac_set_user_hash_159_128
__STATIC_INLINE void ll_hmac_set_user_hash_159_128(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[159:128].
Definition: gr55xx_ll_hmac.h:859
ll_hmac_set_key0
__STATIC_INLINE void ll_hmac_set_key0(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key0.
Definition: gr55xx_ll_hmac.h:970
ll_hmac_disable_it_done
__STATIC_INLINE void ll_hmac_disable_it_done(hmac_regs_t *HMACx)
Disable the done interrupt for HMAC.
Definition: gr55xx_ll_hmac.h:549
ll_hmac_set_dma_read_address
__STATIC_INLINE void ll_hmac_set_dma_read_address(hmac_regs_t *HMACx, uint32_t address)
Set HMAC read address of RAM in DMA mode.
Definition: gr55xx_ll_hmac.h:743
ll_hmac_enable_dma_start
__STATIC_INLINE void ll_hmac_enable_dma_start(hmac_regs_t *HMACx)
Enable HMAC DMA mode.
Definition: gr55xx_ll_hmac.h:236
ll_hmac_get_dma_transfer_block
__STATIC_INLINE uint32_t ll_hmac_get_dma_transfer_block(hmac_regs_t *HMACx)
Get HMAC transfer blocks in DMA mode.
Definition: gr55xx_ll_hmac.h:727
ll_hmac_get_dma_read_address
__STATIC_INLINE uint32_t ll_hmac_get_dma_read_address(hmac_regs_t *HMACx)
Get HMAC read address of RAM in DMA mode.
Definition: gr55xx_ll_hmac.h:758