Macros
InitStrcut default configuartion
Peripheral Driver » LL Driver » QSPI » Defines » QSPI Exported Constants
Collaboration diagram for InitStrcut default configuartion:

## Macros
#define | LL_QSPI_DEFAULT_CONFIG
| LL QSPI InitStrcut default configuartion. More...
#define | LL_CONC_QSPI_DEFAULT_CONFIG

## Detailed Description

## Macro Definition Documentation

## ◆ LL_CONC_QSPI_DEFAULT_CONFIG

#define LL_CONC_QSPI_DEFAULT_CONFIG

Definition at line 720 of file gr55xx_ll_qspi.h.

## ◆ LL_QSPI_DEFAULT_CONFIG

#define LL_QSPI_DEFAULT_CONFIG

Value:
{ \
.transfer_direction = LL_QSPI_SIMPLEX_RX, \
.instruction_size = LL_QSPI_INSTSIZE_8BIT, \
.address_size = LL_QSPI_ADDRSIZE_24BIT, \
.inst_addr_transfer_format = LL_QSPI_INST_ADDR_ALL_IN_SPI, \
.wait_cycles = 0, \
.data_size = LL_QSPI_DATASIZE_8BIT, \
.clock_polarity = LL_QSPI_SCPOL_LOW, \
.clock_phase = LL_QSPI_SCPHA_1EDGE, \
.baud_rate = SystemCoreClock / 1000000, \
.rx_sample_delay = 0, \
}

LL QSPI InitStrcut default configuartion.

Definition at line 704 of file gr55xx_ll_qspi.h.

LL_QSPI_DATASIZE_8BIT
#define LL_QSPI_DATASIZE_8BIT
Data length for SPI transfer: 8 bits.
Definition: gr55xx_ll_qspi.h:392
LL_QSPI_SCPHA_1EDGE
#define LL_QSPI_SCPHA_1EDGE
First clock transition is the first data capture edge
Definition: gr55xx_ll_qspi.h:466
LL_QSPI_ADDRSIZE_24BIT
#define LL_QSPI_ADDRSIZE_24BIT
Address length for QSPI transfer: 24 bits.
Definition: gr55xx_ll_qspi.h:533
LL_QSPI_SCPOL_LOW
#define LL_QSPI_SCPOL_LOW
Clock to 0 when idle.
Definition: gr55xx_ll_qspi.h:473
LL_QSPI_INST_ADDR_ALL_IN_SPI
#define LL_QSPI_INST_ADDR_ALL_IN_SPI
Instruction and address are sent in SPI mode.
Definition: gr55xx_ll_qspi.h:555
LL_QSPI_INSTSIZE_8BIT
#define LL_QSPI_INSTSIZE_8BIT
Instructoin length for QSPI transfer: 8 bits.
Definition: gr55xx_ll_qspi.h:520
LL_QSPI_SIMPLEX_RX
#define LL_QSPI_SIMPLEX_RX
Simplex Rx mode.
Definition: gr55xx_ll_qspi.h:459