gr55xx_ll_comp.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_comp.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of COMP LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_COMP COMP
47 * @brief COMP LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55XX_LL_COMP_H__
53 #define __GR55XX_LL_COMP_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx.h"
61
62 #if defined(AON_CTL)
63
64 /** @defgroup COMP_LL_STRUCTURES Structures
65 * @{
66 */
67
68 /* Exported types ------------------------------------------------------------*/
69 /** @defgroup COMP_LL_ES_INIT COMP Exported init structures
70 * @{
71 */
72
73 /**
74 * @brief LL COMP init Structure definition
75 */
76 typedef struct _ll_comp_init
77 {
78 uint32_t input_source; /**< Specifies the input source for the comparator.
79 This parameter can be any value of @ref COMP_LL_EC_INPUT_SRC.
80 This parameter can be modified afterwards using unitary function @ref ll_comp_set_input_src(). */
81
82 uint32_t ref_source; /**< Specifies the reference source for the comparator.
83 This parameter can be any value of @ref COMP_LL_EC_INPUT_SRC.
84 This parameter can be modified afterwards using unitary function @ref ll_comp_set_ref_src(). */
85
86 uint32_t ref_value; /*!< Specifies the value of the COMP buffered reference.
87 If ref_source select to LL_COMP_REF_SRC_VBAT, this parameter can be a value between: 0 ~ 7.
88 This parameter can be modified afterwards using unitary function @ref ll_comp_set_vbatt_lvl().
89 If ref_source select to LL_COMP_REF_SRC_VREF, this parameter can be a value between: 0 ~ 255.
90 This parameter can be modified afterwards using unitary function @ref ll_comp_set_vref_lvl(). */
91
92 uint32_t hyst; /**< Specifies the hysteresis for the comparator.
93 This parameter can be modified afterwards using unitary function ll_comp_positive_hysteresis() and ll_comp_negative_hysteresis(). */
94
95 uint32_t edge; /**< Specifies the wakeup edge of the comparator.
96 This parameter can be any value of @ref COMP_LL_EC_WAKEUP_EDGE. */
97
98 uint32_t res_deg; /**< Specifies the calibration for the comparator.
99 This parameter can be modified afterwards using unitary function ll_comp_positive_degeneration() and ll_comp_negative_degeneration(). */
100
101 } ll_comp_init_t;
102
103 /** @} */
104
105 /** @} */
106
107 /**
108 * @defgroup COMP_LL_MACRO Defines
109 * @{
110 */
111
112 /* Exported constants --------------------------------------------------------*/
113 /** @defgroup COMP_LL_Exported_Constants COMP Exported Constants
114 * @{
115 */
116
117 /** @defgroup COMP_LL_EC_INPUT_SRC COMP INPUT SOURCE
118 * @{
119 */
120 #define LL_COMP_INPUT_SRC_IO0 (0UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_0 as inputs for the comparator */
121 #define LL_COMP_INPUT_SRC_IO1 (1UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_1 as inputs for the comparator */
122 #define LL_COMP_INPUT_SRC_IO2 (2UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_2 as inputs for the comparator */
123 #define LL_COMP_INPUT_SRC_IO3 (3UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_3 as inputs for the comparator */
124 #define LL_COMP_INPUT_SRC_IO4 (4UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_4 as inputs for the comparator */
125 #define LL_COMP_INPUT_SRC_IO5 (5UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_5 as inputs for the comparator */
126 #define LL_COMP_INPUT_SRC_IO6 (6UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_6 as inputs for the comparator */
127 #define LL_COMP_INPUT_SRC_IO7 (7UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_7 as inputs for the comparator */
128
129 #define LL_COMP_INPUT_SRC_VBAT (9UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set VBATT as inputs for the comparator */
130 #define LL_COMP_INPUT_SRC_VREF (10UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set VREF as inputs for the comparator */
131
132 /** @} */
133
134 /** @defgroup COMP_LL_EC_REF_SRC COMP REF SOURCE
135 * @{
136 */
137 #define LL_COMP_REF_SRC_IO0 (0UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_0 as references for the comparator */
138 #define LL_COMP_REF_SRC_IO1 (1UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_1 as references for the comparator */
139 #define LL_COMP_REF_SRC_IO2 (2UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_2 as references for the comparator */
140 #define LL_COMP_REF_SRC_IO3 (3UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_3 as references for the comparator */
141 #define LL_COMP_REF_SRC_IO4 (4UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_4 as references for the comparator */
142 #define LL_COMP_REF_SRC_IO5 (5UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_5 as references for the comparator */
143 #define LL_COMP_REF_SRC_IO6 (6UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_6 as references for the comparator */
144 #define LL_COMP_REF_SRC_IO7 (7UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_7 as references for the comparator */
145
146 #define LL_COMP_REF_SRC_VBAT (9UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set VBATT as references for the comparator */
147 #define LL_COMP_REF_SRC_VREF (10UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set VREF as references for the comparator */
148 /** @} */
149
150 /** @defgroup COMP_LL_EC_HYST_SRC COMP HYST
151 * @{
152 */
153 #define LL_COMP_HYST_POSITIVE (1UL << AON_PMU_COMP_REG_1_CHANNEL_POSITIVE_HYST_Pos ) /**< Set positive side of hysteresis for the comparator */
154 #define LL_COMP_HYST_NEGATIVE (1UL << AON_PMU_COMP_REG_1_CHANNEL_NEGATIVE_HYST_Pos ) /**< Set negative side of hysteresis for the comparator */
155
156 /** @} */
157
158 /** @defgroup COMP_LL_EC_WAKEUP_EDGE COMP WAKEUP EDGE
159 * @{
160 */
161 #define LL_COMP_WAKEUP_EDGE_BOTH ( 0UL )
162 #define LL_COMP_WAKEUP_EDGE_FALLING ( 1UL )
163 #define LL_COMP_WAKEUP_EDGE_RISING ( 2UL )
164
165 /** @} */
166
167 /** @} */
168
169 /* Exported macro ------------------------------------------------------------*/
170 /** @defgroup COMP_LL_Exported_Macros COMP Exported Macros
171 * @{
172 */
173
174 /** @defgroup COMP_LL_EM_WRITE_READ Common Write and read registers Macros
175 * @{
176 */
177
178 /**
179 * @brief Write a value in COMP register
180 * @param __instance__ COMP instance
181 * @param __REG__ Register to be written
182 * @param __VALUE__ Value to be written in the register
183 * @retval None
184 */
185 #define LL_COMP_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG((__instance__)->__REG__, (__VALUE__))
186
187 /**
188 * @brief Read a value in COMP register
189 * @param __instance__ COMP instance
190 * @param __REG__ Register to be read
191 * @retval Register value
192 */
193 #define LL_COMP_ReadReg(__instance__, __REG__) READ_REG((__instance__)->__REG__)
194
195 /** @} */
196
197 /** @} */
198
199 /* Private types -------------------------------------------------------------*/
200 /* Private variables ---------------------------------------------------------*/
201 /* Private constants ---------------------------------------------------------*/
202 /* Private macros ------------------------------------------------------------*/
203 /** @defgroup COMP_LL_Private_Macros COMP Private Macros
204 * @{
205 */
206
207 /** @defgroup COMP_LL_EC_DEFAULT_CONFIG InitStruct default configuartion
208 * @{
209 */
210
211 /**
212 * @brief Default configuartion for initializing structure
213 */
214 #define LL_COMP_DEFAULT_CONFIG \
215 { \
216 .channel_p = LL_COMP_CHANNEL_IO0, \
217 .channel_n = LL_COMP_CHANNEL_IO1, \
218 }
219 /** @} */
220
221 /** @} */
222
223 /** @} */
224
225 /* Exported functions --------------------------------------------------------*/
226 /** @defgroup COMP_LL_DRIVER_FUNCTIONS Functions
227 * @{
228 */
229
230 /** @defgroup COMP_LL_EF_Configuration Basic Configuration
231 * @{
232 */
233
234 /**
235 * @brief Enable COMP module.
236 *
237 * Register|BitsName
238 * --------|--------
239 * COMP_REG_0 | COMP_EN
240 *
241 * @retval None
242 */
243 __STATIC_INLINE void ll_comp_enable(void)
244 {
245 SET_BITS(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_WAKE_COMP_EN_Msk);
246 }
247
248 /**
249 * @brief Disable COMP module.
250 *
251 * Register|BitsName
252 * --------|--------
253 * COMP_REG_0 | COMP_EN
254 *
255 * @retval None
256 */
257 __STATIC_INLINE void ll_comp_disable(void)
258 {
259 CLEAR_BITS(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_WAKE_COMP_EN_Msk);
260 }
261
262 /**
263 * @brief Set channel of COMP input source.
264 *
265 * Register|BitsName
266 * --------|--------
267 * COMP_REG_0 | AON_COMP_REG_0_CHANNEL_SEL_P
268 *
269 * @param source This parameter can be one of the following values:
270 * @arg @ref LL_COMP_INPUT_SRC_IO0
271 * @arg @ref LL_COMP_INPUT_SRC_IO1
272 * @arg @ref LL_COMP_INPUT_SRC_IO2
273 * @arg @ref LL_COMP_INPUT_SRC_IO3
274 * @arg @ref LL_COMP_INPUT_SRC_IO4
275 * @arg @ref LL_COMP_INPUT_SRC_IO5
276 * @arg @ref LL_COMP_INPUT_SRC_IO6
277 * @arg @ref LL_COMP_INPUT_SRC_IO7
278 * @arg @ref LL_COMP_INPUT_SRC_VBAT
279 * @arg @ref LL_COMP_INPUT_SRC_VREF
280 * @retval None
281 */
282 __STATIC_INLINE void ll_comp_set_input_src(uint32_t source)
283 {
284 MODIFY_REG(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Msk, source);
285 }
286
287 /**
288 * @brief Set channel of COMP reference source.
289 *
290 * Register|BitsName
291 * --------|--------
292 * COMP_REG_0 | AON_COMP_REG_0_CHANNEL_SEL_N
293 *
294 * @param source This parameter can be one of the following values:
295 * @arg @ref LL_COMP_REF_SRC_IO0
296 * @arg @ref LL_COMP_REF_SRC_IO1
297 * @arg @ref LL_COMP_REF_SRC_IO2
298 * @arg @ref LL_COMP_REF_SRC_IO3
299 * @arg @ref LL_COMP_REF_SRC_IO4
300 * @arg @ref LL_COMP_REF_SRC_IO5
301 * @arg @ref LL_COMP_REF_SRC_IO6
302 * @arg @ref LL_COMP_REF_SRC_IO7
303 * @arg @ref LL_COMP_REF_SRC_VBAT
304 * @arg @ref LL_COMP_REF_SRC_VREF
305 * @retval None
306 */
307 __STATIC_INLINE void ll_comp_set_ref_src(uint32_t source)
308 {
309 MODIFY_REG(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Msk, source);
310 }
311
312 /**
313 * @brief Set VBATT control level.
314 *
315 * Register|BitsName
316 * --------|--------
317 * COMP_REG_0 | BATT_LVL_CTRL_LV
318 *
319 * @param level This parameter can be a value between: 0 ~ 7
320 * Vbatt_ref = ((level+1)/10) * VBATT
321 * @retval None
322 */
323 __STATIC_INLINE void ll_comp_set_vbatt_lvl(uint32_t level)
324 {
325 SET_BITS(AON_PMU->COMP_REG_1, AON_PMU_COMP_REG_1_COMP_VBAT_EN_Msk);
326 MODIFY_REG(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_COMP_BATT_LVL_CTRL_LV_Msk, level << AON_PMU_COMP_REG_0_COMP_BATT_LVL_CTRL_LV_Pos);
327 }
328
329 /**
330 * @brief Set VREF control level.
331 *
332 * Register|BitsName
333 * --------|--------
334 * COMP_REG_0 | COMP_REF_CTRL
335 *
336 * @param level This parameter can be a value between: 0 ~ 255
337 * Vref = 7.5mv * level
338 * @retval None
339 */
340 __STATIC_INLINE void ll_comp_set_vref_lvl(uint32_t level)
341 {
342 SET_BITS(AON_PMU->COMP_REG_1, AON_PMU_COMP_REG_1_COMP_VREF_EN_Msk);
343 MODIFY_REG(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_COMP_REF_CTRL_LV_Msk, level << AON_PMU_COMP_REG_0_COMP_REF_CTRL_LV_Pos);
344 }
345 /**
346 * @brief set current of comparator.
347 *
348 * Register|BitsName
349 * --------|--------
350 * COMP_REG_0 | icomp_ctrl
351 *
352 * @retval None
353 */
354 __STATIC_INLINE void ll_comp_set_current(uint32_t level)
355 {
356 MODIFY_REG(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_ICOMP_CTRL_LV_Msk, level << AON_PMU_COMP_REG_0_ICOMP_CTRL_LV_Pos);
357 }
358
359 /**
360 * @brief set power of comparator.
361 *
362 * Register|BitsName
363 * --------|--------
364 * COMP_REG_0 | cascres_half
365 *
366 * @retval None
367 */
368 __STATIC_INLINE void ll_comp_cascres_half_high(uint32_t level)
369 {
370 MODIFY_REG(AON_PMU->COMP_REG_1, AON_PMU_COMP_REG_1_COMP_CASCRES_HALF_CTRL_Msk, level <<AON_PMU_COMP_REG_1_COMP_CASCRES_HALF_CTRL_Pos);
371 }
372
373 /**
374 * @brief Set hysteresis comparator
375 *
376 * Register|BitsName
377 * --------|--------
378 * COMP_REG_1 | P_HYS_EN
379 *
380 * @param hyst This parameter can be the following value:
381 * @arg @ref LL_COMP_HYST_POSITIVE
382 *
383 * @retval None
384 */
385 __STATIC_INLINE void ll_comp_positive_hysteresis(uint32_t hyst)
386 {
387 MODIFY_REG(AON_PMU->COMP_REG_1, AON_PMU_COMP_REG_1_CHANNEL_POSITIVE_HYST , hyst);
388 }
389
390 /**
391 * @brief Set hysteresis comparator
392 *
393 * Register|BitsName
394 * --------|--------
395 * COMP_REG_1 | N_HYS_EN
396 *
397 * @param hyst This parameter can be the following value:
398 * @arg @ref LL_COMP_HYST_NEGATIVE
399 *
400 * @retval None
401 */
402 __STATIC_INLINE void ll_comp_negative_hysteresis(uint32_t hyst)
403 {
404 MODIFY_REG(AON_PMU->COMP_REG_1, AON_PMU_COMP_REG_1_CHANNEL_NEGATIVE_HYST , hyst);
405 }
406
407 /**
408 * @brief Enable Clocked COMP.
409 *
410 * Register|BitsName
411 * --------|--------
412 * COMP_REG_1 | AON_PMU_COMP_REG_1_CLK_COMP_EN
413 *
414 * @retval None
415 */
416 __STATIC_INLINE void ll_clocked_comp_enable(void)
417 {
418 SET_BITS(AON_PMU->COMP_REG_1, AON_PMU_COMP_REG_1_CLK_COMP_EN_Msk);
419 }
420
421 /**
422 * @brief Disable Clocked COMP.
423 *
424 * Register|BitsName
425 * --------|--------
426 * COMP_REG_1 | AON_PMU_COMP_REG_1_CLK_COMP_EN
427 *
428 * @retval None
429 */
430 __STATIC_INLINE void ll_clocked_comp_disable(void)
431 {
432 CLEAR_BITS(AON_PMU->COMP_REG_1, AON_PMU_COMP_REG_1_CLK_COMP_EN_Msk);
433 }
434
435 /**
436 * @brief Enable Wakeup Interrupt for COMP Rising.
437 *
438 * Register|BitsName
439 * --------|--------
440 * AON_SLEEP_EVENT | MSIO_COMP
441 *
442 * @retval None.
443 */
444 __STATIC_INLINE void ll_comp_enable_rising_wakeup(void)
445 {
446 BIT_ADDR((uint32_t)&AON_CTL->MCU_WAKEUP_CTRL, AON_CTL_MCU_WAKEUP_CTRL_COMP_RISE_Pos) = 1;
447 }
448
449 /**
450 * @brief Disable Wakeup Interrupt for COMP Rising.
451 *
452 * Register|BitsName
453 * --------|--------
454 * AON_SLEEP_EVENT | MSIO_COMP
455 *
456 * @retval None.
457 */
458 __STATIC_INLINE void ll_comp_disable_rising_wakeup(void)
459 {
460 BIT_ADDR((uint32_t)&AON_CTL->MCU_WAKEUP_CTRL, AON_CTL_MCU_WAKEUP_CTRL_COMP_RISE_Pos) = 0;
461 }
462
463 /**
464 * @brief Get Wakeup Interrupt for COMP Rising.
465 *
466 * Register|BitsName
467 * --------|--------
468 * AON_SLEEP_EVENT | MSIO_COMP
469 *
470 * @retval State of bit (1 or o).
471 */
472 __STATIC_INLINE uint32_t ll_comp_is_enable_rising_wakeup(void)
473 {
474 return (READ_BITS(AON_CTL->MCU_WAKEUP_CTRL, AON_CTL_MCU_WAKEUP_CTRL_COMP_RISE) == AON_CTL_MCU_WAKEUP_CTRL_COMP_RISE);
475 }
476
477 /**
478 * @brief Enable Wakeup Interrupt for COMP Falling.
479 *
480 * Register|BitsName
481 * --------|--------
482 * AON_SLEEP_EVENT | MSIO_COMP
483 *
484 * @retval None.
485 */
486 __STATIC_INLINE void ll_comp_enable_falling_wakeup(void)
487 {
488 BIT_ADDR((uint32_t)&AON_CTL->MCU_WAKEUP_CTRL, AON_CTL_MCU_WAKEUP_CTRL_COMP_FALL_Pos) = 1;
489 }
490
491 /**
492 * @brief Disable Wakeup Interrupt for COMP Falling.
493 *
494 * Register|BitsName
495 * --------|--------
496 * AON_SLEEP_EVENT | MSIO_COMP
497 *
498 * @retval None.
499 */
500 __STATIC_INLINE void ll_comp_disable_falling_wakeup(void)
501 {
502 BIT_ADDR((uint32_t)&AON_CTL->MCU_WAKEUP_CTRL, AON_CTL_MCU_WAKEUP_CTRL_COMP_FALL_Pos) = 0;
503 }
504
505 /**
506 * @brief Get Wakeup Interrupt for COMP Falling.
507 *
508 * Register|BitsName
509 * --------|--------
510 * AON_SLEEP_EVENT | MSIO_COMP
511 *
512 * @retval State of bit (1 or o).
513 */
514 __STATIC_INLINE uint32_t ll_comp_is_enable_falling_wakeup(void)
515 {
516 return (READ_BITS(AON_CTL->MCU_WAKEUP_CTRL, AON_CTL_MCU_WAKEUP_CTRL_COMP_FALL) == AON_CTL_MCU_WAKEUP_CTRL_COMP_FALL);
517 }
518
519 /**
520 * @brief Indicate if the COMP rising_triger Flag is set or not.
521 *
522 * Register|BitsName
523 * --------|--------
524 * AON_SLEEP_EVENT | MSIO_COMP
525 *
526 * @retval State of bit (1 or o).
527 */
528 __STATIC_FORCEINLINE uint32_t ll_comp_is_rising_triger_flag_it(void)
529 {
530 return (READ_BITS(AON_CTL->AON_SLP_EVENT, AON_CTL_SLP_EVENT_CMP_RISE) == AON_CTL_SLP_EVENT_CMP_RISE);
531 }
532
533 /**
534 * @brief Clear rising_triger flag for COMP.
535 *
536 * Register|BitsName
537 * --------|--------
538 * AON_SLEEP_EVENT | MSIO_COMP
539 *
540 * @retval None.
541 */
542 __STATIC_FORCEINLINE void ll_comp_clear_rising_triger_flag_it(void)
543 {
544 WRITE_REG(AON_CTL->AON_SLP_EVENT, ~AON_CTL_SLP_EVENT_CMP_RISE);
545 }
546
547 /**
548 * @brief Indicate if the COMP falling_triger Flag is set or not.
549 *
550 * Register|BitsName
551 * --------|--------
552 * AON_SLEEP_EVENT | MSIO_COMP
553 *
554 * @retval State of bit (1 or o).
555 */
556 __STATIC_FORCEINLINE uint32_t ll_comp_is_falling_triger_flag_it(void)
557 {
558 return (READ_BITS(AON_CTL->AON_SLP_EVENT, AON_CTL_SLP_EVENT_CMP_FALL) == AON_CTL_SLP_EVENT_CMP_FALL);
559 }
560
561 /**
562 * @brief Clear falling_triger flag for COMP.
563 *
564 * Register|BitsName
565 * --------|--------
566 * AON_SLEEP_EVENT | MSIO_COMP
567 *
568 * @retval None.
569 */
570 __STATIC_FORCEINLINE void ll_comp_clear_falling_triger_flag_it(void)
571 {
572 WRITE_REG(AON_CTL->AON_SLP_EVENT, ~AON_CTL_SLP_EVENT_CMP_FALL);
573 }
574
575 /**
576 * @brief Set compator glitch remove cycles
577 *
578 * Register|BitsName
579 * --------|--------
580 * AON_CTL_PMU_COMP_GLITCH_REMOVE | AON_CTL_PMU_COMP_GLITCH_REMOVE_CYCLE
581 *
582 * @retval None.
583 */
584 __STATIC_INLINE void ll_comp_set_remove_cycle(uint32_t cycle)
585 {
586 MODIFY_REG(AON_CTL->PMU_COMP_GLITCH_REMOVE, AON_CTL_PMU_COMP_GLITCH_REMOVE_CYCLE, cycle << AON_CTL_PMU_COMP_GLITCH_REMOVE_CYCLE_Pos);
587 }
588
589 /**
590 * @brief get the glitch remove_cycle
591 *
592 * Register|BitsName
593 * --------|--------
594 * AON_CTL_PMU_COMP_GLITCH_REMOVE | AON_CTL_PMU_COMP_GLITCH_REMOVE_CYCLE
595 *
596 * @retval remove_cycles.
597 */
598 __STATIC_INLINE uint32_t ll_comp_get_remove_cycle(void)
599 {
600 return (uint32_t)(READ_BITS(AON_CTL->PMU_COMP_GLITCH_REMOVE, AON_CTL_PMU_COMP_GLITCH_REMOVE_CYCLE_Msk) >> AON_CTL_PMU_COMP_GLITCH_REMOVE_CYCLE_Pos);
601 }
602
603 /** @} */
604
605 /** @defgroup COMP_LL_EF_Init Initialization and de-initialization functions
606 * @{
607 */
608
609 /**
610 * @brief De-initialize COMP registers (Registers restored to their default values).
611 * @retval An error_status_t enumeration value:
612 * - SUCCESS: COMP registers are de-initialized
613 * - ERROR: COMP registers are not de-initialized
614 */
615 error_status_t ll_comp_deinit(void);
616
617 /**
618 * @brief Initialize COMP registers according to the specified.
619 * parameters in p_comp_init.
620 * @param p_comp_init Pointer to a ll_comp_init_t structure that contains the configuration
621 * information for the specified COMP peripheral.
622 * @retval An error_status_t enumeration value:
623 * - SUCCESS: COMP registers are initialized according to p_comp_init content
624 * - ERROR: Problem occurred during COMP Registers initialization
625 */
626 error_status_t ll_comp_init(ll_comp_init_t *p_comp_init);
627
628 /**
629 * @brief Set each field of a @ref ll_comp_init_t type structure to default value.
630 * @param p_comp_init Pointer to a @ref ll_comp_init_t structure
631 * whose fields will be set to default values.
632 * @retval None
633 */
634 void ll_comp_struct_init(ll_comp_init_t *p_comp_init);
635
636 /** @} */
637
638 /** @} */
639
640 #endif /* AON */
641
642 #ifdef __cplusplus
643 }
644 #endif
645
646 #endif /* __GR55XX_LL_COMP_H__ */
647
648 /** @} */
649
650 /** @} */
651
652 /** @} */