Macros
Set DMA Control Register
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Collaboration diagram for Set DMA Control Register:

## Macros
#define | QSPI_DMA_CRTL_LOW_REGISTER_CFG(src_direction, src_tr_width, dst_tr_width, src_msize, dst_msize, en_gather)
| Set DMA Control Register. More...

## Detailed Description

## Macro Definition Documentation

## ◆ QSPI_DMA_CRTL_LOW_REGISTER_CFG

#define QSPI_DMA_CRTL_LOW_REGISTER_CFG | ( |  | src_direction,
|  |  | src_tr_width,
|  |  | dst_tr_width,
|  |  | src_msize,
|  |  | dst_msize,
|  |  | en_gather
| ) |  |

Value:
( \
DMA_CTLL_INI_EN | DMA_MEMORY_TO_PERIPH | DMA_LLP_SRC_ENABLE | DMA_LLP_DST_DISABLE | \
en_gather | DMA_DST_SCATTER_DISABLE | DMA_DST_NO_CHANGE | \
src_direction | src_tr_width | dst_tr_width | src_msize | dst_msize \
)

Set DMA Control Register.

Parameters

  src_direction | : DMA_SRC_INCREMENT, DMA_SRC_DECREMENT, DMA_SRC_NO_CHANGE
  src_tr_width | : DMA_SDATAALIGN_BYTE, DMA_SDATAALIGN_HALFWORD, DMA_SDATAALIGN_WORD
  dst_tr_width | : DMA_DDATAALIGN_BYTE, DMA_DDATAALIGN_HALFWORD, DMA_DDATAALIGN_WORD
  src_msize | : DMA_CTLL_SRC_MSIZE_1/DMA_CTLL_SRC_MSIZE_4/DMA_CTLL_SRC_MSIZE_8/DMA_CTLL_SRC_MSIZE_16
  dst_msize | : DMA_CTLL_DST_MSIZE_1/DMA_CTLL_DST_MSIZE_4/DMA_CTLL_DST_MSIZE_8/DMA_CTLL_DST_MSIZE_16
  en_gather | : DMA_SRC_GATHER_ENABLE / DMA_SRC_GATHER_DISABLE

Definition at line 409 of file gr55xx_hal_qspi.h.

DMA_DST_NO_CHANGE
#define DMA_DST_NO_CHANGE
Destination no change mode.
Definition: gr55xx_hal_dma.h:416
DMA_LLP_DST_DISABLE
#define DMA_LLP_DST_DISABLE
Destination LLP Disable.
Definition: gr55xx_hal_dma.h:457
DMA_DST_SCATTER_DISABLE
#define DMA_DST_SCATTER_DISABLE
Destination Scatter Disable.
Definition: gr55xx_hal_dma.h:471
DMA_MEMORY_TO_PERIPH
#define DMA_MEMORY_TO_PERIPH
Memory to peripheral direction.
Definition: gr55xx_hal_dma.h:398
DMA_LLP_SRC_ENABLE
#define DMA_LLP_SRC_ENABLE
Source LLP Enable.
Definition: gr55xx_hal_dma.h:463