◆ IS_QSPI_CONC_INST_ADDR_XFER_FORMAT
| #define IS_QSPI_CONC_INST_ADDR_XFER_FORMAT |
( |
|
_FORMAT_ | ) |
|
Value:
Check if QSPI.XIP Addr Xfer format is valid.
- Parameters
-
| <em>FORMAT</em> | QSPI.XIP Addr Xfer format. |
- Return values
-
| SET | (FORMAT is valid) or RESET (FORMAT is invalid) |
Definition at line 1011 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_ADDR_SIZE
| #define IS_QSPI_CONC_XIP_ADDR_SIZE |
( |
|
_ADDR_SIZE_ | ) |
|
Value:
Check if QSPI.XIP Address Size is valid.
- Parameters
-
| <em>ADDR_SIZE</em> | QSPI.XIP Address Size. |
- Return values
-
| SET | (ADDR_SIZE is valid) or RESET (ADDR_SIZE is invalid) |
Definition at line 990 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_CONT_XFER_EN
| #define IS_QSPI_CONC_XIP_CONT_XFER_EN |
( |
|
_CONT_XFER_EN_ | ) |
|
Value:
Check if QSPI.XIP cont xfer switch is valid.
- Parameters
-
| <em>CONT_XFER_EN</em> | QSPI.XIP cont xfer switch. |
- Return values
-
| SET | (CONT_XFER_EN is valid) or RESET (CONT_XFER_EN is invalid) |
Definition at line 1061 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_CONT_XFER_TOC
| #define IS_QSPI_CONC_XIP_CONT_XFER_TOC |
( |
|
_TOC_ | ) |
( (_TOC_) <= 0xFF) |
Check if QSPI.XIP timeout count of cont xfer is valid.
- Parameters
-
| <em>TOC</em> | QSPI.XIP timeout count of cont xfer. |
- Return values
-
| SET | (TOC is valid) or RESET (TOC is invalid) |
Definition at line 1068 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_DATA_FRF
| #define IS_QSPI_CONC_XIP_DATA_FRF |
( |
|
_XIP_FRF_ | ) |
|
Value:
Check if QSPI.XIP frame format is valid.
- Parameters
-
| <em>XIP_FRF</em> | QSPI.XIP frame format. |
- Return values
-
| SET | (XIP_FRF is valid) or RESET (XIP_FRF is invalid) |
Definition at line 1047 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_DFS
| #define IS_QSPI_CONC_XIP_DFS |
( |
|
_DFS_ | ) |
|
Value:
Check if QSPI.XIP DFS Value is valid.
- Parameters
-
| <em>DFS</em> | QSPI.XIP DFS Value |
- Return values
-
| SET | (DFS is valid) or RESET (DFS is invalid) |
Definition at line 953 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_DFS_HC_EN
| #define IS_QSPI_CONC_XIP_DFS_HC_EN |
( |
|
_HC_EN_ | ) |
|
Value:
Check if QSPI.XIP DFS_HC Switch Value is valid.
- Parameters
-
| <em>HC_EN</em> | QSPI.XIP DFS Hardcode Switch. |
- Return values
-
| SET | (HC_EN is valid) or RESET (HC_EN is invalid) |
Definition at line 961 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_DUMMY_CYCLES
| #define IS_QSPI_CONC_XIP_DUMMY_CYCLES |
( |
|
__DCY__ | ) |
( (__DCY__) <= 31) |
Check if QSPI.XIP dummy cycles is valid.
- Parameters
-
| <strong>DCY</strong> | QSPI.XIPdummy cycles. |
- Return values
-
| SET | (DCY is valid) or RESET (DCY is invalid) |
Definition at line 1041 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_ENDIAN_MODE
| #define IS_QSPI_CONC_XIP_ENDIAN_MODE |
( |
|
_MODE_ | ) |
|
Value:
Check if QSPI.XIP Data endian Mode is valid.
- Parameters
-
| <em>MODE</em> | QSPI.XIP Data endian Mode. |
- Return values
-
| SET | (MODE is valid) or RESET (MODE is invalid) |
Definition at line 1074 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_INST
| #define IS_QSPI_CONC_XIP_INST |
( |
|
_INST_ | ) |
((_INST_) <= 0xFFFF ) |
Check if QSPI.XIP inst is valid.
- Parameters
-
| <em>INST</em> | QSPI.XIP inst. |
- Return values
-
| SET | (INST is valid) or RESET (INST is invalid) |
Definition at line 984 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_INST_EN
| #define IS_QSPI_CONC_XIP_INST_EN |
( |
|
_INST_EN_ | ) |
|
Value:
Check if QSPI.XIP inst Switch is valid.
- Parameters
-
| <em>INST_EN</em> | QSPI.XIP inst en/dis. |
- Return values
-
| SET | (INST_EN is valid) or RESET (INST_EN is invalid) |
Definition at line 968 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_INST_SIZE
| #define IS_QSPI_CONC_XIP_INST_SIZE |
( |
|
_INST_SIZE_ | ) |
|
Value:
Check if QSPI.XIP inst size is valid.
- Parameters
-
| <em>INST_SIZE</em> | QSPI.XIP inst size. |
- Return values
-
| SET | (INST_SIZE is valid) or RESET (INST_SIZE is invalid) |
Definition at line 975 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_MODE_BITS
| #define IS_QSPI_CONC_XIP_MODE_BITS |
( |
|
_MD_BITS_ | ) |
( (_MD_BITS_) <= 0xFFFF) |
Check if QSPI.XIP Mode Bits is valid.
- Parameters
-
| <em>MD_BITS</em> | QSPI.XIP Mode Bits. |
- Return values
-
| SET | (MD_BITS is valid) or RESET (MD_BITS is invalid) |
Definition at line 1035 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_MODE_BITS_EN
| #define IS_QSPI_CONC_XIP_MODE_BITS_EN |
( |
|
_MD_EN_ | ) |
|
Value:
Check if QSPI.XIP Mode bits Switch is valid.
- Parameters
-
| <em>MD_EN</em> | QSPI.XIP Mode bits Switch. |
- Return values
-
| SET | (MD_EN is valid) or RESET (MD_EN is invalid) |
Definition at line 1019 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_MODE_BITS_SIZE
| #define IS_QSPI_CONC_XIP_MODE_BITS_SIZE |
( |
|
_MD_SIZE_ | ) |
|
Value:
Check if QSPI.XIP Mode Bits size is valid.
- Parameters
-
| <em>MD_SIZE</em> | QSPI.XIP Mode Bits size. |
- Return values
-
| SET | (MD_SIZE is valid) or RESET (MD_SIZE is invalid) |
Definition at line 1026 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_PREFETCH_EN
| #define IS_QSPI_CONC_XIP_PREFETCH_EN |
( |
|
_PREFETCH_EN_ | ) |
|
Value:
Check if QSPI.XIP prefetch switch is valid.
- Parameters
-
| <em>PREFETCH_EN</em> | QSPI.XIP prefetch switch. |
- Return values
-
| SET | (PREFETCH_EN is valid) or RESET (PREFETCH_EN is invalid) |
Definition at line 1054 of file gr55xx_hal_qspi.h.
◆ IS_QSPI_CONC_XIP_SIOO_MODE
| #define IS_QSPI_CONC_XIP_SIOO_MODE |
( |
|
_SIOO_ | ) |
|
Value:
Check if QSPI.XIP SIOO Mode is valid.
- Parameters
-
| <em>SIOO</em> | QSPI.XIP Data Mode. |
- Return values
-
| SET | (SIOO is valid) or RESET (SIOO is invalid) |
Definition at line 946 of file gr55xx_hal_qspi.h.
#define QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPI
Instruction and address are sent in SPI mode.
#define QSPI_CONCURRENT_XIP_MBL_2
mode bits length equals to 2 bit.
#define QSPI_CONCURRENT_XIP_INST_SENT_ONLY_FIRST_ACCESS
#define QSPI_CONCURRENT_XIP_DFS_HARDCODE_ENABLE
Enable DFS Hardcode.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_4BIT
Address length for QSPI XIP transfer: 4 bits.
#define QSPI_CONCURRENT_XIP_INST_ENABLE
Enable Instruction phase.
#define QSPI_CONCURRENT_XIP_MBL_16
mode bits length equals to 16 bit.
#define QSPI_CONCURRENT_XIP_MODE_BITS_DISABLE
Disable Bits phase.
#define QSPI_CONCURRENT_XIP_CONT_XFER_DISABLE
Disable Cont trasfer.
#define QSPI_CONCURRENT_XIP_PREFETCH_ENABLE
Enable Prefetch.
#define QSPI_CONCURRENT_XIP_DFS_BYTE
Set data frame size as byte.
#define QSPI_CONCURRENT_XIP_DFS_HALFWORD
Set data frame size as halfword.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_60BIT
Address length for QSPI XIP transfer: 60 bits.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_36BIT
Address length for QSPI XIP transfer: 36 bits.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_0BIT
Address length for QSPI XIP transfer: 0 bits.
#define QSPI_CONCURRENT_XIP_INST_DISABLE
Disable Instruction phase.
#define QSPI_CONCURRENT_XIP_ENDIAN_MODE_1
Re-order the read data as [23:16], [31:24], [7:0], [15:8].
#define QSPI_CONCURRENT_XIP_MBL_4
mode bits length equals to 4 bit.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_24BIT
Address length for QSPI XIP transfer: 24 bits.
#define QSPI_CONCURRENT_XIP_DFS_WORD
Set data frame size as word.
#define QSPI_CONCURRENT_XIP_INSTSIZE_4BIT
instruction size equals 4bits
#define QSPI_CONCURRENT_XIP_FRF_QUAD_SPI
SPI Frame format : QUAD.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_32BIT
Address length for QSPI XIP transfer: 32 bits.
#define QSPI_CONCURRENT_XIP_CONT_XFER_ENABLE
Enable Cont trasfer.
#define QSPI_CONCURRENT_XIP_MODE_BITS_ENABLE
Enable Bits phase.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_12BIT
Address length for QSPI XIP transfer: 12 bits.
#define QSPI_CONCURRENT_XIP_INST_IN_SPI_ADDR_IN_SPIFRF
Instruction is in sent in SPI mode and address is sent in Daul/Quad SPI mode.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_44BIT
Address length for QSPI XIP transfer: 44 bits.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_8BIT
Address length for QSPI XIP transfer: 8 bits.
#define QSPI_CONCURRENT_XIP_INST_SENT_EVERY_ACCESS
#define QSPI_CONCURRENT_XIP_MBL_8
mode bits length equals to 8 bit.
#define QSPI_CONCURRENT_XIP_ENDIAN_MODE_0
Default endian order from AHB.
#define QSPI_CONCURRENT_XIP_FRF_DUAL_SPI
SPI Frame format : DUAL.
#define QSPI_CONCURRENT_XIP_INSTSIZE_8BIT
instruction size equals 8bits
#define QSPI_CONCURRENT_XIP_INSTSIZE_16BIT
instruction size equals 16bits
#define QSPI_CONCURRENT_XIP_INSTSIZE_0BIT
no instruction
#define QSPI_CONCURRENT_XIP_ADDRSIZE_28BIT
Address length for QSPI XIP transfer: 28 bits.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_52BIT
Address length for QSPI XIP transfer: 52 bits.
#define QSPI_CONCURRENT_XIP_PREFETCH_DISABLE
Disable Prefetch.
#define QSPI_CONCURRENT_XIP_DFS_HARDCODE_DISABLE
Disable DFS Hardcode.
#define QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPIFRF
Instruction and address are sent in Daul/Quad SPI mode.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_48BIT
Address length for QSPI XIP transfer: 48 bits.
#define QSPI_CONCURRENT_XIP_ENDIAN_MODE_2
Re-order the read data as [7:0], [15:8], [23:16], [31:24].
#define QSPI_CONCURRENT_XIP_ADDRSIZE_56BIT
Address length for QSPI XIP transfer: 56 bits.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_40BIT
Address length for QSPI XIP transfer: 40 bits.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_16BIT
Address length for QSPI XIP transfer: 16 bits.
#define QSPI_CONCURRENT_XIP_ADDRSIZE_20BIT
Address length for QSPI XIP transfer: 20 bits.