Header file containing functions prototypes of SPI LL library. More...
#include "gr55xx.h"
Include dependency graph for gr55xx_ll_spi.h: This graph shows which files directly or indirectly include this file:Go to the source code of this file.
Classes | |
| struct | _ll_spim_init_t |
| LL SPIM init structures definition. More... | |
| struct | _ll_spis_init_t |
| SPIS init structures definition. More... | |
Macros | |
| #define | LL_SPI_SR_DCOL SPI_STAT_DATA_COLN_ERR |
| Data collision error flag More... | |
| #define | LL_SPI_SR_TXE SPI_STAT_TX_ERR |
| Transmission error flag More... | |
| #define | LL_SPI_SR_RFF SPI_STAT_RX_FIFO_FULL |
| Rx FIFO full flag More... | |
| #define | LL_SPI_SR_RFNE SPI_STAT_RX_FIFO_NE |
| Rx FIFO not empty flag More... | |
| #define | LL_SPI_SR_TFE SPI_STAT_TX_FIFO_EMPTY |
| Tx FIFO empty flag More... | |
| #define | LL_SPI_SR_TFNF SPI_STAT_TX_FIFO_NF |
| Tx FIFO not full flag More... | |
| #define | LL_SPI_SR_BUSY SPI_STAT_SSI_BUSY |
| Busy flag More... | |
| #define | LL_SPI_IM_MST SPI_INT_MASK_MULTI_M_CIM |
| Multi-Master Contention Interrupt enable More... | |
| #define | LL_SPI_IM_RXF SPI_INT_MASK_RX_FIFO_FIM |
| Receive FIFO Full Interrupt enable More... | |
| #define | LL_SPI_IM_RXO SPI_INT_MASK_RX_FIFO_OIM |
| Receive FIFO Overflow Interrupt enable More... | |
| #define | LL_SPI_IM_RXU SPI_INT_MASK_RX_FIFO_UIM |
| Receive FIFO Underflow Interrupt enable More... | |
| #define | LL_SPI_IM_TXO SPI_INT_MASK_TX_FIFO_OIM |
| Transmit FIFO Overflow Interrupt enable More... | |
| #define | LL_SPI_IM_TXE SPI_INT_MASK_TX_FIFO_EIM |
| Transmit FIFO Empty Interrupt enable More... | |
| #define | LL_SPI_IS_MST SPI_INT_STAT_MULTI_M_CIS |
| Multi-Master Contention Interrupt flag More... | |
| #define | LL_SPI_IS_RXF SPI_INT_STAT_RX_FIFO_FIS |
| Receive FIFO Full Interrupt flag More... | |
| #define | LL_SPI_IS_RXO SPI_INT_STAT_RX_FIFO_OIS |
| Receive FIFO Overflow Interrupt flag More... | |
| #define | LL_SPI_IS_RXU SPI_INT_STAT_RX_FIFO_UIS |
| Receive FIFO Underflow Interrupt flag More... | |
| #define | LL_SPI_IS_TXO SPI_INT_STAT_TX_FIFO_OIS |
| Transmit FIFO Overflow Interrupt flag More... | |
| #define | LL_SPI_IS_TXE SPI_INT_STAT_TX_FIFO_EIS |
| Transmit FIFO Empty Interrupt flag More... | |
| #define | LL_SPI_RIS_MST SPI_RAW_INT_STAT_MULTI_M_CRIS |
| Multi-Master Contention RAW Interrupt flag. More... | |
| #define | LL_SPI_RIS_RXF SPI_RAW_INT_STAT_RX_FIFO_FRIS |
| Receive FIFO Full RAW Interrupt flag More... | |
| #define | LL_SPI_RIS_RXO SPI_RAW_INT_STAT_RX_FIFO_ORIS |
| Receive FIFO Overflow RAW Interrupt flag More... | |
| #define | LL_SPI_RIS_RXU SPI_RAW_INT_STAT_RX_FIFO_URIS |
| Receive FIFO Underflow RAW Interrupt flag. More... | |
| #define | LL_SPI_RIS_TXO SPI_RAW_INT_STAT_TX_FIFO_ORIS |
| Transmit FIFO Overflow RAW Interrupt flag. More... | |
| #define | LL_SPI_RIS_TXE SPI_RAW_INT_STAT_TX_FIFO_ERIS |
| Transmit FIFO Empty RAW Interrupt flag More... | |
| #define | LL_SPI_DATASIZE_4BIT (3UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 4 bits. More... | |
| #define | LL_SPI_DATASIZE_5BIT (4UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 5 bits. More... | |
| #define | LL_SPI_DATASIZE_6BIT (5UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 6 bits. More... | |
| #define | LL_SPI_DATASIZE_7BIT (6UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 7 bits. More... | |
| #define | LL_SPI_DATASIZE_8BIT (7UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 8 bits. More... | |
| #define | LL_SPI_DATASIZE_9BIT (8UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 9 bits. More... | |
| #define | LL_SPI_DATASIZE_10BIT (9UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 10 bits. More... | |
| #define | LL_SPI_DATASIZE_11BIT (10UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 11 bits. More... | |
| #define | LL_SPI_DATASIZE_12BIT (11UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 12 bits. More... | |
| #define | LL_SPI_DATASIZE_13BIT (12UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 13 bits. More... | |
| #define | LL_SPI_DATASIZE_14BIT (13UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 14 bits. More... | |
| #define | LL_SPI_DATASIZE_15BIT (14UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 15 bits. More... | |
| #define | LL_SPI_DATASIZE_16BIT (15UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 16 bits. More... | |
| #define | LL_SPI_DATASIZE_17BIT (16UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 17 bits. More... | |
| #define | LL_SPI_DATASIZE_18BIT (17UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 18 bits. More... | |
| #define | LL_SPI_DATASIZE_19BIT (18UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 19 bits. More... | |
| #define | LL_SPI_DATASIZE_20BIT (19UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 20 bits. More... | |
| #define | LL_SPI_DATASIZE_21BIT (20UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 21 bits. More... | |
| #define | LL_SPI_DATASIZE_22BIT (21UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 22 bits. More... | |
| #define | LL_SPI_DATASIZE_23BIT (22UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 23 bits. More... | |
| #define | LL_SPI_DATASIZE_24BIT (23UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 24 bits. More... | |
| #define | LL_SPI_DATASIZE_25BIT (24UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 25 bits. More... | |
| #define | LL_SPI_DATASIZE_26BIT (25UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 26 bits. More... | |
| #define | LL_SPI_DATASIZE_27BIT (26UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 27 bits. More... | |
| #define | LL_SPI_DATASIZE_28BIT (27UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 28 bits. More... | |
| #define | LL_SPI_DATASIZE_29BIT (28UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 29 bits. More... | |
| #define | LL_SPI_DATASIZE_30BIT (29UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 30 bits. More... | |
| #define | LL_SPI_DATASIZE_31BIT (30UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 31 bits. More... | |
| #define | LL_SPI_DATASIZE_32BIT (31UL << SPI_CTRL0_DATA_FRAME_SIZE_POS) |
| Data length for SPI transfer: 32 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_1BIT 0x00000000UL |
| CMD length for Microwire transfer: 1 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_2BIT (1UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 2 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_3BIT (2UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 3 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_4BIT (3UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 4 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_5BIT (4UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 5 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_6BIT (5UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 6 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_7BIT (6UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 7 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_8BIT (7UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 8 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_9BIT (8UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 9 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_10BIT (9UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 10 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_11BIT (10UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 11 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_12BIT (11UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 12 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_13BIT (12UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 13 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_14BIT (13UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 14 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_15BIT (14UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 15 bits. More... | |
| #define | LL_SPI_MW_CMDSIZE_16BIT (15UL << SPI_CTRL0_CTRL_FRAME_SIZE_POS) |
| CMD length for Microwire transfer: 16 bits. More... | |
| #define | LL_SPI_NORMAL_MODE 0x00000000UL |
| Normal mode for SPI transfer More... | |
| #define | LL_SPI_TEST_MODE (1UL << SPI_CTRL0_SHIFT_REG_LOOP_POS) |
| Test mode for SPI transfer: Rx and Tx connected inside. More... | |
| #define | LL_SPI_SLAVE_OUTDIS 0x00000000UL |
| Output enable for SPI transfer as slave More... | |
| #define | LL_SPI_SLAVE_OUTEN (1UL << SPI_CTRL0_S_OUT_EN_POS) |
| Output disable for SPI transfer as slave More... | |
| #define | LL_SPI_FULL_DUPLEX 0x00000000UL |
| Full-Duplex mode. More... | |
| #define | LL_SPI_SIMPLEX_TX (1UL << SPI_CTRL0_XFE_MODE_POS) |
| Simplex Tx mode. More... | |
| #define | LL_SPI_SIMPLEX_RX (2UL << SPI_CTRL0_XFE_MODE_POS) |
| Simplex Rx mode. More... | |
| #define | LL_SPI_READ_EEPROM (3UL << SPI_CTRL0_XFE_MODE_POS) |
| Read EEPROM mode. More... | |
| #define | LL_SPI_SCPHA_1EDGE 0x00000000UL |
| First clock transition is the first data capture edge More... | |
| #define | LL_SPI_SCPHA_2EDGE (1UL << SPI_CTRL0_SERIAL_CLK_PHASE_POS) |
| Second clock transition is the first data capture edge. More... | |
| #define | LL_SPI_SCPOL_LOW 0x00000000UL |
| Clock to 0 when idle. More... | |
| #define | LL_SPI_SCPOL_HIGH (1UL << SPI_CTRL0_SERIAL_CLK_POL_POS) |
| Clock to 1 when idle. More... | |
| #define | LL_SPI_PROTOCOL_MOTOROLA 0x00000000UL |
| Motorola mode. More... | |
| #define | LL_SPI_PROTOCOL_TI (1UL << SPI_CTRL0_FRAME_FORMAT_POS) |
| TI mode More... | |
| #define | LL_SPI_PROTOCOL_MICROWIRE (2UL << SPI_CTRL0_FRAME_FORMAT_POS) |
| Microwire mode More... | |
| #define | LL_SPI_MICROWIRE_HANDSHAKE_DIS 0x00000000UL |
| Enable Handshake for Microwire transfer More... | |
| #define | LL_SPI_MICROWIRE_HANDSHAKE_EN (1UL << SPI_MW_CTRL_MW_HSG_POS) |
| Disable Handshake for Microwire transfer. More... | |
| #define | LL_SPI_MICROWIRE_RX 0x00000000UL |
| Rx mode. More... | |
| #define | LL_SPI_MICROWIRE_TX (1UL << SPI_MW_CTRL_MW_DIR_DW_POS) |
| Tx mode. More... | |
| #define | LL_SPI_MICROWIRE_NON_SEQUENTIAL 0x00000000UL |
| Non-sequential for Microwire transfer More... | |
| #define | LL_SPI_MICROWIRE_SEQUENTIAL (1UL << SPI_MW_CTRL_MW_XFE_MODE_POS) |
| Sequential for Microwire transfer More... | |
| #define | LL_SPI_SLAVE1 SPI_SLA_S1_SEL_EN |
| Enable slave1 select pin for SPI transfer More... | |
| #define | LL_SPI_SLAVE0 SPI_SLA_S0_SEL_EN |
| Enable slave0 select pin for SPI transfer More... | |
| #define | LL_SPI_DMA_TX_DIS 0x00000000UL |
| Disable the transmit FIFO DMA channel. More... | |
| #define | LL_SPI_DMA_TX_EN SPI_DMA_CTRL_TX_DMA_EN |
| Enable the transmit FIFO DMA channel More... | |
| #define | LL_SPI_DMA_RX_DIS 0x00000000UL |
| Disable the receive FIFO DMA channel. More... | |
| #define | LL_SPI_DMA_RX_EN SPI_DMA_CTRL_RX_DMA_EN |
| Enable the receive FIFO DMA channel More... | |
| #define | LL_SPI_M_FIFO_DEPTH (16u) |
| FIFO Depth for SPI Master. More... | |
| #define | LL_SPI_S_FIFO_DEPTH (16u) |
| FIFO Depth for SPI Slave More... | |
| #define | LL_SPIM_DEFAULT_CONFIG |
| LL SPIM InitStrcut default configuartion. More... | |
| #define | LL_SPIS_DEFAULT_CONFIG |
| LL SPIS InitStrcut default configuartion. More... | |
| #define | LL_SPI_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG(__instance__->__REG__, (__VALUE__)) |
| Write a value in SPI register. More... | |
| #define | LL_SPI_ReadReg(__instance__, __REG__) READ_REG(__instance__->__REG__) |
| Read a value in SPI register. More... | |
Typedefs | |
| typedef struct _ll_spim_init_t | ll_spim_init_t |
| LL SPIM init structures definition. More... | |
| typedef struct _ll_spis_init_t | ll_spis_init_t |
| SPIS init structures definition. More... | |
Functions | |
| __STATIC_INLINE void | ll_spi_enable_ss_toggle (spi_regs_t *SPIx) |
| Enable slave select toggle. More... | |
| __STATIC_INLINE void | ll_spi_disable_ss_toggle (spi_regs_t *SPIx) |
| Disable slave select toggle. More... | |
| __STATIC_INLINE uint32_t | ll_spi_is_enabled_ss_toggle (spi_regs_t *SPIx) |
| Check if slave select toggle is enabled. More... | |
| __STATIC_INLINE void | ll_spi_set_data_size (spi_regs_t *SPIx, uint32_t size) |
| Set frame data size. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_data_size (spi_regs_t *SPIx) |
| Get frame data size. More... | |
| __STATIC_INLINE void | ll_spi_set_control_frame_size (spi_regs_t *SPIx, uint32_t size) |
| Set the length of the control word for the Microwire frame format. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_control_frame_size (spi_regs_t *SPIx) |
| Get the length of the control word for the Microwire frame format. More... | |
| __STATIC_INLINE void | ll_spi_enable_test_mode (spi_regs_t *SPIx) |
| Enable SPI test mode. More... | |
| __STATIC_INLINE void | ll_spi_disable_test_mode (spi_regs_t *SPIx) |
| Disable SPI test mode. More... | |
| __STATIC_INLINE uint32_t | ll_spi_is_enabled_test_mode (spi_regs_t *SPIx) |
| Check if SPI test mode is enabled. More... | |
| __STATIC_INLINE void | ll_spi_enable_slave_out (spi_regs_t *SPIx) |
| Enable slave output. More... | |
| __STATIC_INLINE void | ll_spi_disable_salve_out (spi_regs_t *SPIx) |
| Disable slave output. More... | |
| __STATIC_INLINE uint32_t | ll_spi_is_enabled_slave_out (spi_regs_t *SPIx) |
| Check if slave output is enabled. More... | |
| __STATIC_INLINE void | ll_spi_set_transfer_direction (spi_regs_t *SPIx, uint32_t transfer_direction) |
| Set transfer direction mode. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_transfer_direction (spi_regs_t *SPIx) |
| Get transfer direction mode. More... | |
| __STATIC_INLINE void | ll_spi_set_clock_polarity (spi_regs_t *SPIx, uint32_t clock_polarity) |
| Set clock polarity. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_clock_polarity (spi_regs_t *SPIx) |
| Get clock polarity. More... | |
| __STATIC_INLINE void | ll_spi_set_clock_phase (spi_regs_t *SPIx, uint32_t clock_phase) |
| Set clock phase. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_clock_phase (spi_regs_t *SPIx) |
| Get clock phase. More... | |
| __STATIC_INLINE void | ll_spi_set_standard (spi_regs_t *SPIx, uint32_t standard) |
| Set serial protocol used. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_standard (spi_regs_t *SPIx) |
| Get serial protocol used. More... | |
| __STATIC_INLINE void | ll_spi_set_receive_size (spi_regs_t *SPIx, uint32_t size) |
| Set the number of data frames to be continuously received. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_receive_size (spi_regs_t *SPIx) |
| Get the number of data frames to be continuously received. More... | |
| __STATIC_INLINE void | ll_spi_enable (spi_regs_t *SPIx) |
| Enable SPI peripheral. More... | |
| __STATIC_INLINE void | ll_spi_disable (spi_regs_t *SPIx) |
| Disable SPI peripheral. More... | |
| __STATIC_INLINE uint32_t | ll_spi_is_enabled (spi_regs_t *SPIx) |
| Check if SPI peripheral is enabled. More... | |
| __STATIC_INLINE void | ll_spi_enable_micro_handshake (spi_regs_t *SPIx) |
| Enable Handshake in Microwire mode. More... | |
| __STATIC_INLINE void | ll_spi_disable_micro_handshake (spi_regs_t *SPIx) |
| Disable Handshake in Microwire mode. More... | |
| __STATIC_INLINE uint32_t | ll_spi_is_enabled_micro_handshake (spi_regs_t *SPIx) |
| Check if Handshake in Microwire mode is enabled. More... | |
| __STATIC_INLINE void | ll_spi_set_micro_transfer_direction (spi_regs_t *SPIx, uint32_t transfer_direction) |
| Set transfer direction mode in Microwire mode. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_micro_transfer_direction (spi_regs_t *SPIx) |
| Get transfer direction mode in Microwire mode. More... | |
| __STATIC_INLINE void | ll_spi_set_micro_transfer_mode (spi_regs_t *SPIx, uint32_t transfer_mode) |
| Set transfer mode in Microwire mode. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_micro_transfer_mode (spi_regs_t *SPIx) |
| Get transfer mode in Microwire mode. More... | |
| __STATIC_INLINE void | ll_spi_enable_ss (spi_regs_t *SPIx, uint32_t ss) |
| Enable slave select. More... | |
| __STATIC_INLINE void | ll_spi_disable_ss (spi_regs_t *SPIx, uint32_t ss) |
| Disable slave select. More... | |
| __STATIC_INLINE uint32_t | ll_spi_is_enabled_ss (spi_regs_t *SPIx, uint32_t ss) |
| Check if slave select is enabled. More... | |
| __STATIC_INLINE void | ll_spi_set_baud_rate_prescaler (spi_regs_t *SPIx, uint32_t baud_rate) |
| Set baud rate prescaler. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_baud_rate_prescaler (spi_regs_t *SPIx) |
| Get baud rate prescaler. More... | |
| __STATIC_INLINE void | ll_spi_set_tx_fifo_threshold (spi_regs_t *SPIx, uint32_t threshold) |
| Set threshold of TXFIFO that triggers an TXE event. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_tx_fifo_threshold (spi_regs_t *SPIx) |
| Get threshold of TXFIFO that triggers an TXE event. More... | |
| __STATIC_INLINE void | ll_spi_set_rx_fifo_threshold (spi_regs_t *SPIx, uint32_t threshold) |
| Set threshold of RXFIFO that triggers an RXNE event. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_rx_fifo_threshold (spi_regs_t *SPIx) |
| Get threshold of RXFIFO that triggers an RXNE event. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_tx_fifo_level (spi_regs_t *SPIx) |
| Get FIFO Transmission Level. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_rx_fifo_level (spi_regs_t *SPIx) |
| Get FIFO reception Level. More... | |
| __STATIC_INLINE void | ll_spi_enable_it (spi_regs_t *SPIx, uint32_t mask) |
| Enable interrupt. More... | |
| __STATIC_INLINE void | ll_spi_disable_it (spi_regs_t *SPIx, uint32_t mask) |
| Disable interrupt. More... | |
| __STATIC_INLINE uint32_t | ll_spi_is_enabled_it (spi_regs_t *SPIx, uint32_t mask) |
| Check if interrupt is enabled. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_status (spi_regs_t *SPIx) |
| Get SPI status. More... | |
| __STATIC_INLINE uint32_t | ll_spi_is_active_flag (spi_regs_t *SPIx, uint32_t flag) |
| Check active flag. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_it_flag (spi_regs_t *SPIx) |
| Get SPI interrupt flags. More... | |
| __STATIC_INLINE uint32_t | ll_spi_is_it_flag (spi_regs_t *SPIx, uint32_t flag) |
| Check interrupt flag. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_raw_if_flag (spi_regs_t *SPIx) |
| Get SPI raw interrupt flags. More... | |
| __STATIC_INLINE void | ll_spi_clear_flag_txo (spi_regs_t *SPIx) |
| Clear transmit FIFO overflow error flag. More... | |
| __STATIC_INLINE void | ll_spi_clear_flag_rxo (spi_regs_t *SPIx) |
| Clear receive FIFO overflow error flag. More... | |
| __STATIC_INLINE void | ll_spi_clear_flag_rxu (spi_regs_t *SPIx) |
| Clear receive FIFO underflow error flag. More... | |
| __STATIC_INLINE void | ll_spi_clear_flag_mst (spi_regs_t *SPIx) |
| Clear multi-master error flag. More... | |
| __STATIC_INLINE void | ll_spi_clear_flag_all (spi_regs_t *SPIx) |
| Clear all error flag. More... | |
| __STATIC_INLINE void | ll_spi_enable_dma_req_tx (spi_regs_t *SPIx) |
| Enable DMA Tx. More... | |
| __STATIC_INLINE void | ll_spi_disable_dma_req_tx (spi_regs_t *SPIx) |
| Disable DMA Tx. More... | |
| __STATIC_INLINE uint32_t | ll_spi_is_enabled_dma_req_tx (spi_regs_t *SPIx) |
| Check if DMA Tx is enabled. More... | |
| __STATIC_INLINE void | ll_spi_enable_dma_req_rx (spi_regs_t *SPIx) |
| Enable DMA Rx. More... | |
| __STATIC_INLINE void | ll_spi_disable_dma_req_rx (spi_regs_t *SPIx) |
| Disable DMA Rx. More... | |
| __STATIC_INLINE uint32_t | ll_spi_is_enabled_dma_req_rx (spi_regs_t *SPIx) |
| Check if DMA Rx is enabled. More... | |
| __STATIC_INLINE void | ll_spi_set_dma_tx_fifo_threshold (spi_regs_t *SPIx, uint32_t threshold) |
| Set threshold of TXFIFO that triggers an DMA Tx request event. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_dma_tx_fifo_threshold (spi_regs_t *SPIx) |
| Get threshold of TXFIFO that triggers an DMA Tx request event. More... | |
| __STATIC_INLINE void | ll_spi_set_dma_rx_fifo_threshold (spi_regs_t *SPIx, uint32_t threshold) |
| Set threshold of RXFIFO that triggers an DMA Rx request event. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_dma_rx_fifo_threshold (spi_regs_t *SPIx) |
| Get threshold of RXFIFO that triggers an DMA Rx request event. More... | |
| __STATIC_INLINE void | ll_spi_transmit_data8 (spi_regs_t *SPIx, uint8_t tx_data) |
| Write 8-Bits in the data register. More... | |
| __STATIC_INLINE void | ll_spi_transmit_data16 (spi_regs_t *SPIx, uint16_t tx_data) |
| Write 16-Bits in the data register. More... | |
| __STATIC_INLINE void | ll_spi_transmit_data32 (spi_regs_t *SPIx, uint32_t tx_data) |
| Write 32-Bits in the data register. More... | |
| __STATIC_INLINE uint8_t | ll_spi_receive_data8 (spi_regs_t *SPIx) |
| Read 8-Bits in the data register. More... | |
| __STATIC_INLINE uint16_t | ll_spi_receive_data16 (spi_regs_t *SPIx) |
| Read 16-Bits in the data register. More... | |
| __STATIC_INLINE uint32_t | ll_spi_receive_data32 (spi_regs_t *SPIx) |
| Read 32-Bits in the data register. More... | |
| __STATIC_INLINE void | ll_spi_set_rx_sample_delay (spi_regs_t *SPIx, uint32_t delay) |
| Set Rx sample delay. More... | |
| __STATIC_INLINE uint32_t | ll_spi_get_rx_sample_delay (spi_regs_t *SPIx) |
| Get Rx sample delay. More... | |
| error_status_t | ll_spim_deinit (spi_regs_t *SPIx) |
| De-initialize SSI registers (Registers restored to their default values). More... | |
| error_status_t | ll_spim_init (spi_regs_t *SPIx, ll_spim_init_t *p_spi_init) |
| Initialize SPIM registers according to the specified parameters in p_spi_init. More... | |
| void | ll_spim_struct_init (ll_spim_init_t *p_spi_init) |
| Set each field of a ll_spim_init_t type structure to default value. More... | |
| error_status_t | ll_spis_deinit (spi_regs_t *SPIx) |
| De-initialize SSI registers (Registers restored to their default values). More... | |
| error_status_t | ll_spis_init (spi_regs_t *SPIx, ll_spis_init_t *p_spi_init) |
| Initialize SSI registers according to the specified parameters in p_spi_init. More... | |
| void | ll_spis_struct_init (ll_spis_init_t *p_spi_init) |
| Set each field of a ll_spis_init_t type structure to default value. More... | |
Header file containing functions prototypes of SPI LL library.
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Definition in file gr55xx_ll_spi.h.