Define access type for DC.
| Enumerator | |
|---|---|
| GDC_ACCESS_TYPE_SYNC | SYNC access type |
| GDC_ACCESS_TYPE_ASYNC | ASYNC access type |
Definition at line 236 of file app_graphics_dc.h.
Define the bits of address phase for DC Frame.
Definition at line 226 of file app_graphics_dc.h.
Define frame output result for DC.
Definition at line 245 of file app_graphics_dc.h.
Define the Output Frame Timing for DC.
Definition at line 215 of file app_graphics_dc.h.
Define Clock Frequency for DC.
| Enumerator | |
|---|---|
| GDC_CLOCK_FREQ_48MHz | DC clock, 48MHz |
| GDC_CLOCK_FREQ_24MHz | DC clock, 24MHz |
| GDC_CLOCK_FREQ_12MHz | DC clock, 12MHz |
| GDC_CLOCK_FREQ_6MHz | DC clock, 6MHz |
| GDC_CLOCK_FREQ_3MHz | DC clock, 3MHz |
Definition at line 82 of file app_graphics_dc.h.
Define Clock Mode for DC.
| Enumerator | |
|---|---|
| GDC_CLOCK_MODE_0 | DC clock mode 0 |
| GDC_CLOCK_MODE_1 | DC clock mode 1 |
| GDC_CLOCK_MODE_2 | DC clock mode 2 |
| GDC_CLOCK_MODE_3 | DC clock mode 3 |
Definition at line 94 of file app_graphics_dc.h.
Define the data format for frame buffer of DC.
Definition at line 174 of file app_graphics_dc.h.
Define work layers for DC.
| Enumerator | |
|---|---|
| GDC_ONE_LAYER_MODE | 1 layer mode |
| GDC_TWO_LAYER_MODE | 2 layer mode |
Definition at line 165 of file app_graphics_dc.h.
Define the Output MIPI Timing for DATA Phase of DC Timing of MIPICFG_2RGB888_OPT1 is True MIPICFG_2RGB888_OPT0, and Timing of MIPICFG_2RGB888_OPT0 is True MIPICFG_2RGB888_OPT1, They need to exchange !!!
Definition at line 192 of file app_graphics_dc.h.
| enum graphics_dc_mspi_e |
Define SPI work Mode for DC.
| Enumerator | |
|---|---|
| GDC_MODE_SPI | By 1-wire SPI |
| GDC_MODE_DSPI | 1bit cmd + 8bit data, and DCX signal |
| GDC_MODE_QSPI | By Quad SPI |
Definition at line 72 of file app_graphics_dc.h.
Define the Output pixel bits for DC.
| Enumerator | |
|---|---|
| GDC_OUT_PIXEL_BITS_16 | Output pixel 16 bits |
| GDC_OUT_PIXEL_BITS_24 | Output pixel 24 bits |
| GDC_OUT_PIXEL_BITS_NOT_SUPPORT | Not support |
Definition at line 206 of file app_graphics_dc.h.
Display Controller Power Mode Enumerations definition.
| Enumerator | |
|---|---|
| GDC_POWER_STATE_SLEEP | |
| GDC_POWER_STATE_ACTIVE | |
Definition at line 116 of file app_graphics_dc.h.
Define Delay Clock for DC Tcsu.
| Enumerator | |
|---|---|
| GDC_TCSU_CYCLE_0 | delay 0 clock cycle |
| GDC_TCSU_CYCLE_1 | delay 1 clock cycle |
| GDC_TCSU_CYCLE_2 | delay 2 clock cycle |
| GDC_TCSU_CYCLE_3 | delay 3 clock cycle |
| GDC_TCSU_CYCLE_4 | delay 4 clock cycle |
Definition at line 105 of file app_graphics_dc.h.