gr55xx_hal_spi.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_hal_spi.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of SPI HAL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup HAL_DRIVER HAL Driver
43 * @{
44 */
45
46 /** @defgroup HAL_SPI SPI
47 * @brief SPI HAL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55xx_HAL_SPI_H__
53 #define __GR55xx_HAL_SPI_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx_ll_spi.h"
61 #include "gr55xx_hal_def.h"
62
63 /* Exported types ------------------------------------------------------------*/
64 /** @addtogroup HAL_SPI_ENUMERATIONS Enumerations
65 * @{
66 */
67
68 /** @defgroup HAL_SPI_state HAL SPI state
69 * @{
70 */
71
72 /**
73 * @brief HAL SPI State Enumerations definition
74 */
75 typedef enum
76 {
77 HAL_SPI_STATE_RESET = 0x00, /**< Peripheral not initialized. */
78 HAL_SPI_STATE_READY = 0x01, /**< Peripheral initialized and ready for use. */
79 HAL_SPI_STATE_BUSY = 0x02, /**< An internal process is ongoing. */
80 HAL_SPI_STATE_BUSY_TX = 0x12, /**< Data Transmission process is ongoing. */
81 HAL_SPI_STATE_BUSY_RX = 0x22, /**< Data Reception process is ongoing. */
82 HAL_SPI_STATE_BUSY_TX_RX = 0x32, /**< Data Transmission and Reception process is ongoing. */
83 HAL_SPI_STATE_ABORT = 0x08, /**< Peripheral with abort request ongoing. */
84 HAL_SPI_STATE_ERROR = 0x04 /**< Peripheral in error. */
85
86 } hal_spi_state_t;
87
88 /** @} */
89
90 /** @} */
91
92 /** @addtogroup HAL_SPI_STRUCTURES Structures
93 * @{
94 */
95
96 /** @defgroup SPI_Configuration SPI Configuration
97 * @{
98 */
99
100 /**
101 * @brief SPI init Structure definition
102 */
103 typedef struct _spi_init
104 {
105 uint32_t data_size; /**< Specifies the SPI data size.
106 This parameter can be a value of @ref SPI_Data_Size. */
107
108 uint32_t clock_polarity; /**< Specifies the serial clock steady state.
109 This parameter can be a value of @ref SPI_Clock_Polarity. */
110
111 uint32_t clock_phase; /**< Specifies the clock active edge for the bit capture.
112 This parameter can be a value of @ref SPI_Clock_Phase. */
113
114 uint32_t baudrate_prescaler; /**< Specifies the BaudRate prescaler value which will be
115 used to configure the transmit and receive SCK clock.
116 @note The communication clock is derived from the master
117 clock. The slave clock does not need to be set. */
118
119 uint32_t ti_mode; /**< Specifies if the TI mode is enabled or not.
120 This parameter can be a value of @ref SPI_TI_Mode. */
121
122 uint32_t slave_select; /**< Specifies the slaves to be selected.
123 This parameter can be a value of @ref SPI_Slave_Select. */
124
125 uint32_t rx_sample_delay; /**< Specifies the RX sample delay. It is used to delay the sample of the RX input port.
126 This parameter can be a number between 0 and 0x7. */
127 } spi_init_t;
128 /** @} */
129
130 /** @} */
131
132 /**
133 * @defgroup HAL_SPI_MACRO Defines
134 * @{
135 */
136
137 /** @defgroup SOFT CS Signal Description
138 * @{
139 */
140 #define SPI_SOFT_CS_MAGIC_NUMBER 0xDEADBEAF /**< CS magic number. */
141 /** @} */
142
143 /** @defgroup CS_STA_STATE State from Software CS Assert
144 * @{
145 */
146 /**
147 * @brief State from Software CS Assert
148 */
149 #define CS_STA_STATE_POLL_TX 0x01 /**< CS ASSERT when Transferring Starts by Polling */
150 #define CS_STA_STATE_POLL_RX 0x02 /**< CS ASSERT when Receiving Starts by Polling */
151 #define CS_STA_STATE_POLL_TX_RX 0x03 /**< CS ASSERT when DUPLEX Starts by Polling */
152 #define CS_STA_STATE_POLL_EEPREAD 0x04 /**< CS ASSERT when EEPREAD Starts by Polling */
153 #define CS_STA_STATE_IT_TX 0x05 /**< CS ASSERT when Transferring Starts by Interrupt */
154 #define CS_STA_STATE_IT_RX 0x06 /**< CS ASSERT when Receiving Starts by Interrupt */
155 #define CS_STA_STATE_IT_TX_RX 0x07 /**< CS ASSERT when DUPLEX Starts by Interrupt */
156 #define CS_STA_STATE_IT_EEPREAD 0x08 /**< CS ASSERT when EEPREAD Starts by Interrupt */
157 #define CS_STA_STATE_DMA_TX 0x09 /**< CS ASSERT when Transferring Starts by DMA */
158 #define CS_STA_STATE_DMA_RX 0x0A /**< CS ASSERT when Receiving Starts by DMA */
159 #define CS_STA_STATE_DMA_TX_RX 0x0B /**< CS ASSERT when DUPLEX Starts by DMA */
160 #define CS_STA_STATE_DMA_EEPREAD 0x0C /**< CS ASSERT when EEPREAD Starts by DMA */
161 #define CS_STA_STATE_DMA_LLP_TX 0x0D /**< CS ASSERT when Transferring Starts by DMA LLP */
162 #define CS_STA_STATE_DMA_SCATTER_RX 0x0E /**< CS ASSERT when Receiving Starts by DMA Scatter */
163 /** @} */
164
165 /** @defgroup CS_END_STATE State from Software CS De-Assert
166 * @{
167 */
168 /**
169 * @brief State from Software CS De-Assert
170 */
171 #define CS_END_STATE_POLL_TX 0x81 /**< CS DE-ASSERT when Transferring Ends by Polling */
172 #define CS_END_STATE_POLL_RX 0x82 /**< CS DE-ASSERT when Receiving Ends by Polling */
173 #define CS_END_STATE_POLL_TX_RX 0x83 /**< CS DE-ASSERT when DUPLEX Ends by Polling */
174 #define CS_END_STATE_POLL_EEPREAD 0x84 /**< CS DE-ASSERT when EEPREAD Ends by Polling */
175 #define CS_END_STATE_TX_CPLT 0x90 /**< CS DE-ASSERT when Transferring Ends by IT/DMA */
176 #define CS_END_STATE_RX_CPLT 0x91 /**< CS DE-ASSERT when Receiving Ends by IT/DMA */
177 #define CS_END_STATE_TX_RX_CPLT 0x92 /**< CS DE-ASSERT when DUPLEX Ends by IT/DMA */
178 #define CS_END_STATE_XFER_ERR 0x93 /**< CS DE-ASSERT when xfer Error by IT/DMA */
179 #define CS_END_STATE_TX_ABORT_CPLT 0x94 /**< CS DE-ASSERT when abort The transfer Ends by IT/DMA */
180 #define CS_END_STATE_RX_ABORT_CPLT 0x95 /**< CS DE-ASSERT when abort the receive Ends by IT/DMA */
181 #define CS_END_STATE_ABORT_CPLT 0x96 /**< CS DE-ASSERT when abort the tx/rx by IT/DMA */
182 /** @} */
183
184 /** @} */
185
186 /** @addtogroup HAL_SPI_STRUCTURES Structures
187 * @{
188 */
189 /** @defgroup SPI_handle SPI handle
190 * @{
191 */
192
193 /**
194 * @brief SPI handle Structure definition
195 */
196 typedef struct _spi_handle
197 {
198 spi_regs_t *p_instance; /**< SPI registers base address */
199
200 spi_init_t init; /**< SPI communication parameters */
201
202 __IO uint32_t soft_cs_magic; /**< if equals to @ref SPI_SOFT_CS_MAGIC_NUMBER, control the CS signal by software */
203
204 uint8_t *p_tx_buffer; /**< Pointer to SPI Tx transfer Buffer */
205
206 __IO uint32_t tx_xfer_size; /**< SPI Tx Transfer size */
207
208 __IO uint32_t tx_xfer_count; /**< SPI Tx Transfer Counter */
209
210 uint8_t *p_rx_buffer; /**< Pointer to SPI Rx transfer Buffer */
211
212 __IO uint32_t rx_xfer_size; /**< SPI Rx Transfer size */
213
214 __IO uint32_t rx_xfer_count; /**< SPI Rx Transfer Counter */
215
216 void (*write_fifo)(struct _spi_handle *p_spi); /**< Pointer to SPI Tx transfer FIFO write function */
217
218 void (*read_fifo)(struct _spi_handle *p_spi); /**< Pointer to SPI Rx transfer FIFO read function */
219
220 void (*read_write_fifo)(struct _spi_handle *p_spi); /**< Pointer to SPI transfer FIFO read and write function */
221
222 dma_handle_t *p_dmatx; /**< SPI Tx DMA Handle parameters */
223
224 dma_handle_t *p_dmarx; /**< SPI Rx DMA Handle parameters */
225
226 __IO hal_lock_t lock; /**< Locking object */
227
228 __IO hal_spi_state_t state; /**< SPI communication state */
229
230 __IO uint32_t error_code; /**< SPI Error code */
231
232 uint32_t timeout; /**< Timeout for the SPI memory access */
233
234 uint32_t retention[9]; /**< SPI important register information. */
235 } spi_handle_t;
236 /** @} */
237
238 /** @} */
239
240 /** @addtogroup HAL_SPI_CALLBACK_STRUCTURES Callback Structures
241 * @{
242 */
243
244 /** @defgroup HAL_SPI_Callback Callback
245 * @{
246 */
247
248 /**
249 * @brief HAL_SPI Callback function definition
250 */
251
252 typedef struct _hal_spi_callback
253 {
254 void (*spi_msp_init)(spi_handle_t *p_spi); /**< SPI init MSP callback */
255 void (*spi_msp_deinit)(spi_handle_t *p_spi); /**< SPI de-init MSP callback */
256 void (*spi_error_callback)(spi_handle_t *p_spi); /**< SPI error callback */
257 void (*spi_abort_cplt_callback)(spi_handle_t *p_spi); /**< SPI abort completed callback */
258 void (*spi_rx_cplt_callback)(spi_handle_t *p_spi); /**< SPI rx transfer completed callback */
259 void (*spi_tx_cplt_callback)(spi_handle_t *p_spi); /**< SPI tx transfer completed callback */
260 void (*spi_tx_rx_cplt_callback)(spi_handle_t *p_spi); /**< SPI tx/rx transfer completed callback */
261 void (*spi_soft_cs_assert)(spi_handle_t *p_spi, uint32_t state); /**< assert the cs signal by software setting */
262 void (*spi_soft_cs_deassert)(spi_handle_t *p_spi, uint32_t state); /**< deassert the cs signal by software setting */
263 } hal_spi_callback_t;
264
265 /** @} */
266
267 /** @} */
268
269 /**
270 * @defgroup HAL_SPI_MACRO Defines
271 * @{
272 */
273
274 /* Exported constants --------------------------------------------------------*/
275 /** @defgroup SPI_Exported_Constants SPI Exported Constants
276 * @{
277 */
278
279 /** @defgroup SPI_Direction SPI Direction
280 * @{
281 */
282
283 #define SPI_DIRECTION_FULL_DUPLEX LL_SPI_FULL_DUPLEX /**< Full Duplex: Transmit & Receive */
284 #define SPI_DIRECTION_SIMPLEX_TX LL_SPI_SIMPLEX_TX /**< Simplex Tx: Transmit only */
285 #define SPI_DIRECTION_SIMPLEX_RX LL_SPI_SIMPLEX_RX /**< Simplex Rx: Receive only */
286 #define SPI_DIRECTION_READ_EEPROM LL_SPI_READ_EEPROM /**< Read EEPROM */
287
288 /** @} */
289
290 /** @defgroup SPI_Error_Code SPI Error Code
291 * @{
292 */
293 #define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000) /**< No error */
294 #define HAL_SPI_ERROR_TIMEOUT ((uint32_t)0x00000001) /**< Timeout error */
295 #define HAL_SPI_ERROR_TRANSFER ((uint32_t)0x00000002) /**< Transfer error */
296 #define HAL_SPI_ERROR_DMA ((uint32_t)0x00000004) /**< DMA transfer error */
297 #define HAL_SPI_ERROR_INVALID_PARAM ((uint32_t)0x00000008) /**< Invalid parameters error */
298 /** @} */
299
300 /** @defgroup SPI_Data_Size SPI Data Size
301 * @{
302 */
303
304 #define SPI_DATASIZE_4BIT LL_SPI_DATASIZE_4BIT /**< 4-bit serial data transfer */
305 #define SPI_DATASIZE_5BIT LL_SPI_DATASIZE_5BIT /**< 5-bit serial data transfer */
306 #define SPI_DATASIZE_6BIT LL_SPI_DATASIZE_6BIT /**< 6-bit serial data transfer */
307 #define SPI_DATASIZE_7BIT LL_SPI_DATASIZE_7BIT /**< 7-bit serial data transfer */
308 #define SPI_DATASIZE_8BIT LL_SPI_DATASIZE_8BIT /**< 8-bit serial data transfer */
309 #define SPI_DATASIZE_9BIT LL_SPI_DATASIZE_9BIT /**< 9-bit serial data transfer */
310 #define SPI_DATASIZE_10BIT LL_SPI_DATASIZE_10BIT /**< 10-bit serial data transfer */
311 #define SPI_DATASIZE_11BIT LL_SPI_DATASIZE_11BIT /**< 11-bit serial data transfer */
312 #define SPI_DATASIZE_12BIT LL_SPI_DATASIZE_12BIT /**< 12-bit serial data transfer */
313 #define SPI_DATASIZE_13BIT LL_SPI_DATASIZE_13BIT /**< 13-bit serial data transfer */
314 #define SPI_DATASIZE_14BIT LL_SPI_DATASIZE_14BIT /**< 14-bit serial data transfer */
315 #define SPI_DATASIZE_15BIT LL_SPI_DATASIZE_15BIT /**< 15-bit serial data transfer */
316 #define SPI_DATASIZE_16BIT LL_SPI_DATASIZE_16BIT /**< 16-bit serial data transfer */
317 #define SPI_DATASIZE_17BIT LL_SPI_DATASIZE_17BIT /**< 17-bit serial data transfer */
318 #define SPI_DATASIZE_18BIT LL_SPI_DATASIZE_18BIT /**< 18-bit serial data transfer */
319 #define SPI_DATASIZE_19BIT LL_SPI_DATASIZE_19BIT /**< 19-bit serial data transfer */
320 #define SPI_DATASIZE_20BIT LL_SPI_DATASIZE_20BIT /**< 20-bit serial data transfer */
321 #define SPI_DATASIZE_21BIT LL_SPI_DATASIZE_21BIT /**< 21-bit serial data transfer */
322 #define SPI_DATASIZE_22BIT LL_SPI_DATASIZE_22BIT /**< 22-bit serial data transfer */
323 #define SPI_DATASIZE_23BIT LL_SPI_DATASIZE_23BIT /**< 23-bit serial data transfer */
324 #define SPI_DATASIZE_24BIT LL_SPI_DATASIZE_24BIT /**< 24-bit serial data transfer */
325 #define SPI_DATASIZE_25BIT LL_SPI_DATASIZE_25BIT /**< 25-bit serial data transfer */
326 #define SPI_DATASIZE_26BIT LL_SPI_DATASIZE_26BIT /**< 26-bit serial data transfer */
327 #define SPI_DATASIZE_27BIT LL_SPI_DATASIZE_27BIT /**< 27-bit serial data transfer */
328 #define SPI_DATASIZE_28BIT LL_SPI_DATASIZE_28BIT /**< 28-bit serial data transfer */
329 #define SPI_DATASIZE_29BIT LL_SPI_DATASIZE_29BIT /**< 29-bit serial data transfer */
330 #define SPI_DATASIZE_30BIT LL_SPI_DATASIZE_30BIT /**< 30-bit serial data transfer */
331 #define SPI_DATASIZE_31BIT LL_SPI_DATASIZE_31BIT /**< 31-bit serial data transfer */
332 #define SPI_DATASIZE_32BIT LL_SPI_DATASIZE_32BIT /**< 32-bit serial data transfer */
333
334 /** @} */
335
336 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
337 * @{
338 */
339
340 #define SPI_POLARITY_LOW LL_SPI_SCPOL_LOW /**< Inactive state of CLK is low */
341 #define SPI_POLARITY_HIGH LL_SPI_SCPOL_HIGH /**< Inactive state of CLK is high */
342
343 /** @} */
344
345 /** @defgroup SPI_Clock_Phase SPI Clock Phase
346 * @{
347 */
348
349 #define SPI_PHASE_1EDGE LL_SPI_SCPHA_1EDGE /**< CLK toggles at start of first data bit */
350 #define SPI_PHASE_2EDGE LL_SPI_SCPHA_2EDGE /**< CLK toggles in middle of first data bit */
351
352 /** @} */
353
354 /** @defgroup SPI_TI_Mode SPI TI Mode
355 * @{
356 */
357 #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000) /**< SPI TI mode disable */
358
359 #define SPI_TIMODE_ENABLE LL_SPI_PROTOCOL_TI /**< SPI TI mode enable */
360
361 /** @} */
362
363 /** @defgroup SPI_Slave_Select SPI Slave Select
364 * @{
365 */
366
367 #define SPI_SLAVE_SELECT_0 LL_SPI_SLAVE0 /**< SPIM Select Slave 0 */
368 #define SPI_SLAVE_SELECT_1 LL_SPI_SLAVE1 /**< SPIM Select Slave 1 */
369 #define SPI_SLAVE_SELECT_ALL (LL_SPI_SLAVE0 | LL_SPI_SLAVE1) /**< SPIM Select All Slave */
370
371 /** @} */
372
373 /** @defgroup SPI_FIFO_LEVEL_MAX SPI FIFO Level Max
374 * @{
375 */
376 #define SPI_TX_FIFO_LEVEL_MAX 8 /**< SPI TX FIFO Level Max Value */
377 #define SPI_RX_FIFO_LEVEL_MAX 8 /**< SPI RX FIFO Level Max Value */
378 /** @} */
379
380 /** @defgroup SPI_Flags_definition SPI Flags Definition
381 * @{
382 */
383
384 #define SPI_FLAG_DCOL LL_SPI_SR_DCOL /**< Data collision error flag */
385 #define SPI_FLAG_TXE LL_SPI_SR_TXE /**< Transmission error flag */
386 #define SPI_FLAG_RFF LL_SPI_SR_RFF /**< Rx FIFO full flag */
387 #define SPI_FLAG_RFNE LL_SPI_SR_RFNE /**< Rx FIFO not empty flag */
388 #define SPI_FLAG_TFE LL_SPI_SR_TFE /**< Tx FIFO empty flag */
389 #define SPI_FLAG_TFNF LL_SPI_SR_TFNF /**< Tx FIFO not full flag */
390 #define SPI_FLAG_BUSY LL_SPI_SR_BUSY /**< Busy flag */
391
392 /** @} */
393
394 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
395 * @{
396 */
397
398 #define SPI_IT_MST LL_SPI_IS_MST /**< Multi-Master Contention Interrupt flag */
399 #define SPI_IT_RXF LL_SPI_IS_RXF /**< Receive FIFO Full Interrupt flag */
400 #define SPI_IT_RXO LL_SPI_IS_RXO /**< Receive FIFO Overflow Interrupt flag */
401 #define SPI_IT_RXU LL_SPI_IS_RXU /**< Receive FIFO Underflow Interrupt flag */
402 #define SPI_IT_TXO LL_SPI_IS_TXO /**< Transmit FIFO Overflow Interrupt flag */
403 #define SPI_IT_TXE LL_SPI_IS_TXE /**< Transmit FIFO Empty Interrupt flag */
404
405 /** @} */
406
407 /** @defgroup SPI_Timeout_definition SPI Timeout_definition
408 * @{
409 */
410 #define HAL_SPI_TIMEOUT_DEFAULT_VALUE ((uint32_t)5000) /**< 5s */
411 /** @} */
412
413 /** @} */
414
415 /* Exported macro ------------------------------------------------------------*/
416 /** @defgroup SPI_Exported_Macros SPI Exported Macros
417 * @{
418 */
419
420 /** @brief Reset SPI handle states.
421 * @param __HANDLE__ SPI handle.
422 * @retval None
423 */
424 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->state = HAL_SPI_STATE_RESET)
425
426
427 /** @brief Enable the specified SPI peripheral.
428 * @param __HANDLE__ Specifies the SPI Handle.
429 * @retval None
430 */
431 #define __HAL_SPI_ENABLE(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->SSI_EN, SPI_SSI_EN)
432
433
434 /** @brief Disable the specified SPI peripheral.
435 * @param __HANDLE__ Specifies the SPI Handle.
436 * @retval None
437 */
438 #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->SSI_EN, SPI_SSI_EN)
439
440
441 /** @brief Enable the SPI DMA TX Request.
442 * @param __HANDLE__ Specifies the SPI Handle.
443 * @retval None
444 */
445 #define __HAL_SPI_ENABLE_DMATX(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->DMA_CTRL, SPI_DMA_CTRL_TX_DMA_EN)
446
447
448 /** @brief Enable the SPI DMA RX Request.
449 * @param __HANDLE__ Specifies the SPI Handle.
450 * @retval None
451 */
452 #define __HAL_SPI_ENABLE_DMARX(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->DMA_CTRL, SPI_DMA_CTRL_RX_DMA_EN)
453
454
455 /** @brief Disable the SPI DMA TX Request.
456 * @param __HANDLE__ Specifies the SPI Handle.
457 * @retval None
458 */
459 #define __HAL_SPI_DISABLE_DMATX(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->DMA_CTRL, SPI_DMA_CTRL_TX_DMA_EN)
460
461
462 /** @brief Disable the SPI DMA RX Request.
463 * @param __HANDLE__ Specifies the SPI Handle.
464 * @retval None
465 */
466 #define __HAL_SPI_DISABLE_DMARX(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->DMA_CTRL, SPI_DMA_CTRL_RX_DMA_EN)
467
468
469 /** @brief Enable the specified SPI interrupts.
470 * @param __HANDLE__ Specifies the SPI Handle.
471 * @param __INTERRUPT__ Specifies the interrupt source to enable.
472 * This parameter can be one of the following values:
473 * @arg @ref SPI_IT_MST Multi-Master Contention Interrupt enable
474 * @arg @ref SPI_IT_RXF Receive FIFO Full Interrupt enable
475 * @arg @ref SPI_IT_RXO Receive FIFO Overflow Interrupt enable
476 * @arg @ref SPI_IT_RXU Receive FIFO Underflow Interrupt enable
477 * @arg @ref SPI_IT_TXO Transmit FIFO Overflow Interrupt enable
478 * @arg @ref SPI_IT_TXE Transmit FIFO Empty Interrupt enable
479 * @retval None
480 */
481 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BITS((__HANDLE__)->p_instance->INT_MASK, (__INTERRUPT__))
482
483
484 /** @brief Disable the specified SPI interrupts.
485 * @param __HANDLE__ Specifies the SPI handle.
486 * @param __INTERRUPT__ Specifies the interrupt source to disable.
487 * This parameter can be one of the following values:
488 * @arg @ref SPI_IT_MST Multi-Master Contention Interrupt enable
489 * @arg @ref SPI_IT_RXF Receive FIFO Full Interrupt enable
490 * @arg @ref SPI_IT_RXO Receive FIFO Overflow Interrupt enable
491 * @arg @ref SPI_IT_RXU Receive FIFO Underflow Interrupt enable
492 * @arg @ref SPI_IT_TXO Transmit FIFO Overflow Interrupt enable
493 * @arg @ref SPI_IT_TXE Transmit FIFO Empty Interrupt enable
494 * @retval None
495 */
496 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BITS((__HANDLE__)->p_instance->INT_MASK, (__INTERRUPT__))
497
498
499 /** @brief Check whether the specified SPI interrupt source is enabled or not.
500 * @param __HANDLE__ Specifies the SPI Handle.
501 * @param __INTERRUPT__ Specifies the interrupt source to check.
502 * This parameter can be one of the following values:
503 * @arg @ref SPI_IT_MST Multi-Master Contention Interrupt enable
504 * @arg @ref SPI_IT_RXF Receive FIFO Full Interrupt enable
505 * @arg @ref SPI_IT_RXO Receive FIFO Overflow Interrupt enable
506 * @arg @ref SPI_IT_RXU Receive FIFO Underflow Interrupt enable
507 * @arg @ref SPI_IT_TXO Transmit FIFO Overflow Interrupt enable
508 * @arg @ref SPI_IT_TXE Transmit FIFO Empty Interrupt enable
509 * @retval The new state of __IT__ (TRUE or FALSE).
510 */
511 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_BITS((__HANDLE__)->p_instance->INT_STAT, (__INTERRUPT__)) == (__INTERRUPT__))
512
513
514 /** @brief Check whether the specified SPI flag is set or not.
515 * @param __HANDLE__ Specifies the SPI Handle.
516 * @param __FLAG__ Specifies the flag to check.
517 * This parameter can be one of the following values:
518 * @arg @ref SPI_FLAG_DCOL Data collision error flag
519 * @arg @ref SPI_FLAG_TXE Transmission error flag
520 * @arg @ref SPI_FLAG_RFF Rx FIFO full flag
521 * @arg @ref SPI_FLAG_RFNE Rx FIFO not empty flag
522 * @arg @ref SPI_FLAG_TFE Tx FIFO empty flag
523 * @arg @ref SPI_FLAG_TFNF Tx FIFO not full flag
524 * @arg @ref SPI_FLAG_BUSY Busy flag
525 * @retval The new state of __FLAG__ (TRUE or FALSE).
526 */
527 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((READ_BITS((__HANDLE__)->p_instance->STAT, (__FLAG__)) != 0) ? SET : RESET)
528
529
530 /** @brief Clear the specified SPI flag.
531 * @param __HANDLE__ Specifies the SPI Handle.
532 * @param __FLAG__ Specifies the flag to clear.
533 * This parameter can be one of the following values:
534 * @arg @ref SPI_FLAG_DCOL Data collision error flag
535 * @arg @ref SPI_FLAG_TXE Transmission error flag
536 * @arg @ref SPI_FLAG_RFF Rx FIFO full flag
537 * @arg @ref SPI_FLAG_RFNE Rx FIFO not empty flag
538 * @arg @ref SPI_FLAG_TFE Tx FIFO empty flag
539 * @arg @ref SPI_FLAG_TFNF Tx FIFO not full flag
540 * @arg @ref SPI_FLAG_BUSY Busy flag
541 * @retval None
542 */
543 #define __HAL_SPI_CLEAR_FLAG(__HANDLE__, __FLAG__) READ_BITS((__HANDLE__)->p_instance->STAT, (__FLAG__))
544
545
546 /** @} */
547
548 /* Private macros ------------------------------------------------------------*/
549 /** @defgroup SPI_Private_Macro SPI Private Macros
550 * @{
551 */
552
553 /** @brief Check if SPI Direction Mode is valid.
554 * @param __MODE__ SPI Direction Mode.
555 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
556 */
557 #define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_FULL_DUPLEX) || \
558 ((__MODE__) == SPI_DIRECTION_SIMPLEX_TX) || \
559 ((__MODE__) == SPI_DIRECTION_SIMPLEX_RX) || \
560 ((__MODE__) == SPI_DIRECTION_READ_EEPROM))
561
562
563 /** @brief Check if SPI Data Size is valid.
564 * @param __DATASIZE__ SPI Data Size.
565 * @retval SET (__DATASIZE__ is valid) or RESET (__DATASIZE__ is invalid)
566 */
567 #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) >= SPI_DATASIZE_4BIT) && \
568 ((__DATASIZE__) <= SPI_DATASIZE_32BIT))
569
570 /** @brief Check if SPI Clock Polarity is valid.
571 * @param __CPOL__ SPI Clock Polarity.
572 * @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid)
573 */
574 #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \
575 ((__CPOL__) == SPI_POLARITY_HIGH))
576
577 /** @brief Check if SPI Clock Phase is valid.
578 * @param __CPHA__ SPI Clock Phase.
579 * @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid)
580 */
581 #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \
582 ((__CPHA__) == SPI_PHASE_2EDGE))
583
584 /** @brief Check if SPI BaudRate Prescaler is valid.
585 * @param __PRESCALER__ SPI BaudRate Prescaler.
586 * @retval SET (__PRESCALER__ is valid) or RESET (__PRESCALER__ is invalid)
587 */
588 #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) ((__PRESCALER__) <= 0xFFFF)
589
590 /** @brief Check if SPI TI Mode is valid.
591 * @param __MODE__ SPI TI Mode.
592 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
593 */
594 #define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \
595 ((__MODE__) == SPI_TIMODE_ENABLE))
596
597 /** @brief Check if SPI Slave Select is valid.
598 * @param __SLAVE__ SPI Slave Select.
599 * @retval SET (__SLAVE__ is valid) or RESET (__SLAVE__ is invalid)
600 */
601 #define IS_SPI_SLAVE(__SLAVE__) (((__SLAVE__) == SPI_SLAVE_SELECT_0) || \
602 ((__SLAVE__) == SPI_SLAVE_SELECT_1) || \
603 ((__SLAVE__) == SPI_SLAVE_SELECT_ALL))
604
605 /** @brief Check if SPI RX Sample Delay Value is valid.
606 * @param __DLY__ SPI RX Sample Delay value.
607 * @retval SET (__DLY__ is valid) or RESET (__DLY__ is invalid)
608 */
609 #define IS_SPI_RX_SAMPLE_DLY(__DLY__) (((__DLY__) >= 0) && ((__DLY__) <= 7))
610
611
612 /** @brief Check if SPI FIFO Threshold is valid.
613 * @param __THR__ SPI FIFO Threshold.
614 * @retval SET (__THR__ is valid) or RESET (__THR__ is invalid)
615 */
616
617 #define IS_SPI_FIFO_THRESHOLD(__THR__) (((__THR__) >= 0) && ((__THR__) <= (LL_SPI_M_FIFO_DEPTH - 1)))
618
619 /** @} */
620
621 /** @} */
622
623 /* Exported functions --------------------------------------------------------*/
624 /** @addtogroup HAL_SPI_DRIVER_FUNCTIONS Functions
625 * @{
626 */
627
628 /** @addtogroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
629 * @brief Initialization and de-initialization functions
630 *
631 @verbatim
632 ===============================================================================
633 ##### Initialization and de-initialization functions #####
634 ===============================================================================
635 [..] This subsection provides a set of functions allowing to initialize and
636 de-initialize the SPIx peripheral:
637
638 (+) User must implement hal_spi_msp_init() function in which he configures
639 all related peripherals resources (GPIO, DMA, IT and NVIC ).
640
641 (+) Call the function hal_spi_init() to configure the selected device with
642 the selected configuration:
643 (++) Direction
644 (++) Data Size
645 (++) Clock Polarity and Phase
646 (++) BaudRate Prescaler
647 (++) TIMode
648 (++) Slave Select
649
650 (+) Call the function hal_spi_deinit() to restore the default configuration
651 of the selected SPIx peripheral.
652
653 @endverbatim
654 * @{
655 */
656
657 /**
658 ****************************************************************************************
659 * @brief Initialize the SPI according to the specified parameters
660 * in the spi_init_t and initialize the associated handle.
661 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
662 * @retval ::HAL_OK: Operation is OK.
663 * @retval ::HAL_ERROR: Parameter error or operation not supported.
664 * @retval ::HAL_BUSY: Driver is busy.
665 * @retval ::HAL_TIMEOUT: Timeout occurred.
666 ****************************************************************************************
667 */
668 hal_status_t hal_spi_init(spi_handle_t *p_spi);
669
670 /**
671 ****************************************************************************************
672 * @brief De-initialize the SPI peripheral.
673 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
674 * @retval ::HAL_OK: Operation is OK.
675 * @retval ::HAL_ERROR: Parameter error or operation not supported.
676 * @retval ::HAL_BUSY: Driver is busy.
677 * @retval ::HAL_TIMEOUT: Timeout occurred.
678 ****************************************************************************************
679 */
680 hal_status_t hal_spi_deinit(spi_handle_t *p_spi);
681
682 /**
683 ****************************************************************************************
684 * @brief Initialize the SPI MSP.
685 * @note This function should not be modified. When the callback is needed,
686 the hal_spi_msp_deinit can be implemented in the user file.
687 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
688 ****************************************************************************************
689 */
690 void hal_spi_msp_init(spi_handle_t *p_spi);
691
692 /**
693 ****************************************************************************************
694 * @brief De-initialize the SPI MSP.
695 * @note This function should not be modified. When the callback is needed,
696 the hal_spi_msp_deinit can be implemented in the user file.
697 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
698 ****************************************************************************************
699 */
700 void hal_spi_msp_deinit(spi_handle_t *p_spi);
701
702 /** @} */
703
704 /** @addtogroup SPI_Exported_Functions_Group2 IO operation functions
705 * @brief Data transfer functions
706 *
707 @verbatim
708 ==============================================================================
709 ##### IO operation functions #####
710 ===============================================================================
711 [..]
712 This subsection provides a set of functions allowing to manage the SPI
713 data transfer.
714
715 [..] The SPI supports master and slave mode:
716
717 (#) There are two modes of transfer:
718 (++) Blocking mode: The communication is performed in polling mode.
719 The HAL status of all data processing is returned by the same function
720 after finishing transfer.
721 (++) No-Blocking mode: The communication is performed using Interrupts
722 or DMA, These APIs return the HAL status.
723 The end of the data processing will be indicated through the
724 dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
725 using DMA mode.
726 The hal_spi_tx_cplt_callback(), hal_spi_rx_cplt_callback() and hal_spi_txrx_cplt_callback() user callbacks
727 will be executed respectively at the end of the transmit or Receive process
728 The hal_spi_error_callback() user callback will be executed when a communication error is detected.
729
730 (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
731 exist for 1-Line (simplex) and 2-Line (full duplex) modes.
732
733 @endverbatim
734 * @{
735 */
736
737 /**
738 ****************************************************************************************
739 * @brief Transmit an amount of data in blocking mode.
740 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
741 * @param[in] p_data: Pointer to data buffer
742 * @param[in] length: Amount of data to be sent in bytes
743 * @param[in] timeout: Timeout duration
744 * @retval ::HAL_OK: Operation is OK.
745 * @retval ::HAL_ERROR: Parameter error or operation not supported.
746 * @retval ::HAL_BUSY: Driver is busy.
747 * @retval ::HAL_TIMEOUT: Timeout occurred.
748 ****************************************************************************************
749 */
750 hal_status_t hal_spi_transmit(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length, uint32_t timeout);
751
752 /**
753 ****************************************************************************************
754 * @brief Receive an amount of data in blocking mode.
755 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
756 * @param[out] p_data: Pointer to data buffer
757 * @param[in] length: Amount of data to be received in bytes
758 * @param[in] timeout: Timeout duration
759 * @retval ::HAL_OK: Operation is OK.
760 * @retval ::HAL_ERROR: Parameter error or operation not supported.
761 * @retval ::HAL_BUSY: Driver is busy.
762 * @retval ::HAL_TIMEOUT: Timeout occurred.
763 ****************************************************************************************
764 */
765 hal_status_t hal_spi_receive(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length, uint32_t timeout);
766
767 /**
768 ****************************************************************************************
769 * @brief Transmit and Receive an amount of data in blocking mode.
770 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
771 * @param[in] p_tx_data: Pointer to transmission data buffer
772 * @param[out] p_rx_data: Pointer to reception data buffer
773 * @param[in] length: Amount of data to be sent and received in bytes
774 * @param[in] timeout: Timeout duration
775 * @retval ::HAL_OK: Operation is OK.
776 * @retval ::HAL_ERROR: Parameter error or operation not supported.
777 * @retval ::HAL_BUSY: Driver is busy.
778 * @retval ::HAL_TIMEOUT: Timeout occurred.
779 ****************************************************************************************
780 */
781 hal_status_t hal_spi_transmit_receive(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length, uint32_t timeout);
782
783 /**
784 ****************************************************************************************
785 * @brief Read an amount of data from EEPROM in blocking mode.
786 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
787 * @param[in] p_tx_data: Pointer to transmission data buffer
788 * @param[out] p_rx_data: Pointer to reception data buffer
789 * @param[in] tx_number_data: Amount of data to be sent in bytes
790 * @param[in] rx_number_data: Amount of data to be received in bytes
791 * @param[in] timeout: Timeout duration
792 * @retval ::HAL_OK: Operation is OK.
793 * @retval ::HAL_ERROR: Parameter error or operation not supported.
794 * @retval ::HAL_BUSY: Driver is busy.
795 * @retval ::HAL_TIMEOUT: Timeout occurred.
796 ****************************************************************************************
797 */
798 hal_status_t hal_spi_read_eeprom(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data, uint32_t timeout);
799
800 /**
801 ****************************************************************************************
802 * @brief Transmit an amount of data in non-blocking mode with Interrupt.
803 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
804 * @param[in] p_data: Pointer to data buffer
805 * @param[in] length: Amount of data to be sent in bytes
806 * @retval ::HAL_OK: Operation is OK.
807 * @retval ::HAL_ERROR: Parameter error or operation not supported.
808 * @retval ::HAL_BUSY: Driver is busy.
809 * @retval ::HAL_TIMEOUT: Timeout occurred.
810 ****************************************************************************************
811 */
812 hal_status_t hal_spi_transmit_it(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length);
813
814 /**
815 ****************************************************************************************
816 * @brief Receive an amount of data in non-blocking mode with Interrupt.
817 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
818 * @param[out] p_data: Pointer to data buffer
819 * @param[in] length: Amount of data to be sent in bytes
820 * @retval ::HAL_OK: Operation is OK.
821 * @retval ::HAL_ERROR: Parameter error or operation not supported.
822 * @retval ::HAL_BUSY: Driver is busy.
823 * @retval ::HAL_TIMEOUT: Timeout occurred.
824 ****************************************************************************************
825 */
826 hal_status_t hal_spi_receive_it(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length);
827
828 /**
829 ****************************************************************************************
830 * @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt.
831 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
832 * @param[in] p_tx_data: Pointer to transmission data buffer
833 * @param[out] p_rx_data: Pointer to reception data buffer
834 * @param[in] length: Amount of data to be sent and received in bytes
835 * @retval ::HAL_OK: Operation is OK.
836 * @retval ::HAL_ERROR: Parameter error or operation not supported.
837 * @retval ::HAL_BUSY: Driver is busy.
838 * @retval ::HAL_TIMEOUT: Timeout occurred.
839 ****************************************************************************************
840 */
841 hal_status_t hal_spi_transmit_receive_it(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length);
842
843 /**
844 ****************************************************************************************
845 * @brief Read an amount of data from EEPROM in non-blocking mode with Interrupt.
846 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
847 * @param[in] p_tx_data: Pointer to transmission data buffer
848 * @param[out] p_rx_data: Pointer to reception data buffer
849 * @param[in] tx_number_data: Amount of data to be sent in bytes
850 * @param[in] rx_number_data: Amount of data to be received in bytes
851 * @retval ::HAL_OK: Operation is OK.
852 * @retval ::HAL_ERROR: Parameter error or operation not supported.
853 * @retval ::HAL_BUSY: Driver is busy.
854 * @retval ::HAL_TIMEOUT: Timeout occurred.
855 ****************************************************************************************
856 */
857 hal_status_t hal_spi_read_eeprom_it(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data);
858
859 /**
860 ****************************************************************************************
861 * @brief Transmit an amount of data in non-blocking mode with DMA.
862 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
863 * @param[in] p_data: Pointer to data buffer
864 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
865 * @retval ::HAL_OK: Operation is OK.
866 * @retval ::HAL_ERROR: Parameter error or operation not supported.
867 * @retval ::HAL_BUSY: Driver is busy.
868 * @retval ::HAL_TIMEOUT: Timeout occurred.
869 ****************************************************************************************
870 */
871 hal_status_t hal_spi_transmit_dma(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length);
872
873 /**
874 ****************************************************************************************
875 * @brief Receive an amount of data in non-blocking mode with DMA.
876 * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, p_dmatx shall be defined.
877 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
878 * @param[out] p_data: Pointer to data buffer
879 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
880 * @retval ::HAL_OK: Operation is OK.
881 * @retval ::HAL_ERROR: Parameter error or operation not supported.
882 * @retval ::HAL_BUSY: Driver is busy.
883 * @retval ::HAL_TIMEOUT: Timeout occurred.
884 ****************************************************************************************
885 */
886 hal_status_t hal_spi_receive_dma(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length);
887
888 /**
889 ****************************************************************************************
890 * @brief Transmit and Receive an amount of data in non-blocking mode with DMA.
891 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
892 * @param[in] p_tx_data: Pointer to transmission data buffer
893 * @param[out] p_rx_data: Pointer to reception data buffer
894 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
895 * @retval ::HAL_OK: Operation is OK.
896 * @retval ::HAL_ERROR: Parameter error or operation not supported.
897 * @retval ::HAL_BUSY: Driver is busy.
898 * @retval ::HAL_TIMEOUT: Timeout occurred.
899 ****************************************************************************************
900 */
901 hal_status_t hal_spi_transmit_receive_dma(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length);
902
903 /**
904 ****************************************************************************************
905 * @brief Read an amount of data from EEPROM in non-blocking mode with DMA.
906 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
907 * @param[in] p_tx_data: Pointer to transmission data buffer
908 * @param[out] p_rx_data: Pointer to reception data buffer
909 * @param[in] tx_number_data: Amount of data to be sent in bytes
910 * @param[in] rx_number_data: Amount of data to be received in bytes, ranging between 0 and 4095.
911 * @retval ::HAL_OK: Operation is OK.
912 * @retval ::HAL_ERROR: Parameter error or operation not supported.
913 * @retval ::HAL_BUSY: Driver is busy.
914 * @retval ::HAL_TIMEOUT: Timeout occurred.
915 ****************************************************************************************
916 */
917 hal_status_t hal_spi_read_eeprom_dma(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data);
918
919 /**
920 ****************************************************************************************
921 * @brief Transmit an amount of data in non-blocking mode with DMA LLP.
922 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
923 * @param[in] p_llp_config: Pointer to Linked List Block
924 * @param[in] data_length: Total data in all Blocks to be transmitted, unit in Byte
925 * @retval ::HAL_OK: Operation is OK.
926 * @retval ::HAL_ERROR: Parameter error or operation not supported.
927 * @retval ::HAL_BUSY: Driver is busy.
928 ****************************************************************************************
929 */
930 hal_status_t hal_spi_transmit_dma_llp(spi_handle_t *p_spi, dma_llp_config_t * p_llp_config, uint32_t data_length);
931
932 /**
933 ****************************************************************************************
934 * @brief Receive an amount of data in non-blocking mode with DMA.
935 * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, p_dmatx shall be defined.
936 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
937 * @param[in] p_tx_data: Pointer to transmit data buffer
938 * @param[in] tx_data_length: Amount of data to be sent in bytes
939 * @param[in] p_rx_data: Pointer to receive data buffer
940 * @param[in] rx_data_length: Amount of data to be received in bytes
941 * @param[in] sct_interval: Scatter interval in beat
942 * @param[in] sct_count: Scatter count in beat
943 * @retval ::HAL_OK: Operation is OK.
944 * @retval ::HAL_ERROR: Parameter error or operation not supported.
945 * @retval ::HAL_BUSY: Driver is busy.
946 * @retval ::HAL_TIMEOUT: Timeout occurred.
947 ****************************************************************************************
948 */
949 hal_status_t hal_spi_read_eeprom_dma_scatter(spi_handle_t *p_spi, uint8_t * p_tx_data, uint32_t tx_data_length, uint8_t * p_rx_data, uint32_t rx_data_length, uint32_t sct_interval, uint32_t sct_count);
950
951 /**
952 ****************************************************************************************
953 * @brief Transmit an amount of data in non-blocking mode with polling. Support Setting C&A
954 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
955 * @param[in] inst: 1 byte instruction
956 * @param[in] addr: 3 bytes address
957 * @param[in] p_data: Pointer to data buffer
958 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
959 * @param[in] timeout: Timeout duration
960 * @retval ::HAL_OK: Operation is OK.
961 * @retval ::HAL_ERROR: Parameter error or operation not supported.
962 * @retval ::HAL_BUSY: Driver is busy.
963 * @retval ::HAL_TIMEOUT: Timeout occurred.
964 ****************************************************************************************
965 */
966 hal_status_t hal_spi_transmit_with_ia(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length, uint32_t timeout);
967
968 /**
969 ****************************************************************************************
970 * @brief Transmit an amount of data in non-blocking mode with DMA. Support Setting C&A
971 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
972 * @param[in] inst: 1 byte instruction
973 * @param[in] addr: 3 bytes address
974 * @param[in] p_data: Pointer to data buffer
975 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
976 * @retval ::HAL_OK: Operation is OK.
977 * @retval ::HAL_ERROR: Parameter error or operation not supported.
978 * @retval ::HAL_BUSY: Driver is busy.
979 * @retval ::HAL_TIMEOUT: Timeout occurred.
980 ****************************************************************************************
981 */
982 hal_status_t hal_spi_transmit_dma_with_ia(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length);
983
984 /**
985 ****************************************************************************************
986 * @brief 32addr: Transmit an amount of data in non-blocking mode with polling. Support Setting C&A
987 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
988 * @param[in] inst: 1 byte instruction
989 * @param[in] addr: 4 bytes address
990 * @param[in] p_data: Pointer to data buffer
991 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
992 * @param[in] timeout: Timeout duration
993 * @retval ::HAL_OK: Operation is OK.
994 * @retval ::HAL_ERROR: Parameter error or operation not supported.
995 * @retval ::HAL_BUSY: Driver is busy.
996 * @retval ::HAL_TIMEOUT: Timeout occurred.
997 ****************************************************************************************
998 */
999 hal_status_t hal_spi_transmit_with_ia_32addr(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length, uint32_t timeout);
1000
1001 /**
1002 ****************************************************************************************
1003 * @brief 32addr: Transmit an amount of data in non-blocking mode with DMA. Support Setting C&A
1004 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1005 * @param[in] inst: 1 byte instruction
1006 * @param[in] addr: 4 bytes address
1007 * @param[in] p_data: Pointer to data buffer
1008 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
1009 * @retval ::HAL_OK: Operation is OK.
1010 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1011 * @retval ::HAL_BUSY: Driver is busy.
1012 * @retval ::HAL_TIMEOUT: Timeout occurred.
1013 ****************************************************************************************
1014 */
1015 hal_status_t hal_spi_transmit_dma_with_ia_32addr(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length);
1016
1017 /**
1018 ****************************************************************************************
1019 * @brief Abort ongoing transfer (blocking mode).
1020 * @param[in] p_spi: SPI handle.
1021 * @note This procedure could be used for aborting any ongoing transfer (Tx and Rx),
1022 * started in Interrupt or DMA mode.
1023 * This procedure performs following operations :
1024 * - Disable SPI Interrupts (depending of transfer direction)
1025 * - Disable the DMA transfer in the peripheral register (if enabled)
1026 * - Abort DMA transfer by calling hal_dma_abort (in case of transfer in DMA mode)
1027 * - Set handle State to READY
1028 * @note This procedure is executed in blocking mode: when exiting function, Abort is considered as completed.
1029 * @retval ::HAL_OK: Operation is OK.
1030 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1031 * @retval ::HAL_BUSY: Driver is busy.
1032 * @retval ::HAL_TIMEOUT: Timeout occurred.
1033 ****************************************************************************************
1034 */
1035 hal_status_t hal_spi_abort(spi_handle_t *p_spi);
1036
1037 /**
1038 ****************************************************************************************
1039 * @brief Abort ongoing transfer (Interrupt mode).
1040 * @param[in] p_spi: SPI handle.
1041 * @note This procedure could be used for aborting any ongoing transfer (Tx and Rx),
1042 * started in Interrupt or DMA mode.
1043 * This procedure performs following operations :
1044 * - Disable SPI Interrupts (depending of transfer direction)
1045 * - Disable the DMA transfer in the peripheral register (if enabled)
1046 * - Abort DMA transfer by calling hal_dma_abort_it (in case of transfer in DMA mode)
1047 * - Set handle State to READY
1048 * - At abort completion, call user abort complete callback
1049 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
1050 * considered as completed only when user abort complete callback is executed (not when exiting function).
1051 * @retval ::HAL_OK: Operation is OK.
1052 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1053 * @retval ::HAL_BUSY: Driver is busy.
1054 * @retval ::HAL_TIMEOUT: Timeout occurred.
1055 ****************************************************************************************
1056 */
1057 hal_status_t hal_spi_abort_it(spi_handle_t *p_spi);
1058
1059 /** @} */
1060
1061 /** @addtogroup SPI_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
1062 * @brief IRQ Handler and Callbacks functions
1063 * @{
1064 */
1065
1066 /**
1067 ****************************************************************************************
1068 * @brief Handle SPI interrupt request.
1069 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1070 ****************************************************************************************
1071 */
1072 void hal_spi_irq_handler(spi_handle_t *p_spi);
1073
1074 /**
1075 ****************************************************************************************
1076 * @brief Tx Transfer completed callback.
1077 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1078 ****************************************************************************************
1079 */
1080 void hal_spi_tx_cplt_callback(spi_handle_t *p_spi);
1081
1082 /**
1083 ****************************************************************************************
1084 * @brief Rx Transfer completed callback.
1085 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1086 ****************************************************************************************
1087 */
1088 void hal_spi_rx_cplt_callback(spi_handle_t *p_spi);
1089
1090 /**
1091 ****************************************************************************************
1092 * @brief Tx and Rx Transfer completed callback.
1093 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1094 ****************************************************************************************
1095 */
1096 void hal_spi_tx_rx_cplt_callback(spi_handle_t *p_spi);
1097
1098 /**
1099 ****************************************************************************************
1100 * @brief SPI error callback.
1101 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1102 ****************************************************************************************
1103 */
1104 void hal_spi_error_callback(spi_handle_t *p_spi);
1105
1106 /**
1107 ****************************************************************************************
1108 * @brief SPI Abort Completed callback.
1109 * @param[in] p_spi: SPI handle.
1110 ****************************************************************************************
1111 */
1112 void hal_spi_abort_cplt_callback(spi_handle_t *p_spi);
1113
1114 /** @} */
1115
1116 /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
1117 * @brief SPI control functions
1118 *
1119 @verbatim
1120 ===============================================================================
1121 ##### Peripheral State and Errors functions #####
1122 ===============================================================================
1123 [..]
1124 This subsection provides a set of functions allowing to control the SPI.
1125 (+) hal_spi_get_state() API can be helpful to check in run-time the state of the SPI peripheral
1126 (+) hal_spi_get_error() check in run-time Errors occurring during communication
1127 (+) hal_spi_set_timeout() set the timeout during internal process
1128 (+) hal_spi_set_tx_fifo_threshold() set the TX FIFO Threshold
1129 (+) hal_spi_set_rx_fifo_threshold() set the RX FIFO Threshold
1130 (+) hal_spi_get_tx_fifo_threshold() get the TX FIFO Threshold
1131 (+) hal_spi_get_rx_fifo_threshold() get the RX FIFO Threshold
1132 @endverbatim
1133 * @{
1134 */
1135
1136 /**
1137 ****************************************************************************************
1138 * @brief Return the SPI handle state.
1139 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1140 * @retval ::HAL_SPI_STATE_RESET: Peripheral not initialized.
1141 * @retval ::HAL_SPI_STATE_READY: Peripheral initialized and ready for use.
1142 * @retval ::HAL_SPI_STATE_BUSY: An internal process is ongoing.
1143 * @retval ::HAL_SPI_STATE_BUSY_TX: Data Transmission process is ongoing.
1144 * @retval ::HAL_SPI_STATE_BUSY_RX: Data Reception process is ongoing.
1145 * @retval ::HAL_SPI_STATE_BUSY_TX_RX: Data Transmission and Reception process is ongoing.
1146 * @retval ::HAL_SPI_STATE_ABORT: Peripheral with abort request ongoing.
1147 * @retval ::HAL_SPI_STATE_ERROR: Peripheral in error.
1148 ****************************************************************************************
1149 */
1150 hal_spi_state_t hal_spi_get_state(spi_handle_t *p_spi);
1151
1152 /**
1153 ****************************************************************************************
1154 * @brief Return the SPI error code.
1155 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1156 * @return SPI error code in bitmap format
1157 ****************************************************************************************
1158 */
1159 uint32_t hal_spi_get_error(spi_handle_t *p_spi);
1160
1161 /**
1162 ****************************************************************************************
1163 * @brief Set the SPI internal process timeout value.
1164 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1165 * @param[in] timeout: Internal process timeout value.
1166 ****************************************************************************************
1167 */
1168 void hal_spi_set_timeout(spi_handle_t *p_spi, uint32_t timeout);
1169
1170 /**
1171 ****************************************************************************************
1172 * @brief Set the TX FIFO threshold.
1173 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1174 * @param[in] threshold: TX FIFO threshold value ranging bwtween 0x0U ~ 0x7U.
1175 * @retval ::HAL_OK: Operation is OK.
1176 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1177 * @retval ::HAL_BUSY: Driver is busy.
1178 * @retval ::HAL_TIMEOUT: Timeout occurred.
1179 ****************************************************************************************
1180 */
1181 hal_status_t hal_spi_set_tx_fifo_threshold(spi_handle_t *p_spi, uint32_t threshold);
1182
1183 /**
1184 ****************************************************************************************
1185 * @brief Set the RX FIFO threshold.
1186 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1187 * @param[in] threshold: RX FIFO threshold value ranging bwtween 0x0U ~ 0x7U.
1188 * @retval ::HAL_OK: Operation is OK.
1189 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1190 * @retval ::HAL_BUSY: Driver is busy.
1191 * @retval ::HAL_TIMEOUT: Timeout occurred.
1192 ****************************************************************************************
1193 */
1194 hal_status_t hal_spi_set_rx_fifo_threshold(spi_handle_t *p_spi, uint32_t threshold);
1195
1196 /**
1197 ****************************************************************************************
1198 * @brief Get the TX FIFO threshold.
1199 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1200 * @return TX FIFO threshold
1201 ****************************************************************************************
1202 */
1203 uint32_t hal_spi_get_tx_fifo_threshold(spi_handle_t *p_spi);
1204
1205 /**
1206 ****************************************************************************************
1207 * @brief Get the RX FIFO threshold.
1208 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1209 * @return RX FIFO threshold
1210 ****************************************************************************************
1211 */
1212 uint32_t hal_spi_get_rx_fifo_threshold(spi_handle_t *p_spi);
1213
1214 /**
1215 ****************************************************************************************
1216 * @brief Suspend some registers related to SPI configuration before sleep.
1217 * @param[in] p_spi: Pointer to a SPI handle which contains the configuration
1218 * information for the specified SPI module.
1219 * @retval ::HAL_OK: Operation is OK.
1220 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1221 * @retval ::HAL_BUSY: Driver is busy.
1222 * @retval ::HAL_TIMEOUT: Timeout occurred.
1223 ****************************************************************************************
1224 */
1225 hal_status_t hal_spi_suspend_reg(spi_handle_t *p_spi);
1226
1227 /**
1228 ****************************************************************************************
1229 * @brief Restore some registers related to SPI configuration after sleep.
1230 * This function must be used in conjunction with the hal_spi_suspend_reg().
1231 * @param[in] p_spi: Pointer to a SPI handle which contains the configuration
1232 * information for the specified SPI module.
1233 * @retval ::HAL_OK: Operation is OK.
1234 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1235 * @retval ::HAL_BUSY: Driver is busy.
1236 * @retval ::HAL_TIMEOUT: Timeout occurred.
1237 ****************************************************************************************
1238 */
1239 hal_status_t hal_spi_resume_reg(spi_handle_t *p_spi);
1240
1241 /**
1242 ****************************************************************************************
1243 * @brief Assert the CS Singal line by software (When activate the soft-cs mode)
1244 * @param[in] p_spi: Pointer to a SPI handle which contains the configuration
1245 * information for the specified SPI module.
1246 * @param[in] state: assert state, please @ref CS_STA_STATE.
1247 * @retval :: none
1248 ****************************************************************************************
1249 */
1250 void hal_spi_soft_cs_assert(spi_handle_t *p_spi, uint32_t state);
1251
1252 /**
1253 ****************************************************************************************
1254 * @brief De-Assert the CS Singal line by software (When activate the soft-cs mode)
1255 * @param[in] p_spi: Pointer to a SPI handle which contains the configuration
1256 * information for the specified SPI module.
1257 * @param[in] state: assert state, please @ref CS_STA_STATE.
1258 * @retval :: none
1259 ****************************************************************************************
1260 */
1261 void hal_spi_soft_cs_deassert(spi_handle_t *p_spi, uint32_t state);
1262
1263 /** @} */
1264
1265 /** @} */
1266
1267 #ifdef __cplusplus
1268 }
1269 #endif
1270
1271 #endif /* __GR55xx_HAL_SPI_H__ */
1272
1273 /** @} */
1274
1275 /** @} */
1276
1277 /** @} */
hal_spi_abort_cplt_callback
void hal_spi_abort_cplt_callback(spi_handle_t *p_spi)
SPI Abort Completed callback.
hal_spi_get_state
hal_spi_state_t hal_spi_get_state(spi_handle_t *p_spi)
Return the SPI handle state.
hal_spi_transmit_dma_with_ia_32addr
hal_status_t hal_spi_transmit_dma_with_ia_32addr(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length)
32addr: Transmit an amount of data in non-blocking mode with DMA. Support Setting C&A
_hal_spi_callback::spi_rx_cplt_callback
void(* spi_rx_cplt_callback)(spi_handle_t *p_spi)
Definition: gr55xx_hal_spi.h:258
HAL_SPI_STATE_READY
@ HAL_SPI_STATE_READY
Definition: gr55xx_hal_spi.h:78
_spi_handle
SPI handle Structure definition.
Definition: gr55xx_hal_spi.h:197
hal_spi_deinit
hal_status_t hal_spi_deinit(spi_handle_t *p_spi)
De-initialize the SPI peripheral.
_spi_init::ti_mode
uint32_t ti_mode
Definition: gr55xx_hal_spi.h:119
_hal_spi_callback::spi_soft_cs_deassert
void(* spi_soft_cs_deassert)(spi_handle_t *p_spi, uint32_t state)
Definition: gr55xx_hal_spi.h:262
hal_lock_t
hal_lock_t
HAL Lock structures definition.
Definition: gr55xx_hal_def.h:81
hal_spi_abort
hal_status_t hal_spi_abort(spi_handle_t *p_spi)
Abort ongoing transfer (blocking mode).
_hal_spi_callback::spi_abort_cplt_callback
void(* spi_abort_cplt_callback)(spi_handle_t *p_spi)
Definition: gr55xx_hal_spi.h:257
_hal_spi_callback::spi_tx_cplt_callback
void(* spi_tx_cplt_callback)(spi_handle_t *p_spi)
Definition: gr55xx_hal_spi.h:259
hal_spi_callback_t
struct _hal_spi_callback hal_spi_callback_t
HAL_SPI Callback function definition.
hal_spi_error_callback
void hal_spi_error_callback(spi_handle_t *p_spi)
SPI error callback.
_spi_init::slave_select
uint32_t slave_select
Definition: gr55xx_hal_spi.h:122
_spi_handle::read_fifo
void(* read_fifo)(struct _spi_handle *p_spi)
Definition: gr55xx_hal_spi.h:218
hal_spi_init
hal_status_t hal_spi_init(spi_handle_t *p_spi)
Initialize the SPI according to the specified parameters in the spi_init_t and initialize the associa...
hal_spi_get_tx_fifo_threshold
uint32_t hal_spi_get_tx_fifo_threshold(spi_handle_t *p_spi)
Get the TX FIFO threshold.
HAL_SPI_STATE_ERROR
@ HAL_SPI_STATE_ERROR
Definition: gr55xx_hal_spi.h:84
hal_spi_transmit_dma
hal_status_t hal_spi_transmit_dma(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode with DMA.
hal_spi_transmit
hal_status_t hal_spi_transmit(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length, uint32_t timeout)
Transmit an amount of data in blocking mode.
hal_spi_read_eeprom_dma
hal_status_t hal_spi_read_eeprom_dma(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data)
Read an amount of data from EEPROM in non-blocking mode with DMA.
_spi_handle::p_tx_buffer
uint8_t * p_tx_buffer
Definition: gr55xx_hal_spi.h:204
_spi_init
SPI init Structure definition.
Definition: gr55xx_hal_spi.h:104
HAL_SPI_STATE_BUSY_TX
@ HAL_SPI_STATE_BUSY_TX
Definition: gr55xx_hal_spi.h:80
_spi_handle::tx_xfer_count
__IO uint32_t tx_xfer_count
Definition: gr55xx_hal_spi.h:208
hal_spi_receive_dma
hal_status_t hal_spi_receive_dma(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length)
Receive an amount of data in non-blocking mode with DMA.
hal_spi_transmit_with_ia
hal_status_t hal_spi_transmit_with_ia(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length, uint32_t timeout)
Transmit an amount of data in non-blocking mode with polling. Support Setting C&A.
hal_spi_tx_cplt_callback
void hal_spi_tx_cplt_callback(spi_handle_t *p_spi)
Tx Transfer completed callback.
hal_spi_soft_cs_assert
void hal_spi_soft_cs_assert(spi_handle_t *p_spi, uint32_t state)
Assert the CS Singal line by software (When activate the soft-cs mode)
hal_spi_read_eeprom
hal_status_t hal_spi_read_eeprom(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data, uint32_t timeout)
Read an amount of data from EEPROM in blocking mode.
hal_spi_state_t
hal_spi_state_t
HAL SPI State Enumerations definition.
Definition: gr55xx_hal_spi.h:76
hal_spi_rx_cplt_callback
void hal_spi_rx_cplt_callback(spi_handle_t *p_spi)
Rx Transfer completed callback.
_spi_handle::p_dmatx
dma_handle_t * p_dmatx
Definition: gr55xx_hal_spi.h:222
_spi_handle::timeout
uint32_t timeout
Definition: gr55xx_hal_spi.h:232
_spi_handle::p_rx_buffer
uint8_t * p_rx_buffer
Definition: gr55xx_hal_spi.h:210
_hal_spi_callback::spi_error_callback
void(* spi_error_callback)(spi_handle_t *p_spi)
Definition: gr55xx_hal_spi.h:256
_spi_handle::error_code
__IO uint32_t error_code
Definition: gr55xx_hal_spi.h:230
HAL_SPI_STATE_BUSY
@ HAL_SPI_STATE_BUSY
Definition: gr55xx_hal_spi.h:79
_spi_handle::rx_xfer_count
__IO uint32_t rx_xfer_count
Definition: gr55xx_hal_spi.h:214
hal_spi_irq_handler
void hal_spi_irq_handler(spi_handle_t *p_spi)
Handle SPI interrupt request.
_hal_spi_callback::spi_msp_init
void(* spi_msp_init)(spi_handle_t *p_spi)
Definition: gr55xx_hal_spi.h:254
hal_spi_suspend_reg
hal_status_t hal_spi_suspend_reg(spi_handle_t *p_spi)
Suspend some registers related to SPI configuration before sleep.
_hal_spi_callback::spi_tx_rx_cplt_callback
void(* spi_tx_rx_cplt_callback)(spi_handle_t *p_spi)
Definition: gr55xx_hal_spi.h:260
_spi_handle::tx_xfer_size
__IO uint32_t tx_xfer_size
Definition: gr55xx_hal_spi.h:206
hal_spi_resume_reg
hal_status_t hal_spi_resume_reg(spi_handle_t *p_spi)
Restore some registers related to SPI configuration after sleep. This function must be used in conjun...
hal_spi_soft_cs_deassert
void hal_spi_soft_cs_deassert(spi_handle_t *p_spi, uint32_t state)
De-Assert the CS Singal line by software (When activate the soft-cs mode)
_spi_handle::p_dmarx
dma_handle_t * p_dmarx
Definition: gr55xx_hal_spi.h:224
_spi_handle::retention
uint32_t retention[9]
Definition: gr55xx_hal_spi.h:234
_spi_handle::soft_cs_magic
__IO uint32_t soft_cs_magic
Definition: gr55xx_hal_spi.h:202
hal_spi_transmit_receive
hal_status_t hal_spi_transmit_receive(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length, uint32_t timeout)
Transmit and Receive an amount of data in blocking mode.
hal_spi_set_rx_fifo_threshold
hal_status_t hal_spi_set_rx_fifo_threshold(spi_handle_t *p_spi, uint32_t threshold)
Set the RX FIFO threshold.
hal_spi_get_rx_fifo_threshold
uint32_t hal_spi_get_rx_fifo_threshold(spi_handle_t *p_spi)
Get the RX FIFO threshold.
_hal_spi_callback::spi_soft_cs_assert
void(* spi_soft_cs_assert)(spi_handle_t *p_spi, uint32_t state)
Definition: gr55xx_hal_spi.h:261
spi_handle_t
struct _spi_handle spi_handle_t
SPI handle Structure definition.
hal_spi_transmit_dma_with_ia
hal_status_t hal_spi_transmit_dma_with_ia(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode with DMA. Support Setting C&A.
HAL_SPI_STATE_ABORT
@ HAL_SPI_STATE_ABORT
Definition: gr55xx_hal_spi.h:83
HAL_SPI_STATE_BUSY_RX
@ HAL_SPI_STATE_BUSY_RX
Definition: gr55xx_hal_spi.h:81
_spi_init::rx_sample_delay
uint32_t rx_sample_delay
Definition: gr55xx_hal_spi.h:125
_spi_handle::init
spi_init_t init
Definition: gr55xx_hal_spi.h:200
hal_spi_abort_it
hal_status_t hal_spi_abort_it(spi_handle_t *p_spi)
Abort ongoing transfer (Interrupt mode).
HAL_SPI_STATE_RESET
@ HAL_SPI_STATE_RESET
Definition: gr55xx_hal_spi.h:77
hal_spi_transmit_it
hal_status_t hal_spi_transmit_it(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode with Interrupt.
hal_spi_transmit_with_ia_32addr
hal_status_t hal_spi_transmit_with_ia_32addr(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length, uint32_t timeout)
32addr: Transmit an amount of data in non-blocking mode with polling. Support Setting C&A
hal_spi_receive_it
hal_status_t hal_spi_receive_it(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length)
Receive an amount of data in non-blocking mode with Interrupt.
HAL_SPI_STATE_BUSY_TX_RX
@ HAL_SPI_STATE_BUSY_TX_RX
Definition: gr55xx_hal_spi.h:82
gr55xx_ll_spi.h
Header file containing functions prototypes of SPI LL library.
hal_spi_msp_deinit
void hal_spi_msp_deinit(spi_handle_t *p_spi)
De-initialize the SPI MSP.
hal_spi_receive
hal_status_t hal_spi_receive(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length, uint32_t timeout)
Receive an amount of data in blocking mode.
spi_init_t
struct _spi_init spi_init_t
SPI init Structure definition.
_hal_spi_callback::spi_msp_deinit
void(* spi_msp_deinit)(spi_handle_t *p_spi)
Definition: gr55xx_hal_spi.h:255
hal_status_t
hal_status_t
HAL Status structures definition.
Definition: gr55xx_hal_def.h:70
_spi_init::clock_polarity
uint32_t clock_polarity
Definition: gr55xx_hal_spi.h:108
_spi_init::baudrate_prescaler
uint32_t baudrate_prescaler
Definition: gr55xx_hal_spi.h:114
hal_spi_set_tx_fifo_threshold
hal_status_t hal_spi_set_tx_fifo_threshold(spi_handle_t *p_spi, uint32_t threshold)
Set the TX FIFO threshold.
_spi_handle::read_write_fifo
void(* read_write_fifo)(struct _spi_handle *p_spi)
Definition: gr55xx_hal_spi.h:220
hal_spi_msp_init
void hal_spi_msp_init(spi_handle_t *p_spi)
Initialize the SPI MSP.
dma_llp_config
LL DMA llp config definition.
Definition: gr55xx_hal_dma.h:197
_spi_handle::state
__IO hal_spi_state_t state
Definition: gr55xx_hal_spi.h:228
hal_spi_tx_rx_cplt_callback
void hal_spi_tx_rx_cplt_callback(spi_handle_t *p_spi)
Tx and Rx Transfer completed callback.
_spi_handle::rx_xfer_size
__IO uint32_t rx_xfer_size
Definition: gr55xx_hal_spi.h:212
hal_spi_transmit_receive_dma
hal_status_t hal_spi_transmit_receive_dma(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length)
Transmit and Receive an amount of data in non-blocking mode with DMA.
hal_spi_read_eeprom_it
hal_status_t hal_spi_read_eeprom_it(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data)
Read an amount of data from EEPROM in non-blocking mode with Interrupt.
hal_spi_transmit_receive_it
hal_status_t hal_spi_transmit_receive_it(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length)
Transmit and Receive an amount of data in non-blocking mode with Interrupt.
_spi_handle::p_instance
spi_regs_t * p_instance
Definition: gr55xx_hal_spi.h:198
hal_spi_read_eeprom_dma_scatter
hal_status_t hal_spi_read_eeprom_dma_scatter(spi_handle_t *p_spi, uint8_t *p_tx_data, uint32_t tx_data_length, uint8_t *p_rx_data, uint32_t rx_data_length, uint32_t sct_interval, uint32_t sct_count)
Receive an amount of data in non-blocking mode with DMA.
hal_spi_get_error
uint32_t hal_spi_get_error(spi_handle_t *p_spi)
Return the SPI error code.
_spi_init::clock_phase
uint32_t clock_phase
Definition: gr55xx_hal_spi.h:111
_spi_handle::lock
__IO hal_lock_t lock
Definition: gr55xx_hal_spi.h:226
_hal_spi_callback
HAL_SPI Callback function definition.
Definition: gr55xx_hal_spi.h:253
hal_spi_transmit_dma_llp
hal_status_t hal_spi_transmit_dma_llp(spi_handle_t *p_spi, dma_llp_config_t *p_llp_config, uint32_t data_length)
Transmit an amount of data in non-blocking mode with DMA LLP.
_dma_handle
DMA handle Structure definition.
Definition: gr55xx_hal_dma.h:277
gr55xx_hal_def.h
This file contains HAL common definitions, enumeration, macros and structures definitions.
_spi_handle::write_fifo
void(* write_fifo)(struct _spi_handle *p_spi)
Definition: gr55xx_hal_spi.h:216
_spi_init::data_size
uint32_t data_size
Definition: gr55xx_hal_spi.h:105
hal_spi_set_timeout
void hal_spi_set_timeout(spi_handle_t *p_spi, uint32_t timeout)
Set the SPI internal process timeout value.