gr55xx_ll_bod.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_bod.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of CALENDAR LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_BOD BOD Module Driver
47 * @brief BOD LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55XX_LL_BOD_H_
53 #define __GR55XX_LL_BOD_H_
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx.h"
61
62 /** @defgroup BOD_LL_STRUCTURES Structures
63 * @{
64 */
65
66 /* Exported types ------------------------------------------------------------*/
67 /** @defgroup BOD_LL_ES_INIT BOD Exported init structures
68 * @{
69 */
70
71 /**
72 * @brief LL BOD init Structure definition
73 */
74 typedef struct _ll_bod_init
75 {
76 uint8_t bod_en; /**< Specifies the bod enable.
77 This parameter can be any value of @ref ADC_LL_EC_INPUT_SRC.
78 This parament can be modified afterwards using unitary function @ref ll_bod_enable() and ll_bod_disable(). */
79
80 uint8_t bod2_en; /**< Specifies the bod2 enable.
81 This parameter can be any value of @ref ADC_LL_EC_INPUT_SRC.
82 This parament can be modified afterwards using unitary function @ref ll_bod2_enable() and ll_bod2_disable().. */
83
84 uint8_t bod2_lvl; /**< Specifies the bod2 level.
85 This parameter can be a value of @ref ADC_LL_EC_INPUT_MODE.
86 This parament can be modified afterwards using unitary function @ref ll_bod2_lvl_ctrl_lv_set(). */
87
88 uint8_t bod_static_en; /**< Specifies the bod static enbale.
89 This parameter can be a value of @ref LL_BOD_STATIC_ENABLE.
90 This parament can be modified afterwards using unitary function @ref ll_bod_static_lv_enable() and ll_bod_static_lv_disable(). */
91 } ll_bod_init_t;
92
93 /** @} */
94
95 /** @} */
96
97 /**
98 * @defgroup BOD_LL_MACRO Defines
99 * @{
100 */
101
102 /* Exported constants --------------------------------------------------------*/
103 /** @defgroup BOD_LL_Exported_Constants BOD Exported Constants
104 * @{
105 */
106
107 /** @defgroup BOD_LL_ENABLE BOD ENABLE
108 * @{
109 */
110 #define LL_BOD_ENABLE 0x1 /**< BOD enable */
111 #define LL_BOD_DISABLE 0x0 /**< BOD disable */
112 /** @} */
113
114 /** @defgroup BOD2_LL_ENABLE BOD2 ENABLE
115 * @{
116 */
117 #define LL_BOD2_ENABLE 0x1 /**< BOD2 enable */
118 #define LL_BOD2_DISABLE 0x0 /**< BOD2 disable */
119 /** @} */
120
121 /** @defgroup BOD_LL_STATIC_ENABLE BOD STATIC ENABLE
122 * @{
123 */
124 #define LL_BOD_STATIC_ENABLE (0x1) /**< BOD STATIC enable */
125 #define LL_BOD_STATIC_DISABLE (0x0) /**< BOD STATIC disable */
126 /** @} */
127
128 /** @defgroup BOD2_LL_LEVEL BOD2 LVEVL
129 * @{
130 */
131 #define LL_BOD2_LEVEL_0 0x0 /**< BOD2 Level 0 */
132 #define LL_BOD2_LEVEL_1 0x1 /**< BOD2 Level 1 */
133 #define LL_BOD2_LEVEL_2 0x2 /**< BOD2 Level 2 */
134 #define LL_BOD2_LEVEL_3 0x3 /**< BOD2 Level 3 */
135 #define LL_BOD2_LEVEL_4 0x4 /**< BOD2 Level 4 */
136 #define LL_BOD2_LEVEL_5 0x5 /**< BOD2 Level 5 */
137 #define LL_BOD2_LEVEL_6 0x6 /**< BOD2 Level 6 */
138 #define LL_BOD2_LEVEL_7 0x7 /**< BOD2 Level 7 */
139 #define LL_BOD2_LEVEL_8 0x8 /**< BOD2 Level 8 */
140 #define LL_BOD2_LEVEL_9 0x9 /**< BOD2 Level 9 */
141 #define LL_BOD2_LEVEL_10 0xA /**< BOD2 Level 10 */
142 #define LL_BOD2_LEVEL_11 0xB /**< BOD2 Level 11 */
143 #define LL_BOD2_LEVEL_12 0xC /**< BOD2 Level 12 */
144 #define LL_BOD2_LEVEL_13 0xD /**< BOD2 Level 13 */
145 #define LL_BOD2_LEVEL_14 0xE /**< BOD2 Level 14 */
146 #define LL_BOD2_LEVEL_15 0xF /**< BOD2 Level 15 */
147 /** @} */
148
149 /** @} */
150
151 /** @} */
152
153 /** @defgroup BOD_LL_DRIVER_FUNCTIONS Functions
154 * @{
155 */
156 /**
157 * @brief Enable the bod
158 *
159 * Register|BitsName
160 * --------|--------
161 * RF_REG_3 | bod_en_lv
162 *
163 */
164 __STATIC_INLINE void ll_bod_enable(void)
165 {
166 #if defined(BIT_BAND_SUPPORT)
167 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_EN_Pos) = 1;
168 #else
169 SET_BITS(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_EN);
170 #endif
171 }
172
173 /**
174 * @brief Disable the bod
175 *
176 * Register|BitsName
177 * --------|--------
178 * RF_REG_3 | bod_en_lv
179 *
180 */
181 __STATIC_INLINE void ll_bod_disable(void)
182 {
183 #if defined(BIT_BAND_SUPPORT)
184 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_EN_Pos) = 0;
185 #else
186 CLEAR_BITS(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_EN);
187 #endif
188 }
189
190 /**
191 * @brief Enable the bod2
192 *
193 * Register|BitsName
194 * --------|--------
195 * RF_REG_3 | bod2_en_lv
196 *
197 */
198 __STATIC_INLINE void ll_bod2_enable(void)
199 {
200 #if defined(BIT_BAND_SUPPORT)
201 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD2_EN_Pos) = 1;
202 #else
203 SET_BITS(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD2_EN);
204 #endif
205 }
206
207 /**
208 * @brief Disable the bod2
209 *
210 * Register|BitsName
211 * --------|--------
212 * RF_REG_3 | bod2_en_lv
213 *
214 */
215 __STATIC_INLINE void ll_bod2_disable(void)
216 {
217 #if defined(BIT_BAND_SUPPORT)
218 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD2_EN_Pos) = 0;
219 #else
220 CLEAR_BITS(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_EN);
221 #endif
222 }
223
224 /**
225 * @brief Set bod control level
226 *
227 * Register|BitsName
228 * --------|--------
229 * RF_REG_3 | bod_lvl_ctrl_lv_3_0
230 * @param lvl_ctrl_lv: 0x0 ~ 0xF
231 */
232 __STATIC_INLINE void ll_bod2_lvl_ctrl_lv_set(uint8_t lvl_ctrl_lv)
233 {
234 #if defined(BIT_BAND_SUPPORT)
235 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_LVL_CTRL_LV_Pos) = (lvl_ctrl_lv & 0x01);
236 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_LVL_CTRL_LV_Pos+1) = ((lvl_ctrl_lv>>1) & 0x01);
237 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_LVL_CTRL_LV_Pos+2) = ((lvl_ctrl_lv>>2) & 0x01);
238 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_LVL_CTRL_LV_Pos+3) = ((lvl_ctrl_lv>>3) & 0x01);
239 #else
240 MODIFY_REG(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_LVL_CTRL_LV, (lvl_ctrl_lv << AON_PMU_RF_REG_3_BOD_LVL_CTRL_LV_Pos));
241 #endif
242 }
243
244 /**
245 * @brief enable bod static lv
246 *
247 * Register|BitsName
248 * --------|--------
249 * RF_REG_3 | bod_static_lv
250 */
251 __STATIC_INLINE void ll_bod_static_lv_enable(void)
252 {
253 #if defined(BIT_BAND_SUPPORT)
254 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_STATIC_LV_Pos) = 1;
255 #else
256 SET_BITS(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_STATIC_LV_EN);
257 #endif
258 }
259
260 /**
261 * @brief disable bod static lv
262 *
263 * Register|BitsName
264 * --------|--------
265 * RF_REG_3 | bod_static_lv
266 */
267 __STATIC_INLINE void ll_bod_static_lv_disable(void)
268 {
269 #if defined(BIT_BAND_SUPPORT)
270 BIT_ADDR((uint32_t)&AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_STATIC_LV_Pos) = 0;
271 #else
272 CLEAR_BITS(AON_PMU->RF_REG_3, AON_PMU_RF_REG_3_BOD_STATIC_LV_EN);
273 #endif
274 }
275
276 /**
277 * @brief enable BOD FEDGE Event.
278 *
279 * Register|BitsName
280 * --------|--------
281 * AON_IRQ | PMU_BOD_FEDGE
282 *
283 * @retval State of bit (1 or 0).
284 */
285 __STATIC_INLINE void ll_bod_enable_fedge(void)
286 {
287 SET_BITS(AON_CTL->AON_IRQ_EN, AON_CTL_AON_IRQ_PMU_BOD);
288 }
289
290 /**
291 * @brief disable BOD FEDGE Event.
292 *
293 * Register|BitsName
294 * --------|--------
295 * AON_IRQ | PMU_BOD_FEDGE
296 *
297 * @retval State of bit (1 or 0).
298 */
299 __STATIC_INLINE void ll_bod_disable_fedge(void)
300 {
301 CLEAR_BITS(AON_CTL->AON_IRQ_EN, AON_CTL_AON_IRQ_PMU_BOD);
302 }
303
304 /**
305 * @brief Indicate if the BOD REDGE Event Flag is set or not.
306 *
307 * Register|BitsName
308 * --------|--------
309 * AON_IRQ | PMU_BOD_REDGE
310 *
311 * @retval State of bit (1 or 0).
312 */
313 __STATIC_INLINE uint32_t ll_bod_is_active_flag_redge(void)
314 {
315 return (uint32_t)(READ_BITS(AON_CTL->AON_IRQ, AON_CTL_AON_IRQ_PMU_BOD) == AON_CTL_AON_IRQ_PMU_BOD);
316 }
317
318 /**
319 * @brief Clear Interrupt Status flag.
320 *
321 * Register|BitsName
322 * --------|--------
323 * AON_IRQ| PMU_BOD_REDGE
324 *
325 * @retval None
326 */
327 __STATIC_INLINE void ll_bod_clear_flag_redge(void)
328 {
329 WRITE_REG(AON_CTL->AON_IRQ, ~AON_CTL_AON_IRQ_PMU_BOD);
330 }
331
332 /**
333 * @brief Indicate if the BOD FEDGE Event Flag is set or not.
334 *
335 * Register|BitsName
336 * --------|--------
337 * SLP_EVENT | SLP_EVENT_BOD
338 *
339 * @retval State of bit (1 or 0).
340 */
341 __STATIC_INLINE uint32_t ll_bod_is_active_flag_fedge(void)
342 {
343 return (uint32_t)(READ_BITS(AON_CTL->AON_SLP_EVENT, AON_CTL_SLP_EVENT_PMU_BOD) == AON_CTL_SLP_EVENT_PMU_BOD);
344 }
345
346 /**
347 * @brief Clear Interrupt Status flag.
348 *
349 * Register|BitsName
350 * --------|--------
351 * SLP_EVENT| SLP_EVENT_BOD
352 *
353 * @retval None
354 */
355 __STATIC_INLINE void ll_bod_clear_flag_fedge(void)
356 {
357 WRITE_REG(AON_CTL->AON_SLP_EVENT, ~AON_CTL_SLP_EVENT_PMU_BOD);
358 }
359
360 /**
361 * @brief De-initialize the BOD registers to their default reset values.
362 * @retval An error_status_t enumeration value:
363 * - SUCCESS: PDM registers are de-initialized
364 * - ERROR: PDM registers are not de-initialized
365 */
366 error_status_t ll_bod_deinit(void);
367
368 /**
369 * @brief Initialize the BOD registers according to the specified parameters in p_bod_init.
370 * @param p_bod_init pointer to a @ref ll_bod_init_t structure.
371 * @retval An error_status_t enumeration value:
372 * - SUCCESS: BOD registers are initialized
373 * - ERROR: Not applicable
374 */
375 error_status_t ll_bod_init(ll_bod_init_t *p_bod_init);
376
377 /**
378 * @brief Set each field of a @ref ll_pdm_init_t type structure to default value.
379 * @param p_bod_init Pointer to a @ref ll_bod_init_t structure
380 * whose fields will be set to default values.
381 * @retval None
382 */
383 void ll_bod_struct_init(ll_bod_init_t *p_bod_init);
384 /** @} */
385 #ifdef __cplusplus
386 }
387 #endif
388
389 #endif
390 /** @} */
391
392 /** @} */
393
394 /** @} */
_ll_bod_init::bod_static_en
uint8_t bod_static_en
Definition: gr55xx_ll_bod.h:88
ll_bod_static_lv_disable
__STATIC_INLINE void ll_bod_static_lv_disable(void)
disable bod static lv
Definition: gr55xx_ll_bod.h:267
ll_bod_is_active_flag_redge
__STATIC_INLINE uint32_t ll_bod_is_active_flag_redge(void)
Indicate if the BOD REDGE Event Flag is set or not.
Definition: gr55xx_ll_bod.h:313
_ll_bod_init
LL BOD init Structure definition.
Definition: gr55xx_ll_bod.h:75
ll_bod_enable
__STATIC_INLINE void ll_bod_enable(void)
Enable the bod.
Definition: gr55xx_ll_bod.h:164
ll_bod2_disable
__STATIC_INLINE void ll_bod2_disable(void)
Disable the bod2.
Definition: gr55xx_ll_bod.h:215
_ll_bod_init::bod2_en
uint8_t bod2_en
Definition: gr55xx_ll_bod.h:80
ll_bod_init_t
struct _ll_bod_init ll_bod_init_t
LL BOD init Structure definition.
_ll_bod_init::bod_en
uint8_t bod_en
Definition: gr55xx_ll_bod.h:76
ll_bod_disable_fedge
__STATIC_INLINE void ll_bod_disable_fedge(void)
disable BOD FEDGE Event.
Definition: gr55xx_ll_bod.h:299
ll_bod_clear_flag_fedge
__STATIC_INLINE void ll_bod_clear_flag_fedge(void)
Clear Interrupt Status flag.
Definition: gr55xx_ll_bod.h:355
ll_bod2_lvl_ctrl_lv_set
__STATIC_INLINE void ll_bod2_lvl_ctrl_lv_set(uint8_t lvl_ctrl_lv)
Set bod control level.
Definition: gr55xx_ll_bod.h:232
ll_bod_static_lv_enable
__STATIC_INLINE void ll_bod_static_lv_enable(void)
enable bod static lv
Definition: gr55xx_ll_bod.h:251
ll_bod_struct_init
void ll_bod_struct_init(ll_bod_init_t *p_bod_init)
Set each field of a ll_pdm_init_t type structure to default value.
ll_bod_is_active_flag_fedge
__STATIC_INLINE uint32_t ll_bod_is_active_flag_fedge(void)
Indicate if the BOD FEDGE Event Flag is set or not.
Definition: gr55xx_ll_bod.h:341
ll_bod_clear_flag_redge
__STATIC_INLINE void ll_bod_clear_flag_redge(void)
Clear Interrupt Status flag.
Definition: gr55xx_ll_bod.h:327
ll_bod_init
error_status_t ll_bod_init(ll_bod_init_t *p_bod_init)
Initialize the BOD registers according to the specified parameters in p_bod_init.
ll_bod_deinit
error_status_t ll_bod_deinit(void)
De-initialize the BOD registers to their default reset values.
_ll_bod_init::bod2_lvl
uint8_t bod2_lvl
Definition: gr55xx_ll_bod.h:84
ll_bod_disable
__STATIC_INLINE void ll_bod_disable(void)
Disable the bod.
Definition: gr55xx_ll_bod.h:181
ll_bod2_enable
__STATIC_INLINE void ll_bod2_enable(void)
Enable the bod2.
Definition: gr55xx_ll_bod.h:198
ll_bod_enable_fedge
__STATIC_INLINE void ll_bod_enable_fedge(void)
enable BOD FEDGE Event.
Definition: gr55xx_ll_bod.h:285