Enumerations
Enumerations
Peripheral Driver » APP DRIVER » DC

## Enumerations
enum | graphics_dc_mspi_e { GDC_MODE_SPI = 0, GDC_MODE_DSPI, GDC_MODE_QSPI }
| Define SPI work Mode for DC. More...
enum | graphics_dc_clock_freq_e { GDC_CLOCK_FREQ_48MHz = 0x00, GDC_CLOCK_FREQ_24MHz = 0x03, GDC_CLOCK_FREQ_12MHz = 0x05, GDC_CLOCK_FREQ_6MHz = 0x09, GDC_CLOCK_FREQ_3MHz = 0x11 }
| Define Clock Frequency for DC. More...
enum | graphics_dc_clock_mode_e { GDC_CLOCK_MODE_0 = 0x00, GDC_CLOCK_MODE_1 = 0x01, GDC_CLOCK_MODE_2 = 0x02, GDC_CLOCK_MODE_3 = 0x03 }
| Define Clock Mode for DC. More...
enum | graphics_dc_tcsu_cycle_e { GDC_TCSU_CYCLE_0 = 0x00, GDC_TCSU_CYCLE_1 = 0x01, GDC_TCSU_CYCLE_2 = 0x02, GDC_TCSU_CYCLE_3 = 0x03, GDC_TCSU_CYCLE_4 = 0x04 }
| Define Delay Clock for DC Tcsu. More...
enum | graphics_dc_power_state_e { GDC_POWER_STATE_SLEEP = 0, GDC_POWER_STATE_ACTIVE = 1 }
| Display Controller Power Mode Enumerations definition. More...
enum | graphics_dc_layer_mode_e { GDC_ONE_LAYER_MODE = 0x00, GDC_TWO_LAYER_MODE = 0x01 }
| Define work layers for DC. More...
enum | graphics_dc_data_format_e { GDC_DATA_FORMAT_RGB565 = HAL_GDC_RGB565, GDC_DATA_FORMAT_RGB24 = HAL_GDC_RGB24, GDC_DATA_FORMAT_RGBA8888 = HAL_GDC_RGBA8888, GDC_DATA_FORMAT_ABGR8888 = HAL_GDC_ABGR8888, GDC_DATA_FORMAT_ARGB8888 = HAL_GDC_ARGB8888, GDC_DATA_FORMAT_BGRA8888 = HAL_GDC_BGRA8888, GDC_DATA_FORMAT_TSC4 = HAL_GDC_TSC4, GDC_DATA_FORMAT_TSC6 = HAL_GDC_TSC6, GDC_DATA_FORMAT_TSC6A = HAL_GDC_TSC6A }
| Define the data format for frame buffer of DC. More...
enum | graphics_dc_mipi_format_e { GDC_MIPICFG_SPI_RGB565_OPT0 = MIPICFG_1RGB565_OPT0, GDC_MIPICFG_SPI_RGB888_OPT0 = MIPICFG_1RGB888_OPT0, GDC_MIPICFG_DSPI_RGB565_OPT0 = MIPICFG_2RGB565_OPT0, GDC_MIPICFG_DSPI_RGB888_OPT0 = MIPICFG_2RGB888_OPT1, GDC_MIPICFG_DSPI_RGB888_OPT1 = MIPICFG_2RGB888_OPT0, GDC_MIPICFG_QSPI_RGB565_OPT0 = MIPICFG_4RGB565_OPT0, GDC_MIPICFG_QSPI_RGB888_OPT0 = MIPICFG_4RGB888_OPT0 }
| Define the Output MIPI Timing for DATA Phase of DC Timing of MIPICFG_2RGB888_OPT1 is True MIPICFG_2RGB888_OPT0, and Timing of MIPICFG_2RGB888_OPT0 is True MIPICFG_2RGB888_OPT1, They need to exchange !!! More...
enum | graphics_dc_out_pixel_bits_e { GDC_OUT_PIXEL_BITS_16 = 16, GDC_OUT_PIXEL_BITS_24 = 24, GDC_OUT_PIXEL_BITS_NOT_SUPPORT = 0xFF }
| Define the Output pixel bits for DC. More...
enum | app_graphics_dc_frame_timing_e { GDC_SPI_FRAME_TIMING_0 = 0x00, GDC_DSPI_FRAME_TIMING_0, GDC_QSPI_FRAME_TIMING_0, GDC_QSPI_FRAME_TIMING_1 }
| Define the Output Frame Timing for DC. More...
enum | app_graphics_dc_frame_address_width_e { GDC_FRAME_ADDRESS_WIDTH_NONE = 0xFF, GDC_FRAME_ADDRESS_WIDTH_08BIT = MIPI_CMD08, GDC_FRAME_ADDRESS_WIDTH_16BIT = MIPI_CMD16, GDC_FRAME_ADDRESS_WIDTH_24BIT = MIPI_CMD24 }
| Define the bits of address phase for DC Frame. More...
enum | app_graphics_dc_access_type_e { GDC_ACCESS_TYPE_SYNC = 0, GDC_ACCESS_TYPE_ASYNC }
| Define access type for DC. More...
enum | app_graphics_dc_frame_result_e { GDC_FRAME_RES_SUCCESS = 0x00, GDC_FRAME_RES_ASYNC_WAIT, GDC_FRAME_RES_FAIL, GDC_FRAME_RES_UNSUPPORT }
| Define frame output result for DC. More...

## Detailed Description

## Enumeration Type Documentation

## ◆ app_graphics_dc_access_type_e

enum app_graphics_dc_access_type_e

Define access type for DC.

Enumerator
GDC_ACCESS_TYPE_SYNC | SYNC access type
GDC_ACCESS_TYPE_ASYNC | ASYNC access type

Definition at line 236 of file app_graphics_dc.h.

## ◆ app_graphics_dc_frame_address_width_e

enum app_graphics_dc_frame_address_width_e

Define the bits of address phase for DC Frame.

Enumerator
GDC_FRAME_ADDRESS_WIDTH_NONE | Not support
GDC_FRAME_ADDRESS_WIDTH_08BIT | Frame address width 8bits
GDC_FRAME_ADDRESS_WIDTH_16BIT | Frame address width 16bits
GDC_FRAME_ADDRESS_WIDTH_24BIT | Frame address width 24bits

Definition at line 226 of file app_graphics_dc.h.

## ◆ app_graphics_dc_frame_result_e

enum app_graphics_dc_frame_result_e

Define frame output result for DC.

Enumerator
GDC_FRAME_RES_SUCCESS | frame sent success
GDC_FRAME_RES_ASYNC_WAIT | frame sent, but need to get the result in async callback
GDC_FRAME_RES_FAIL | frame sent fail
GDC_FRAME_RES_UNSUPPORT | frame format/command not support,please check config params

Definition at line 245 of file app_graphics_dc.h.

## ◆ app_graphics_dc_frame_timing_e

enum app_graphics_dc_frame_timing_e

Define the Output Frame Timing for DC.

Enumerator
GDC_SPI_FRAME_TIMING_0 | 8Bit CMD::24Bit ADDR::Ndata, All Sent in SPI
GDC_DSPI_FRAME_TIMING_0 | 8Bit CMD Sent in SPI::NO ADDR::Ndata Sent in DSPI, with DCX
GDC_QSPI_FRAME_TIMING_0 | 8Bit CMD::24Bit ADDR Sent in SPI, All Data Sent in QSPI
GDC_QSPI_FRAME_TIMING_1 | 8Bit CMD Sent in SPI, 24Bit ADDR and All data Sent in QSPI

Definition at line 215 of file app_graphics_dc.h.

## ◆ graphics_dc_clock_freq_e

enum graphics_dc_clock_freq_e

Define Clock Frequency for DC.

Enumerator
GDC_CLOCK_FREQ_48MHz | DC clock, 48MHz
GDC_CLOCK_FREQ_24MHz | DC clock, 24MHz
GDC_CLOCK_FREQ_12MHz | DC clock, 12MHz
GDC_CLOCK_FREQ_6MHz | DC clock, 6MHz
GDC_CLOCK_FREQ_3MHz | DC clock, 3MHz

Definition at line 82 of file app_graphics_dc.h.

## ◆ graphics_dc_clock_mode_e

enum graphics_dc_clock_mode_e

Define Clock Mode for DC.

Enumerator
GDC_CLOCK_MODE_0 | DC clock mode 0
GDC_CLOCK_MODE_1 | DC clock mode 1
GDC_CLOCK_MODE_2 | DC clock mode 2
GDC_CLOCK_MODE_3 | DC clock mode 3

Definition at line 94 of file app_graphics_dc.h.

## ◆ graphics_dc_data_format_e

enum graphics_dc_data_format_e

Define the data format for frame buffer of DC.

Enumerator
GDC_DATA_FORMAT_RGB565 | FrameBuffer is RGA565, 16bit, no Alpha
GDC_DATA_FORMAT_RGB24 | FrameBuffer is RGA24, 24bit, no Alpha
GDC_DATA_FORMAT_RGBA8888 | FrameBuffer is RGBA8888, 32bit with Alpha
GDC_DATA_FORMAT_ABGR8888 | FrameBuffer is ABGR8888, 32bit with Alpha
GDC_DATA_FORMAT_ARGB8888 | FrameBuffer is ARGB8888, 32bit with Alpha
GDC_DATA_FORMAT_BGRA8888 | FrameBuffer is BGRA8888, 32bit with Alpha
GDC_DATA_FORMAT_TSC4 | FrameBuffer is RGB565 compressed by TSC4
GDC_DATA_FORMAT_TSC6 | FrameBuffer is *888 compressed by TSC6
GDC_DATA_FORMAT_TSC6A | FrameBuffer is *8888 compressed by TSC6A

Definition at line 174 of file app_graphics_dc.h.

## ◆ graphics_dc_layer_mode_e

enum graphics_dc_layer_mode_e

Define work layers for DC.

Enumerator
GDC_ONE_LAYER_MODE | 1 layer mode
GDC_TWO_LAYER_MODE | 2 layer mode

Definition at line 165 of file app_graphics_dc.h.

## ◆ graphics_dc_mipi_format_e

enum graphics_dc_mipi_format_e

Define the Output MIPI Timing for DATA Phase of DC Timing of MIPICFG_2RGB888_OPT1 is True MIPICFG_2RGB888_OPT0, and Timing of MIPICFG_2RGB888_OPT0 is True MIPICFG_2RGB888_OPT1, They need to exchange !!!

Enumerator
GDC_MIPICFG_SPI_RGB565_OPT0 | Sent in SPI Mode, Output format is RGB565 with option.0
GDC_MIPICFG_SPI_RGB888_OPT0 | Sent in SPI Mode, Output format is RGB565 with option.0
GDC_MIPICFG_DSPI_RGB565_OPT0 | Sent in DSPI Mode, Output format is RGB565 with option.0
GDC_MIPICFG_DSPI_RGB888_OPT0 | Sent in DSPI Mode, Output format is RGB888 with option.0
GDC_MIPICFG_DSPI_RGB888_OPT1 | Sent in DSPI Mode, Output format is RGB888 with option.1
GDC_MIPICFG_QSPI_RGB565_OPT0 | Sent in QSPI Mode, Output format is RGB565 with option.0
GDC_MIPICFG_QSPI_RGB888_OPT0 | Sent in QSPI Mode, Output format is RGB888 with option.0

Definition at line 192 of file app_graphics_dc.h.

## ◆ graphics_dc_mspi_e

enum graphics_dc_mspi_e

Define SPI work Mode for DC.

Enumerator
GDC_MODE_SPI | By 1-wire SPI
GDC_MODE_DSPI | 1bit cmd + 8bit data, and DCX signal
GDC_MODE_QSPI | By Quad SPI

Definition at line 72 of file app_graphics_dc.h.

## ◆ graphics_dc_out_pixel_bits_e

enum graphics_dc_out_pixel_bits_e

Define the Output pixel bits for DC.

Enumerator
GDC_OUT_PIXEL_BITS_16 | Output pixel 16 bits
GDC_OUT_PIXEL_BITS_24 | Output pixel 24 bits
GDC_OUT_PIXEL_BITS_NOT_SUPPORT | Not support

Definition at line 206 of file app_graphics_dc.h.

## ◆ graphics_dc_power_state_e

enum graphics_dc_power_state_e

Display Controller Power Mode Enumerations definition.

Enumerator
GDC_POWER_STATE_SLEEP |
GDC_POWER_STATE_ACTIVE |

Definition at line 116 of file app_graphics_dc.h.

## ◆ graphics_dc_tcsu_cycle_e

enum graphics_dc_tcsu_cycle_e

Define Delay Clock for DC Tcsu.

Enumerator
GDC_TCSU_CYCLE_0 | delay 0 clock cycle
GDC_TCSU_CYCLE_1 | delay 1 clock cycle
GDC_TCSU_CYCLE_2 | delay 2 clock cycle
GDC_TCSU_CYCLE_3 | delay 3 clock cycle
GDC_TCSU_CYCLE_4 | delay 4 clock cycle

Definition at line 105 of file app_graphics_dc.h.