Macros
QSPI-XIP Private Macros
Peripheral Driver » HAL Driver » QSPI » Defines

## Macros
#define | IS_QSPI_CONC_XIP_SIOO_MODE(_SIOO_)
| Check if QSPI.XIP SIOO Mode is valid. More...
#define | IS_QSPI_CONC_XIP_DFS(_DFS_)
| Check if QSPI.XIP DFS Value is valid. More...
#define | IS_QSPI_CONC_XIP_DFS_HC_EN(_HC_EN_)
| Check if QSPI.XIP DFS_HC Switch Value is valid. More...
#define | IS_QSPI_CONC_XIP_INST_EN(_INST_EN_)
| Check if QSPI.XIP inst Switch is valid. More...
#define | IS_QSPI_CONC_XIP_INST_SIZE(_INST_SIZE_)
| Check if QSPI.XIP inst size is valid. More...
#define | IS_QSPI_CONC_XIP_INST(_INST_) ((_INST_) <= 0xFFFF )
| Check if QSPI.XIP inst is valid. More...
#define | IS_QSPI_CONC_XIP_ADDR_SIZE(_ADDR_SIZE_)
| Check if QSPI.XIP Address Size is valid. More...
#define | IS_QSPI_CONC_INST_ADDR_XFER_FORMAT(_FORMAT_)
| Check if QSPI.XIP Addr Xfer format is valid. More...
#define | IS_QSPI_CONC_XIP_MODE_BITS_EN(_MD_EN_)
| Check if QSPI.XIP Mode bits Switch is valid. More...
#define | IS_QSPI_CONC_XIP_MODE_BITS_SIZE(_MD_SIZE_)
| Check if QSPI.XIP Mode Bits size is valid. More...
#define | IS_QSPI_CONC_XIP_MODE_BITS(_MD_BITS_) ( (_MD_BITS_) <= 0xFFFF)
| Check if QSPI.XIP Mode Bits is valid. More...
#define | IS_QSPI_CONC_XIP_DUMMY_CYCLES(__DCY__) ( (__DCY__) <= 31)
| Check if QSPI.XIP dummy cycles is valid. More...
#define | IS_QSPI_CONC_XIP_DATA_FRF(_XIP_FRF_)
| Check if QSPI.XIP frame format is valid. More...
#define | IS_QSPI_CONC_XIP_PREFETCH_EN(_PREFETCH_EN_)
| Check if QSPI.XIP prefetch switch is valid. More...
#define | IS_QSPI_CONC_XIP_CONT_XFER_EN(_CONT_XFER_EN_)
| Check if QSPI.XIP cont xfer switch is valid. More...
#define | IS_QSPI_CONC_XIP_CONT_XFER_TOC(_TOC_) ( (_TOC_) <= 0xFF)
| Check if QSPI.XIP timeout count of cont xfer is valid. More...
#define | IS_QSPI_CONC_XIP_ENDIAN_MODE(_MODE_)
| Check if QSPI.XIP Data endian Mode is valid. More...

## Detailed Description

## Macro Definition Documentation

## ◆ IS_QSPI_CONC_INST_ADDR_XFER_FORMAT

#define IS_QSPI_CONC_INST_ADDR_XFER_FORMAT | ( |  | _FORMAT_ | ) |

Value:
( (QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPI == (_FORMAT_)) || \
(QSPI_CONCURRENT_XIP_INST_IN_SPI_ADDR_IN_SPIFRF == (_FORMAT_)) || \
(QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPIFRF == (_FORMAT_)) )

Check if QSPI.XIP Addr Xfer format is valid.

Parameters

  _FORMAT_ | QSPI.XIP Addr Xfer format.

Return values

  SET | (_FORMAT_ is valid) or RESET (_FORMAT_ is invalid)

Definition at line 997 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_ADDR_SIZE

#define IS_QSPI_CONC_XIP_ADDR_SIZE | ( |  | _ADDR_SIZE_ | ) |

Value:
( (QSPI_CONCURRENT_XIP_ADDRSIZE_0BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_4BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_8BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_12BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_16BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_20BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_24BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_28BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_32BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_36BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_40BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_44BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_48BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_52BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_56BIT == (_ADDR_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_ADDRSIZE_60BIT == (_ADDR_SIZE_) ) )

Check if QSPI.XIP Address Size is valid.

Parameters

  _ADDR_SIZE_ | QSPI.XIP Address Size.

Return values

  SET | (_ADDR_SIZE_ is valid) or RESET (_ADDR_SIZE_ is invalid)

Definition at line 976 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_CONT_XFER_EN

#define IS_QSPI_CONC_XIP_CONT_XFER_EN | ( |  | _CONT_XFER_EN_ | ) |

Value:
( (QSPI_CONCURRENT_XIP_CONT_XFER_ENABLE == (_CONT_XFER_EN_)) || \
(QSPI_CONCURRENT_XIP_CONT_XFER_DISABLE == (_CONT_XFER_EN_)) )

Check if QSPI.XIP cont xfer switch is valid.

Parameters

  _CONT_XFER_EN_ | QSPI.XIP cont xfer switch.

Return values

  SET | (_CONT_XFER_EN_ is valid) or RESET (_CONT_XFER_EN_ is invalid)

Definition at line 1047 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_CONT_XFER_TOC

#define IS_QSPI_CONC_XIP_CONT_XFER_TOC | ( |  | _TOC_ | ) | ( (_TOC_) <= 0xFF)

Check if QSPI.XIP timeout count of cont xfer is valid.

Parameters

  _TOC_ | QSPI.XIP timeout count of cont xfer.

Return values

  SET | (_TOC_ is valid) or RESET (_TOC_ is invalid)

Definition at line 1054 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_DATA_FRF

#define IS_QSPI_CONC_XIP_DATA_FRF | ( |  | _XIP_FRF_ | ) |

Value:
( (QSPI_CONCURRENT_XIP_FRF_DUAL_SPI == (_XIP_FRF_)) || \
(QSPI_CONCURRENT_XIP_FRF_QUAD_SPI == (_XIP_FRF_)) )

Check if QSPI.XIP frame format is valid.

Parameters

  _XIP_FRF_ | QSPI.XIP frame format.

Return values

  SET | (_XIP_FRF_ is valid) or RESET (_XIP_FRF_ is invalid)

Definition at line 1033 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_DFS

#define IS_QSPI_CONC_XIP_DFS | ( |  | _DFS_ | ) |

Value:
( (QSPI_CONCURRENT_XIP_DFS_BYTE == (_DFS_)) || \
(QSPI_CONCURRENT_XIP_DFS_HALFWORD == (_DFS_)) || \
(QSPI_CONCURRENT_XIP_DFS_WORD == (_DFS_)) )

Check if QSPI.XIP DFS Value is valid.

Parameters

  _DFS_ | QSPI.XIP DFS Value

Return values

  SET | (_DFS_ is valid) or RESET (_DFS_ is invalid)

Definition at line 939 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_DFS_HC_EN

#define IS_QSPI_CONC_XIP_DFS_HC_EN | ( |  | _HC_EN_ | ) |

Value:
( (QSPI_CONCURRENT_XIP_DFS_HARDCODE_ENABLE == (_HC_EN_)) || \
(QSPI_CONCURRENT_XIP_DFS_HARDCODE_DISABLE == (_HC_EN_)) )

Check if QSPI.XIP DFS_HC Switch Value is valid.

Parameters

  _HC_EN_ | QSPI.XIP DFS Hardcode Switch.

Return values

  SET | (_HC_EN_ is valid) or RESET (_HC_EN_ is invalid)

Definition at line 947 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_DUMMY_CYCLES

#define IS_QSPI_CONC_XIP_DUMMY_CYCLES | ( |  | __DCY__ | ) | ( (__DCY__) <= 31)

Check if QSPI.XIP dummy cycles is valid.

Parameters

  __DCY__ | QSPI.XIPdummy cycles.

Return values

  SET | (__DCY__ is valid) or RESET (__DCY__ is invalid)

Definition at line 1027 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_ENDIAN_MODE

#define IS_QSPI_CONC_XIP_ENDIAN_MODE | ( |  | _MODE_ | ) |

Value:
( (QSPI_CONCURRENT_XIP_ENDIAN_MODE_0 == (_MODE_)) || \
(QSPI_CONCURRENT_XIP_ENDIAN_MODE_1 == (_MODE_)) || \
(QSPI_CONCURRENT_XIP_ENDIAN_MODE_2 == (_MODE_)) )

Check if QSPI.XIP Data endian Mode is valid.

Parameters

  _MODE_ | QSPI.XIP Data endian Mode.

Return values

  SET | (__MODE__ is valid) or RESET (__MODE__ is invalid)

Definition at line 1060 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_INST

#define IS_QSPI_CONC_XIP_INST | ( |  | _INST_ | ) | ((_INST_) <= 0xFFFF )

Check if QSPI.XIP inst is valid.

Parameters

  _INST_ | QSPI.XIP inst.

Return values

  SET | (_INST_ is valid) or RESET (_INST_ is invalid)

Definition at line 970 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_INST_EN

#define IS_QSPI_CONC_XIP_INST_EN | ( |  | _INST_EN_ | ) |

Value:
( (QSPI_CONCURRENT_XIP_INST_ENABLE == (_INST_EN_)) || \
(QSPI_CONCURRENT_XIP_INST_DISABLE == (_INST_EN_)) )

Check if QSPI.XIP inst Switch is valid.

Parameters

  _INST_EN_ | QSPI.XIP inst en/dis.

Return values

  SET | (_INST_EN_ is valid) or RESET (_INST_EN_ is invalid)

Definition at line 954 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_INST_SIZE

#define IS_QSPI_CONC_XIP_INST_SIZE | ( |  | _INST_SIZE_ | ) |

Value:
( (QSPI_CONCURRENT_XIP_INSTSIZE_0BIT == (_INST_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_INSTSIZE_4BIT == (_INST_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_INSTSIZE_8BIT == (_INST_SIZE_) ) || \
(QSPI_CONCURRENT_XIP_INSTSIZE_16BIT == (_INST_SIZE_) ) )

Check if QSPI.XIP inst size is valid.

Parameters

  _INST_SIZE_ | QSPI.XIP inst size.

Return values

  SET | (_INST_SIZE_ is valid) or RESET (_INST_SIZE_ is invalid)

Definition at line 961 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_MODE_BITS

#define IS_QSPI_CONC_XIP_MODE_BITS | ( |  | _MD_BITS_ | ) | ( (_MD_BITS_) <= 0xFFFF)

Check if QSPI.XIP Mode Bits is valid.

Parameters

  _MD_BITS_ | QSPI.XIP Mode Bits.

Return values

  SET | (_MD_BITS_ is valid) or RESET (_MD_BITS_ is invalid)

Definition at line 1021 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_MODE_BITS_EN

#define IS_QSPI_CONC_XIP_MODE_BITS_EN | ( |  | _MD_EN_ | ) |

Value:
( (QSPI_CONCURRENT_XIP_MODE_BITS_ENABLE == (_MD_EN_) ) || \
(QSPI_CONCURRENT_XIP_MODE_BITS_DISABLE == (_MD_EN_) ))

Check if QSPI.XIP Mode bits Switch is valid.

Parameters

  _MD_EN_ | QSPI.XIP Mode bits Switch.

Return values

  SET | (_MD_EN_ is valid) or RESET (_MD_EN_ is invalid)

Definition at line 1005 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_MODE_BITS_SIZE

#define IS_QSPI_CONC_XIP_MODE_BITS_SIZE | ( |  | _MD_SIZE_ | ) |

Value:
( (QSPI_CONCURRENT_XIP_MBL_2 == (_MD_SIZE_)) || \
(QSPI_CONCURRENT_XIP_MBL_4 == (_MD_SIZE_)) || \
(QSPI_CONCURRENT_XIP_MBL_8 == (_MD_SIZE_)) || \
(QSPI_CONCURRENT_XIP_MBL_16 == (_MD_SIZE_)) )

Check if QSPI.XIP Mode Bits size is valid.

Parameters

  _MD_SIZE_ | QSPI.XIP Mode Bits size.

Return values

  SET | (_MD_SIZE_ is valid) or RESET (_MD_SIZE_ is invalid)

Definition at line 1012 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_PREFETCH_EN

#define IS_QSPI_CONC_XIP_PREFETCH_EN | ( |  | _PREFETCH_EN_ | ) |

Value:
( (QSPI_CONCURRENT_XIP_PREFETCH_ENABLE == (_PREFETCH_EN_)) || \
(QSPI_CONCURRENT_XIP_PREFETCH_DISABLE == (_PREFETCH_EN_)) )

Check if QSPI.XIP prefetch switch is valid.

Parameters

  _PREFETCH_EN_ | QSPI.XIP prefetch switch.

Return values

  SET | (_PREFETCH_EN_ is valid) or RESET (_PREFETCH_EN_ is invalid)

Definition at line 1040 of file gr55xx_hal_qspi.h.

## ◆ IS_QSPI_CONC_XIP_SIOO_MODE

#define IS_QSPI_CONC_XIP_SIOO_MODE | ( |  | _SIOO_ | ) |

Value:
( (QSPI_CONCURRENT_XIP_INST_SENT_EVERY_ACCESS == (_SIOO_)) || \
(QSPI_CONCURRENT_XIP_INST_SENT_ONLY_FIRST_ACCESS == (_SIOO_)) )

Check if QSPI.XIP SIOO Mode is valid.

Parameters

  _SIOO_ | QSPI.XIP Data Mode.

Return values

  SET | (_SIOO_ is valid) or RESET (_SIOO_ is invalid)

Definition at line 932 of file gr55xx_hal_qspi.h.

QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPI
#define QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPI
Definition: gr55xx_hal_qspi.h:616
QSPI_CONCURRENT_XIP_DFS_HARDCODE_DISABLE
#define QSPI_CONCURRENT_XIP_DFS_HARDCODE_DISABLE
Definition: gr55xx_hal_qspi.h:669
QSPI_CONCURRENT_XIP_MBL_2
#define QSPI_CONCURRENT_XIP_MBL_2
Definition: gr55xx_hal_qspi.h:577
QSPI_CONCURRENT_XIP_INST_SENT_ONLY_FIRST_ACCESS
#define QSPI_CONCURRENT_XIP_INST_SENT_ONLY_FIRST_ACCESS
Definition: gr55xx_hal_qspi.h:676
QSPI_CONCURRENT_XIP_ADDRSIZE_4BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_4BIT
Definition: gr55xx_hal_qspi.h:596
QSPI_CONCURRENT_XIP_INST_ENABLE
#define QSPI_CONCURRENT_XIP_INST_ENABLE
Definition: gr55xx_hal_qspi.h:654
QSPI_CONCURRENT_XIP_MBL_16
#define QSPI_CONCURRENT_XIP_MBL_16
Definition: gr55xx_hal_qspi.h:580
QSPI_CONCURRENT_XIP_MODE_BITS_DISABLE
#define QSPI_CONCURRENT_XIP_MODE_BITS_DISABLE
Definition: gr55xx_hal_qspi.h:662
QSPI_CONCURRENT_XIP_CONT_XFER_DISABLE
#define QSPI_CONCURRENT_XIP_CONT_XFER_DISABLE
Definition: gr55xx_hal_qspi.h:648
QSPI_CONCURRENT_XIP_PREFETCH_ENABLE
#define QSPI_CONCURRENT_XIP_PREFETCH_ENABLE
Definition: gr55xx_hal_qspi.h:640
QSPI_CONCURRENT_XIP_DFS_BYTE
#define QSPI_CONCURRENT_XIP_DFS_BYTE
Definition: gr55xx_hal_qspi.h:569
QSPI_CONCURRENT_XIP_DFS_HALFWORD
#define QSPI_CONCURRENT_XIP_DFS_HALFWORD
Definition: gr55xx_hal_qspi.h:570
QSPI_CONCURRENT_XIP_ADDRSIZE_60BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_60BIT
Definition: gr55xx_hal_qspi.h:610
QSPI_CONCURRENT_XIP_ADDRSIZE_36BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_36BIT
Definition: gr55xx_hal_qspi.h:604
QSPI_CONCURRENT_XIP_ADDRSIZE_0BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_0BIT
Definition: gr55xx_hal_qspi.h:595
QSPI_CONCURRENT_XIP_INST_DISABLE
#define QSPI_CONCURRENT_XIP_INST_DISABLE
Definition: gr55xx_hal_qspi.h:655
QSPI_CONCURRENT_XIP_ENDIAN_MODE_1
#define QSPI_CONCURRENT_XIP_ENDIAN_MODE_1
Definition: gr55xx_hal_qspi.h:556
QSPI_CONCURRENT_XIP_MBL_4
#define QSPI_CONCURRENT_XIP_MBL_4
Definition: gr55xx_hal_qspi.h:578
QSPI_CONCURRENT_XIP_ADDRSIZE_24BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_24BIT
Definition: gr55xx_hal_qspi.h:601
QSPI_CONCURRENT_XIP_DFS_WORD
#define QSPI_CONCURRENT_XIP_DFS_WORD
Definition: gr55xx_hal_qspi.h:571
QSPI_CONCURRENT_XIP_INSTSIZE_4BIT
#define QSPI_CONCURRENT_XIP_INSTSIZE_4BIT
Definition: gr55xx_hal_qspi.h:587
QSPI_CONCURRENT_XIP_FRF_QUAD_SPI
#define QSPI_CONCURRENT_XIP_FRF_QUAD_SPI
Definition: gr55xx_hal_qspi.h:626
QSPI_CONCURRENT_XIP_ADDRSIZE_32BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_32BIT
Definition: gr55xx_hal_qspi.h:603
QSPI_CONCURRENT_XIP_CONT_XFER_ENABLE
#define QSPI_CONCURRENT_XIP_CONT_XFER_ENABLE
Definition: gr55xx_hal_qspi.h:647
QSPI_CONCURRENT_XIP_MODE_BITS_ENABLE
#define QSPI_CONCURRENT_XIP_MODE_BITS_ENABLE
Definition: gr55xx_hal_qspi.h:661
QSPI_CONCURRENT_XIP_ADDRSIZE_12BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_12BIT
Definition: gr55xx_hal_qspi.h:598
QSPI_CONCURRENT_XIP_INST_IN_SPI_ADDR_IN_SPIFRF
#define QSPI_CONCURRENT_XIP_INST_IN_SPI_ADDR_IN_SPIFRF
Definition: gr55xx_hal_qspi.h:617
QSPI_CONCURRENT_XIP_ADDRSIZE_44BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_44BIT
Definition: gr55xx_hal_qspi.h:606
QSPI_CONCURRENT_XIP_ADDRSIZE_8BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_8BIT
Definition: gr55xx_hal_qspi.h:597
QSPI_CONCURRENT_XIP_INST_SENT_EVERY_ACCESS
#define QSPI_CONCURRENT_XIP_INST_SENT_EVERY_ACCESS
Definition: gr55xx_hal_qspi.h:675
QSPI_CONCURRENT_XIP_MBL_8
#define QSPI_CONCURRENT_XIP_MBL_8
Definition: gr55xx_hal_qspi.h:579
QSPI_CONCURRENT_XIP_ENDIAN_MODE_0
#define QSPI_CONCURRENT_XIP_ENDIAN_MODE_0
Definition: gr55xx_hal_qspi.h:555
QSPI_CONCURRENT_XIP_FRF_DUAL_SPI
#define QSPI_CONCURRENT_XIP_FRF_DUAL_SPI
Definition: gr55xx_hal_qspi.h:625
QSPI_CONCURRENT_XIP_INSTSIZE_8BIT
#define QSPI_CONCURRENT_XIP_INSTSIZE_8BIT
Definition: gr55xx_hal_qspi.h:588
QSPI_CONCURRENT_XIP_INSTSIZE_16BIT
#define QSPI_CONCURRENT_XIP_INSTSIZE_16BIT
Definition: gr55xx_hal_qspi.h:589
QSPI_CONCURRENT_XIP_INSTSIZE_0BIT
#define QSPI_CONCURRENT_XIP_INSTSIZE_0BIT
Definition: gr55xx_hal_qspi.h:586
QSPI_CONCURRENT_XIP_ADDRSIZE_28BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_28BIT
Definition: gr55xx_hal_qspi.h:602
QSPI_CONCURRENT_XIP_ADDRSIZE_52BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_52BIT
Definition: gr55xx_hal_qspi.h:608
QSPI_CONCURRENT_XIP_PREFETCH_DISABLE
#define QSPI_CONCURRENT_XIP_PREFETCH_DISABLE
Definition: gr55xx_hal_qspi.h:641
QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPIFRF
#define QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPIFRF
Definition: gr55xx_hal_qspi.h:618
QSPI_CONCURRENT_XIP_ADDRSIZE_48BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_48BIT
Definition: gr55xx_hal_qspi.h:607
QSPI_CONCURRENT_XIP_ENDIAN_MODE_2
#define QSPI_CONCURRENT_XIP_ENDIAN_MODE_2
Definition: gr55xx_hal_qspi.h:557
QSPI_CONCURRENT_XIP_ADDRSIZE_56BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_56BIT
Definition: gr55xx_hal_qspi.h:609
QSPI_CONCURRENT_XIP_ADDRSIZE_40BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_40BIT
Definition: gr55xx_hal_qspi.h:605
QSPI_CONCURRENT_XIP_ADDRSIZE_16BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_16BIT
Definition: gr55xx_hal_qspi.h:599
QSPI_CONCURRENT_XIP_DFS_HARDCODE_ENABLE
#define QSPI_CONCURRENT_XIP_DFS_HARDCODE_ENABLE
Definition: gr55xx_hal_qspi.h:668
QSPI_CONCURRENT_XIP_ADDRSIZE_20BIT
#define QSPI_CONCURRENT_XIP_ADDRSIZE_20BIT
Definition: gr55xx_hal_qspi.h:600