gr55xx_ll_aon_wdt.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_aon_wdt.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of AON WDT LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_AON_WDT AON_WDT
47 * @brief AON_WDT LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55XX_LL_AON_WDT_H__
53 #define __GR55XX_LL_AON_WDT_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx.h"
61
62 /**
63 * @defgroup AON_WDT_LL_MACRO Defines
64 * @{
65 */
66 /** @defgroup AON_TIMER_WD_TIMER_CLK_SEL Watchdog Timer clock select defines
67 * @{
68 */
69 #define LL_AON_WD_TIMER_CLK_SEL_RNG (0x0U << AON_WDT_CLK_SEL_Pos) /**< Select RNG clcok source */
70 #define LL_AON_WD_TIMER_CLK_SEL_XO (0x1U << AON_WDT_CLK_SEL_Pos) /**< Select XO clcok source */
71 #define LL_AON_WD_TIMER_CLK_SEL_RNG2 (0x2U << AON_WDT_CLK_SEL_Pos) /**< Select RNG2 clcok source */
72 #define LL_AON_WD_TIMER_CLK_SEL_RTC (0x3U << AON_WDT_CLK_SEL_Pos) /**< Select RTC clcok source */
73
74 /** @} */
75
76 /** @defgroup AON_TIMER_WD_REG config read
77 * @{
78 */
79 #define AON_WDT_REG_READ (READ_BITS(AON_WDT->CFG0, AON_WDT_CFG0_EN | \
80 AON_WDT_CFG0_ALARM_EN)) /**< read register config */
81 /** @} */
82 /** @} */
83
84
85 /* Exported functions --------------------------------------------------------*/
86 /** @defgroup AON_WDT_LL_DRIVER_FUNCTIONS Functions
87 * @{
88 */
89
90 /** @defgroup AON_WDT_LL_EF_Configuration Configuration functions
91 * @{
92 */
93
94 /**
95 * @brief Enable AON watchdog counter and interrupt event.
96 *
97 * Register|BitsName
98 * --------|--------
99 * AON_WDT_CFG0 | WDT_EN
100 */
101 __STATIC_INLINE void ll_aon_wdt_enable(void)
102 {
103 WRITE_REG(AON_WDT->CFG0,AON_WDT_CFG0_CFG | AON_WDT_CFG0_EN | AON_WDT_REG_READ);
104 }
105
106 /**
107 * @brief Disable AON watchdog counter and interrupt event.
108 *
109 * Register|BitsName
110 * --------|--------
111 * AON_WDT_CFG0 | WDT_EN
112 *
113 */
114 __STATIC_INLINE void ll_aon_wdt_disable(void)
115 {
116 MODIFY_REG(AON_WDT->CFG0, 0xFFFFFFFF, AON_WDT_CFG0_CFG);
117 }
118
119 /**
120 * @brief Check if the AON_WDT peripheral is enabled or disabled.
121 *
122 * Register|BitsName
123 * --------|--------
124 * AON_WDT_CFG0 | WDT_EN
125 *
126 * @retval State of bit (1 or 0).
127 */
128 __STATIC_INLINE uint32_t ll_aon_wdt_is_enabled(void)
129 {
130 return (READ_BITS(AON_WDT->CFG0, AON_WDT_CFG0_EN) == (AON_WDT_CFG0_EN));
131 }
132
133 /**
134 * @brief Set Watchdog Timer clock
135 *
136 * Register|BitsName
137 * --------|--------
138 * AON_WDT_CLK | wd_timer_clk_sel
139 * @param value: This parameter can be a one of the following values:
140 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_RNG
141 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_XO
142 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_RNG2
143 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_RTC
144 * @retval None
145 */
146 __STATIC_INLINE void ll_aon_wdt_set_clk(uint32_t value)
147 {
148 MODIFY_REG(AON_WDT->CLK, AON_WDT_CLK_SEL, value);
149 }
150
151 /**
152 * @brief Get Watchdog Timer clock
153 *
154 * Register|BitsName
155 * --------|--------
156 * AON_WDT_CLK | wd_timer_clk_sel
157 *
158 * @retval Watchdog Timer clock source,the value can be one of the following:
159 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_RNG
160 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_XO
161 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_RNG2
162 * @arg @ref LL_AON_WD_TIMER_CLK_SEL_RTC
163 */
164 __STATIC_INLINE uint32_t ll_aon_wdt_get_clk(void)
165 {
166 return (READ_BITS(AON_WDT->CLK, AON_WDT_CLK_SEL));
167 }
168
169 /**
170 * @brief Specify the AON WDT down-counter reload value.
171 *
172 * Register|BitsName
173 * --------|--------
174 * TIMER_VALUE | TIMER_VALUE
175 * @param counter: Value for reload down-counter which should ranging between 0 ~ 0xFFFF_FFFF
176 * @retval None
177 */
178 __STATIC_INLINE void ll_aon_wdt_set_reload_counter(uint32_t counter)
179 {
180 WRITE_REG(AON_WDT->TIMER_W, counter);
181 }
182
183 /**
184 * @brief Get the AON WDT down-counter reload value.
185 *
186 * Register|BitsName
187 * --------|--------
188 * WD_TIMER_VAL_W | TIMER_VALUE
189 *
190 * @retval counter Value for reload down-counter which should ranging between 0 ~ 0xFFFF_FFFF.
191 */
192 __STATIC_INLINE uint32_t ll_aon_wdt_get_reload_counter(void)
193 {
194 return (uint32_t)READ_BITS(AON_WDT->TIMER_W, AON_WDT_TIMER_W_VAL);
195 }
196
197 /**
198 * @brief Get the AON WDT down-counter read reload value.
199 *
200 * Register|BitsName
201 * --------|--------
202 * WD_TIMER_STS_0 | TIMER_VALUE
203 *
204 * @retval counter Value for reload down-counter which should ranging between 0 ~ 0xFFFF_FFFF.
205 */
206 __STATIC_INLINE uint32_t ll_aon_wdt_get_reload_read_counter()
207 {
208 return (uint32_t)READ_BITS(AON_WDT->TIMER_R, AON_WDT_TIMER_R_VAL);
209 }
210
211 /**
212 * @brief Reloads AON WDT counter.
213 * @note The value in TIMER_VALUE register will be reloaded into AON WDT down-counter
214 * after enable this bit, so ll_aon_wdt_set_reload_counter() should be called before
215 * every reload.
216 *
217 * Register|BitsName
218 * --------|--------
219 * WD_TIMER_CFG_0 | WDT_RELOAD
220 */
221 __STATIC_INLINE void ll_aon_wdt_reload_counter(void)
222 {
223 WRITE_REG(AON_WDT->CFG0, AON_WDT_CFG0_CFG | AON_WDT_CFG0_TIMER_SET | AON_WDT_REG_READ);
224 }
225
226 /**
227 * @brief Read the AON WDT counter current value.
228 *
229 * Register|BitsName
230 * --------|--------
231 * AON_PAD_CTL1 | AON_WDT_TIMER
232 * TIMER_VAL | TIMER_VAL_READ
233 *
234 * @retval Value for current counter which should ranging between 0 ~ 0xFFFF_FFFF
235 */
236 __STATIC_INLINE uint32_t ll_aon_wdt_get_counter(void)
237 {
238 return (uint32_t)READ_BITS(AON_WDT->TIMER_R, AON_WDT_TIMER_R_VAL);
239 }
240
241 /**
242 * @brief Specify the AON_WDT down-counter alarm value
243 * @note AON watchdog will generate an interrupt when it counts down to the
244 * alarm value to alram that it is almost expired.
245 *
246 * Register|BitsName
247 * --------|--------
248 * EXT_WKUP_CTL | WDT_ALARM
249 *
250 * @param counter: Value between Min_Data=0 and Max_Data=0xFF
251 * @retval None
252 */
253 __STATIC_INLINE void ll_aon_wdt_set_alarm_counter(uint32_t counter)
254 {
255 WRITE_REG(AON_WDT->ALARM_W, (counter & AON_WDT_ALARM_W_VAL));
256 }
257
258 /**
259 * @brief Specify the AON_WDT down-counter alarm value and request
260 * @note AON watchdog will generate an interrupt when it counts down to the
261 * alarm value to alram that it is almost expired.
262 *
263 * Register|BitsName
264 * --------|--------
265 * EXT_WKUP_CTL | WDT_ALARM
266 *
267 * @param counter: Value between Min_Data=0 and Max_Data=0xFF
268 * @retval None
269 */
270 __STATIC_INLINE void ll_aon_wdt_set_alarm_counter_and_request(uint32_t counter)
271 {
272 WRITE_REG(AON_WDT->ALARM_W, (counter & AON_WDT_ALARM_W_VAL));
273 WRITE_REG(AON_WDT->CFG0, AON_WDT_CFG0_CFG | AON_WDT_CFG0_ALARM_SET | AON_WDT_REG_READ);
274 }
275
276 /**
277 * @brief Get the AON_WDT down-counter alarm value
278 * @note AON watchdog will generate an interrupt when it counts down to the
279 * alarm value to alram that it is almost expired.
280 *
281 * Register|BitsName
282 * --------|--------
283 * WD_TIMER_ALARM | WDT_ALARM
284 *
285 * @retval Value between Min_Data=0 and Max_Data=0xFF
286 */
287 __STATIC_INLINE uint32_t ll_aon_wdt_get_alarm_counter(void)
288 {
289 return (uint32_t)(READ_BITS(AON_WDT->ALARM_W, AON_WDT_ALARM_W_VAL));
290 }
291
292 /**
293 * @brief Get the AON_WDT down-counter alarm value
294 *
295 * Register|BitsName
296 * --------|--------
297 * WD_TIMER_STS_1 | WDT_ALARM
298 *
299 * @retval Value between Min_Data=0 and Max_Data=0xFF
300 */
301 __STATIC_INLINE uint32_t ll_aon_wdt_get_alarm_read_counter(void)
302 {
303 return (uint32_t)(READ_BITS(AON_WDT->ALARM_R, AON_WDT_ALARM_R_VAL));
304 }
305
306 /**
307 * @brief AON WDT busy status flag.
308 *
309 * Register|BitsName
310 * --------|--------
311 * WD_TIMER_STS| WD_TIMER_STAT_BUSY
312 *
313 * @retval AON WDT busy status flag.
314 */
315 __STATIC_INLINE uint32_t ll_aon_wdt_is_busy(void)
316 {
317 return (uint32_t)(READ_BITS(AON_WDT->STAT, AON_WDT_STAT_BUSY) == (AON_WDT_STAT_BUSY));
318 }
319
320 /**
321 * @brief Enable aon wdt alarm interrupt.
322 *
323 * Register|BitsName
324 * --------|--------
325 * AON_WDT_CFG0 | ALARM_INT_EN
326 *
327 * @retval None
328 */
329 __STATIC_INLINE void ll_aon_wdt_it_enable_alarm(void)
330 {
331 WRITE_REG(AON_WDT->CFG0, AON_WDT_CFG0_CFG | AON_WDT_CFG0_ALARM_EN | AON_WDT_REG_READ);
332 }
333
334 /**
335 * @brief Disable aon wdt alarm interrupt.
336 *
337 * Register|BitsName
338 * --------|--------
339 * AON_WDT_CFG0 | ALARM_INT_EN
340 *
341 * @retval None
342 */
343 __STATIC_INLINE void ll_aon_wdt_it_disable_alarm(void)
344 {
345 WRITE_REG(AON_WDT->CFG0, (AON_WDT_REG_READ & (~AON_WDT_CFG0_ALARM_EN)) | AON_WDT_CFG0_CFG);
346 }
347
348 /**
349 * @brief Check if the aon wdt alarm interrupt is enabled or disabled.
350 *
351 * Register|BitsName
352 * --------|--------
353 * AON_WDT_CFG0 | ALARM_INT_EN
354 *
355 * @retval State of bit (1 or 0).
356 */
357 __STATIC_INLINE uint32_t ll_aon_wdt_it_is_enabled_alarm(void)
358 {
359 return (uint32_t)(READ_BITS(AON_WDT->CFG0, AON_WDT_CFG0_ALARM_EN) == AON_WDT_CFG0_ALARM_EN);
360 }
361
362 /** @} */
363
364 /** @defgroup AON_WDT_LL_EF_FLAG_Management FLAG_Management
365 * @{
366 */
367
368 /**
369 * @brief Indicate if the AON Watchdog Running Flag is set or not.
370 * @note This bit can be used to check if AON Watchdog is in running state.
371 *
372 * Register|BitsName
373 * --------|--------
374 * WD_TIMER_STS | WDT_RUNNING
375 *
376 * @retval State of bit (1 or 0).
377 */
378 __STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_running(void)
379 {
380 return (uint32_t)(READ_BITS(AON_WDT->STAT, AON_WDT_STAT_STAT) == (AON_WDT_STAT_STAT));
381 }
382
383 /**
384 * @brief Indicate if the AON WDT Reboot Event Flag is set or not.
385 * @note This bit is set by hardware when the counter has reached alarm value.
386 * It can be cleared by writing 0 to this bit.
387 *
388 * Register|BitsName
389 * --------|--------
390 * AON_IRQ | WD_TIMER_REBOOT
391 *
392 * @retval State of bit (1 or 0).
393 */
394 __STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_reboot(void)
395 {
396 return (uint32_t)(READ_BITS(AON_CTL->AON_IRQ, AON_CTL_AON_IRQ_AON_WDT) == AON_CTL_AON_IRQ_AON_WDT);
397 }
398
399 /**
400 * @brief Clear Interrupt Status flag.
401 *
402 * Register|BitsName
403 * --------|--------
404 * AON_IRQ| WD_TIMER_REBOOT
405 *
406 * @retval None
407 */
408 __STATIC_INLINE void ll_aon_wdt_clear_flag_reboot(void)
409 {
410 WRITE_REG(AON_CTL->AON_IRQ, ~AON_CTL_AON_IRQ_AON_WDT);
411 }
412
413 /**
414 * @brief Indicate if the AON WDT Alarm Event Flag is set or not.
415 * @note This bit is set by hardware when the counter has reached alarm value.
416 * It can be cleared by writing 0 to this bit.
417 *
418 * Register|BitsName
419 * --------|--------
420 * SLP_EVENT | SLP_EVENT_WDT
421 *
422 * @retval State of bit (1 or 0).
423 */
424 __STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_alarm(void)
425 {
426 return (uint32_t)(READ_BITS(AON_CTL->AON_SLP_EVENT, AON_CTL_SLP_EVENT_AON_WDT) == AON_CTL_SLP_EVENT_AON_WDT);
427 }
428
429 /**
430 * @brief Clear Interrupt Status flag.
431 *
432 * Register|BitsName
433 * --------|--------
434 * SLP_EVENT| SLP_EVENT_WDT
435 *
436 * @retval None
437 */
438 __STATIC_INLINE void ll_aon_wdt_clear_flag_alarm(void)
439 {
440 WRITE_REG(AON_CTL->AON_SLP_EVENT, ~AON_CTL_SLP_EVENT_AON_WDT);
441 }
442
443 /**
444 * @brief Enable write access.
445 *
446 * @retval None
447 */
448 __STATIC_INLINE void ll_aon_wdt_enable_write_access(void)
449 {
450 WRITE_REG(AON_WDT->LOCK, 0x15CC5A51 << 1);
451 }
452
453 /**
454 * @brief Disable write access.
455 *
456 * @retval None
457 */
458 __STATIC_INLINE void ll_aon_wdt_disable_write_access(void)
459 {
460 WRITE_REG(AON_WDT->LOCK, 0 << 1);
461 }
462
463 /** @} */
464
465 /** @} */
466
467
468 #ifdef __cplusplus
469 }
470 #endif
471
472 #endif /* __GR55XX_LL_AON_WDT_PATCH_H__ */
473
474 /** @} */
475
476 /** @} */
477
478 /** @} */
ll_aon_wdt_set_alarm_counter_and_request
__STATIC_INLINE void ll_aon_wdt_set_alarm_counter_and_request(uint32_t counter)
Specify the AON_WDT down-counter alarm value and request.
Definition: gr55xx_ll_aon_wdt.h:270
ll_aon_wdt_clear_flag_alarm
__STATIC_INLINE void ll_aon_wdt_clear_flag_alarm(void)
Clear Interrupt Status flag.
Definition: gr55xx_ll_aon_wdt.h:438
ll_aon_wdt_it_disable_alarm
__STATIC_INLINE void ll_aon_wdt_it_disable_alarm(void)
Disable aon wdt alarm interrupt.
Definition: gr55xx_ll_aon_wdt.h:343
ll_aon_wdt_get_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_counter(void)
Read the AON WDT counter current value.
Definition: gr55xx_ll_aon_wdt.h:236
ll_aon_wdt_set_alarm_counter
__STATIC_INLINE void ll_aon_wdt_set_alarm_counter(uint32_t counter)
Specify the AON_WDT down-counter alarm value.
Definition: gr55xx_ll_aon_wdt.h:253
ll_aon_wdt_is_active_flag_alarm
__STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_alarm(void)
Indicate if the AON WDT Alarm Event Flag is set or not.
Definition: gr55xx_ll_aon_wdt.h:424
ll_aon_wdt_reload_counter
__STATIC_INLINE void ll_aon_wdt_reload_counter(void)
Reloads AON WDT counter.
Definition: gr55xx_ll_aon_wdt.h:221
ll_aon_wdt_enable_write_access
__STATIC_INLINE void ll_aon_wdt_enable_write_access(void)
Enable write access.
Definition: gr55xx_ll_aon_wdt.h:448
ll_aon_wdt_is_enabled
__STATIC_INLINE uint32_t ll_aon_wdt_is_enabled(void)
Check if the AON_WDT peripheral is enabled or disabled.
Definition: gr55xx_ll_aon_wdt.h:128
ll_aon_wdt_get_clk
__STATIC_INLINE uint32_t ll_aon_wdt_get_clk(void)
Get Watchdog Timer clock.
Definition: gr55xx_ll_aon_wdt.h:164
ll_aon_wdt_it_enable_alarm
__STATIC_INLINE void ll_aon_wdt_it_enable_alarm(void)
Enable aon wdt alarm interrupt.
Definition: gr55xx_ll_aon_wdt.h:329
ll_aon_wdt_get_reload_read_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_reload_read_counter()
Get the AON WDT down-counter read reload value.
Definition: gr55xx_ll_aon_wdt.h:206
ll_aon_wdt_clear_flag_reboot
__STATIC_INLINE void ll_aon_wdt_clear_flag_reboot(void)
Clear Interrupt Status flag.
Definition: gr55xx_ll_aon_wdt.h:408
ll_aon_wdt_is_active_flag_running
__STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_running(void)
Indicate if the AON Watchdog Running Flag is set or not.
Definition: gr55xx_ll_aon_wdt.h:378
ll_aon_wdt_enable
__STATIC_INLINE void ll_aon_wdt_enable(void)
Enable AON watchdog counter and interrupt event.
Definition: gr55xx_ll_aon_wdt.h:101
AON_WDT_REG_READ
#define AON_WDT_REG_READ
Definition: gr55xx_ll_aon_wdt.h:79
ll_aon_wdt_get_alarm_read_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_alarm_read_counter(void)
Get the AON_WDT down-counter alarm value.
Definition: gr55xx_ll_aon_wdt.h:301
ll_aon_wdt_get_reload_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_reload_counter(void)
Get the AON WDT down-counter reload value.
Definition: gr55xx_ll_aon_wdt.h:192
ll_aon_wdt_get_alarm_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_alarm_counter(void)
Get the AON_WDT down-counter alarm value.
Definition: gr55xx_ll_aon_wdt.h:287
ll_aon_wdt_set_reload_counter
__STATIC_INLINE void ll_aon_wdt_set_reload_counter(uint32_t counter)
Specify the AON WDT down-counter reload value.
Definition: gr55xx_ll_aon_wdt.h:178
ll_aon_wdt_disable
__STATIC_INLINE void ll_aon_wdt_disable(void)
Disable AON watchdog counter and interrupt event.
Definition: gr55xx_ll_aon_wdt.h:114
ll_aon_wdt_set_clk
__STATIC_INLINE void ll_aon_wdt_set_clk(uint32_t value)
Set Watchdog Timer clock.
Definition: gr55xx_ll_aon_wdt.h:146
ll_aon_wdt_is_active_flag_reboot
__STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_reboot(void)
Indicate if the AON WDT Reboot Event Flag is set or not.
Definition: gr55xx_ll_aon_wdt.h:394
ll_aon_wdt_is_busy
__STATIC_INLINE uint32_t ll_aon_wdt_is_busy(void)
AON WDT busy status flag.
Definition: gr55xx_ll_aon_wdt.h:315
ll_aon_wdt_it_is_enabled_alarm
__STATIC_INLINE uint32_t ll_aon_wdt_it_is_enabled_alarm(void)
Check if the aon wdt alarm interrupt is enabled or disabled.
Definition: gr55xx_ll_aon_wdt.h:357
ll_aon_wdt_disable_write_access
__STATIC_INLINE void ll_aon_wdt_disable_write_access(void)
Disable write access.
Definition: gr55xx_ll_aon_wdt.h:458