gr55xx_ll_efuse.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_efuse.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of eFuse LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_EFUSE EFUSE
47 * @brief eFuse LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55xx_LL_EFUSE_H__
53 #define __GR55xx_LL_EFUSE_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx.h"
61
62 #if defined (EFUSE)
63
64 /**
65 * @defgroup EFUSE_LL_MACRO Defines
66 * @{
67 */
68
69 /* Exported constants --------------------------------------------------------*/
70 /** @defgroup EFUSE_LL_Exported_Constants EFUSE Exported Constants
71 * @{
72 */
73
74 /** @defgroup EFUSE_LL_EC_OPERATION EFUSE Operation Defines
75 * @brief Operation defines which can be used with LL_EFUSE_WriteReg function
76 * @{
77 */
78 #define LL_EFUSE_WRITE_KEYRAM EFUSE_OPER_WRITE_KEYRAM /**< Read fwkay and rootkey from eFuse, and write to keyram */
79 #define LL_EFUSE_READ_TRIM EFUSE_OPER_READ_TRIM /**< Read analog trim from eFuse */
80 #define LL_EFUSE_CRC_CHECK EFUSE_OPER_CRC_CHECK /**< Read the special eFuse addr, and calculate CRC value */
81 #define LL_EFUSE_INIT_CHECK EFUSE_OPER_INIT_CHECK /**< Read the whole eFuse value, and check this value with 0 */
82 #define LL_EFUSE_TEST_READ EFUSE_OPER_RD_TEST_MODE /**< Read eFuse test mode from eFuse */
83 /** @} */
84
85 /** @defgroup EFUSE_LL_EC_GET_FLAG Get Flags Defines
86 * @brief Flags defines which can be used with LL_EFUSE_ReadReg function
87 * @{
88 */
89 #define LL_EFUSE_WRITE_KEYRAM_BUSY EFUSE_STATUS_WRITE_KEYRAM_BUSY /**< Write keyram operation is in processing */
90 #define LL_EFUSE_READ_TRIM_DONE EFUSE_STATUS_READ_TRIM_DONE /**< Read trim from eFuse has done */
91 #define LL_EFUSE_CRC_CHECK_DONE EFUSE_STATUS_CRC_CHECK_DONE /**< eFuse CRC check done */
92 #define LL_EFUSE_CRC_CHECK_SUCCESS EFUSE_STATUS_TRIM_CRC_SUCCESS /**< CRC check success */
93 #define LL_EFUSE_INIT_CHECK_DONE EFUSE_STATUS_INIT_DONE /**< eFuse initial value check done */
94 #define LL_EFUSE_INIT_CHECK_SUCCESS EFUSE_STATUS_INIT_SUCCESS /**< eFuse initial value check success */
95 #define LL_EFUSE_WRITE_DONE EFUSE_STATUS_WRITE_DONE /**< eFuse one word write done */
96 #define LL_EFUSE_TEST_DONE EFUSE_STATUS_TEST_MODE_DONE /**< Read from eFuse has done in test mode */
97 /** @} */
98
99 /** @defgroup EFUSE_LL_EC_GET_CTL_FLAG Get Power Controller Flags Defines
100 * @brief Flags defines which can be used with LL_EFUSE_ReadReg function
101 * @{
102 */
103 #define LL_EFUSE_PWR_CTL_EN_DONE MCU_SUB_EFUSE_PWR_CTL0_EN_DONE /**< eFuse power enable done */
104 #define LL_EFUSE_PWR_CTL_DIS_DONE MCU_SUB_EFUSE_PWR_CTL0_DIS_DONE /**< eFuse power disable done */
105 /** @} */
106
107 /** @} */
108
109 /* Exported macro ------------------------------------------------------------*/
110 /** @defgroup EFUSE_LL_Exported_Macros EFUSE Exported Macros
111 * @{
112 */
113
114 /** @defgroup EFUSE_LL_EM_WRITE_READ Common Write and read registers Macros
115 * @{
116 */
117
118 /**
119 * @brief Write a value in eFuse register
120 * @param __instance__ eFuse instance
121 * @param __REG__ Register to be written
122 * @param __VALUE__ Value to be written in the register
123 * @retval None
124 */
125 #define LL_EFUSE_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG(__instance__->__REG__, (__VALUE__))
126
127 /**
128 * @brief Read a value in eFuse register
129 * @param __instance__ eFuse instance
130 * @param __REG__ Register to be read
131 * @retval Register value
132 */
133 #define LL_EFUSE_ReadReg(__instance__, __REG__) READ_REG(__instance__->__REG__)
134
135 /** @} */
136
137 /** @} */
138
139 /** @} */
140
141 /* Exported functions --------------------------------------------------------*/
142 /** @defgroup EFUSE_LL_DRIVER_FUNCTIONS Functions
143 * @{
144 */
145
146 /** @defgroup EFUSE_LL_EF_Configuration Configuration functions
147 * @{
148 */
149
150 /**
151 * @brief Set eFuse program time
152 *
153 * Register|BitsName
154 * --------|--------
155 * TPGM | TIME
156 *
157 * @param EFUSEx eFuse instance
158 * @param time This parameter can be one of the following values: 0 ~ 0xFFF
159 * @retval None
160 */
161 __STATIC_INLINE void ll_efuse_set_tpro(efuse_regs_t *EFUSEx, uint32_t time)
162 {
163 MODIFY_REG(EFUSEx->TPGM, EFUSE_TPGM_TIME, ((time << EFUSE_TPGM_TIME_Pos) & EFUSE_TPGM_TIME));
164 }
165
166 /**
167 * @brief Get eFuse program time
168 *
169 * Register|BitsName
170 * --------|--------
171 * TPGM | TIME
172 *
173 * @param EFUSEx eFuse instance
174 * @retval Returned value can be one of the following values: 0 ~ 0xFFF
175 */
176 __STATIC_INLINE uint32_t ll_efuse_get_tpro(efuse_regs_t *EFUSEx)
177 {
178 return (uint32_t)(READ_BITS(EFUSEx->TPGM, EFUSE_TPGM_TIME) >> EFUSE_TPGM_TIME_Pos);
179 }
180
181 /**
182 * @brief Enable main area OR backup area function when read eFuse through APB bus
183 *
184 * Register|BitsName
185 * --------|--------
186 * TPGM | MAIN_OR_BACKUP
187 *
188 * @param EFUSEx eFuse instance
189 * @retval None
190 */
191 __STATIC_INLINE void ll_efuse_enable_main_backup(efuse_regs_t *EFUSEx)
192 {
193 SET_BITS(EFUSEx->TPGM, EFUSE_TPGM_MAIN_OR_BACKUP);
194 }
195
196 /**
197 * @brief Disable main area OR backup area function when read eFuse through APB bus
198 *
199 * Register|BitsName
200 * --------|--------
201 * TPGM | MAIN_OR_BACKUP
202 *
203 * @param EFUSEx eFuse instance
204 * @retval None
205 */
206 __STATIC_INLINE void ll_efuse_disable_main_backup(efuse_regs_t *EFUSEx)
207 {
208 CLEAR_BITS(EFUSEx->TPGM, EFUSE_TPGM_MAIN_OR_BACKUP);
209 }
210
211 /**
212 * @brief Check if main area OR backup area reading function is enabled
213 *
214 * Register|BitsName
215 * --------|--------
216 * TPGM | MAIN_OR_BACKUP
217 *
218 * @param EFUSEx eFuse instance
219 * @retval State of bit (1 or 0).
220 */
221 __STATIC_INLINE uint32_t ll_efuse_is_enabled_main_backup(efuse_regs_t *EFUSEx)
222 {
223 return (READ_BITS(EFUSEx->TPGM, EFUSE_TPGM_MAIN_OR_BACKUP) == (EFUSE_TPGM_MAIN_OR_BACKUP));
224 }
225
226 /**
227 * @brief Set CRC check length
228 *
229 * Register|BitsName
230 * --------|--------
231 * TPGM | CRC_CHECK_LEN
232 *
233 * @param EFUSEx eFuse instance
234 * @param length This parameter can be one of the following values: 1 ~ 60
235 * @retval None
236 */
237 __STATIC_INLINE void ll_efuse_set_crc_check_len(efuse_regs_t *EFUSEx, uint32_t length)
238 {
239 MODIFY_REG(EFUSEx->TPGM, EFUSE_TPGM_CRC_CHECK_LEN, length << EFUSE_TPGM_CRC_CHECK_LEN_Pos);
240 }
241
242 /**
243 * @brief Get CRC check length
244 *
245 * Register|BitsName
246 * --------|--------
247 * TPGM | CRC_CHECK_LEN
248 *
249 * @param EFUSEx eFuse instance
250 * @retval Returned value can be one of the following values: 1 ~ 60
251 */
252 __STATIC_INLINE uint32_t ll_efuse_get_crc_check_len(efuse_regs_t *EFUSEx)
253 {
254 return (uint32_t)(READ_BITS(EFUSEx->TPGM, EFUSE_TPGM_CRC_CHECK_LEN) >> EFUSE_TPGM_CRC_CHECK_LEN_Pos);
255 }
256
257 /**
258 * @brief Set the interval number of clk cycles between two bit fuse
259 *
260 * Register|BitsName
261 * --------|--------
262 * TPGM | WRITE_INTERVAL
263 *
264 * @param EFUSEx eFuse instance
265 * @param interval This parameter can be one of the following values: 0 ~ 0xFF
266 * @retval None
267 */
268 __STATIC_INLINE void ll_efuse_set_write_interval(efuse_regs_t *EFUSEx, uint32_t interval)
269 {
270 MODIFY_REG(EFUSEx->TPGM, EFUSE_TPGM_WRITE_INTERVAL, interval << EFUSE_TPGM_WRITE_INTERVAL_Pos);
271 }
272
273 /**
274 * @brief Get the interval number of clk cycles between two bit fuse
275 *
276 * Register|BitsName
277 * --------|--------
278 * TPGM | WRITE_INTERVAL
279 *
280 * @param EFUSEx eFuse instance
281 * @retval Returned value can be one of the following values: 0 ~ 0xFF
282 */
283 __STATIC_INLINE uint8_t ll_efuse_get_write_interval(efuse_regs_t *EFUSEx)
284 {
285 return (uint8_t)(READ_BITS(EFUSEx->TPGM, EFUSE_TPGM_WRITE_INTERVAL) >> EFUSE_TPGM_WRITE_INTERVAL_Pos);
286 }
287
288 /**
289 * @brief Enable eFuse PGENB sigal
290 *
291 * Register|BitsName
292 * --------|--------
293 * PGENB | PGMEN_CTRL
294 *
295 * @param EFUSEx eFuse instance
296 * @param value eFuse value
297 * @retval None
298 */
299 __STATIC_INLINE void ll_efuse_set_pgmen(efuse_regs_t *EFUSEx, uint8_t value)
300 {
301 MODIFY_REG(EFUSEx->PGENB, EFUSE_PGENB_PGMEN_CTRL, (value << EFUSE_PGENB_PGMEN_CTRL_Pos) & EFUSE_PGENB_PGMEN_CTRL);
302 }
303
304 /**
305 * @brief Get eFuse PGENB sigal
306 *
307 * Register|BitsName
308 * --------|--------
309 * PGENB | PGMEN_CTRL
310 *
311 * @param EFUSEx eFuse instance
312 * @retval None
313 */
314 __STATIC_INLINE uint8_t ll_efuse_get_pgmen(efuse_regs_t *EFUSEx)
315 {
316 return (uint8_t)(READ_BITS(EFUSEx->PGENB, EFUSE_PGENB_PGMEN_CTRL) >> EFUSE_PGENB_PGMEN_CTRL_Pos);
317 }
318
319 /**
320 * @brief Get test mode
321 * @note This bit should be read only.
322 *
323 * Register|BitsName
324 * --------|--------
325 * TEST_MODE | TEST_MODE
326 *
327 * @param EFUSEx eFuse instance
328 * @retval Returned value can be one of the following values: 0xFFFF
329 */
330 __STATIC_INLINE uint32_t ll_efuse_get_test_mode(efuse_regs_t *EFUSEx)
331 {
332 return (uint32_t)(READ_BITS(EFUSEx->TEST_MODE, EFUSE_TEST_MODE));
333 }
334
335 /**
336 * @brief Set eFuse operation mode
337 *
338 * Register|BitsName
339 * --------|--------
340 * OPERATION | WRITE_KEYRAM
341 * OPERATION | INIT_CHECK
342 * OPERATION | CRC_CHECK
343 * OPERATION | READ_TRIM
344 * OPERATION | RD_TEST_MODE
345 *
346 * @param EFUSEx eFuse instance
347 * @param mode This parameter can be one of the following values:
348 * @arg @ref LL_EFUSE_WRITE_KEYRAM
349 * @arg @ref LL_EFUSE_READ_TRIM
350 * @arg @ref LL_EFUSE_CRC_CHECK
351 * @arg @ref LL_EFUSE_INIT_CHECK
352 * @arg @ref LL_EFUSE_TEST_READ
353 * @retval None
354 */
355 __STATIC_INLINE void ll_efuse_set_operation(efuse_regs_t *EFUSEx, uint32_t mode)
356 {
357 WRITE_REG(EFUSEx->OPERATION, mode);
358 }
359
360 /**
361 * @brief Check active flag
362 *
363 * Register|BitsName
364 * --------|--------
365 * STAT | WRITE_KEYRAM_BUSY
366 * STAT | READ_TRIM_DONE
367 * STAT | TRIM_CRC_SUCCESS
368 * STAT | INIT_DONE
369 * STAT | INIT_SUCCESS
370 * STAT | CRC_CHECK_DONE
371 * STAT | WRITE_DONE
372 * STAT | TEST_MODE_DONE
373 *
374 * @param EFUSEx eFuse instance
375 * @param flag This parameter can be one of the following values:
376 * @arg @ref LL_EFUSE_WRITE_KEYRAM_BUSY
377 * @arg @ref LL_EFUSE_READ_TRIM_DONE
378 * @arg @ref LL_EFUSE_CRC_CHECK_DONE
379 * @arg @ref LL_EFUSE_CRC_CHECK_SUCCESS
380 * @arg @ref LL_EFUSE_INIT_CHECK_DONE
381 * @arg @ref LL_EFUSE_INIT_CHECK_SUCCESS
382 * @arg @ref LL_EFUSE_WRITE_DONE
383 * @arg @ref LL_EFUSE_TEST_DONE
384 * @retval State of bit (1 or 0).
385 */
386 __STATIC_INLINE uint32_t ll_efuse_is_active_flag(efuse_regs_t *EFUSEx, uint32_t flag)
387 {
388 return (READ_BITS(EFUSEx->STAT, flag) == (flag));
389 }
390
391 /**
392 * @brief Set key mask
393 *
394 * Register|BitsName
395 * --------|--------
396 * KEY_MASK | KEY_MASK
397 *
398 * @param EFUSEx eFuse instance
399 * @param mask Key mask
400 * @retval None
401 */
402 __STATIC_INLINE void ll_efuse_set_key_mask(efuse_regs_t *EFUSEx, uint32_t mask)
403 {
404 WRITE_REG(EFUSEx->KEY_MASK, mask);
405 }
406
407 /**
408 * @brief Get key mask
409 *
410 * Register|BitsName
411 * --------|--------
412 * KEY_MASK | KEY_MASK
413 *
414 * @param EFUSEx eFuse instance
415 * @retval None
416 */
417 __STATIC_INLINE uint32_t ll_efuse_get_key_mask(efuse_regs_t *EFUSEx)
418 {
419 return (uint32_t)(READ_REG(EFUSEx->KEY_MASK));
420 }
421
422 /**
423 * @brief Set CRC check start address
424 * @note The address must be a main info address.
425 *
426 * Register|BitsName
427 * --------|--------
428 * CRC_ADDR | START_CHECK_ADDR
429 *
430 * @param EFUSEx eFuse instance
431 * @param address This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
432 * @retval None
433 */
434 __STATIC_INLINE void ll_efuse_set_crc_check_addr(efuse_regs_t *EFUSEx, uint32_t address)
435 {
436 WRITE_REG(EFUSEx->CRC_ADDR, address);
437 }
438
439 /**
440 * @brief Get CRC check start address
441 *
442 * Register|BitsName
443 * --------|--------
444 * CRC_ADDR | START_CHECK_ADDR
445 *
446 * @param EFUSEx eFuse instance
447 * @retval Returned value can be one of the following values: 0 ~ 0xFFFFFFFF
448 */
449 __STATIC_INLINE uint32_t ll_efuse_get_crc_check_addr(efuse_regs_t *EFUSEx)
450 {
451 return (uint32_t)(READ_REG(EFUSEx->CRC_ADDR));
452 }
453
454 /**
455 * @brief Get CRC check results
456 *
457 * Register|BitsName
458 * --------|--------
459 * CRC_OUTPUT | OUTPUT_VALUE
460 *
461 * @param EFUSEx eFuse instance
462 * @retval Returned value can be one of the following values: 0 ~ 0xFFFFFFFF
463 */
464 __STATIC_INLINE uint32_t ll_efuse_get_crc_check_result(efuse_regs_t *EFUSEx)
465 {
466 return (uint32_t)(READ_REG(EFUSEx->CRC_OUTPUT));
467 }
468
469 /**
470 * @brief Set read trim start address
471 * @note The address must be a main info address.
472 *
473 * Register|BitsName
474 * --------|--------
475 * TRIM_ADDR | START_ADDR
476 *
477 * @param EFUSEx eFuse instance
478 * @param address This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
479 * @retval None
480 */
481 __STATIC_INLINE void ll_efuse_set_trim_addr(efuse_regs_t *EFUSEx, uint32_t address)
482 {
483 WRITE_REG(EFUSEx->TRIM_ADDR, address);
484 }
485
486 /**
487 * @brief Get read trim start address
488 *
489 * Register|BitsName
490 * --------|--------
491 * TRIM_ADDR | START_ADDR
492 *
493 * @param EFUSEx eFuse instance
494 * @retval Returned value can be one of the following values: 0 ~ 0xFFFFFFFF
495 */
496 __STATIC_INLINE uint32_t ll_efuse_get_trim_addr(efuse_regs_t *EFUSEx)
497 {
498 return (uint32_t)(READ_REG(EFUSEx->TRIM_ADDR));
499 }
500
501 /**
502 * @brief Set read trim length
503 *
504 * Register|BitsName
505 * --------|--------
506 * TRIM_LEN | LENGTH
507 *
508 * @param EFUSEx eFuse instance
509 * @param length This parameter can be one of the following values: 1 ~ 14
510 * @retval None
511 */
512 __STATIC_INLINE void ll_efuse_set_trim_length(efuse_regs_t *EFUSEx, uint32_t length)
513 {
514 WRITE_REG(EFUSEx->TRIM_LEN, length & EFUSE_TRIM_LENGTH);
515 }
516
517 /**
518 * @brief Get read trim length
519 *
520 * Register|BitsName
521 * --------|--------
522 * TRIM_LEN | LENGTH
523 *
524 * @param EFUSEx eFuse instance
525 * @retval Returned value can be one of the following values: 1 ~ 14
526 */
527 __STATIC_INLINE uint32_t ll_efuse_get_trim_length(efuse_regs_t *EFUSEx)
528 {
529 return (uint32_t)(READ_REG(EFUSEx->TRIM_LEN) & EFUSE_TRIM_LENGTH);
530 }
531
532 /**
533 * @brief Get trim value
534 *
535 * Register|BitsName
536 * --------|--------
537 * TRIM[n] | TRIM
538 *
539 * @param EFUSEx eFuse instance
540 * @param indx index of trim value registers: 0 ~ 13
541 * @retval Returned value can be one of the following values: 0 ~ 0xFFFFFFFF
542 */
543 __STATIC_INLINE uint32_t ll_efuse_get_trim_value(efuse_regs_t *EFUSEx, uint32_t indx)
544 {
545 return (uint32_t)(READ_REG(EFUSEx->TRIM[indx]));
546 }
547
548 /**
549 * @brief eFuse v1.1 power on. This power must be turn on before eFuse operation.
550 *
551 * Register|BitsName
552 * --------|--------
553 * RF_REG_2 | EFUSE_VDD_EN
554 *
555 * @retval None
556 */
557 __STATIC_INLINE void ll_efuse_enable_power(efuse_regs_t *EFUSEx)
558 {
559 SET_BITS(AON_PMU->RF_REG_2, AON_PMU_RF_REG_2_EFUSE_VDD_EN);
560 }
561
562 /**
563 * @brief eFuse v1.1 power off.
564 *
565 * Register|BitsName
566 * --------|--------
567 * RF_REG_2 | EFUSE_VDD_EN
568 *
569 * @retval None
570 */
571 __STATIC_INLINE void ll_efuse_disable_power(efuse_regs_t *EFUSEx)
572 {
573 CLEAR_BITS(AON_PMU->RF_REG_2, AON_PMU_RF_REG_2_EFUSE_VDD_EN);
574 }
575
576
577 /**
578 * @brief eFuse v2.5 power on. This power must be turn on before eFuse writting, and trun off when eFuse reading.
579 *
580 * Register|BitsName
581 * --------|--------
582 * RF_REG_2 | EFUSE_VDDQ_EN
583 * RF_REG_2 | EFUSE_VDDQ_EN_DEL
584 *
585 * @retval None
586 */
587 __STATIC_INLINE void ll_efuse_enable_write_power(efuse_regs_t *EFUSEx)
588 {
589 SET_BITS(AON_PMU->RF_REG_2, AON_PMU_RF_REG_2_EFUSE_VDDQ_EN | AON_PMU_RF_REG_2_EFUSE_VDDQ_EN_DEL);
590 }
591
592 /**
593 * @brief eFuse v2.5 power off.
594 *
595 * Register|BitsName
596 * --------|--------
597 * RF_REG_2 | EFUSE_VDDQ_EN
598 * RF_REG_2 | EFUSE_VDDQ_EN_DEL
599 *
600 * @retval None
601 */
602 __STATIC_INLINE void ll_efuse_disable_write_power(efuse_regs_t *EFUSEx)
603 {
604 CLEAR_BITS(AON_PMU->RF_REG_2, AON_PMU_RF_REG_2_EFUSE_VDDQ_EN | AON_PMU_RF_REG_2_EFUSE_VDDQ_EN_DEL);
605 }
606
607 /**
608 * @brief Set Efulse power controller timing pararmeter.
609 *
610 * Register |BitsName
611 * ----------|--------
612 * PWR_DELTA| PWR_DELTA_0
613 * PWR_DELTA| PWR_DELTA_1
614 * PWR_DELTA| PWR_DELTA_2
615 *
616 * @retval None
617 */
618 __STATIC_INLINE void ll_efuse_set_controller_power_timing(efuse_regs_t *EFUSEx, uint16_t vddq_0, uint16_t vddq_1, uint16_t vddq_2)
619 {
620 WRITE_REG(MCU_SUB->EFUSE_PWR_DELTA_0, vddq_0 + (vddq_1 << 16));
621 WRITE_REG(MCU_SUB->EFUSE_PWR_DELTA_1, vddq_2);
622 }
623
624 /**
625 * @brief Power sequencer begin.
626 *
627 * Register |BitsName
628 * -----------|--------
629 * PWR_CTRL0 | CTRL_ENABLE
630 * PWR_CTRL0 | SEQR_BEGIN
631 *
632 * @retval None
633 */
634 __STATIC_INLINE void ll_efuse_enable_controller_power_begin(efuse_regs_t *EFUSEx)
635 {
636 WRITE_REG(MCU_SUB->EFUSE_PWR_CTRL_0, MCU_SUB_EFUSE_PWR_CTL0_BGN | MCU_SUB_EFUSE_PWR_CTL0_EN);
637 }
638
639 /**
640 * @brief Power sequencer begin.
641 *
642 * Register |BitsName
643 * -----------|--------
644 * PWR_CTRL0 | CTRL_ENABLE
645 * PWR_CTRL0 | SEQR_STOP
646 *
647 * @retval None
648 */
649 __STATIC_INLINE void ll_efuse_enable_controller_power_stop(efuse_regs_t *EFUSEx)
650 {
651 WRITE_REG(MCU_SUB->EFUSE_PWR_CTRL_0, MCU_SUB_EFUSE_PWR_CTL0_STP | MCU_SUB_EFUSE_PWR_CTL0_EN);
652 }
653
654 /**
655 * @brief Power sequencer begin.
656 *
657 * Register |BitsName
658 * --------- -|--------
659 * PWR_CTRL0 | CTRL_ENABLE
660 * PWR_CTRL0 | SEQR_BEGIN
661 * PWR_CTRL0 | SEQR_STOP
662 *
663 * @retval None
664 */
665 __STATIC_INLINE void ll_efuse_disable_controller_power(efuse_regs_t *EFUSEx)
666 {
667 WRITE_REG(MCU_SUB->EFUSE_PWR_CTRL_0, 0);
668 }
669
670 /**
671 * @brief Check power controller active flag
672 *
673 * Register|BitsName
674 * --------|--------
675 * PWR_CTRL1 | EN_DONE
676 * PWR_CTRL1 | DIS_DONE
677 *
678 * @param EFUSEx eFuse instance
679 * @param flag This parameter can be one of the following values:
680 * @arg @ref LL_EFUSE_PWR_CTL_EN_DONE
681 * @arg @ref LL_EFUSE_PWR_CTL_DIS_DONE
682 * @retval State of bit (1 or 0).
683 */
684 __STATIC_INLINE uint32_t ll_efuse_is_controller_power_flag(efuse_regs_t *EFUSEx, uint32_t flag)
685 {
686 return (READ_BITS(MCU_SUB->EFUSE_PWR_CTRL_1, flag) == (flag));
687 }
688
689 /** @} */
690
691 /** @} */
692
693 #endif /* EFUSE */
694
695 #ifdef __cplusplus
696 }
697 #endif
698
699 #endif /* __GR55xx_LL_EFUSE_H__ */
700
701 /** @} */
702
703 /** @} */
704
705 /** @} */
ll_efuse_disable_controller_power
__STATIC_INLINE void ll_efuse_disable_controller_power(efuse_regs_t *EFUSEx)
Power sequencer begin.
Definition: gr55xx_ll_efuse.h:665
ll_efuse_get_trim_value
__STATIC_INLINE uint32_t ll_efuse_get_trim_value(efuse_regs_t *EFUSEx, uint32_t indx)
Get trim value.
Definition: gr55xx_ll_efuse.h:543
ll_efuse_get_crc_check_addr
__STATIC_INLINE uint32_t ll_efuse_get_crc_check_addr(efuse_regs_t *EFUSEx)
Get CRC check start address.
Definition: gr55xx_ll_efuse.h:449
ll_efuse_get_trim_addr
__STATIC_INLINE uint32_t ll_efuse_get_trim_addr(efuse_regs_t *EFUSEx)
Get read trim start address.
Definition: gr55xx_ll_efuse.h:496
ll_efuse_enable_controller_power_begin
__STATIC_INLINE void ll_efuse_enable_controller_power_begin(efuse_regs_t *EFUSEx)
Power sequencer begin.
Definition: gr55xx_ll_efuse.h:634
ll_efuse_get_pgmen
__STATIC_INLINE uint8_t ll_efuse_get_pgmen(efuse_regs_t *EFUSEx)
Get eFuse PGENB sigal.
Definition: gr55xx_ll_efuse.h:314
ll_efuse_set_crc_check_addr
__STATIC_INLINE void ll_efuse_set_crc_check_addr(efuse_regs_t *EFUSEx, uint32_t address)
Set CRC check start address.
Definition: gr55xx_ll_efuse.h:434
ll_efuse_get_test_mode
__STATIC_INLINE uint32_t ll_efuse_get_test_mode(efuse_regs_t *EFUSEx)
Get test mode.
Definition: gr55xx_ll_efuse.h:330
ll_efuse_set_trim_length
__STATIC_INLINE void ll_efuse_set_trim_length(efuse_regs_t *EFUSEx, uint32_t length)
Set read trim length.
Definition: gr55xx_ll_efuse.h:512
ll_efuse_disable_main_backup
__STATIC_INLINE void ll_efuse_disable_main_backup(efuse_regs_t *EFUSEx)
Disable main area OR backup area function when read eFuse through APB bus.
Definition: gr55xx_ll_efuse.h:206
ll_efuse_get_trim_length
__STATIC_INLINE uint32_t ll_efuse_get_trim_length(efuse_regs_t *EFUSEx)
Get read trim length.
Definition: gr55xx_ll_efuse.h:527
ll_efuse_enable_write_power
__STATIC_INLINE void ll_efuse_enable_write_power(efuse_regs_t *EFUSEx)
eFuse v2.5 power on. This power must be turn on before eFuse writting, and trun off when eFuse readin...
Definition: gr55xx_ll_efuse.h:587
ll_efuse_set_key_mask
__STATIC_INLINE void ll_efuse_set_key_mask(efuse_regs_t *EFUSEx, uint32_t mask)
Set key mask.
Definition: gr55xx_ll_efuse.h:402
ll_efuse_set_pgmen
__STATIC_INLINE void ll_efuse_set_pgmen(efuse_regs_t *EFUSEx, uint8_t value)
Enable eFuse PGENB sigal.
Definition: gr55xx_ll_efuse.h:299
ll_efuse_is_enabled_main_backup
__STATIC_INLINE uint32_t ll_efuse_is_enabled_main_backup(efuse_regs_t *EFUSEx)
Check if main area OR backup area reading function is enabled.
Definition: gr55xx_ll_efuse.h:221
ll_efuse_set_crc_check_len
__STATIC_INLINE void ll_efuse_set_crc_check_len(efuse_regs_t *EFUSEx, uint32_t length)
Set CRC check length.
Definition: gr55xx_ll_efuse.h:237
ll_efuse_enable_power
__STATIC_INLINE void ll_efuse_enable_power(efuse_regs_t *EFUSEx)
eFuse v1.1 power on. This power must be turn on before eFuse operation.
Definition: gr55xx_ll_efuse.h:557
ll_efuse_set_write_interval
__STATIC_INLINE void ll_efuse_set_write_interval(efuse_regs_t *EFUSEx, uint32_t interval)
Set the interval number of clk cycles between two bit fuse.
Definition: gr55xx_ll_efuse.h:268
ll_efuse_enable_controller_power_stop
__STATIC_INLINE void ll_efuse_enable_controller_power_stop(efuse_regs_t *EFUSEx)
Power sequencer begin.
Definition: gr55xx_ll_efuse.h:649
ll_efuse_disable_write_power
__STATIC_INLINE void ll_efuse_disable_write_power(efuse_regs_t *EFUSEx)
eFuse v2.5 power off.
Definition: gr55xx_ll_efuse.h:602
ll_efuse_get_key_mask
__STATIC_INLINE uint32_t ll_efuse_get_key_mask(efuse_regs_t *EFUSEx)
Get key mask.
Definition: gr55xx_ll_efuse.h:417
ll_efuse_get_crc_check_result
__STATIC_INLINE uint32_t ll_efuse_get_crc_check_result(efuse_regs_t *EFUSEx)
Get CRC check results.
Definition: gr55xx_ll_efuse.h:464
ll_efuse_set_tpro
__STATIC_INLINE void ll_efuse_set_tpro(efuse_regs_t *EFUSEx, uint32_t time)
Set eFuse program time.
Definition: gr55xx_ll_efuse.h:161
ll_efuse_set_trim_addr
__STATIC_INLINE void ll_efuse_set_trim_addr(efuse_regs_t *EFUSEx, uint32_t address)
Set read trim start address.
Definition: gr55xx_ll_efuse.h:481
ll_efuse_is_active_flag
__STATIC_INLINE uint32_t ll_efuse_is_active_flag(efuse_regs_t *EFUSEx, uint32_t flag)
Check active flag.
Definition: gr55xx_ll_efuse.h:386
ll_efuse_set_operation
__STATIC_INLINE void ll_efuse_set_operation(efuse_regs_t *EFUSEx, uint32_t mode)
Set eFuse operation mode.
Definition: gr55xx_ll_efuse.h:355
ll_efuse_is_controller_power_flag
__STATIC_INLINE uint32_t ll_efuse_is_controller_power_flag(efuse_regs_t *EFUSEx, uint32_t flag)
Check power controller active flag.
Definition: gr55xx_ll_efuse.h:684
ll_efuse_enable_main_backup
__STATIC_INLINE void ll_efuse_enable_main_backup(efuse_regs_t *EFUSEx)
Enable main area OR backup area function when read eFuse through APB bus.
Definition: gr55xx_ll_efuse.h:191
ll_efuse_disable_power
__STATIC_INLINE void ll_efuse_disable_power(efuse_regs_t *EFUSEx)
eFuse v1.1 power off.
Definition: gr55xx_ll_efuse.h:571
ll_efuse_set_controller_power_timing
__STATIC_INLINE void ll_efuse_set_controller_power_timing(efuse_regs_t *EFUSEx, uint16_t vddq_0, uint16_t vddq_1, uint16_t vddq_2)
Set Efulse power controller timing pararmeter.
Definition: gr55xx_ll_efuse.h:618
ll_efuse_get_write_interval
__STATIC_INLINE uint8_t ll_efuse_get_write_interval(efuse_regs_t *EFUSEx)
Get the interval number of clk cycles between two bit fuse.
Definition: gr55xx_ll_efuse.h:283
ll_efuse_get_crc_check_len
__STATIC_INLINE uint32_t ll_efuse_get_crc_check_len(efuse_regs_t *EFUSEx)
Get CRC check length.
Definition: gr55xx_ll_efuse.h:252
ll_efuse_get_tpro
__STATIC_INLINE uint32_t ll_efuse_get_tpro(efuse_regs_t *EFUSEx)
Get eFuse program time.
Definition: gr55xx_ll_efuse.h:176