gr533x_hal_spi.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr533x_hal_spi.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of SPI HAL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup HAL_DRIVER HAL Driver
43 * @{
44 */
45
46 /** @defgroup HAL_SPI SPI
47 * @brief SPI HAL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR533x_HAL_SPI_H__
53 #define __GR533x_HAL_SPI_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr533x_ll_spi.h"
61 #include "gr533x_hal_def.h"
62
63 /* Exported types ------------------------------------------------------------*/
64 /** @addtogroup HAL_SPI_ENUMERATIONS Enumerations
65 * @{
66 */
67
68 /** @defgroup HAL_SPI_state HAL SPI state
69 * @{
70 */
71
72 /**
73 * @brief HAL SPI State Enumerations definition
74 */
75 typedef enum
76 {
77 HAL_SPI_STATE_RESET = 0x00, /**< Peripheral not initialized. */
78 HAL_SPI_STATE_READY = 0x01, /**< Peripheral initialized and ready for use. */
79 HAL_SPI_STATE_BUSY = 0x02, /**< An internal process is ongoing. */
80 HAL_SPI_STATE_BUSY_TX = 0x12, /**< Data Transmission process is ongoing. */
81 HAL_SPI_STATE_BUSY_RX = 0x22, /**< Data Reception process is ongoing. */
82 HAL_SPI_STATE_BUSY_TX_RX = 0x32, /**< Data Transmission and Reception process is ongoing. */
83 HAL_SPI_STATE_ABORT = 0x08, /**< Peripheral with abort request ongoing. */
84 HAL_SPI_STATE_ERROR = 0x04 /**< Peripheral in error. */
85
86 } hal_spi_state_t;
87
88 /** @} */
89
90 /** @} */
91
92 /** @addtogroup HAL_SPI_STRUCTURES Structures
93 * @{
94 */
95
96 /** @defgroup SPI_Configuration SPI Configuration
97 * @{
98 */
99
100 /**
101 * @brief SPI init Structure definition
102 */
103 typedef struct _spi_init
104 {
105 uint32_t data_size; /**< Specifies the SPI data size.
106 This parameter can be a value of @ref SPI_Data_Size. */
107
108 uint32_t clock_polarity; /**< Specifies the serial clock steady state.
109 This parameter can be a value of @ref SPI_Clock_Polarity. */
110
111 uint32_t clock_phase; /**< Specifies the clock active edge for the bit capture.
112 This parameter can be a value of @ref SPI_Clock_Phase. */
113
114 uint32_t baudrate_prescaler; /**< Specifies the BaudRate prescaler value which will be
115 used to configure the transmit and receive SCK clock.
116 @note The communication clock is derived from the master
117 clock. The slave clock does not need to be set. */
118
119 uint32_t ti_mode; /**< Specifies if the TI mode is enabled or not.
120 This parameter can be a value of @ref SPI_TI_Mode. */
121
122 uint32_t slave_select; /**< Specifies the slaves to be selected.
123 This parameter can be a value of @ref SPI_Slave_Select. */
124
125 uint32_t rx_sample_delay; /**< Specifies the RX sample delay. It is used to delay the sample of the RX input port.
126 This parameter can be a number between 0 and 0x7. */
127 } spi_init_t;
128 /** @} */
129 /** @} */
130
131 /** @defgroup SOFT CS Signal Description
132 * @{
133 */
134 #define SPI_SOFT_CS_MAGIC_NUMBER 0xDEADBEAF /**< CS magic number. */
135
136 /**
137 * @defgroup HAL_SPI_MACRO Defines
138 * @{
139 */
140
141 /** @defgroup CS_STA_STATE State from Software CS Assert
142 * @{
143 */
144 /**
145 * @brief State from Software CS Assert
146 */
147 #define CS_STA_STATE_POLL_TX 0x01 /**< CS ASSERT when Transferring Starts by Polling */
148 #define CS_STA_STATE_POLL_RX 0x02 /**< CS ASSERT when Receiving Starts by Polling */
149 #define CS_STA_STATE_POLL_TX_RX 0x03 /**< CS ASSERT when DUPLEX Starts by Polling */
150 #define CS_STA_STATE_POLL_EEPREAD 0x04 /**< CS ASSERT when EEPREAD Starts by Polling */
151 #define CS_STA_STATE_IT_TX 0x05 /**< CS ASSERT when Transferring Starts by Interrupt */
152 #define CS_STA_STATE_IT_RX 0x06 /**< CS ASSERT when Receiving Starts by Interrupt */
153 #define CS_STA_STATE_IT_TX_RX 0x07 /**< CS ASSERT when DUPLEX Starts by Interrupt */
154 #define CS_STA_STATE_IT_EEPREAD 0x08 /**< CS ASSERT when EEPREAD Starts by Interrupt */
155 #define CS_STA_STATE_DMA_TX 0x09 /**< CS ASSERT when Transferring Starts by DMA */
156 #define CS_STA_STATE_DMA_RX 0x0A /**< CS ASSERT when Receiving Starts by DMA */
157 #define CS_STA_STATE_DMA_TX_RX 0x0B /**< CS ASSERT when DUPLEX Starts by DMA */
158 #define CS_STA_STATE_DMA_EEPREAD 0x0C /**< CS ASSERT when EEPREAD Starts by DMA */
159 #define CS_STA_STATE_DMA_LLP_TX 0x0D /**< CS ASSERT when Transferring Starts by DMA LLP */
160 #define CS_STA_STATE_DMA_SCATTER_RX 0x0E /**< CS ASSERT when Receiving Starts by DMA Scatter */
161 /** @} */
162
163 /**
164 * @brief State from Software CS De-Assert
165 */
166 #define CS_END_STATE_POLL_TX 0x81 /**< CS DE-ASSERT when Transferring Ends by Polling */
167 #define CS_END_STATE_POLL_RX 0x82 /**< CS DE-ASSERT when Receiving Ends by Polling */
168 #define CS_END_STATE_POLL_TX_RX 0x83 /**< CS DE-ASSERT when DUPLEX Ends by Polling */
169 #define CS_END_STATE_POLL_EEPREAD 0x84 /**< CS DE-ASSERT when EEPREAD Ends by Polling */
170 #define CS_END_STATE_TX_CPLT 0x90 /**< CS DE-ASSERT when Transferring Ends by IT/DMA */
171 #define CS_END_STATE_RX_CPLT 0x91 /**< CS DE-ASSERT when Receiving Ends by IT/DMA */
172 #define CS_END_STATE_TX_RX_CPLT 0x92 /**< CS DE-ASSERT when DUPLEX Ends by IT/DMA */
173 #define CS_END_STATE_XFER_ERR 0x93 /**< CS DE-ASSERT when xfer Error by IT/DMA */
174 #define CS_END_STATE_TX_ABORT_CPLT 0x94 /**< CS DE-ASSERT when abort The transfer Ends by IT/DMA */
175 #define CS_END_STATE_RX_ABORT_CPLT 0x95 /**< CS DE-ASSERT when abort the receive Ends by IT/DMA */
176 #define CS_END_STATE_ABORT_CPLT 0x96 /**< CS DE-ASSERT when abort the tx/rx by IT/DMA */
177 /** @} */
178 /** @} */
179
180 /** @addtogroup HAL_SPI_STRUCTURES Structures
181 * @{
182 */
183 /** @defgroup SPI_handle SPI handle
184 * @{
185 */
186
187 /**
188 * @brief SPI handle Structure definition
189 */
190 typedef struct _spi_handle
191 {
192 spi_regs_t *p_instance; /**< SPI registers base address */
193
194 spi_init_t init; /**< SPI communication parameters */
195
196 __IO uint32_t soft_cs_magic; /**< if equals to @ref SPI_SOFT_CS_MAGIC_NUMBER, control the CS signal by software */
197
198 uint8_t *p_tx_buffer; /**< Pointer to SPI Tx transfer Buffer */
199
200 __IO uint32_t tx_xfer_size; /**< SPI Tx Transfer size */
201
202 __IO uint32_t tx_xfer_count; /**< SPI Tx Transfer Counter */
203
204 uint8_t *p_rx_buffer; /**< Pointer to SPI Rx transfer Buffer */
205
206 __IO uint32_t rx_xfer_size; /**< SPI Rx Transfer size */
207
208 __IO uint32_t rx_xfer_count; /**< SPI Rx Transfer Counter */
209
210 void (*write_fifo)(struct _spi_handle *p_spi); /**< Pointer to SPI Tx transfer FIFO write function */
211
212 void (*read_fifo)(struct _spi_handle *p_spi); /**< Pointer to SPI Rx transfer FIFO read function */
213
214 void (*read_write_fifo)(struct _spi_handle *p_spi); /**< Pointer to SPI transfer FIFO read and write function */
215
216 dma_handle_t *p_dmatx; /**< SPI Tx DMA Handle parameters */
217
218 dma_handle_t *p_dmarx; /**< SPI Rx DMA Handle parameters */
219
220 __IO hal_lock_t lock; /**< Locking object */
221
222 __IO hal_spi_state_t state; /**< SPI communication state */
223
224 __IO uint32_t error_code; /**< SPI Error code */
225
226 uint32_t timeout; /**< Timeout for the SPI memory access */
227
228 uint32_t retention[9]; /**< SPI important register information. */
229 } spi_handle_t;
230 /** @} */
231
232 /** @} */
233
234 /** @addtogroup HAL_SPI_CALLBACK_STRUCTURES Callback Structures
235 * @{
236 */
237
238 /** @defgroup HAL_SPI_Callback Callback
239 * @{
240 */
241
242 /**
243 * @brief HAL_SPI Callback function definition
244 */
245
246 typedef struct _hal_spi_callback
247 {
248 void (*spi_msp_init)(spi_handle_t *p_spi); /**< SPI init MSP callback */
249 void (*spi_msp_deinit)(spi_handle_t *p_spi); /**< SPI de-init MSP callback */
250 void (*spi_error_callback)(spi_handle_t *p_spi); /**< SPI error callback */
251 void (*spi_abort_cplt_callback)(spi_handle_t *p_spi); /**< SPI abort completed callback */
252 void (*spi_rx_cplt_callback)(spi_handle_t *p_spi); /**< SPI rx transfer completed callback */
253 void (*spi_tx_cplt_callback)(spi_handle_t *p_spi); /**< SPI tx transfer completed callback */
254 void (*spi_tx_rx_cplt_callback)(spi_handle_t *p_spi); /**< SPI tx/rx transfer completed callback */
255 void (*spi_soft_cs_assert)(spi_handle_t *p_spi, uint32_t state); /**< assert the cs signal by software setting */
256 void (*spi_soft_cs_deassert)(spi_handle_t *p_spi, uint32_t state); /**< deassert the cs signal by software setting */
257 } hal_spi_callback_t;
258
259 /** @} */
260
261 /** @} */
262
263 /**
264 * @defgroup HAL_SPI_MACRO Defines
265 * @{
266 */
267
268 /* Exported constants --------------------------------------------------------*/
269 /** @defgroup SPI_Exported_Constants SPI Exported Constants
270 * @{
271 */
272
273 /** @defgroup SPI_Direction SPI Direction
274 * @{
275 */
276
277 #define SPI_DIRECTION_FULL_DUPLEX LL_SPI_FULL_DUPLEX /**< Full Duplex: Transmit & Receive */
278 #define SPI_DIRECTION_SIMPLEX_TX LL_SPI_SIMPLEX_TX /**< Simplex Tx: Transmit only */
279 #define SPI_DIRECTION_SIMPLEX_RX LL_SPI_SIMPLEX_RX /**< Simplex Rx: Receive only */
280 #define SPI_DIRECTION_READ_EEPROM LL_SPI_READ_EEPROM /**< Read EEPROM */
281
282 /** @} */
283
284 /** @defgroup SPI_Error_Code SPI Error Code
285 * @{
286 */
287 #define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000) /**< No error */
288 #define HAL_SPI_ERROR_TIMEOUT ((uint32_t)0x00000001) /**< Timeout error */
289 #define HAL_SPI_ERROR_TRANSFER ((uint32_t)0x00000002) /**< Transfer error */
290 #define HAL_SPI_ERROR_DMA ((uint32_t)0x00000004) /**< DMA transfer error */
291 #define HAL_SPI_ERROR_INVALID_PARAM ((uint32_t)0x00000008) /**< Invalid parameters error */
292 /** @} */
293
294 /** @defgroup SPI_Data_Size SPI Data Size
295 * @{
296 */
297
298 #define SPI_DATASIZE_4BIT LL_SPI_DATASIZE_4BIT /**< 4-bit serial data transfer */
299 #define SPI_DATASIZE_5BIT LL_SPI_DATASIZE_5BIT /**< 5-bit serial data transfer */
300 #define SPI_DATASIZE_6BIT LL_SPI_DATASIZE_6BIT /**< 6-bit serial data transfer */
301 #define SPI_DATASIZE_7BIT LL_SPI_DATASIZE_7BIT /**< 7-bit serial data transfer */
302 #define SPI_DATASIZE_8BIT LL_SPI_DATASIZE_8BIT /**< 8-bit serial data transfer */
303 #define SPI_DATASIZE_9BIT LL_SPI_DATASIZE_9BIT /**< 9-bit serial data transfer */
304 #define SPI_DATASIZE_10BIT LL_SPI_DATASIZE_10BIT /**< 10-bit serial data transfer */
305 #define SPI_DATASIZE_11BIT LL_SPI_DATASIZE_11BIT /**< 11-bit serial data transfer */
306 #define SPI_DATASIZE_12BIT LL_SPI_DATASIZE_12BIT /**< 12-bit serial data transfer */
307 #define SPI_DATASIZE_13BIT LL_SPI_DATASIZE_13BIT /**< 13-bit serial data transfer */
308 #define SPI_DATASIZE_14BIT LL_SPI_DATASIZE_14BIT /**< 14-bit serial data transfer */
309 #define SPI_DATASIZE_15BIT LL_SPI_DATASIZE_15BIT /**< 15-bit serial data transfer */
310 #define SPI_DATASIZE_16BIT LL_SPI_DATASIZE_16BIT /**< 16-bit serial data transfer */
311 #define SPI_DATASIZE_17BIT LL_SPI_DATASIZE_17BIT /**< 17-bit serial data transfer */
312 #define SPI_DATASIZE_18BIT LL_SPI_DATASIZE_18BIT /**< 18-bit serial data transfer */
313 #define SPI_DATASIZE_19BIT LL_SPI_DATASIZE_19BIT /**< 19-bit serial data transfer */
314 #define SPI_DATASIZE_20BIT LL_SPI_DATASIZE_20BIT /**< 20-bit serial data transfer */
315 #define SPI_DATASIZE_21BIT LL_SPI_DATASIZE_21BIT /**< 21-bit serial data transfer */
316 #define SPI_DATASIZE_22BIT LL_SPI_DATASIZE_22BIT /**< 22-bit serial data transfer */
317 #define SPI_DATASIZE_23BIT LL_SPI_DATASIZE_23BIT /**< 23-bit serial data transfer */
318 #define SPI_DATASIZE_24BIT LL_SPI_DATASIZE_24BIT /**< 24-bit serial data transfer */
319 #define SPI_DATASIZE_25BIT LL_SPI_DATASIZE_25BIT /**< 25-bit serial data transfer */
320 #define SPI_DATASIZE_26BIT LL_SPI_DATASIZE_26BIT /**< 26-bit serial data transfer */
321 #define SPI_DATASIZE_27BIT LL_SPI_DATASIZE_27BIT /**< 27-bit serial data transfer */
322 #define SPI_DATASIZE_28BIT LL_SPI_DATASIZE_28BIT /**< 28-bit serial data transfer */
323 #define SPI_DATASIZE_29BIT LL_SPI_DATASIZE_29BIT /**< 29-bit serial data transfer */
324 #define SPI_DATASIZE_30BIT LL_SPI_DATASIZE_30BIT /**< 30-bit serial data transfer */
325 #define SPI_DATASIZE_31BIT LL_SPI_DATASIZE_31BIT /**< 31-bit serial data transfer */
326 #define SPI_DATASIZE_32BIT LL_SPI_DATASIZE_32BIT /**< 32-bit serial data transfer */
327
328 /** @} */
329
330 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
331 * @{
332 */
333
334 #define SPI_POLARITY_LOW LL_SPI_SCPOL_LOW /**< Inactive state of CLK is low */
335 #define SPI_POLARITY_HIGH LL_SPI_SCPOL_HIGH /**< Inactive state of CLK is high */
336
337 /** @} */
338
339 /** @defgroup SPI_Clock_Phase SPI Clock Phase
340 * @{
341 */
342
343 #define SPI_PHASE_1EDGE LL_SPI_SCPHA_1EDGE /**< CLK toggles at start of first data bit */
344 #define SPI_PHASE_2EDGE LL_SPI_SCPHA_2EDGE /**< CLK toggles in middle of first data bit */
345
346 /** @} */
347
348 /** @defgroup SPI_TI_Mode SPI TI Mode
349 * @{
350 */
351 #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000) /**< SPI TI mode disable */
352
353 #define SPI_TIMODE_ENABLE LL_SPI_PROTOCOL_TI /**< SPI TI mode enable */
354
355 /** @} */
356
357 /** @defgroup SPI_Slave_Select SPI Slave Select
358 * @{
359 */
360
361 #define SPI_SLAVE_SELECT_0 LL_SPI_SLAVE0 /**< SPIM Select Slave 0 */
362 #define SPI_SLAVE_SELECT_1 LL_SPI_SLAVE1 /**< SPIM Select Slave 1 */
363 #define SPI_SLAVE_SELECT_ALL (LL_SPI_SLAVE0 | LL_SPI_SLAVE1) /**< SPIM Select All Slave */
364
365 /** @} */
366
367 /** @defgroup SPI_FIFO_LEVEL_MAX SPI FIFO Level Max
368 * @{
369 */
370 #define SPI_TX_FIFO_LEVEL_MAX 8 /**< SPI TX FIFO Level Max Value */
371 #define SPI_RX_FIFO_LEVEL_MAX 8 /**< SPI RX FIFO Level Max Value */
372 /** @} */
373
374 /** @defgroup SPI_Flags_definition SPI Flags Definition
375 * @{
376 */
377
378 #define SPI_FLAG_DCOL LL_SPI_SR_DCOL /**< Data collision error flag */
379 #define SPI_FLAG_TXE LL_SPI_SR_TXE /**< Transmission error flag */
380 #define SPI_FLAG_RFF LL_SPI_SR_RFF /**< Rx FIFO full flag */
381 #define SPI_FLAG_RFNE LL_SPI_SR_RFNE /**< Rx FIFO not empty flag */
382 #define SPI_FLAG_TFE LL_SPI_SR_TFE /**< Tx FIFO empty flag */
383 #define SPI_FLAG_TFNF LL_SPI_SR_TFNF /**< Tx FIFO not full flag */
384 #define SPI_FLAG_BUSY LL_SPI_SR_BUSY /**< Busy flag */
385
386 /** @} */
387
388 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
389 * @{
390 */
391
392 #define SPI_IT_MST LL_SPI_IS_MST /**< Multi-Master Contention Interrupt flag */
393 #define SPI_IT_RXF LL_SPI_IS_RXF /**< Receive FIFO Full Interrupt flag */
394 #define SPI_IT_RXO LL_SPI_IS_RXO /**< Receive FIFO Overflow Interrupt flag */
395 #define SPI_IT_RXU LL_SPI_IS_RXU /**< Receive FIFO Underflow Interrupt flag */
396 #define SPI_IT_TXO LL_SPI_IS_TXO /**< Transmit FIFO Overflow Interrupt flag */
397 #define SPI_IT_TXE LL_SPI_IS_TXE /**< Transmit FIFO Empty Interrupt flag */
398
399 /** @} */
400
401 /** @defgroup SPI_Timeout_definition SPI Timeout_definition
402 * @{
403 */
404 #define HAL_SPI_TIMEOUT_DEFAULT_VALUE ((uint32_t)5000) /**< 5s */
405 /** @} */
406
407 /** @} */
408
409 /* Exported macro ------------------------------------------------------------*/
410 /** @defgroup SPI_Exported_Macros SPI Exported Macros
411 * @{
412 */
413
414 /** @brief Reset SPI handle states.
415 * @param __HANDLE__ SPI handle.
416 * @retval None
417 */
418 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->state = HAL_SPI_STATE_RESET)
419
420
421 /** @brief Enable the specified SPI peripheral.
422 * @param __HANDLE__ Specifies the SPI Handle.
423 * @retval None
424 */
425 #define __HAL_SPI_ENABLE(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->SSI_EN, SPI_SSI_EN)
426
427
428 /** @brief Disable the specified SPI peripheral.
429 * @param __HANDLE__ Specifies the SPI Handle.
430 * @retval None
431 */
432 #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->SSI_EN, SPI_SSI_EN)
433
434
435 /** @brief Enable the SPI DMA TX Request.
436 * @param __HANDLE__ Specifies the SPI Handle.
437 * @retval None
438 */
439 #define __HAL_SPI_ENABLE_DMATX(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->DMA_CTRL, SPI_DMA_CTRL_TX_DMA_EN)
440
441
442 /** @brief Enable the SPI DMA RX Request.
443 * @param __HANDLE__ Specifies the SPI Handle.
444 * @retval None
445 */
446 #define __HAL_SPI_ENABLE_DMARX(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->DMA_CTRL, SPI_DMA_CTRL_RX_DMA_EN)
447
448
449 /** @brief Disable the SPI DMA TX Request.
450 * @param __HANDLE__ Specifies the SPI Handle.
451 * @retval None
452 */
453 #define __HAL_SPI_DISABLE_DMATX(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->DMA_CTRL, SPI_DMA_CTRL_TX_DMA_EN)
454
455
456 /** @brief Disable the SPI DMA RX Request.
457 * @param __HANDLE__ Specifies the SPI Handle.
458 * @retval None
459 */
460 #define __HAL_SPI_DISABLE_DMARX(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->DMA_CTRL, SPI_DMA_CTRL_RX_DMA_EN)
461
462
463 /** @brief Enable the specified SPI interrupts.
464 * @param __HANDLE__ Specifies the SPI Handle.
465 * @param __INTERRUPT__ Specifies the interrupt source to enable.
466 * This parameter can be one of the following values:
467 * @arg @ref SPI_IT_MST Multi-Master Contention Interrupt enable
468 * @arg @ref SPI_IT_RXF Receive FIFO Full Interrupt enable
469 * @arg @ref SPI_IT_RXO Receive FIFO Overflow Interrupt enable
470 * @arg @ref SPI_IT_RXU Receive FIFO Underflow Interrupt enable
471 * @arg @ref SPI_IT_TXO Transmit FIFO Overflow Interrupt enable
472 * @arg @ref SPI_IT_TXE Transmit FIFO Empty Interrupt enable
473 * @retval None
474 */
475 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BITS((__HANDLE__)->p_instance->INT_MASK, (__INTERRUPT__))
476
477
478 /** @brief Disable the specified SPI interrupts.
479 * @param __HANDLE__ Specifies the SPI handle.
480 * @param __INTERRUPT__ Specifies the interrupt source to disable.
481 * This parameter can be one of the following values:
482 * @arg @ref SPI_IT_MST Multi-Master Contention Interrupt enable
483 * @arg @ref SPI_IT_RXF Receive FIFO Full Interrupt enable
484 * @arg @ref SPI_IT_RXO Receive FIFO Overflow Interrupt enable
485 * @arg @ref SPI_IT_RXU Receive FIFO Underflow Interrupt enable
486 * @arg @ref SPI_IT_TXO Transmit FIFO Overflow Interrupt enable
487 * @arg @ref SPI_IT_TXE Transmit FIFO Empty Interrupt enable
488 * @retval None
489 */
490 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BITS((__HANDLE__)->p_instance->INT_MASK, (__INTERRUPT__))
491
492
493 /** @brief Check whether the specified SPI interrupt source is enabled or not.
494 * @param __HANDLE__ Specifies the SPI Handle.
495 * @param __INTERRUPT__ Specifies the interrupt source to check.
496 * This parameter can be one of the following values:
497 * @arg @ref SPI_IT_MST Multi-Master Contention Interrupt enable
498 * @arg @ref SPI_IT_RXF Receive FIFO Full Interrupt enable
499 * @arg @ref SPI_IT_RXO Receive FIFO Overflow Interrupt enable
500 * @arg @ref SPI_IT_RXU Receive FIFO Underflow Interrupt enable
501 * @arg @ref SPI_IT_TXO Transmit FIFO Overflow Interrupt enable
502 * @arg @ref SPI_IT_TXE Transmit FIFO Empty Interrupt enable
503 * @retval The new state of __IT__ (TRUE or FALSE).
504 */
505 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_BITS((__HANDLE__)->p_instance->INT_STAT, (__INTERRUPT__)) == (__INTERRUPT__))
506
507
508 /** @brief Check whether the specified SPI flag is set or not.
509 * @param __HANDLE__ Specifies the SPI Handle.
510 * @param __FLAG__ Specifies the flag to check.
511 * This parameter can be one of the following values:
512 * @arg @ref SPI_FLAG_DCOL Data collision error flag
513 * @arg @ref SPI_FLAG_TXE Transmission error flag
514 * @arg @ref SPI_FLAG_RFF Rx FIFO full flag
515 * @arg @ref SPI_FLAG_RFNE Rx FIFO not empty flag
516 * @arg @ref SPI_FLAG_TFE Tx FIFO empty flag
517 * @arg @ref SPI_FLAG_TFNF Tx FIFO not full flag
518 * @arg @ref SPI_FLAG_BUSY Busy flag
519 * @retval The new state of __FLAG__ (TRUE or FALSE).
520 */
521 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((READ_BITS((__HANDLE__)->p_instance->STAT, (__FLAG__)) != 0) ? SET : RESET)
522
523
524 /** @brief Clear the specified SPI flag.
525 * @param __HANDLE__ Specifies the SPI Handle.
526 * @param __FLAG__ Specifies the flag to clear.
527 * This parameter can be one of the following values:
528 * @arg @ref SPI_FLAG_DCOL Data collision error flag
529 * @arg @ref SPI_FLAG_TXE Transmission error flag
530 * @arg @ref SPI_FLAG_RFF Rx FIFO full flag
531 * @arg @ref SPI_FLAG_RFNE Rx FIFO not empty flag
532 * @arg @ref SPI_FLAG_TFE Tx FIFO empty flag
533 * @arg @ref SPI_FLAG_TFNF Tx FIFO not full flag
534 * @arg @ref SPI_FLAG_BUSY Busy flag
535 * @retval None
536 */
537 #define __HAL_SPI_CLEAR_FLAG(__HANDLE__, __FLAG__) READ_BITS((__HANDLE__)->p_instance->STAT, (__FLAG__))
538
539
540 /** @} */
541
542 /* Private macros ------------------------------------------------------------*/
543 /** @defgroup SPI_Private_Macro SPI Private Macros
544 * @{
545 */
546
547 /** @brief Check if SPI Direction Mode is valid.
548 * @param __MODE__ SPI Direction Mode.
549 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
550 */
551 #define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_FULL_DUPLEX) || \
552 ((__MODE__) == SPI_DIRECTION_SIMPLEX_TX) || \
553 ((__MODE__) == SPI_DIRECTION_SIMPLEX_RX) || \
554 ((__MODE__) == SPI_DIRECTION_READ_EEPROM))
555
556
557 /** @brief Check if SPI Data Size is valid.
558 * @param __DATASIZE__ SPI Data Size.
559 * @retval SET (__DATASIZE__ is valid) or RESET (__DATASIZE__ is invalid)
560 */
561 #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) >= SPI_DATASIZE_4BIT) && \
562 ((__DATASIZE__) <= SPI_DATASIZE_32BIT))
563
564 /** @brief Check if SPI Clock Polarity is valid.
565 * @param __CPOL__ SPI Clock Polarity.
566 * @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid)
567 */
568 #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \
569 ((__CPOL__) == SPI_POLARITY_HIGH))
570
571 /** @brief Check if SPI Clock Phase is valid.
572 * @param __CPHA__ SPI Clock Phase.
573 * @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid)
574 */
575 #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \
576 ((__CPHA__) == SPI_PHASE_2EDGE))
577
578 /** @brief Check if SPI BaudRate Prescaler is valid.
579 * @param __PRESCALER__ SPI BaudRate Prescaler.
580 * @retval SET (__PRESCALER__ is valid) or RESET (__PRESCALER__ is invalid)
581 */
582 #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) ((__PRESCALER__) <= 0xFFFF)
583
584 /** @brief Check if SPI TI Mode is valid.
585 * @param __MODE__ SPI TI Mode.
586 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
587 */
588 #define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \
589 ((__MODE__) == SPI_TIMODE_ENABLE))
590
591 /** @brief Check if SPI Slave Select is valid.
592 * @param __SLAVE__ SPI Slave Select.
593 * @retval SET (__SLAVE__ is valid) or RESET (__SLAVE__ is invalid)
594 */
595 #define IS_SPI_SLAVE(__SLAVE__) (((__SLAVE__) == SPI_SLAVE_SELECT_0) || \
596 ((__SLAVE__) == SPI_SLAVE_SELECT_1) || \
597 ((__SLAVE__) == SPI_SLAVE_SELECT_ALL))
598
599 /** @brief Check if SPI RX Sample Delay Value is valid.
600 * @param __DLY__ SPI RX Sample Delay value.
601 * @retval SET (__DLY__ is valid) or RESET (__DLY__ is invalid)
602 */
603 #define IS_SPI_RX_SAMPLE_DLY(__DLY__) (((__DLY__) >= 0) && ((__DLY__) <= 7))
604
605
606 /** @brief Check if SPI FIFO Threshold is valid.
607 * @param __THR__ SPI FIFO Threshold.
608 * @retval SET (__THR__ is valid) or RESET (__THR__ is invalid)
609 */
610
611 #define IS_SPI_FIFO_THRESHOLD(__THR__) (((__THR__) >= 0) && ((__THR__) <= (LL_SPI_M_FIFO_DEPTH - 1)))
612
613 /** @} */
614
615 /** @} */
616
617 /* Exported functions --------------------------------------------------------*/
618 /** @addtogroup HAL_SPI_DRIVER_FUNCTIONS Functions
619 * @{
620 */
621
622 /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
623 * @brief Initialization and de-initialization functions
624 *
625 @verbatim
626 ===============================================================================
627 ##### Initialization and de-initialization functions #####
628 ===============================================================================
629 [..] This subsection provides a set of functions allowing to initialize and
630 de-initialize the SPIx peripheral:
631
632 (+) User must implement hal_spi_msp_init() function in which he configures
633 all related peripherals resources (GPIO, DMA, IT and NVIC ).
634
635 (+) Call the function hal_spi_init() to configure the selected device with
636 the selected configuration:
637 (++) Direction
638 (++) Data Size
639 (++) Clock Polarity and Phase
640 (++) BaudRate Prescaler
641 (++) TIMode
642 (++) Slave Select
643
644 (+) Call the function hal_spi_deinit() to restore the default configuration
645 of the selected SPIx peripheral.
646
647 @endverbatim
648 * @{
649 */
650
651 /**
652 ****************************************************************************************
653 * @brief Initialize the SPI according to the specified parameters
654 * in the spi_init_t and initialize the associated handle.
655 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
656 * @retval ::HAL_OK: Operation is OK.
657 * @retval ::HAL_ERROR: Parameter error or operation not supported.
658 * @retval ::HAL_BUSY: Driver is busy.
659 * @retval ::HAL_TIMEOUT: Timeout occurred.
660 ****************************************************************************************
661 */
662 hal_status_t hal_spi_init(spi_handle_t *p_spi);
663
664 /**
665 ****************************************************************************************
666 * @brief De-initialize the SPI peripheral.
667 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
668 * @retval ::HAL_OK: Operation is OK.
669 * @retval ::HAL_ERROR: Parameter error or operation not supported.
670 * @retval ::HAL_BUSY: Driver is busy.
671 * @retval ::HAL_TIMEOUT: Timeout occurred.
672 ****************************************************************************************
673 */
674 hal_status_t hal_spi_deinit(spi_handle_t *p_spi);
675
676 /**
677 ****************************************************************************************
678 * @brief Initialize the SPI MSP.
679 * @note This function should not be modified. When the callback is needed,
680 the hal_spi_msp_deinit can be implemented in the user file.
681 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
682 ****************************************************************************************
683 */
684 void hal_spi_msp_init(spi_handle_t *p_spi);
685
686 /**
687 ****************************************************************************************
688 * @brief De-initialize the SPI MSP.
689 * @note This function should not be modified. When the callback is needed,
690 the hal_spi_msp_deinit can be implemented in the user file.
691 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
692 ****************************************************************************************
693 */
694 void hal_spi_msp_deinit(spi_handle_t *p_spi);
695
696 /** @} */
697
698 /** @defgroup SPI_Exported_Functions_Group2 IO operation functions
699 * @brief Data transfer functions
700 *
701 @verbatim
702 ==============================================================================
703 ##### IO operation functions #####
704 ===============================================================================
705 [..]
706 This subsection provides a set of functions allowing to manage the SPI
707 data transfer.
708
709 [..] The SPI supports master and slave mode:
710
711 (#) There are two modes of transfer:
712 (++) Blocking mode: The communication is performed in polling mode.
713 The HAL status of all data processing is returned by the same function
714 after finishing transfer.
715 (++) No-Blocking mode: The communication is performed using Interrupts
716 or DMA, These APIs return the HAL status.
717 The end of the data processing will be indicated through the
718 dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
719 using DMA mode.
720 The hal_spi_tx_cplt_callback(), hal_spi_rx_cplt_callback() and hal_spi_txrx_cplt_callback() user callbacks
721 will be executed respectively at the end of the transmit or Receive process
722 The hal_spi_error_callback() user callback will be executed when a communication error is detected.
723
724 (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
725 exist for 1-Line (simplex) and 2-Line (full duplex) modes.
726
727 @endverbatim
728 * @{
729 */
730
731 /**
732 ****************************************************************************************
733 * @brief Transmit an amount of data in blocking mode.
734 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
735 * @param[in] p_data: Pointer to data buffer
736 * @param[in] length: Amount of data to be sent in bytes
737 * @param[in] timeout: Timeout duration
738 * @retval ::HAL_OK: Operation is OK.
739 * @retval ::HAL_ERROR: Parameter error or operation not supported.
740 * @retval ::HAL_BUSY: Driver is busy.
741 * @retval ::HAL_TIMEOUT: Timeout occurred.
742 ****************************************************************************************
743 */
744 hal_status_t hal_spi_transmit(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length, uint32_t timeout);
745
746 /**
747 ****************************************************************************************
748 * @brief Receive an amount of data in blocking mode.
749 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
750 * @param[out] p_data: Pointer to data buffer
751 * @param[in] length: Amount of data to be received in bytes
752 * @param[in] timeout: Timeout duration
753 * @retval ::HAL_OK: Operation is OK.
754 * @retval ::HAL_ERROR: Parameter error or operation not supported.
755 * @retval ::HAL_BUSY: Driver is busy.
756 * @retval ::HAL_TIMEOUT: Timeout occurred.
757 ****************************************************************************************
758 */
759 hal_status_t hal_spi_receive(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length, uint32_t timeout);
760
761 /**
762 ****************************************************************************************
763 * @brief Transmit and Receive an amount of data in blocking mode.
764 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
765 * @param[in] p_tx_data: Pointer to transmission data buffer
766 * @param[out] p_rx_data: Pointer to reception data buffer
767 * @param[in] length: Amount of data to be sent and received in bytes
768 * @param[in] timeout: Timeout duration
769 * @retval ::HAL_OK: Operation is OK.
770 * @retval ::HAL_ERROR: Parameter error or operation not supported.
771 * @retval ::HAL_BUSY: Driver is busy.
772 * @retval ::HAL_TIMEOUT: Timeout occurred.
773 ****************************************************************************************
774 */
775 hal_status_t hal_spi_transmit_receive(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length, uint32_t timeout);
776
777 /**
778 ****************************************************************************************
779 * @brief Read an amount of data from EEPROM in blocking mode.
780 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
781 * @param[in] p_tx_data: Pointer to transmission data buffer
782 * @param[out] p_rx_data: Pointer to reception data buffer
783 * @param[in] tx_number_data: Amount of data to be sent in bytes
784 * @param[in] rx_number_data: Amount of data to be received in bytes
785 * @param[in] timeout: Timeout duration
786 * @retval ::HAL_OK: Operation is OK.
787 * @retval ::HAL_ERROR: Parameter error or operation not supported.
788 * @retval ::HAL_BUSY: Driver is busy.
789 * @retval ::HAL_TIMEOUT: Timeout occurred.
790 ****************************************************************************************
791 */
792 hal_status_t hal_spi_read_eeprom(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data, uint32_t timeout);
793
794 /**
795 ****************************************************************************************
796 * @brief Transmit an amount of data in non-blocking mode with Interrupt.
797 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
798 * @param[in] p_data: Pointer to data buffer
799 * @param[in] length: Amount of data to be sent in bytes
800 * @retval ::HAL_OK: Operation is OK.
801 * @retval ::HAL_ERROR: Parameter error or operation not supported.
802 * @retval ::HAL_BUSY: Driver is busy.
803 * @retval ::HAL_TIMEOUT: Timeout occurred.
804 ****************************************************************************************
805 */
806 hal_status_t hal_spi_transmit_it(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length);
807
808 /**
809 ****************************************************************************************
810 * @brief Receive an amount of data in non-blocking mode with Interrupt.
811 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
812 * @param[out] p_data: Pointer to data buffer
813 * @param[in] length: Amount of data to be sent in bytes
814 * @retval ::HAL_OK: Operation is OK.
815 * @retval ::HAL_ERROR: Parameter error or operation not supported.
816 * @retval ::HAL_BUSY: Driver is busy.
817 * @retval ::HAL_TIMEOUT: Timeout occurred.
818 ****************************************************************************************
819 */
820 hal_status_t hal_spi_receive_it(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length);
821
822 /**
823 ****************************************************************************************
824 * @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt.
825 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
826 * @param[in] p_tx_data: Pointer to transmission data buffer
827 * @param[out] p_rx_data: Pointer to reception data buffer
828 * @param[in] length: Amount of data to be sent and received in bytes
829 * @retval ::HAL_OK: Operation is OK.
830 * @retval ::HAL_ERROR: Parameter error or operation not supported.
831 * @retval ::HAL_BUSY: Driver is busy.
832 * @retval ::HAL_TIMEOUT: Timeout occurred.
833 ****************************************************************************************
834 */
835 hal_status_t hal_spi_transmit_receive_it(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length);
836
837 /**
838 ****************************************************************************************
839 * @brief Read an amount of data from EEPROM in non-blocking mode with Interrupt.
840 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
841 * @param[in] p_tx_data: Pointer to transmission data buffer
842 * @param[out] p_rx_data: Pointer to reception data buffer
843 * @param[in] tx_number_data: Amount of data to be sent in bytes
844 * @param[in] rx_number_data: Amount of data to be received in bytes
845 * @retval ::HAL_OK: Operation is OK.
846 * @retval ::HAL_ERROR: Parameter error or operation not supported.
847 * @retval ::HAL_BUSY: Driver is busy.
848 * @retval ::HAL_TIMEOUT: Timeout occurred.
849 ****************************************************************************************
850 */
851 hal_status_t hal_spi_read_eeprom_it(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data);
852
853 /**
854 ****************************************************************************************
855 * @brief Transmit an amount of data in non-blocking mode with DMA.
856 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
857 * @param[in] p_data: Pointer to data buffer
858 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
859 * @retval ::HAL_OK: Operation is OK.
860 * @retval ::HAL_ERROR: Parameter error or operation not supported.
861 * @retval ::HAL_BUSY: Driver is busy.
862 * @retval ::HAL_TIMEOUT: Timeout occurred.
863 ****************************************************************************************
864 */
865 hal_status_t hal_spi_transmit_dma(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length);
866
867 /**
868 ****************************************************************************************
869 * @brief Receive an amount of data in non-blocking mode with DMA.
870 * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, p_dmatx shall be defined.
871 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
872 * @param[out] p_data: Pointer to data buffer
873 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
874 * @retval ::HAL_OK: Operation is OK.
875 * @retval ::HAL_ERROR: Parameter error or operation not supported.
876 * @retval ::HAL_BUSY: Driver is busy.
877 * @retval ::HAL_TIMEOUT: Timeout occurred.
878 ****************************************************************************************
879 */
880 hal_status_t hal_spi_receive_dma(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length);
881
882 /**
883 ****************************************************************************************
884 * @brief Transmit and Receive an amount of data in non-blocking mode with DMA.
885 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
886 * @param[in] p_tx_data: Pointer to transmission data buffer
887 * @param[out] p_rx_data: Pointer to reception data buffer
888 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
889 * @retval ::HAL_OK: Operation is OK.
890 * @retval ::HAL_ERROR: Parameter error or operation not supported.
891 * @retval ::HAL_BUSY: Driver is busy.
892 * @retval ::HAL_TIMEOUT: Timeout occurred.
893 ****************************************************************************************
894 */
895 hal_status_t hal_spi_transmit_receive_dma(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length);
896
897 /**
898 ****************************************************************************************
899 * @brief Read an amount of data from EEPROM in non-blocking mode with DMA.
900 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
901 * @param[in] p_tx_data: Pointer to transmission data buffer
902 * @param[out] p_rx_data: Pointer to reception data buffer
903 * @param[in] tx_number_data: Amount of data to be sent in bytes
904 * @param[in] rx_number_data: Amount of data to be received in bytes, ranging between 0 and 4095.
905 * @retval ::HAL_OK: Operation is OK.
906 * @retval ::HAL_ERROR: Parameter error or operation not supported.
907 * @retval ::HAL_BUSY: Driver is busy.
908 * @retval ::HAL_TIMEOUT: Timeout occurred.
909 ****************************************************************************************
910 */
911 hal_status_t hal_spi_read_eeprom_dma(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data);
912
913
914
915 /**
916 ****************************************************************************************
917 * @brief Transmit an amount of data in non-blocking mode with polling. Support Setting C&A
918 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
919 * @param[in] inst: 1 byte instruction
920 * @param[in] addr: 3 bytes address
921 * @param[in] p_data: Pointer to data buffer
922 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
923 * @param[in] timeout: Timeout duration
924 * @retval ::HAL_OK: Operation is OK.
925 * @retval ::HAL_ERROR: Parameter error or operation not supported.
926 * @retval ::HAL_BUSY: Driver is busy.
927 * @retval ::HAL_TIMEOUT: Timeout occurred.
928 ****************************************************************************************
929 */
930 hal_status_t hal_spi_transmit_with_ia(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length, uint32_t timeout);
931
932 /**
933 ****************************************************************************************
934 * @brief Transmit an amount of data in non-blocking mode with DMA. Support Setting C&A
935 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
936 * @param[in] inst: 1 byte instruction
937 * @param[in] addr: 3 bytes address
938 * @param[in] p_data: Pointer to data buffer
939 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
940 * @retval ::HAL_OK: Operation is OK.
941 * @retval ::HAL_ERROR: Parameter error or operation not supported.
942 * @retval ::HAL_BUSY: Driver is busy.
943 * @retval ::HAL_TIMEOUT: Timeout occurred.
944 ****************************************************************************************
945 */
946 hal_status_t hal_spi_transmit_dma_with_ia(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length);
947
948 /**
949 ****************************************************************************************
950 * @brief Transmit an amount of data in non-blocking mode with polling. Support Setting C&A
951 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
952 * @param[in] inst: 1 byte instruction
953 * @param[in] addr: 4 bytes address
954 * @param[in] p_data: Pointer to data buffer
955 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
956 * @param[in] timeout: Timeout duration
957 * @retval ::HAL_OK: Operation is OK.
958 * @retval ::HAL_ERROR: Parameter error or operation not supported.
959 * @retval ::HAL_BUSY: Driver is busy.
960 * @retval ::HAL_TIMEOUT: Timeout occurred.
961 ****************************************************************************************
962 */
963 hal_status_t hal_spi_transmit_with_ia_32addr(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length, uint32_t timeout);
964
965 /**
966 ****************************************************************************************
967 * @brief Transmit an amount of data in non-blocking mode with DMA. Support Setting C&A
968 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
969 * @param[in] inst: 1 byte instruction
970 * @param[in] addr: 4 bytes address
971 * @param[in] p_data: Pointer to data buffer
972 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
973 * @retval ::HAL_OK: Operation is OK.
974 * @retval ::HAL_ERROR: Parameter error or operation not supported.
975 * @retval ::HAL_BUSY: Driver is busy.
976 * @retval ::HAL_TIMEOUT: Timeout occurred.
977 ****************************************************************************************
978 */
979 hal_status_t hal_spi_transmit_dma_with_ia_32addr(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length);
980
981 /**
982 ****************************************************************************************
983 * @brief Abort ongoing transfer (blocking mode).
984 * @param[in] p_spi: SPI handle.
985 * @note This procedure could be used for aborting any ongoing transfer (Tx and Rx),
986 * started in Interrupt or DMA mode.
987 * This procedure performs following operations :
988 * - Disable SPI Interrupts (depending of transfer direction)
989 * - Disable the DMA transfer in the peripheral register (if enabled)
990 * - Abort DMA transfer by calling hal_dma_abort (in case of transfer in DMA mode)
991 * - Set handle State to READY
992 * @note This procedure is executed in blocking mode: when exiting function, Abort is considered as completed.
993 * @retval ::HAL_OK: Operation is OK.
994 * @retval ::HAL_ERROR: Parameter error or operation not supported.
995 * @retval ::HAL_BUSY: Driver is busy.
996 * @retval ::HAL_TIMEOUT: Timeout occurred.
997 ****************************************************************************************
998 */
999 hal_status_t hal_spi_abort(spi_handle_t *p_spi);
1000
1001 /**
1002 ****************************************************************************************
1003 * @brief Abort ongoing transfer (Interrupt mode).
1004 * @param[in] p_spi: SPI handle.
1005 * @note This procedure could be used for aborting any ongoing transfer (Tx and Rx),
1006 * started in Interrupt or DMA mode.
1007 * This procedure performs following operations :
1008 * - Disable SPI Interrupts (depending of transfer direction)
1009 * - Disable the DMA transfer in the peripheral register (if enabled)
1010 * - Abort DMA transfer by calling hal_dma_abort_it (in case of transfer in DMA mode)
1011 * - Set handle State to READY
1012 * - At abort completion, call user abort complete callback
1013 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
1014 * considered as completed only when user abort complete callback is executed (not when exiting function).
1015 * @retval ::HAL_OK: Operation is OK.
1016 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1017 * @retval ::HAL_BUSY: Driver is busy.
1018 * @retval ::HAL_TIMEOUT: Timeout occurred.
1019 ****************************************************************************************
1020 */
1021 hal_status_t hal_spi_abort_it(spi_handle_t *p_spi);
1022
1023 /** @} */
1024
1025 /** @addtogroup SPI_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
1026 * @brief IRQ Handler and Callbacks functions
1027 * @{
1028 */
1029
1030 /**
1031 ****************************************************************************************
1032 * @brief Handle SPI interrupt request.
1033 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1034 ****************************************************************************************
1035 */
1036 void hal_spi_irq_handler(spi_handle_t *p_spi);
1037
1038 /**
1039 ****************************************************************************************
1040 * @brief Tx Transfer completed callback.
1041 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1042 ****************************************************************************************
1043 */
1044 void hal_spi_tx_cplt_callback(spi_handle_t *p_spi);
1045
1046 /**
1047 ****************************************************************************************
1048 * @brief Rx Transfer completed callback.
1049 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1050 ****************************************************************************************
1051 */
1052 void hal_spi_rx_cplt_callback(spi_handle_t *p_spi);
1053
1054 /**
1055 ****************************************************************************************
1056 * @brief Tx and Rx Transfer completed callback.
1057 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1058 ****************************************************************************************
1059 */
1060 void hal_spi_tx_rx_cplt_callback(spi_handle_t *p_spi);
1061
1062 /**
1063 ****************************************************************************************
1064 * @brief SPI error callback.
1065 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1066 ****************************************************************************************
1067 */
1068 void hal_spi_error_callback(spi_handle_t *p_spi);
1069
1070 /**
1071 ****************************************************************************************
1072 * @brief SPI Abort Completed callback.
1073 * @param[in] p_spi: SPI handle.
1074 ****************************************************************************************
1075 */
1076 void hal_spi_abort_cplt_callback(spi_handle_t *p_spi);
1077
1078 /** @} */
1079
1080 /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
1081 * @brief SPI control functions
1082 *
1083 @verbatim
1084 ===============================================================================
1085 ##### Peripheral State and Errors functions #####
1086 ===============================================================================
1087 [..]
1088 This subsection provides a set of functions allowing to control the SPI.
1089 (+) hal_spi_get_state() API can be helpful to check in run-time the state of the SPI peripheral
1090 (+) hal_spi_get_error() check in run-time Errors occurring during communication
1091 (+) hal_spi_set_timeout() set the timeout during internal process
1092 (+) hal_spi_set_tx_fifo_threshold() set the TX FIFO Threshold
1093 (+) hal_spi_set_rx_fifo_threshold() set the RX FIFO Threshold
1094 (+) hal_spi_get_tx_fifo_threshold() get the TX FIFO Threshold
1095 (+) hal_spi_get_rx_fifo_threshold() get the RX FIFO Threshold
1096 @endverbatim
1097 * @{
1098 */
1099
1100 /**
1101 ****************************************************************************************
1102 * @brief Return the SPI handle state.
1103 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1104 * @retval ::HAL_SPI_STATE_RESET: Peripheral not initialized.
1105 * @retval ::HAL_SPI_STATE_READY: Peripheral initialized and ready for use.
1106 * @retval ::HAL_SPI_STATE_BUSY: An internal process is ongoing.
1107 * @retval ::HAL_SPI_STATE_BUSY_TX: Data Transmission process is ongoing.
1108 * @retval ::HAL_SPI_STATE_BUSY_RX: Data Reception process is ongoing.
1109 * @retval ::HAL_SPI_STATE_BUSY_TX_RX: Data Transmission and Reception process is ongoing.
1110 * @retval ::HAL_SPI_STATE_ABORT: Peripheral with abort request ongoing.
1111 * @retval ::HAL_SPI_STATE_ERROR: Peripheral in error.
1112 ****************************************************************************************
1113 */
1114 hal_spi_state_t hal_spi_get_state(spi_handle_t *p_spi);
1115
1116 /**
1117 ****************************************************************************************
1118 * @brief Return the SPI error code.
1119 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1120 * @return SPI error code in bitmap format
1121 ****************************************************************************************
1122 */
1123 uint32_t hal_spi_get_error(spi_handle_t *p_spi);
1124
1125 /**
1126 ****************************************************************************************
1127 * @brief Set the SPI internal process timeout value.
1128 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1129 * @param[in] timeout: Internal process timeout value.
1130 ****************************************************************************************
1131 */
1132 void hal_spi_set_timeout(spi_handle_t *p_spi, uint32_t timeout);
1133
1134 /**
1135 ****************************************************************************************
1136 * @brief Set the TX FIFO threshold.
1137 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1138 * @param[in] threshold: TX FIFO threshold value ranging bwtween 0x0U ~ 0x7U.
1139 * @retval ::HAL_OK: Operation is OK.
1140 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1141 * @retval ::HAL_BUSY: Driver is busy.
1142 * @retval ::HAL_TIMEOUT: Timeout occurred.
1143 ****************************************************************************************
1144 */
1145 hal_status_t hal_spi_set_tx_fifo_threshold(spi_handle_t *p_spi, uint32_t threshold);
1146
1147 /**
1148 ****************************************************************************************
1149 * @brief Set the RX FIFO threshold.
1150 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1151 * @param[in] threshold: RX FIFO threshold value ranging bwtween 0x0U ~ 0x7U.
1152 * @retval ::HAL_OK: Operation is OK.
1153 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1154 * @retval ::HAL_BUSY: Driver is busy.
1155 * @retval ::HAL_TIMEOUT: Timeout occurred.
1156 ****************************************************************************************
1157 */
1158 hal_status_t hal_spi_set_rx_fifo_threshold(spi_handle_t *p_spi, uint32_t threshold);
1159
1160 /**
1161 ****************************************************************************************
1162 * @brief Get the TX FIFO threshold.
1163 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1164 * @return TX FIFO threshold
1165 ****************************************************************************************
1166 */
1167 uint32_t hal_spi_get_tx_fifo_threshold(spi_handle_t *p_spi);
1168
1169 /**
1170 ****************************************************************************************
1171 * @brief Get the RX FIFO threshold.
1172 * @param[in] p_spi: Pointer to an SPI handle which contains the configuration information for the specified SPI module.
1173 * @return RX FIFO threshold
1174 ****************************************************************************************
1175 */
1176 uint32_t hal_spi_get_rx_fifo_threshold(spi_handle_t *p_spi);
1177
1178 /**
1179 ****************************************************************************************
1180 * @brief Suspend some registers related to SPI configuration before sleep.
1181 * @param[in] p_spi: Pointer to a SPI handle which contains the configuration
1182 * information for the specified SPI module.
1183 * @retval ::HAL_OK: Operation is OK.
1184 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1185 * @retval ::HAL_BUSY: Driver is busy.
1186 * @retval ::HAL_TIMEOUT: Timeout occurred.
1187 ****************************************************************************************
1188 */
1189 hal_status_t hal_spi_suspend_reg(spi_handle_t *p_spi);
1190
1191 /**
1192 ****************************************************************************************
1193 * @brief Restore some registers related to SPI configuration after sleep.
1194 * This function must be used in conjunction with the hal_spi_suspend_reg().
1195 * @param[in] p_spi: Pointer to a SPI handle which contains the configuration
1196 * information for the specified SPI module.
1197 * @retval ::HAL_OK: Operation is OK.
1198 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1199 * @retval ::HAL_BUSY: Driver is busy.
1200 * @retval ::HAL_TIMEOUT: Timeout occurred.
1201 ****************************************************************************************
1202 */
1203 hal_status_t hal_spi_resume_reg(spi_handle_t *p_spi);
1204
1205 /**
1206 ****************************************************************************************
1207 * @brief Assert the CS Singal line by software (When activate the soft-cs mode)
1208 * @param[in] p_spi: Pointer to a SPI handle which contains the configuration
1209 * information for the specified SPI module.
1210 * @param[in] state: assert state, please @ref CS_STA_STATE.
1211 * @retval :: none
1212 ****************************************************************************************
1213 */
1214 void hal_spi_soft_cs_assert(spi_handle_t *p_spi, uint32_t state);
1215
1216 /**
1217 ****************************************************************************************
1218 * @brief De-Assert the CS Singal line by software (When activate the soft-cs mode)
1219 * @param[in] p_spi: Pointer to a SPI handle which contains the configuration
1220 * information for the specified SPI module.
1221 * @param[in] state: assert state, please @ref CS_STA_STATE.
1222 * @retval :: none
1223 ****************************************************************************************
1224 */
1225 void hal_spi_soft_cs_deassert(spi_handle_t *p_spi, uint32_t state);
1226
1227 /** @} */
1228
1229 /** @} */
1230
1231 #ifdef __cplusplus
1232 }
1233 #endif
1234
1235 #endif /* __GR533x_HAL_SPI_H__ */
1236
1237 /** @} */
1238
1239 /** @} */
1240
1241 /** @} */
hal_spi_abort_cplt_callback
void hal_spi_abort_cplt_callback(spi_handle_t *p_spi)
SPI Abort Completed callback.
hal_spi_get_state
hal_spi_state_t hal_spi_get_state(spi_handle_t *p_spi)
Return the SPI handle state.
hal_spi_transmit_dma_with_ia_32addr
hal_status_t hal_spi_transmit_dma_with_ia_32addr(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode with DMA. Support Setting C&A.
_hal_spi_callback::spi_rx_cplt_callback
void(* spi_rx_cplt_callback)(spi_handle_t *p_spi)
Definition: gr533x_hal_spi.h:252
HAL_SPI_STATE_READY
@ HAL_SPI_STATE_READY
Definition: gr533x_hal_spi.h:78
_spi_handle
SPI handle Structure definition.
Definition: gr533x_hal_spi.h:191
hal_spi_deinit
hal_status_t hal_spi_deinit(spi_handle_t *p_spi)
De-initialize the SPI peripheral.
_spi_init::ti_mode
uint32_t ti_mode
Definition: gr533x_hal_spi.h:119
_hal_spi_callback::spi_soft_cs_deassert
void(* spi_soft_cs_deassert)(spi_handle_t *p_spi, uint32_t state)
Definition: gr533x_hal_spi.h:256
hal_lock_t
hal_lock_t
HAL Lock structures definition.
Definition: gr533x_hal_def.h:81
hal_spi_abort
hal_status_t hal_spi_abort(spi_handle_t *p_spi)
Abort ongoing transfer (blocking mode).
_hal_spi_callback::spi_abort_cplt_callback
void(* spi_abort_cplt_callback)(spi_handle_t *p_spi)
Definition: gr533x_hal_spi.h:251
_hal_spi_callback::spi_tx_cplt_callback
void(* spi_tx_cplt_callback)(spi_handle_t *p_spi)
Definition: gr533x_hal_spi.h:253
hal_spi_callback_t
struct _hal_spi_callback hal_spi_callback_t
HAL_SPI Callback function definition.
hal_spi_error_callback
void hal_spi_error_callback(spi_handle_t *p_spi)
SPI error callback.
_spi_init::slave_select
uint32_t slave_select
Definition: gr533x_hal_spi.h:122
_spi_handle::read_fifo
void(* read_fifo)(struct _spi_handle *p_spi)
Definition: gr533x_hal_spi.h:212
hal_spi_init
hal_status_t hal_spi_init(spi_handle_t *p_spi)
Initialize the SPI according to the specified parameters in the spi_init_t and initialize the associa...
hal_spi_get_tx_fifo_threshold
uint32_t hal_spi_get_tx_fifo_threshold(spi_handle_t *p_spi)
Get the TX FIFO threshold.
HAL_SPI_STATE_ERROR
@ HAL_SPI_STATE_ERROR
Definition: gr533x_hal_spi.h:84
hal_spi_transmit_dma
hal_status_t hal_spi_transmit_dma(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode with DMA.
hal_spi_transmit
hal_status_t hal_spi_transmit(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length, uint32_t timeout)
Transmit an amount of data in blocking mode.
hal_spi_read_eeprom_dma
hal_status_t hal_spi_read_eeprom_dma(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data)
Read an amount of data from EEPROM in non-blocking mode with DMA.
_spi_handle::p_tx_buffer
uint8_t * p_tx_buffer
Definition: gr533x_hal_spi.h:198
_spi_init
SPI init Structure definition.
Definition: gr533x_hal_spi.h:104
HAL_SPI_STATE_BUSY_TX
@ HAL_SPI_STATE_BUSY_TX
Definition: gr533x_hal_spi.h:80
_spi_handle::tx_xfer_count
__IO uint32_t tx_xfer_count
Definition: gr533x_hal_spi.h:202
hal_spi_receive_dma
hal_status_t hal_spi_receive_dma(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length)
Receive an amount of data in non-blocking mode with DMA.
hal_spi_transmit_with_ia
hal_status_t hal_spi_transmit_with_ia(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length, uint32_t timeout)
Transmit an amount of data in non-blocking mode with polling. Support Setting C&A.
hal_spi_tx_cplt_callback
void hal_spi_tx_cplt_callback(spi_handle_t *p_spi)
Tx Transfer completed callback.
hal_spi_soft_cs_assert
void hal_spi_soft_cs_assert(spi_handle_t *p_spi, uint32_t state)
Assert the CS Singal line by software (When activate the soft-cs mode)
hal_spi_read_eeprom
hal_status_t hal_spi_read_eeprom(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data, uint32_t timeout)
Read an amount of data from EEPROM in blocking mode.
hal_spi_state_t
hal_spi_state_t
HAL SPI State Enumerations definition.
Definition: gr533x_hal_spi.h:76
hal_spi_rx_cplt_callback
void hal_spi_rx_cplt_callback(spi_handle_t *p_spi)
Rx Transfer completed callback.
_spi_handle::p_dmatx
dma_handle_t * p_dmatx
Definition: gr533x_hal_spi.h:216
_spi_handle::timeout
uint32_t timeout
Definition: gr533x_hal_spi.h:226
_spi_handle::p_rx_buffer
uint8_t * p_rx_buffer
Definition: gr533x_hal_spi.h:204
_hal_spi_callback::spi_error_callback
void(* spi_error_callback)(spi_handle_t *p_spi)
Definition: gr533x_hal_spi.h:250
_spi_handle::error_code
__IO uint32_t error_code
Definition: gr533x_hal_spi.h:224
HAL_SPI_STATE_BUSY
@ HAL_SPI_STATE_BUSY
Definition: gr533x_hal_spi.h:79
_spi_handle::rx_xfer_count
__IO uint32_t rx_xfer_count
Definition: gr533x_hal_spi.h:208
hal_spi_irq_handler
void hal_spi_irq_handler(spi_handle_t *p_spi)
Handle SPI interrupt request.
_hal_spi_callback::spi_msp_init
void(* spi_msp_init)(spi_handle_t *p_spi)
Definition: gr533x_hal_spi.h:248
hal_spi_suspend_reg
hal_status_t hal_spi_suspend_reg(spi_handle_t *p_spi)
Suspend some registers related to SPI configuration before sleep.
_hal_spi_callback::spi_tx_rx_cplt_callback
void(* spi_tx_rx_cplt_callback)(spi_handle_t *p_spi)
Definition: gr533x_hal_spi.h:254
_spi_handle::tx_xfer_size
__IO uint32_t tx_xfer_size
Definition: gr533x_hal_spi.h:200
hal_spi_resume_reg
hal_status_t hal_spi_resume_reg(spi_handle_t *p_spi)
Restore some registers related to SPI configuration after sleep. This function must be used in conjun...
hal_spi_soft_cs_deassert
void hal_spi_soft_cs_deassert(spi_handle_t *p_spi, uint32_t state)
De-Assert the CS Singal line by software (When activate the soft-cs mode)
gr533x_ll_spi.h
Header file containing functions prototypes of SPI LL library.
_spi_handle::p_dmarx
dma_handle_t * p_dmarx
Definition: gr533x_hal_spi.h:218
_spi_handle::retention
uint32_t retention[9]
Definition: gr533x_hal_spi.h:228
_spi_handle::soft_cs_magic
__IO uint32_t soft_cs_magic
Definition: gr533x_hal_spi.h:196
hal_spi_transmit_receive
hal_status_t hal_spi_transmit_receive(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length, uint32_t timeout)
Transmit and Receive an amount of data in blocking mode.
hal_spi_set_rx_fifo_threshold
hal_status_t hal_spi_set_rx_fifo_threshold(spi_handle_t *p_spi, uint32_t threshold)
Set the RX FIFO threshold.
hal_spi_get_rx_fifo_threshold
uint32_t hal_spi_get_rx_fifo_threshold(spi_handle_t *p_spi)
Get the RX FIFO threshold.
_hal_spi_callback::spi_soft_cs_assert
void(* spi_soft_cs_assert)(spi_handle_t *p_spi, uint32_t state)
Definition: gr533x_hal_spi.h:255
spi_handle_t
struct _spi_handle spi_handle_t
SPI handle Structure definition.
hal_spi_transmit_dma_with_ia
hal_status_t hal_spi_transmit_dma_with_ia(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode with DMA. Support Setting C&A.
HAL_SPI_STATE_ABORT
@ HAL_SPI_STATE_ABORT
Definition: gr533x_hal_spi.h:83
HAL_SPI_STATE_BUSY_RX
@ HAL_SPI_STATE_BUSY_RX
Definition: gr533x_hal_spi.h:81
_spi_init::rx_sample_delay
uint32_t rx_sample_delay
Definition: gr533x_hal_spi.h:125
_spi_handle::init
spi_init_t init
Definition: gr533x_hal_spi.h:194
hal_spi_abort_it
hal_status_t hal_spi_abort_it(spi_handle_t *p_spi)
Abort ongoing transfer (Interrupt mode).
HAL_SPI_STATE_RESET
@ HAL_SPI_STATE_RESET
Definition: gr533x_hal_spi.h:77
hal_spi_transmit_it
hal_status_t hal_spi_transmit_it(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode with Interrupt.
hal_spi_transmit_with_ia_32addr
hal_status_t hal_spi_transmit_with_ia_32addr(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length, uint32_t timeout)
Transmit an amount of data in non-blocking mode with polling. Support Setting C&A.
hal_spi_receive_it
hal_status_t hal_spi_receive_it(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length)
Receive an amount of data in non-blocking mode with Interrupt.
HAL_SPI_STATE_BUSY_TX_RX
@ HAL_SPI_STATE_BUSY_TX_RX
Definition: gr533x_hal_spi.h:82
hal_spi_msp_deinit
void hal_spi_msp_deinit(spi_handle_t *p_spi)
De-initialize the SPI MSP.
hal_spi_receive
hal_status_t hal_spi_receive(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length, uint32_t timeout)
Receive an amount of data in blocking mode.
spi_init_t
struct _spi_init spi_init_t
SPI init Structure definition.
_hal_spi_callback::spi_msp_deinit
void(* spi_msp_deinit)(spi_handle_t *p_spi)
Definition: gr533x_hal_spi.h:249
hal_status_t
hal_status_t
HAL Status structures definition.
Definition: gr533x_hal_def.h:70
_spi_init::clock_polarity
uint32_t clock_polarity
Definition: gr533x_hal_spi.h:108
_spi_init::baudrate_prescaler
uint32_t baudrate_prescaler
Definition: gr533x_hal_spi.h:114
hal_spi_set_tx_fifo_threshold
hal_status_t hal_spi_set_tx_fifo_threshold(spi_handle_t *p_spi, uint32_t threshold)
Set the TX FIFO threshold.
_spi_handle::read_write_fifo
void(* read_write_fifo)(struct _spi_handle *p_spi)
Definition: gr533x_hal_spi.h:214
hal_spi_msp_init
void hal_spi_msp_init(spi_handle_t *p_spi)
Initialize the SPI MSP.
_spi_handle::state
__IO hal_spi_state_t state
Definition: gr533x_hal_spi.h:222
hal_spi_tx_rx_cplt_callback
void hal_spi_tx_rx_cplt_callback(spi_handle_t *p_spi)
Tx and Rx Transfer completed callback.
_spi_handle::rx_xfer_size
__IO uint32_t rx_xfer_size
Definition: gr533x_hal_spi.h:206
hal_spi_transmit_receive_dma
hal_status_t hal_spi_transmit_receive_dma(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length)
Transmit and Receive an amount of data in non-blocking mode with DMA.
hal_spi_read_eeprom_it
hal_status_t hal_spi_read_eeprom_it(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data)
Read an amount of data from EEPROM in non-blocking mode with Interrupt.
hal_spi_transmit_receive_it
hal_status_t hal_spi_transmit_receive_it(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length)
Transmit and Receive an amount of data in non-blocking mode with Interrupt.
_spi_handle::p_instance
spi_regs_t * p_instance
Definition: gr533x_hal_spi.h:192
hal_spi_get_error
uint32_t hal_spi_get_error(spi_handle_t *p_spi)
Return the SPI error code.
_spi_init::clock_phase
uint32_t clock_phase
Definition: gr533x_hal_spi.h:111
_spi_handle::lock
__IO hal_lock_t lock
Definition: gr533x_hal_spi.h:220
_hal_spi_callback
HAL_SPI Callback function definition.
Definition: gr533x_hal_spi.h:247
gr533x_hal_def.h
This file contains HAL common definitions, enumeration, macros and structures definitions.
_dma_handle
DMA handle Structure definition.
Definition: gr533x_hal_dma.h:194
_spi_handle::write_fifo
void(* write_fifo)(struct _spi_handle *p_spi)
Definition: gr533x_hal_spi.h:210
_spi_init::data_size
uint32_t data_size
Definition: gr533x_hal_spi.h:105
hal_spi_set_timeout
void hal_spi_set_timeout(spi_handle_t *p_spi, uint32_t timeout)
Set the SPI internal process timeout value.