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51 #ifndef __GR533X_LL_PWM_H__
52 #define __GR533X_LL_PWM_H__
60 #if defined (PWM0) || defined (PWM1)
231 #define LL_PWM_EDGE_ALIGNED (0x00000000U)
232 #define LL_PWM_CENTER_ALIGNED (0x00000001U)
238 #define LL_PWM_STOP_LVL_LOW (0x00000000U)
239 #define LL_PWM_STOP_LVL_HIGH (0x00000001U)
245 #define LL_PWM_WAITING_TIME_LVL_LOW (0x00000000U)
246 #define LL_PWM_WAITING_TIME_LVL_HIGH (0x00000001U)
252 #define LL_PWM_CODING_CHANNEL_ALL (0x00000000U)
253 #define LL_PWM_CODING_CHANNEL_A (0x00000001U)
259 #define LL_PWM_DRIVEPOLARITY_NEGATIVE (0x00000000U)
260 #define LL_PWM_DRIVEPOLARITY_POSITIVE (0x00000001U)
266 #define LL_PWM_ACTIONEVENT_NONE (0x00000000U)
267 #define LL_PWM_ACTIONEVENT_CLEAR (0x00000001U)
268 #define LL_PWM_ACTIONEVENT_SET (0x00000002U)
269 #define LL_PWM_ACTIONEVENT_TOGGLE (0x00000003U)
275 #define LL_PWM_PRESCALER_UNIT (128)
276 #define LL_PWM_BREATH_PRESCALER_UNIT (128)
277 #define LL_PWM_HOLD_PRESCALER_UNIT (10)
287 #define LL_PWM_NONE_CODING_CHANNEL_DEFAULT_CONFIG \
290 .drive_polarity = LL_PWM_DRIVEPOLARITY_POSITIVE, \
291 .flickerstop_lvl = LL_PWM_STOP_LVL_LOW, \
297 #define LL_PWM_CODING_CHANNEL_DEFAULT_CONFIG \
301 .ll_drive_polarity = LL_PWM_DRIVEPOLARITY_POSITIVE, \
302 .ll_waiting_time_lvl = LL_PWM_WAITING_TIME_LVL_LOW, \
308 #define LL_PWM_NONE_CODING_DEFAULT_CONFIG \
310 .align = LL_PWM_EDGE_ALIGNED, \
311 .prescaler = 10 * LL_PWM_PRESCALER_UNIT, \
312 .bprescaler = 10 * LL_PWM_BREATH_PRESCALER_UNIT * 10 * LL_PWM_PRESCALER_UNIT, \
313 .hprescaler = 10 * LL_PWM_HOLD_PRESCALER_UNIT * 10 * LL_PWM_PRESCALER_UNIT, \
314 .breathstop_lvl = LL_PWM_STOP_LVL_LOW, \
315 .channel_a = LL_PWM_NONE_CODING_CHANNEL_DEFAULT_CONFIG, \
316 .channel_b = LL_PWM_NONE_CODING_CHANNEL_DEFAULT_CONFIG, \
317 .channel_c = LL_PWM_NONE_CODING_CHANNEL_DEFAULT_CONFIG, \
323 #define LL_PWM_CODING_DEFAULT_CONFIG \
326 .ll_waiting_time = 640, \
327 .ll_data_width_valid = 0x1F, \
328 .ll_coding_channel_select = LL_PWM_CODING_CHANNEL_ALL, \
329 .ll_channel_a = LL_PWM_CODING_CHANNEL_DEFAULT_CONFIG, \
330 .ll_channel_b = LL_PWM_CODING_CHANNEL_DEFAULT_CONFIG, \
331 .ll_channel_c = LL_PWM_CODING_CHANNEL_DEFAULT_CONFIG, \
337 #define LL_PWM_DEFAULT_CONFIG \
339 .ll_mode = LL_PWM_FLICKER_MODE, \
340 .ll_prd_cycles = 0x0, \
341 .none_coding_mode_cfg = LL_PWM_NONE_CODING_DEFAULT_CONFIG, \
342 .coding_mode_cfg = LL_PWM_CODING_DEFAULT_CONFIG, \
365 #define LL_PWM_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG(__instance__->__REG__, (__VALUE__))
373 #define LL_PWM_ReadReg(__instance__, __REG__) READ_REG(__instance__->__REG__)
402 SET_BITS(PWMx->MODE, PWM_MODE_EN);
417 CLEAR_BITS(PWMx->MODE, PWM_MODE_EN);
432 return (READ_BITS(PWMx->MODE, PWM_MODE_EN) == (PWM_MODE_EN));
447 SET_BITS(PWMx->MODE, PWM_MODE_PAUSE);
462 CLEAR_BITS(PWMx->MODE, PWM_MODE_PAUSE);
477 return (READ_BITS(PWMx->MODE, PWM_MODE_PAUSE) == (PWM_MODE_PAUSE));
498 MODIFY_REG(PWMx->MODE, PWM_MODE_CODINGEN, 0x1 << PWM_MODE_CODINGEN_Pos);
501 CLEAR_BITS(PWMx->MODE, PWM_MODE_CODINGEN);
503 (0x1 << PWM_MODE_BREATHEN_Pos) : (0x0 << PWM_MODE_BREATHEN_Pos));
522 if(READ_BITS(PWMx->MODE, PWM_MODE_CODINGEN) == PWM_MODE_CODINGEN) {
541 SET_BITS(PWMx->MODE, PWM_MODE_DPENA);
556 CLEAR_BITS(PWMx->MODE, PWM_MODE_DPENA);
571 return (READ_BITS(PWMx->MODE, PWM_MODE_DPENA) == (PWM_MODE_DPENA));
586 SET_BITS(PWMx->MODE, PWM_MODE_DPENB);
601 CLEAR_BITS(PWMx->MODE, PWM_MODE_DPENB);
616 return (READ_BITS(PWMx->MODE, PWM_MODE_DPENB) == (PWM_MODE_DPENB));
631 SET_BITS(PWMx->MODE, PWM_MODE_DPENC);
646 CLEAR_BITS(PWMx->MODE, PWM_MODE_DPENC);
661 return (READ_BITS(PWMx->MODE, PWM_MODE_DPENC) == (PWM_MODE_DPENC));
677 MODIFY_REG(PWMx->MODE, PWM_MODE_FLICKER_PAUSE_LEVEL_A, flickerstop_lvl << PWM_MODE_FLICKER_PAUSE_LEVEL_A_Pos);
692 return (READ_BITS(PWMx->MODE, PWM_MODE_FLICKER_PAUSE_LEVEL_A));
708 MODIFY_REG(PWMx->MODE, PWM_MODE_FLICKER_PAUSE_LEVEL_B, flickerstop_lvl << PWM_MODE_FLICKER_PAUSE_LEVEL_B_Pos);
723 return (READ_BITS(PWMx->MODE, PWM_MODE_FLICKER_PAUSE_LEVEL_B));
739 MODIFY_REG(PWMx->MODE, PWM_MODE_FLICKER_PAUSE_LEVEL_C, flickerstop_lvl << PWM_MODE_FLICKER_PAUSE_LEVEL_C_Pos);
754 return (READ_BITS(PWMx->MODE, PWM_MODE_FLICKER_PAUSE_LEVEL_C));
770 MODIFY_REG(PWMx->MODE, PWM_MODE_WAITING_TIME_LEVEL_A, waiting_time_lvl << PWM_MODE_WAITING_TIME_LEVEL_A_Pos);
785 return (READ_BITS(PWMx->MODE, PWM_MODE_WAITING_TIME_LEVEL_A) == (PWM_MODE_WAITING_TIME_LEVEL_A));
801 MODIFY_REG(PWMx->MODE, PWM_MODE_WAITING_TIME_LEVEL_B, waiting_time_lvl << PWM_MODE_WAITING_TIME_LEVEL_B_Pos);
816 return (READ_BITS(PWMx->MODE, PWM_MODE_WAITING_TIME_LEVEL_B) == (PWM_MODE_WAITING_TIME_LEVEL_B));
832 MODIFY_REG(PWMx->MODE, PWM_MODE_WAITING_TIME_LEVEL_C, waiting_time_lvl << PWM_MODE_WAITING_TIME_LEVEL_C_Pos);
847 return (READ_BITS(PWMx->MODE, PWM_MODE_WAITING_TIME_LEVEL_C) == (PWM_MODE_WAITING_TIME_LEVEL_C));
862 MODIFY_REG(PWMx->MODE, PWM_MODE_DMA_EN, 0x1 << PWM_MODE_DMA_EN_Pos);
877 MODIFY_REG(PWMx->MODE, PWM_MODE_DMA_EN, 0x0 << PWM_MODE_DMA_EN_Pos);
892 return (READ_BITS(PWMx->MODE, PWM_MODE_DMA_EN) == (PWM_MODE_DMA_EN));
908 MODIFY_REG(PWMx->MODE, PWM_MODE_CODING_CHANNEL_SELECT, coding_channel << PWM_MODE_CODING_CHANNEL_SELECT_Pos);
923 return (READ_BITS(PWMx->MODE, PWM_MODE_CODING_CHANNEL_SELECT) == (PWM_MODE_CODING_CHANNEL_SELECT));
938 return (READ_BITS(PWMx->UPDATE, PWM_UPDATE_SAG) == (PWM_UPDATE_SAG));
953 SET_BITS(PWMx->UPDATE, PWM_UPDATE_SA);
968 CLEAR_BITS(PWMx->UPDATE, PWM_UPDATE_SA);
983 return (READ_BITS(PWMx->UPDATE, PWM_UPDATE_SA) == (PWM_UPDATE_SA));
998 SET_BITS(PWMx->UPDATE, PWM_UPDATE_SSPRD);
1013 CLEAR_BITS(PWMx->UPDATE, PWM_UPDATE_SSPRD);
1028 return (READ_BITS(PWMx->UPDATE, PWM_UPDATE_SSPRD) == (PWM_UPDATE_SSPRD));
1043 SET_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPA0);
1058 CLEAR_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPA0);
1073 return (READ_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPA0) == (PWM_UPDATE_SSCMPA0));
1088 SET_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPA1);
1103 CLEAR_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPA1);
1118 return (READ_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPA1) == (PWM_UPDATE_SSCMPA1));
1133 SET_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPB0);
1148 CLEAR_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPB0);
1163 return (READ_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPB0) == (PWM_UPDATE_SSCMPB0));
1178 SET_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPB1);
1193 CLEAR_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPB1);
1208 return (READ_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPB1) == (PWM_UPDATE_SSCMPB1));
1223 SET_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPC0);
1238 CLEAR_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPC0);
1253 return (READ_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPC0) == (PWM_UPDATE_SSCMPC0));
1268 SET_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPC1);
1283 CLEAR_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPC1);
1298 return (READ_BITS(PWMx->UPDATE, PWM_UPDATE_SSCMPC1) == (PWM_UPDATE_SSCMPC1));
1313 SET_BITS(PWMx->UPDATE, PWM_UPDATE_SSBRPRD);
1328 CLEAR_BITS(PWMx->UPDATE, PWM_UPDATE_SSBRPRD);
1343 return (READ_BITS(PWMx->UPDATE, PWM_UPDATE_SSBRPRD) == (PWM_UPDATE_SSBRPRD));
1358 SET_BITS(PWMx->UPDATE, PWM_UPDATE_SSHOLD);
1373 CLEAR_BITS(PWMx->UPDATE, PWM_UPDATE_SSHOLD);
1388 return (READ_BITS(PWMx->UPDATE, PWM_UPDATE_SSHOLD) == (PWM_UPDATE_SSHOLD));
1403 SET_BITS(PWMx->UPDATE, PWM_UPDATE_SSAQCTRL);
1418 CLEAR_BITS(PWMx->UPDATE, PWM_UPDATE_SSAQCTRL);
1433 return (READ_BITS(PWMx->UPDATE, PWM_UPDATE_SSAQCTRL) == (PWM_UPDATE_SSAQCTRL));
1449 WRITE_REG(PWMx->PRD, prescaler);
1464 return (READ_REG(PWMx->PRD));
1480 WRITE_REG(PWMx->CMPA0, compare);
1495 return (READ_REG(PWMx->CMPA0));
1511 WRITE_REG(PWMx->CMPA1, compare);
1526 return (READ_REG(PWMx->CMPA1));
1542 WRITE_REG(PWMx->CMPB0, compare);
1557 return (READ_REG(PWMx->CMPB0));
1573 WRITE_REG(PWMx->CMPB1, compare);
1588 return (READ_REG(PWMx->CMPB1));
1604 WRITE_REG(PWMx->CMPC0, compare);
1619 return (READ_REG(PWMx->CMPC0));
1635 WRITE_REG(PWMx->CMPC1, compare);
1650 return (READ_REG(PWMx->CMPC1));
1670 MODIFY_REG(PWMx->AQCTRL, PWM_AQCTRL_A0, action_event << PWM_AQCTRL_A0_Pos);
1689 return (READ_BITS(PWMx->AQCTRL, PWM_AQCTRL_A0) >> PWM_AQCTRL_A0_Pos);
1709 MODIFY_REG(PWMx->AQCTRL, PWM_AQCTRL_A1, action_event << PWM_AQCTRL_A1_Pos);
1728 return (READ_BITS(PWMx->AQCTRL, PWM_AQCTRL_A1) >> PWM_AQCTRL_A1_Pos);
1748 MODIFY_REG(PWMx->AQCTRL, PWM_AQCTRL_B0, action_event << PWM_AQCTRL_B0_Pos);
1767 return (READ_BITS(PWMx->AQCTRL, PWM_AQCTRL_B0) >> PWM_AQCTRL_B0_Pos);
1787 MODIFY_REG(PWMx->AQCTRL, PWM_AQCTRL_B1, action_event << PWM_AQCTRL_B1_Pos);
1806 return (READ_BITS(PWMx->AQCTRL, PWM_AQCTRL_B1) >> PWM_AQCTRL_B1_Pos);
1826 MODIFY_REG(PWMx->AQCTRL, PWM_AQCTRL_C0, action_event << PWM_AQCTRL_C0_Pos);
1845 return (READ_BITS(PWMx->AQCTRL, PWM_AQCTRL_C0) >> PWM_AQCTRL_C0_Pos);
1865 MODIFY_REG(PWMx->AQCTRL, PWM_AQCTRL_C1, action_event << PWM_AQCTRL_C1_Pos);
1884 return (READ_BITS(PWMx->AQCTRL, PWM_AQCTRL_C1) >> PWM_AQCTRL_C1_Pos);
1900 MODIFY_REG(PWMx->BRPRD, PWM_BRPRD_BRPRD, bprescaler);
1915 return (READ_BITS(PWMx->BRPRD, PWM_BRPRD_BRPRD));
1931 MODIFY_REG(PWMx->HOLD, PWM_HOLD_HOLD, hprescaler);
1946 return (READ_BITS(PWMx->HOLD, PWM_HOLD_HOLD));
1962 MODIFY_REG(PWMx->MODE, PWM_MODE_BREATH_PAUSE_LEVEL, breathstop_lvl << PWM_MODE_BREATH_PAUSE_LEVEL_Pos);
1977 return (READ_BITS(PWMx->MODE, PWM_MODE_BREATH_PAUSE_LEVEL));
1993 WRITE_REG(PWMx->PRD_CYCLES, prd_cycles);
2008 return (READ_REG(PWMx->PRD_CYCLES));
2024 WRITE_REG(PWMx->WAIT_TIME, waiting_time);
2039 return (READ_REG(PWMx->WAIT_TIME));
2056 MODIFY_REG(PWMx->DATA_WIDTH_VALID, PWM_DATA_WIDTH_VALID, data_valid_width << PWM_DATA_WIDTH_VALID_Pos);
2071 return (uint8_t)(READ_REG(PWMx->DATA_WIDTH_VALID) & PWM_DATA_WIDTH_VALID);
2087 WRITE_REG(PWMx->CODING_DATA, coding_data);
2102 return (READ_REG(PWMx->CODING_DATA));
2117 return (READ_REG(PWMx->CODING_STATUS));
2132 MODIFY_REG(PWMx->CLR_CODING_STATUS, PWM_CODING_STATUS_CODING_A_ERROR_CLR, 0x1 << PWM_CODING_STATUS_CODING_A_ERROR_CLR_Pos);
2147 return (READ_BITS(PWMx->CODING_STATUS, PWM_CODING_STATUS_CODING_A_ERROR) == (PWM_CODING_STATUS_CODING_A_ERROR));
2162 MODIFY_REG(PWMx->CLR_CODING_STATUS, PWM_CODING_STATUS_CODING_B_ERROR_CLR, 0x1 << PWM_CODING_STATUS_CODING_B_ERROR_CLR_Pos);
2177 return (READ_BITS(PWMx->CODING_STATUS, PWM_CODING_STATUS_CODING_B_ERROR) == (PWM_CODING_STATUS_CODING_B_ERROR));
2192 MODIFY_REG(PWMx->CLR_CODING_STATUS, PWM_CODING_STATUS_CODING_C_ERROR_CLR, 0x1 << PWM_CODING_STATUS_CODING_C_ERROR_CLR_Pos);
2207 return (READ_BITS(PWMx->CODING_STATUS, PWM_CODING_STATUS_CODING_C_ERROR) == (PWM_CODING_STATUS_CODING_C_ERROR));
2222 MODIFY_REG(PWMx->CLR_CODING_STATUS, PWM_CODING_STATUS_CODING_DONE_CLR, 0x1 << PWM_CODING_STATUS_CODING_DONE_CLR_Pos);
2237 return (READ_BITS(PWMx->CODING_STATUS, PWM_CODING_STATUS_CODING_DONE) == (PWM_CODING_STATUS_CODING_DONE));
2252 MODIFY_REG(PWMx->CLR_CODING_STATUS, PWM_CODING_STATUS_CODING_LOAD_CLR, 0x1 << PWM_CODING_STATUS_CODING_LOAD_CLR_Pos);
2267 return (READ_BITS(PWMx->CODING_STATUS, PWM_CODING_STATUS_CODING_LOAD) == (PWM_CODING_STATUS_CODING_LOAD));
2282 return ((uint32_t) &(PWMx->CODING_DATA));
__STATIC_INLINE void ll_pwm_disable_update_compare_c1(pwm_regs_t *PWMx)
Disable update compareC1.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_positive_drive_channel_b(pwm_regs_t *PWMx)
Indicate whether the positive drive mode in channelB is enabled.
__STATIC_INLINE void ll_pwm_set_compare_c0(pwm_regs_t *PWMx, uint32_t compare)
Set the PWM compare counter C0.
__STATIC_INLINE void ll_pwm_set_action_event_cmp_b0(pwm_regs_t *PWMx, uint32_t action_event)
Set the channel B0 action event when PWM counter value reaches compare counter B0.
__STATIC_INLINE uint32_t ll_pwm_get_compare_c0(pwm_regs_t *PWMx)
Get the PWM compare counter C0.
__STATIC_INLINE void ll_pwm_set_mode(pwm_regs_t *PWMx, ll_pwm_mode_t mode)
Set PWM mode.
__STATIC_INLINE uint32_t ll_pwm_get_prd_cycles(pwm_regs_t *PWMx)
Get the number of PWM period cycle.
__STATIC_INLINE void ll_pwm_set_compare_c1(pwm_regs_t *PWMx, uint32_t compare)
Set the PWM compare counter C1.
__STATIC_INLINE void ll_pwm_set_compare_a0(pwm_regs_t *PWMx, uint32_t compare)
Set the PWM compare counter A0.
__STATIC_INLINE uint32_t ll_pwm_get_flicker_stop_level_c(pwm_regs_t *PWMx)
Get the channel_c stop level in flicker mode.
__STATIC_INLINE uint8_t ll_pwm_get_dma_en(pwm_regs_t *PWMx)
Get DMA enable or disable.
__STATIC_INLINE uint32_t ll_pwm_get_action_event_cmp_c1(pwm_regs_t *PWMx)
Get the channel C1 action event when PWM counter value reaches compare counter C1.
__STATIC_INLINE uint32_t ll_pwm_get_coding_status(pwm_regs_t *PWMx)
Get pwm coding status.
__STATIC_INLINE uint32_t ll_pwm_dma_get_register_address(pwm_regs_t *PWMx)
Get the coding data register address used for DMA transfer.
__STATIC_INLINE void ll_pwm_set_data_width_valid(pwm_regs_t *PWMx, uint8_t data_valid_width)
Set the valid coding data width in coding mode.
LL PWM init Structure definition.
__STATIC_INLINE void ll_pwm_disable_update_active_event(pwm_regs_t *PWMx)
Disable update active event.
__STATIC_INLINE void ll_pwm_disable_update_compare_b0(pwm_regs_t *PWMx)
Disable update compareB0.
__STATIC_INLINE void ll_pwm_set_dma_disable(pwm_regs_t *PWMx)
Set DMA disable in coding mode.
struct _ll_pwm_none_coding_mode_init_t ll_pwm_none_coding_mode_init_t
LL PWM none coding mode Structure definition.
__STATIC_INLINE uint32_t ll_pwm_get_waiting_time(pwm_regs_t *PWMx)
Get the waiting time count.
__STATIC_INLINE void ll_pwm_enable_update_all(pwm_regs_t *PWMx)
Enable update all parameters.
ll_pwm_none_coding_channel_init_t channel_c
__STATIC_INLINE uint8_t ll_pwm_get_coding_c_error_status(pwm_regs_t *PWMx)
Get pwmc coding error status.
ll_pwm_none_coding_mode_init_t none_coding_mode_cfg
__STATIC_INLINE uint32_t ll_pwm_get_prescaler(pwm_regs_t *PWMx)
Get the PWM prescaler.
__STATIC_INLINE uint8_t ll_pwm_get_coding_done_status(pwm_regs_t *PWMx)
Get PWM conding done status.
error_status_t ll_pwm_init(pwm_regs_t *PWMx, ll_pwm_init_t *p_pwm_init)
Initialize PWM registers according to the specified parameters in PWM_InitStruct.
__STATIC_INLINE void ll_pwm_set_waiting_time_level_a(pwm_regs_t *PWMx, uint8_t waiting_time_lvl)
Set the channel_a waiting time level in coding mode.
__STATIC_INLINE uint32_t ll_pwm_get_compare_a0(pwm_regs_t *PWMx)
Get the PWM compare counter A0.
__STATIC_INLINE uint32_t ll_pwm_get_breath_prescaler(pwm_regs_t *PWMx)
Get the breath prescaler in breath mode.
uint8_t ll_drive_polarity
struct _ll_pwm_coding_channel_init_t ll_pwm_coding_channel_init_t
LL PWM Output Channel init Structure definition.
__STATIC_INLINE void ll_pwm_disable_update_hold_period(pwm_regs_t *PWMx)
Disable update hold period.
__STATIC_INLINE void ll_pwm_clr_coding_b_error_status(pwm_regs_t *PWMx)
Clear pwmb coding error status.
error_status_t ll_pwm_deinit(pwm_regs_t *PWMx)
De-initialize PWM registers (Registers restored to their default values).
__STATIC_INLINE uint8_t ll_pwm_get_data_width_valid(pwm_regs_t *PWMx)
Get the valid coding data width.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_update_compare_b1(pwm_regs_t *PWMx)
Indicate whether the update compareB1 is enabled.
__STATIC_INLINE void ll_pwm_enable_update_active_event(pwm_regs_t *PWMx)
Enable update active event.
ll_pwm_coding_mode_init_t coding_mode_cfg
__STATIC_INLINE void ll_pwm_set_action_event_cmp_a0(pwm_regs_t *PWMx, uint32_t action_event)
Set the channel A0 action event when PWM counter value reaches compare counter A0.
__STATIC_INLINE void ll_pwm_set_compare_a1(pwm_regs_t *PWMx, uint32_t compare)
Set the PWM compare counter A1.
__STATIC_INLINE ll_pwm_mode_t ll_pwm_get_mode(pwm_regs_t *PWMx)
Get PWM mode.
__STATIC_INLINE uint32_t ll_pwm_get_compare_b1(pwm_regs_t *PWMx)
Get the PWM compare counter B1.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_update_all(pwm_regs_t *PWMx)
Indicate whether the update all parameters is enabled.
__STATIC_INLINE void ll_pwm_set_action_event_cmp_b1(pwm_regs_t *PWMx, uint32_t action_event)
Set the channel B1 action event when PWM counter value reaches compare counter B1.
__STATIC_INLINE uint32_t ll_pwm_is_enabled(pwm_regs_t *PWMx)
Indicate whether the PWM is enabled.
__STATIC_INLINE void ll_pwm_disable_update_compare_c0(pwm_regs_t *PWMx)
Disable update compareC0.
__STATIC_INLINE uint32_t ll_pwm_get_action_event_cmp_b0(pwm_regs_t *PWMx)
Get the channel B0 action event when PWM counter value reaches compare counter B0.
__STATIC_INLINE void ll_pwm_disable_update_compare_a1(pwm_regs_t *PWMx)
Disable update compareA1.
__STATIC_INLINE void ll_pwm_enable_pause(pwm_regs_t *PWMx)
Enable PWM pause.
__STATIC_INLINE void ll_pwm_set_coding_data(pwm_regs_t *PWMx, uint32_t coding_data)
Set the PWM coding data in coding mode.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_update_active_event(pwm_regs_t *PWMx)
Indicate whether the update active event is enabled.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_update_compare_a0(pwm_regs_t *PWMx)
Indicate whether the update compareA0 is enabled.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_update_compare_b0(pwm_regs_t *PWMx)
Indicate whether the update compareB0 is enabled.
LL PWM none coding mode Structure definition.
ll_pwm_mode_t
LL PWM Mode definition.
__STATIC_INLINE uint32_t ll_pwm_get_compare_b0(pwm_regs_t *PWMx)
Get the PWM compare counter B0.
__STATIC_INLINE void ll_pwm_enable_update_period(pwm_regs_t *PWMx)
Enable update period.
ll_pwm_coding_channel_init_t ll_channel_a
__STATIC_INLINE void ll_pwm_enable_update_hold_period(pwm_regs_t *PWMx)
Enable update hold period.
__STATIC_INLINE void ll_pwm_set_breath_stop_level(pwm_regs_t *PWMx, uint32_t breathstop_lvl)
Set the stop level in breath mode.
__STATIC_INLINE void ll_pwm_set_flicker_stop_level_b(pwm_regs_t *PWMx, uint32_t flickerstop_lvl)
Set the channel_b stop level in flicker mode.
__STATIC_INLINE void ll_pwm_set_breath_prescaler(pwm_regs_t *PWMx, uint32_t bprescaler)
Set the breath prescaler in breath mode.
__STATIC_INLINE uint32_t ll_pwm_get_breath_stop_level(pwm_regs_t *PWMx)
Get the stop level in breath mode.
__STATIC_INLINE void ll_pwm_clr_coding_done_status(pwm_regs_t *PWMx)
Clear coding done status.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_pause(pwm_regs_t *PWMx)
Indicate whether the PWM pause is enabled.
uint8_t ll_waiting_time_lvl
__STATIC_INLINE void ll_pwm_enable_update_compare_c1(pwm_regs_t *PWMx)
Enable update compareC1.
__STATIC_INLINE void ll_pwm_disable_update_compare_b1(pwm_regs_t *PWMx)
Disable update compareB1.
__STATIC_INLINE void ll_pwm_disable_pause(pwm_regs_t *PWMx)
Disable PWM pause.
__STATIC_INLINE uint8_t ll_pwm_get_coding_a_error_status(pwm_regs_t *PWMx)
Get pwma coding error status.
uint8_t ll_coding_channel_select
__STATIC_INLINE uint32_t ll_pwm_is_enabled_positive_drive_channel_a(pwm_regs_t *PWMx)
Indicate whether the positive drive mode in channelA is enabled.
__STATIC_INLINE void ll_pwm_set_action_event_cmp_c1(pwm_regs_t *PWMx, uint32_t action_event)
Set the channel C1 action event when PWM counter value reaches compare counter C1.
__STATIC_INLINE uint32_t ll_pwm_get_compare_a1(pwm_regs_t *PWMx)
Get the PWM compare counter A1.
__STATIC_INLINE void ll_pwm_set_prd_cycles(pwm_regs_t *PWMx, uint32_t prd_cycles)
Set the number of PWM period cycle in flicker mode or coding mode.
struct _ll_pwm_none_coding_channel_init_t ll_pwm_none_coding_channel_init_t
LL PWM Output Channel init Structure definition.
__STATIC_INLINE uint32_t ll_pwm_get_coding_data(pwm_regs_t *PWMx)
Get the PWM coding data in coding mode.
uint8_t ll_data_width_valid
__STATIC_INLINE uint8_t ll_pwm_get_coding_load_status(pwm_regs_t *PWMx)
Get PWM conding load status.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_update_period(pwm_regs_t *PWMx)
Indicate whether the update period is enabled.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_update_breath_period(pwm_regs_t *PWMx)
Indicate whether the update breath period is enabled.
__STATIC_INLINE void ll_pwm_enable_update_compare_b0(pwm_regs_t *PWMx)
Enable update compareB0.
__STATIC_INLINE void ll_pwm_set_waiting_time(pwm_regs_t *PWMx, uint32_t waiting_time)
Set the waiting time count in coding mode.
__STATIC_INLINE void ll_pwm_enable_update_compare_b1(pwm_regs_t *PWMx)
Enable update compareB1.
__STATIC_INLINE uint8_t ll_pwm_get_waiting_time_level_b(pwm_regs_t *PWMx)
Get the channel_b waiting time level in coding mode.
__STATIC_INLINE void ll_pwm_disable_update_period(pwm_regs_t *PWMx)
Disable update period.
__STATIC_INLINE uint32_t ll_pwm_get_hold_prescaler(pwm_regs_t *PWMx)
Get the hold prescaler in breath mode.
__STATIC_INLINE void ll_pwm_disable_update_compare_a0(pwm_regs_t *PWMx)
Disable update compareA0.
__STATIC_INLINE void ll_pwm_set_flicker_stop_level_c(pwm_regs_t *PWMx, uint32_t flickerstop_lvl)
Set the channel_c stop level in flicker mode.
__STATIC_INLINE void ll_pwm_enable_update_breath_period(pwm_regs_t *PWMx)
Enable update breath period.
__STATIC_INLINE void ll_pwm_enable_update_compare_a0(pwm_regs_t *PWMx)
Enable update compareA0.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_update_hold_period(pwm_regs_t *PWMx)
Indicate whether the update hold period is enabled.
__STATIC_INLINE void ll_pwm_set_waiting_time_level_c(pwm_regs_t *PWMx, uint8_t waiting_time_lvl)
Set the channel_c waiting time level in coding mode.
__STATIC_INLINE uint32_t ll_pwm_get_action_event_cmp_a1(pwm_regs_t *PWMx)
Get the channel A1 action event when PWM counter value reaches compare counter A1.
__STATIC_INLINE void ll_pwm_disable_update_all(pwm_regs_t *PWMx)
Disable update all parameters.
__STATIC_INLINE uint32_t ll_pwm_is_active_flag_update_all(pwm_regs_t *PWMx)
Check update active flag.
__STATIC_INLINE void ll_pwm_clr_coding_load_status(pwm_regs_t *PWMx)
Clear coding load status.
__STATIC_INLINE void ll_pwm_set_hold_prescaler(pwm_regs_t *PWMx, uint32_t hprescaler)
Set the hold prescaler in breath mode.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_update_compare_c0(pwm_regs_t *PWMx)
Indicate whether the update compareC0 is enabled.
__STATIC_INLINE void ll_pwm_disable_positive_drive_channel_c(pwm_regs_t *PWMx)
Disable positive drive mode in channelC.
LL PWM Output Channel init Structure definition.
ll_pwm_none_coding_channel_init_t channel_a
__STATIC_INLINE void ll_pwm_set_compare_b1(pwm_regs_t *PWMx, uint32_t compare)
Set the PWM compare counter B1.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_update_compare_c1(pwm_regs_t *PWMx)
Indicate whether the update compareC1 is enabled.
__STATIC_INLINE void ll_pwm_enable_positive_drive_channel_b(pwm_regs_t *PWMx)
Enable positive drive mode in channelB.
__STATIC_INLINE void ll_pwm_enable(pwm_regs_t *PWMx)
Enable PWM.
__STATIC_INLINE void ll_pwm_disable_positive_drive_channel_b(pwm_regs_t *PWMx)
Disable positive drive mode in channelB.
__STATIC_INLINE void ll_pwm_disable(pwm_regs_t *PWMx)
Disable PWM.
__STATIC_INLINE uint32_t ll_pwm_get_flicker_stop_level_a(pwm_regs_t *PWMx)
Get the channel_a stop level in flicker mode.
__STATIC_INLINE void ll_pwm_set_compare_b0(pwm_regs_t *PWMx, uint32_t compare)
Set the PWM compare counter B0.
__STATIC_INLINE uint8_t ll_pwm_get_waiting_time_level_c(pwm_regs_t *PWMx)
Get the channel_c waiting time level in coding mode.
__STATIC_INLINE void ll_pwm_set_flicker_stop_level_a(pwm_regs_t *PWMx, uint32_t flickerstop_lvl)
Set the channel_a stop level in flicker mode.
__STATIC_INLINE void ll_pwm_disable_positive_drive_channel_a(pwm_regs_t *PWMx)
Disable positive drive mode in channelA.
LL PWM Output Channel init Structure definition.
LL PWM coding mode Structure definition.
__STATIC_INLINE void ll_pwm_set_waiting_time_level_b(pwm_regs_t *PWMx, uint8_t waiting_time_lvl)
Set the channel_b waiting time level in coding mode.
__STATIC_INLINE void ll_pwm_set_action_event_cmp_c0(pwm_regs_t *PWMx, uint32_t action_event)
Set the channel C0 action event when PWM counter value reaches compare counter C0.
__STATIC_INLINE void ll_pwm_enable_positive_drive_channel_c(pwm_regs_t *PWMx)
Enable positive drive mode in channelC.
__STATIC_INLINE void ll_pwm_set_action_event_cmp_a1(pwm_regs_t *PWMx, uint32_t action_event)
Set the channel A1 action event when PWM counter value reaches compare counter A1.
ll_pwm_coding_channel_init_t ll_channel_b
__STATIC_INLINE uint32_t ll_pwm_get_flicker_stop_level_b(pwm_regs_t *PWMx)
Get the channel_b stop level in flicker mode.
struct _ll_pwm_init_t ll_pwm_init_t
LL PWM init Structure definition.
void ll_pwm_struct_init(ll_pwm_init_t *p_pwm_init)
Set each field of a ll_pwm_init_t type structure to default value.
__STATIC_INLINE uint32_t ll_pwm_get_compare_c1(pwm_regs_t *PWMx)
Get the PWM compare counter C1.
__STATIC_INLINE uint8_t ll_pwm_get_waiting_time_level_a(pwm_regs_t *PWMx)
Get the channel_a waiting time level in coding mode.
ll_pwm_coding_channel_init_t ll_channel_c
__STATIC_INLINE void ll_pwm_disable_update_breath_period(pwm_regs_t *PWMx)
Disable update breath period.
__STATIC_INLINE void ll_pwm_set_dma_enable(pwm_regs_t *PWMx)
Set DMA enable in coding mode.
__STATIC_INLINE void ll_pwm_clr_coding_c_error_status(pwm_regs_t *PWMx)
Clear pwmc coding error status.
__STATIC_INLINE uint8_t ll_pwm_get_coding_b_error_status(pwm_regs_t *PWMx)
Get pwmb coding error status.
__STATIC_INLINE uint32_t ll_pwm_get_action_event_cmp_a0(pwm_regs_t *PWMx)
Get the channel A0 action event when PWM counter value reaches compare counter A0.
__STATIC_INLINE void ll_pwm_enable_update_compare_a1(pwm_regs_t *PWMx)
Enable update compareA1.
__STATIC_INLINE void ll_pwm_set_prescaler(pwm_regs_t *PWMx, uint32_t prescaler)
Set the PWM prescaler.
ll_pwm_none_coding_channel_init_t channel_b
__STATIC_INLINE uint32_t ll_pwm_get_action_event_cmp_b1(pwm_regs_t *PWMx)
Get the channel B1 action event when PWM counter value reaches compare counter B1.
__STATIC_INLINE void ll_pwm_enable_update_compare_c0(pwm_regs_t *PWMx)
Enable update compareC0.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_positive_drive_channel_c(pwm_regs_t *PWMx)
Indicate whether the positive drive mode in channelC is enabled.
__STATIC_INLINE void ll_pwm_clr_coding_a_error_status(pwm_regs_t *PWMx)
Clear pwma coding error status.
__STATIC_INLINE void ll_pwm_coding_channel_select(pwm_regs_t *PWMx, uint8_t coding_channel)
Choose 3 channels operation in coding mode or only choose channel A operation in coding mode.
__STATIC_INLINE uint32_t ll_pwm_is_enabled_update_compare_a1(pwm_regs_t *PWMx)
Indicate whether the update compareA1 is enabled.
__STATIC_INLINE uint32_t ll_pwm_get_action_event_cmp_c0(pwm_regs_t *PWMx)
Get the channel C0 action event when PWM counter value reaches compare counter C0.
__STATIC_INLINE void ll_pwm_enable_positive_drive_channel_a(pwm_regs_t *PWMx)
Enable positive drive mode in channelA.
struct _ll_pwm_coding_mode_init_t ll_pwm_coding_mode_init_t
LL PWM coding mode Structure definition.
__STATIC_INLINE uint8_t ll_pwm_get_coding_channel(pwm_regs_t *PWMx)
Get PWM coding channel.