gr533x_ll_tim.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr533x_ll_tim.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of TIMER LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_TIMER TIMER
47 * @brief TIMER LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR533X_LL_TIMER_H__
53 #define __GR533X_LL_TIMER_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr533x.h"
61
62 #if defined (TIMER0) || defined (TIMER1)
63
64 /** @defgroup TIMER_LL_STRUCTURES Structures
65 * @{
66 */
67
68 /* Exported types ------------------------------------------------------------*/
69 /** @defgroup TIMER_LL_ES_INIT TIMER Exported init structures
70 * @{
71 */
72
73 /**
74 * @brief LL TIMER capture type Enumerations definition
75 */
76 typedef enum
77 {
78 LL_TIMER_CAPTURE_NONE = 0x00, /**< Set timer capture NONE */
79 LL_TIMER_CAPTURE_FALLING = 0x01, /**< Set timer capture io falling edge */
80 LL_TIMER_CAPTURE_RISING = 0x02, /**< Set timer capture io rising edge */
81 LL_TIMER_CAPTURE_BOTH = 0x03, /**< Set timer capture io both edge */
82 } ll_timer_capture_type_t;
83
84 /**
85 * @brief LL TIMER capture pin Enumerations definition
86 */
87 typedef enum
88 {
89 LL_TIMER_CAPTURE_IO0 = 0x00, /**< capture IO0 */
90 LL_TIMER_CAPTURE_IO1 = 0x01, /**< capture IO1 */
91 LL_TIMER_CAPTURE_IO2 = 0x02, /**< capture IO2 */
92 LL_TIMER_CAPTURE_IO3 = 0x03, /**< capture IO3 */
93 LL_TIMER_CAPTURE_IO4 = 0x04, /**< capture IO4 */
94 LL_TIMER_CAPTURE_IO5 = 0x05, /**< capture IO5 */
95 LL_TIMER_CAPTURE_IO6 = 0x06, /**< capture IO6 */
96 LL_TIMER_CAPTURE_IO7 = 0x07, /**< capture IO7 */
97 LL_TIMER_CAPTURE_IO8 = 0x08, /**< capture IO8 */
98 LL_TIMER_CAPTURE_IO9 = 0x09, /**< capture IO9 */
99 LL_TIMER_CAPTURE_IO10 = 0x0A, /**< capture IO10 */
100 LL_TIMER_CAPTURE_IO11 = 0x0B, /**< capture IO11 */
101 LL_TIMER_CAPTURE_IO12 = 0x0C, /**< capture IO12 */
102 LL_TIMER_CAPTURE_IO13 = 0x0D, /**< capture IO13 */
103 LL_TIMER_CAPTURE_IO14 = 0x0E, /**< capture IO14 */
104 LL_TIMER_CAPTURE_IO15 = 0x0F, /**< capture IO15 */
105 LL_TIMER_CAPTURE_IO16 = 0x10, /**< capture IO16 */
106 LL_TIMER_CAPTURE_IO17 = 0x11, /**< capture IO17 */
107 LL_TIMER_CAPTURE_IO18 = 0x12, /**< capture IO18 */
108 LL_TIMER_CAPTURE_IO19 = 0x13, /**< capture IO19 */
109 LL_TIMER_CAPTURE_IO20 = 0x14, /**< capture IO20 */
110 LL_TIMER_CAPTURE_IO21 = 0x15, /**< capture IO21 */
111 LL_TIMER_CAPTURE_IO22 = 0x16, /**< capture IO22 */
112 LL_TIMER_CAPTURE_IO23 = 0x17, /**< capture IO23 */
113 LL_TIMER_CAPTURE_IO24 = 0x18, /**< capture IO24 */
114 LL_TIMER_CAPTURE_IO25 = 0x19, /**< capture IO25 */
115 LL_TIMER_CAPTURE_IO26 = 0x1A, /**< capture IO26 */
116 LL_TIMER_CAPTURE_IO27 = 0x1B, /**< capture IO27 */
117 LL_TIMER_CAPTURE_IO28 = 0x1C, /**< capture IO28 */
118 LL_TIMER_CAPTURE_IO29 = 0x1D, /**< capture IO29 */
119 LL_TIMER_CAPTURE_IO30 = 0x1E, /**< capture IO30 */
120 LL_TIMER_CAPTURE_IO31 = 0x1F, /**< capture IO31 */
121 } ll_timer_capture_pin_t;
122
123 /**
124 * @brief LL TIMER capture channel Structure definition
125 */
126 typedef struct _ll_timer_capture_channel_init
127 {
128 ll_timer_capture_type_t ll_edge_capture; /**< Specifies the edge caputre type. */
129 ll_timer_capture_pin_t ll_capture_pin; /**< Soecufies the capture io pin. */
130 } ll_timer_capture_channel_init_t;
131
132 /**
133 * @brief LL TIMER init Structure definition
134 */
135 typedef struct _ll_timer_init_t
136 {
137 uint32_t auto_reload; /**< Specifies the auto reload value to be loaded into the active
138 Auto-Reload Register at the next update event.
139 This parameter must be a number between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF.
140 Some timer instances may support 32 bits counters. In that case this parameter must be a number between 0x0000 and 0xFFFFFFFF.
141
142 This feature can be modified afterwards using unitary function @ref ll_timer_set_auto_reload().*/
143
144 ll_timer_capture_channel_init_t ll_capture_channel0; /**< Capture channel0 config. */
145 ll_timer_capture_channel_init_t ll_capture_channel1; /**< Capture channel1 config. */
146 ll_timer_capture_channel_init_t ll_capture_channel2; /**< Capture channel2 config. */
147 ll_timer_capture_channel_init_t ll_capture_channel3; /**< Capture channel3 config. */
148 } ll_timer_init_t;
149
150 /** @} */
151
152 /** @} */
153
154 /**
155 * @defgroup TIMER_LL_TIMER_MACRO Defines
156 * @{
157 */
158
159 /* Exported constants --------------------------------------------------------*/
160 /** @defgroup TIMER_LL_Exported_Constants TIMER Exported Constants
161 * @{
162 */
163
164 /** @defgroup TIMER_LL_EC_DEFAULT_CONFIG InitStrcut default configuartion
165 * @{
166 */
167 /**
168 * @brief LL TIMER InitStrcut default configuartion
169 */
170 #define TIMER_DEFAULT_CONFIG \
171 { \
172 .auto_reload = SystemCoreClock - 1, \
173 }
174
175 /** @} */
176
177 /** @defgroup TIMER_INTSTAT identify
178 * @{
179 */
180 /**
181 * @brief LL TIMER Interrupt source identify
182 */
183 #define LL_TIMER_INTSTAT_COUNTDONE TIMER_COUNTDONE_INT_STAT /**< COUNTDONE flag */
184 #define LL_TIMER_INTSTAT_CH0 TIMER_CH0_INT_STAT /**< CHANNEL0 flag */
185 #define LL_TIMER_INTSTAT_CH1 TIMER_CH1_INT_STAT /**< CHANNEL1 flag */
186 #define LL_TIMER_INTSTAT_CH2 TIMER_CH2_INT_STAT /**< CHANNEL2 flag */
187 #define LL_TIMER_INTSTAT_CH3 TIMER_CH3_INT_STAT /**< CHANNEL3 flag */
188 #define LL_TIMER_INTSTAT_BLEPULSE1 TIMER_BLEPULSE1_INT_STAT /**< BLE PULSE 1 flag */
189 #define LL_TIMER_INTSTAT_BLEPULSE2 TIMER_BLEPULSE2_INT_STAT /**< BLE PULSE 2 flag */
190 /** @} */
191
192 /** @} */
193
194 /* Exported macro ------------------------------------------------------------*/
195 /** @defgroup TIMER_LL_Exported_Macros TIMER Exported Macros
196 * @{
197 */
198
199 /** @defgroup TIMER_LL_EM_WRITE_READ Common Write and read registers Macros
200 * @{
201 */
202
203 /**
204 * @brief Write a value in TIMER register
205 * @param __instance__ TIMER instance
206 * @param __REG__ Register to be written
207 * @param __VALUE__ Value to be written in the register
208 * @retval None
209 */
210 #define LL_TIMER_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG(__instance__->__REG__, (__VALUE__))
211
212 /**
213 * @brief Read a value in TIMER register
214 * @param __instance__ TIMER instance
215 * @param __REG__ Register to be read
216 * @retval Register value
217 */
218 #define LL_TIMER_ReadReg(__instance__, __REG__) READ_REG(__instance__->__REG__)
219
220 /** @} */
221
222 /** @} */
223
224 /** @} */
225
226 /* Exported functions --------------------------------------------------------*/
227 /** @defgroup TIMER_LL_DRIVER_FUNCTIONS Functions
228 * @{
229 */
230
231 /** @defgroup TIMER_LL_EF_Configuration Configuration functions
232 * @{
233 */
234
235 /**
236 * @brief Enable timer counter.
237 *
238 * Register|BitsName
239 * --------|--------
240 * CTRL | EN
241 *
242 * @param TIMERx Timer instance
243 * @retval None
244 */
245 __STATIC_INLINE void ll_timer_enable_counter(timer_regs_t *TIMERx)
246 {
247 SET_BITS(TIMERx->CTRL, TIMER_CTRL_EN);
248 }
249
250 /**
251 * @brief Disable timer counter.
252 *
253 * Register|BitsName
254 * --------|--------
255 * CTRL | EN
256 *
257 * @param TIMERx Timer instance
258 * @retval None
259 */
260 __STATIC_INLINE void ll_timer_disable_counter(timer_regs_t *TIMERx)
261 {
262 CLEAR_BITS(TIMERx->CTRL, TIMER_CTRL_EN);
263 }
264
265 /**
266 * @brief Indicate whether the timer counter is enabled.
267 *
268 * Register|BitsName
269 * --------|--------
270 * CTRL | EN
271 *
272 * @param TIMERx Timer instance
273 * @retval State of bit (1 or 0).
274 */
275 __STATIC_INLINE uint32_t ll_timer_is_enabled_counter(timer_regs_t *TIMERx)
276 {
277 return (READ_BITS(TIMERx->CTRL, TIMER_CTRL_EN) == (TIMER_CTRL_EN));
278 }
279
280 /**
281 * @brief Set the counter value.
282 *
283 * Register|BitsName
284 * --------|--------
285 * VALUE | VALUE
286 *
287 * @param TIMERx Timer instance
288 * @param counter Counter value (between Min_Data=0 and Max_Data=0xFFFFFFFF)
289 * @retval None
290 */
291 __STATIC_INLINE void ll_timer_set_counter(timer_regs_t *TIMERx, uint32_t counter)
292 {
293 WRITE_REG(TIMERx->VALUE, counter);
294 }
295
296 /**
297 * @brief Get the counter value.
298 *
299 * Register|BitsName
300 * --------|--------
301 * VALUE | VALUE
302 *
303 * @param TIMERx Timer instance
304 * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFFFFFF)
305 */
306 __STATIC_INLINE uint32_t ll_timer_get_counter(timer_regs_t *TIMERx)
307 {
308 return (uint32_t)(READ_REG(TIMERx->VALUE));
309 }
310
311 /**
312 * @brief Set the auto-reload value.
313 * @note The counter is blocked while the auto-reload value is null.
314 *
315 * Register|BitsName
316 * --------|--------
317 * RELOAD | RELOAD
318 *
319 * @param TIMERx Timer instance
320 * @param auto_reload between Min_Data=0 and Max_Data=0xFFFFFFFF
321 * @retval None
322 */
323 __STATIC_INLINE void ll_timer_set_auto_reload(timer_regs_t *TIMERx, uint32_t auto_reload)
324 {
325 WRITE_REG(TIMERx->RELOAD, auto_reload);
326 }
327
328 /**
329 * @brief Get the auto-reload value.
330 *
331 * Register|BitsName
332 * --------|--------
333 * RELOAD | RELOAD
334 *
335 * @param TIMERx Timer instance
336 * @retval Auto-reload value
337 */
338 __STATIC_INLINE uint32_t ll_timer_get_auto_reload(timer_regs_t *TIMERx)
339 {
340 return (uint32_t)(READ_REG(TIMERx->RELOAD));
341 }
342
343 /** @} */
344
345 /** @defgroup TIM_LL_EF_IT_Management IT_Management
346 * @{
347 */
348
349 /**
350 * @brief Enable timer all interrupt.
351 *
352 * Register|BitsName
353 * --------|--------
354 * INTEN | TIMER_COUNTDONE_INT_EN | TIMER_CH0_INT_EN | TIMER_CH1_INT_EN | TIMER_CH2_INT_EN | TIMER_CH3_INT_EN
355 *
356 * @param TIMERx Timer instance
357 * @retval None
358 */
359 __STATIC_INLINE void ll_timer_enable_all_it(timer_regs_t *TIMERx)
360 {
361 SET_BITS(TIMERx->INTEN, TIMER_COUNTDONE_INT_EN | \
362 TIMER_CH0_INT_EN | \
363 TIMER_CH1_INT_EN | \
364 TIMER_CH2_INT_EN | \
365 TIMER_CH3_INT_EN);
366 }
367
368 /**
369 * @brief Disable timer all interrput.
370 *
371 * Register|BitsName
372 * --------|--------
373 * INTEN | TIMER_COUNTDONE_INT_EN | TIMER_CH0_INT_EN | TIMER_CH1_INT_EN | TIMER_CH2_INT_EN | TIMER_CH3_INT_EN
374 *
375 * @param TIMERx Timer instance
376 * @retval None
377 */
378 __STATIC_INLINE void ll_timer_disable_all_it(timer_regs_t *TIMERx)
379 {
380 CLEAR_BITS(TIMERx->INTEN, TIMER_COUNTDONE_INT_EN | \
381 TIMER_CH0_INT_EN | \
382 TIMER_CH1_INT_EN | \
383 TIMER_CH2_INT_EN | \
384 TIMER_CH3_INT_EN);
385 }
386
387 /**
388 * @brief Enable timer countdone interrupt.
389 *
390 * Register|BitsName
391 * --------|--------
392 * INTEN | TIMER_COUNTDONE_INT_EN
393 *
394 * @param TIMERx Timer instance
395 * @retval None
396 */
397 __STATIC_INLINE void ll_timer_enable_countdone_it(timer_regs_t *TIMERx)
398 {
399 SET_BITS(TIMERx->INTEN, TIMER_COUNTDONE_INT_EN);
400 }
401
402 /**
403 * @brief Disable timer countdone interrput.
404 *
405 * Register|BitsName
406 * --------|--------
407 * INTEN | TIMER_COUNTDONE_INT_EN
408 *
409 * @param TIMERx Timer instance
410 * @retval None
411 */
412 __STATIC_INLINE void ll_timer_disable_countdone_it(timer_regs_t *TIMERx)
413 {
414 CLEAR_BITS(TIMERx->INTEN, TIMER_COUNTDONE_INT_EN);
415 }
416
417 /**
418 * @brief Enable timer channel0 interrupt.
419 *
420 * Register|BitsName
421 * --------|--------
422 * INTEN | TIMER_CH0_INT_EN
423 *
424 * @param TIMERx Timer instance
425 * @retval None
426 */
427 __STATIC_INLINE void ll_timer_enable_channel0_it(timer_regs_t *TIMERx)
428 {
429 SET_BITS(TIMERx->INTEN, TIMER_CH0_INT_EN);
430 }
431
432 /**
433 * @brief Disable timer channel0 interrput.
434 *
435 * Register|BitsName
436 * --------|--------
437 * INTEN | TIMER_CH0_INT_EN
438 *
439 * @param TIMERx Timer instance
440 * @retval None
441 */
442 __STATIC_INLINE void ll_timer_disable_channel0_it(timer_regs_t *TIMERx)
443 {
444 CLEAR_BITS(TIMERx->INTEN, TIMER_CH0_INT_EN);
445 }
446
447 /**
448 * @brief Enable timer channel1 interrupt.
449 *
450 * Register|BitsName
451 * --------|--------
452 * INTEN | TIMER_CH1_INT_EN
453 *
454 * @param TIMERx Timer instance
455 * @retval None
456 */
457 __STATIC_INLINE void ll_timer_enable_channel1_it(timer_regs_t *TIMERx)
458 {
459 SET_BITS(TIMERx->INTEN, TIMER_CH1_INT_EN);
460 }
461
462 /**
463 * @brief Disable timer channel1 interrput.
464 *
465 * Register|BitsName
466 * --------|--------
467 * INTEN | TIMER_CH1_INT_EN
468 *
469 * @param TIMERx Timer instance
470 * @retval None
471 */
472 __STATIC_INLINE void ll_timer_disable_channel1_it(timer_regs_t *TIMERx)
473 {
474 CLEAR_BITS(TIMERx->INTEN, TIMER_CH1_INT_EN);
475 }
476
477 /**
478 * @brief Enable timer channel2 interrupt.
479 *
480 * Register|BitsName
481 * --------|--------
482 * INTEN | TIMER_CH2_INT_EN
483 *
484 * @param TIMERx Timer instance
485 * @retval None
486 */
487 __STATIC_INLINE void ll_timer_enable_channel2_it(timer_regs_t *TIMERx)
488 {
489 SET_BITS(TIMERx->INTEN, TIMER_CH2_INT_EN);
490 }
491
492 /**
493 * @brief Disable timer channel2 interrput.
494 *
495 * Register|BitsName
496 * --------|--------
497 * INTEN | TIMER_CH2_INT_EN
498 *
499 * @param TIMERx Timer instance
500 * @retval None
501 */
502 __STATIC_INLINE void ll_timer_disable_channel2_it(timer_regs_t *TIMERx)
503 {
504 CLEAR_BITS(TIMERx->INTEN, TIMER_CH2_INT_EN);
505 }
506
507 /**
508 * @brief Enable timer channel3 interrupt.
509 *
510 * Register|BitsName
511 * --------|--------
512 * INTEN | TIMER_CH3_INT_EN
513 *
514 * @param TIMERx Timer instance
515 * @retval None
516 */
517 __STATIC_INLINE void ll_timer_enable_channel3_it(timer_regs_t *TIMERx)
518 {
519 SET_BITS(TIMERx->INTEN, TIMER_CH3_INT_EN);
520 }
521
522 /**
523 * @brief Disable timer channel3 interrput.
524 *
525 * Register|BitsName
526 * --------|--------
527 * INTEN | TIMER_CH3_INT_EN
528 *
529 * @param TIMERx Timer instance
530 * @retval None
531 */
532 __STATIC_INLINE void ll_timer_disable_channel3_it(timer_regs_t *TIMERx)
533 {
534 CLEAR_BITS(TIMERx->INTEN, TIMER_CH3_INT_EN);
535 }
536
537 /**
538 * @brief Enable timer ble pulse 1 interrupt.
539 *
540 * Register|BitsName
541 * --------|--------
542 * INTEN | TIMER_BLEPULSE1_INT_EN
543 *
544 * @param TIMERx Timer instance
545 * @retval None
546 */
547 __STATIC_INLINE void ll_timer_enable_blepulse1_it(timer_regs_t *TIMERx)
548 {
549 SET_BITS(TIMERx->INTEN, TIMER_BLEPULSE1_INT_EN);
550 }
551
552 /**
553 * @brief Disable timer ble pulse 1 interrput.
554 *
555 * Register|BitsName
556 * --------|--------
557 * INTEN | TIMER_BLEPULSE1_INT_EN
558 *
559 * @param TIMERx Timer instance
560 * @retval None
561 */
562 __STATIC_INLINE void ll_timer_disable_blepulse1_it(timer_regs_t *TIMERx)
563 {
564 CLEAR_BITS(TIMERx->INTEN, TIMER_BLEPULSE1_INT_EN);
565 }
566
567 /**
568 * @brief Enable timer ble pulse 2 interrupt.
569 *
570 * Register|BitsName
571 * --------|--------
572 * INTEN | TIMER_BLEPULSE2_INT_EN
573 *
574 * @param TIMERx Timer instance
575 * @retval None
576 */
577 __STATIC_INLINE void ll_timer_enable_blepulse2_it(timer_regs_t *TIMERx)
578 {
579 SET_BITS(TIMERx->INTEN, TIMER_BLEPULSE2_INT_EN);
580 }
581
582 /**
583 * @brief Disable timer ble pulse 2 interrput.
584 *
585 * Register|BitsName
586 * --------|--------
587 * INTEN | TIMER_BLEPULSE2_INT_EN
588 *
589 * @param TIMERx Timer instance
590 * @retval None
591 */
592 __STATIC_INLINE void ll_timer_disable_blepulse2_it(timer_regs_t *TIMERx)
593 {
594 CLEAR_BITS(TIMERx->INTEN, TIMER_BLEPULSE2_INT_EN);
595 }
596
597 /**
598 * @brief Indicate whether the timer interrput is enabled.
599 *
600 * Register|BitsName
601 * --------|--------
602 * CTRL | INTEN
603 *
604 * @param TIMERx Timer instance
605 * @retval State of bit (1 or 0).
606 */
607 __STATIC_INLINE uint32_t ll_timer_is_enabled_it(timer_regs_t *TIMERx)
608 {
609 return (READ_BITS(TIMERx->INTEN, TIMER_COUNTDONE_INT_EN) >> TIMER_COUNTDONE_INT_EN_Pos | \
610 READ_BITS(TIMERx->INTEN, TIMER_CH0_INT_EN) >> TIMER_CH0_INT_EN_Pos | \
611 READ_BITS(TIMERx->INTEN, TIMER_CH1_INT_EN) >> TIMER_CH1_INT_EN_Pos | \
612 READ_BITS(TIMERx->INTEN, TIMER_CH2_INT_EN) >> TIMER_CH2_INT_EN_Pos | \
613 READ_BITS(TIMERx->INTEN, TIMER_CH3_INT_EN) >> TIMER_CH3_INT_EN_Pos);
614 }
615 /** @} */
616
617 /** @defgroup TIM_LL_EF_FLAG_Management FLAG_Management
618 * @{
619 */
620
621 /**
622 * @brief Clear the COUNTDONE interrupt flag.
623 *
624 * Register|BitsName
625 * --------|--------
626 * INTSTAT | INTSTAT
627 *
628 * @param TIMERx Timer instance
629 * @retval None
630 */
631 __STATIC_INLINE void ll_timer_clear_countdone_flag_it(timer_regs_t *TIMERx)
632 {
633 WRITE_REG(TIMERx->INTSTAT, TIMER_COUNTDONE_INT_STAT);
634 }
635
636 /**
637 * @brief Clear the CHANNEL0 interrupt flag.
638 *
639 * Register|BitsName
640 * --------|--------
641 * INTSTAT | INTSTAT
642 *
643 * @param TIMERx Timer instance
644 * @retval None
645 */
646 __STATIC_INLINE void ll_timer_clear_channel0_flag_it(timer_regs_t *TIMERx)
647 {
648 WRITE_REG(TIMERx->INTSTAT, TIMER_CH0_INT_STAT);
649 }
650
651 /**
652 * @brief Clear the CHANNEL1 interrupt flag.
653 *
654 * Register|BitsName
655 * --------|--------
656 * INTSTAT | INTSTAT
657 *
658 * @param TIMERx Timer instance
659 * @retval None
660 */
661 __STATIC_INLINE void ll_timer_clear_channel1_flag_it(timer_regs_t *TIMERx)
662 {
663 WRITE_REG(TIMERx->INTSTAT, TIMER_CH1_INT_STAT);
664 }
665
666 /**
667 * @brief Clear the CHANNEL2 interrupt flag.
668 *
669 * Register|BitsName
670 * --------|--------
671 * INTSTAT | INTSTAT
672 *
673 * @param TIMERx Timer instance
674 * @retval None
675 */
676 __STATIC_INLINE void ll_timer_clear_channel2_flag_it(timer_regs_t *TIMERx)
677 {
678 WRITE_REG(TIMERx->INTSTAT, TIMER_CH2_INT_STAT);
679 }
680
681 /**
682 * @brief Clear the CHANNEL3 interrupt flag.
683 *
684 * Register|BitsName
685 * --------|--------
686 * INTSTAT | INTSTAT
687 *
688 * @param TIMERx Timer instance
689 * @retval None
690 */
691 __STATIC_INLINE void ll_timer_clear_channel3_flag_it(timer_regs_t *TIMERx)
692 {
693 WRITE_REG(TIMERx->INTSTAT, TIMER_CH3_INT_STAT);
694 }
695
696 /**
697 * @brief Clear the ble pulse 1 interrupt flag.
698 *
699 * Register|BitsName
700 * --------|--------
701 * INTSTAT | INTSTAT
702 *
703 * @param TIMERx Timer instance
704 * @retval None
705 */
706 __STATIC_INLINE void ll_timer_clear_blepulse1_flag_it(timer_regs_t *TIMERx)
707 {
708 WRITE_REG(TIMERx->INTSTAT, TIMER_BLEPULSE1_INT_STAT);
709 }
710
711 /**
712 * @brief Clear the ble pulse 2 interrupt flag.
713 *
714 * Register|BitsName
715 * --------|--------
716 * INTSTAT | INTSTAT
717 *
718 * @param TIMERx Timer instance
719 * @retval None
720 */
721 __STATIC_INLINE void ll_timer_clear_blepulse2_flag_it(timer_regs_t *TIMERx)
722 {
723 WRITE_REG(TIMERx->INTSTAT, TIMER_BLEPULSE2_INT_STAT);
724 }
725
726 /**
727 * @brief Clear the all interrupt flag.
728 *
729 * Register|BitsName
730 * --------|--------
731 * INTSTAT | INTSTAT
732 *
733 * @param TIMERx Timer instance
734 * @retval None
735 */
736 __STATIC_INLINE void ll_timer_clear_all_flag_it(timer_regs_t *TIMERx)
737 {
738 WRITE_REG(TIMERx->INTSTAT, TIMER_INT_STAT);
739 }
740
741 /**
742 * @brief Indicate whether interrupt flag (INTSTAT) is set (interrupt is pending).
743 *
744 * Register|BitsName
745 * --------|--------
746 * INTSTAT | INTSTAT
747 *
748 * @param TIMERx Timer instance
749 * @retval State of bit (1 or 0).
750 */
751 __STATIC_INLINE uint32_t ll_timer_is_active_flag_it(timer_regs_t *TIMERx)
752 {
753 return (READ_BITS(TIMERx->INTSTAT, TIMER_INT_STAT) != TIMER_INT_STAT_Pos);
754 }
755
756 /** @} */
757
758 /** @defgroup TIM_LL_Init Initialization and de-initialization functions
759 * @{
760 */
761
762 /**
763 * @brief De-initialize TIMER registers (Registers restored to their default values).
764 * @param TIMERx TIMER instance
765 * @retval An error_status_t enumeration value:
766 * - SUCCESS: TIMER registers are de-initialized
767 * - ERROR: TIMER registers are not de-initialized
768 */
769 error_status_t ll_timer_deinit(timer_regs_t *TIMERx);
770
771 /**
772 * @brief Initialize TIMER registers according to the specified
773 * parameters in TIMER_InitStruct.
774 * @param TIMERx TIMER instance
775 * @param p_timer_init Pointer to a ll_timer_init_t structure that contains the configuration
776 * information for the specified TIM peripheral.
777 * @retval An error_status_t enumeration value:
778 * - SUCCESS: TIMER registers are initialized according to p_timer_init content
779 * - ERROR: Problem occurred during TIMER Registers initialization
780 */
781 error_status_t ll_timer_init(timer_regs_t *TIMERx, ll_timer_init_t *p_timer_init);
782
783 /**
784 * @brief Set each field of a @ref ll_timer_init_t type structure to default value.
785 * @param p_timer_init Pointer to a @ref ll_timer_init_t structure
786 * whose fields will be set to default values.
787 * @retval None
788 */
789 void ll_timer_struct_init(ll_timer_init_t *p_timer_init);
790
791 /**
792 * @brief Set timer channel0 capture type.
793 *
794 * Register|BitsName
795 * --------|--------
796 * CTRL | TIMER_CH0_EDGE_DET
797 *
798 * @param TIMERx Timer instance
799 * @param ll_edge_capture edge capture type
800 * @retval None
801 */
802 __STATIC_INLINE void ll_timer_set_channel0_capture_type(timer_regs_t *TIMERx, ll_timer_capture_type_t ll_edge_capture)
803 {
804 MODIFY_REG(TIMERx->CTRL, TIMER_CH0_EDGE_DET, ll_edge_capture << TIMER_CH0_EDGE_DET_Pos);
805 }
806
807 /**
808 * @brief Get timer channel0 capture type.
809 *
810 * Register|BitsName
811 * --------|--------
812 * CTRL | TIMER_CH0_EDGE_DET
813 *
814 * @param TIMERx Timer instance
815 * @retval capture type of channel0
816 */
817 __STATIC_INLINE ll_timer_capture_type_t ll_timer_get_channel0_capture_type(timer_regs_t *TIMERx)
818 {
819 return (ll_timer_capture_type_t )(READ_BITS(TIMERx->CTRL, TIMER_CH0_EDGE_DET) >> TIMER_CH0_EDGE_DET_Pos);
820 }
821
822 /**
823 * @brief Set timer channel1 capture type.
824 *
825 * Register|BitsName
826 * --------|--------
827 * CTRL | TIMER_CH1_EDGE_DET
828 *
829 * @param TIMERx Timer instance
830 * @param ll_edge_capture edge capture type
831 * @retval None
832 */
833 __STATIC_INLINE void ll_timer_set_channel1_capture_type(timer_regs_t *TIMERx, ll_timer_capture_type_t ll_edge_capture)
834 {
835 MODIFY_REG(TIMERx->CTRL, TIMER_CH1_EDGE_DET, ll_edge_capture << TIMER_CH1_EDGE_DET_Pos);
836 }
837
838 /**
839 * @brief Get timer channel1 capture type.
840 *
841 * Register|BitsName
842 * --------|--------
843 * CTRL | TIMER_CH1_EDGE_DET
844 *
845 * @param TIMERx Timer instance
846 * @retval capture type of channel1
847 */
848 __STATIC_INLINE ll_timer_capture_type_t ll_timer_get_channel1_capture_type(timer_regs_t *TIMERx)
849 {
850 return (ll_timer_capture_type_t )(READ_BITS(TIMERx->CTRL, TIMER_CH1_EDGE_DET) >> TIMER_CH1_EDGE_DET_Pos);
851 }
852
853 /**
854 * @brief Set timer channel2 capture type.
855 *
856 * Register|BitsName
857 * --------|--------
858 * CTRL | TIMER_CH2_EDGE_DET
859 *
860 * @param TIMERx Timer instance
861 * @param ll_edge_capture edge capture type
862 * @retval None
863 */
864 __STATIC_INLINE void ll_timer_set_channel2_capture_type(timer_regs_t *TIMERx, ll_timer_capture_type_t ll_edge_capture)
865 {
866 MODIFY_REG(TIMERx->CTRL, TIMER_CH2_EDGE_DET, ll_edge_capture << TIMER_CH2_EDGE_DET_Pos);
867 }
868
869 /**
870 * @brief Get timer channel2 capture type.
871 *
872 * Register|BitsName
873 * --------|--------
874 * CTRL | TIMER_CH2_EDGE_DET
875 *
876 * @param TIMERx Timer instance
877 * @retval capture type of channel2
878 */
879 __STATIC_INLINE ll_timer_capture_type_t ll_timer_get_channel2_capture_type(timer_regs_t *TIMERx)
880 {
881 return (ll_timer_capture_type_t )(READ_BITS(TIMERx->CTRL, TIMER_CH2_EDGE_DET) >> TIMER_CH2_EDGE_DET_Pos);
882 }
883
884 /**
885 * @brief Set timer channel3 capture type.
886 *
887 * Register|BitsName
888 * --------|--------
889 * CTRL | TIMER_CH3_EDGE_DET
890 *
891 * @param TIMERx Timer instance
892 * @param ll_edge_capture edge capture type
893 * @retval None
894 */
895 __STATIC_INLINE void ll_timer_set_channel3_capture_type(timer_regs_t *TIMERx, ll_timer_capture_type_t ll_edge_capture)
896 {
897 MODIFY_REG(TIMERx->CTRL, TIMER_CH3_EDGE_DET, ll_edge_capture << TIMER_CH3_EDGE_DET_Pos);
898 }
899
900 /**
901 * @brief Get timer channel3 capture type.
902 *
903 * Register|BitsName
904 * --------|--------
905 * CTRL | TIMER_CH3_EDGE_DET
906 *
907 * @param TIMERx Timer instance
908 * @retval capture type of channel3
909 */
910 __STATIC_INLINE ll_timer_capture_type_t ll_timer_get_channel3_capture_type(timer_regs_t *TIMERx)
911 {
912 return (ll_timer_capture_type_t )(READ_BITS(TIMERx->CTRL, TIMER_CH3_EDGE_DET) >> TIMER_CH3_EDGE_DET_Pos);
913 }
914
915 /**
916 * @brief Set timer channel0 capture pin.
917 *
918 * Register|BitsName
919 * --------|--------
920 * CTRL | TIMER_CH0_PIN_SELECT
921 *
922 * @param TIMERx Timer instance
923 * @param ll_capture_pin capture pin select
924 * @retval None
925 */
926 __STATIC_INLINE void ll_timer_set_channel0_capture_pin(timer_regs_t *TIMERx, ll_timer_capture_pin_t ll_capture_pin)
927 {
928 MODIFY_REG(TIMERx->CTRL, TIMER_CH0_PIN_SELECT, ll_capture_pin << TIMER_CH0_PIN_SELECT_Pos);
929 }
930
931 /**
932 * @brief Get timer channel0 capture pin
933 *
934 * Register|BitsName
935 * --------|--------
936 * CTRL | TIMER_CH0_PIN_SELECT
937 *
938 * @param TIMERx Timer instance
939 * @retval capture pin of channel0
940 */
941 __STATIC_INLINE ll_timer_capture_pin_t ll_timer_get_channel0_capture_pin(timer_regs_t *TIMERx)
942 {
943 return (ll_timer_capture_pin_t )(READ_BITS(TIMERx->CTRL, TIMER_CH0_PIN_SELECT) >> TIMER_CH0_PIN_SELECT_Pos);
944 }
945
946 /**
947 * @brief Set timer channel1 capture pin.
948 *
949 * Register|BitsName
950 * --------|--------
951 * CTRL | TIMER_CH1_PIN_SELECT
952 *
953 * @param TIMERx Timer instance
954 * @param ll_capture_pin capture pin select
955 * @retval None
956 */
957 __STATIC_INLINE void ll_timer_set_channel1_capture_pin(timer_regs_t *TIMERx, ll_timer_capture_pin_t ll_capture_pin)
958 {
959 MODIFY_REG(TIMERx->CTRL, TIMER_CH1_PIN_SELECT, ll_capture_pin << TIMER_CH1_PIN_SELECT_Pos);
960 }
961
962 /**
963 * @brief Get timer channel1 capture pin
964 *
965 * Register|BitsName
966 * --------|--------
967 * CTRL | TIMER_CH1_PIN_SELECT
968 *
969 * @param TIMERx Timer instance
970 * @retval capture pin of channel1
971 */
972 __STATIC_INLINE ll_timer_capture_pin_t ll_timer_get_channel1_capture_pin(timer_regs_t *TIMERx)
973 {
974 return (ll_timer_capture_pin_t )(READ_BITS(TIMERx->CTRL, TIMER_CH1_PIN_SELECT) >> TIMER_CH1_PIN_SELECT_Pos);
975 }
976
977 /**
978 * @brief Set timer channel2 capture pin.
979 *
980 * Register|BitsName
981 * --------|--------
982 * CTRL | TIMER_CH2_PIN_SELECT
983 *
984 * @param TIMERx Timer instance
985 * @param ll_capture_pin capture pin select
986 * @retval None
987 */
988 __STATIC_INLINE void ll_timer_set_channel2_capture_pin(timer_regs_t *TIMERx, ll_timer_capture_pin_t ll_capture_pin)
989 {
990 MODIFY_REG(TIMERx->CTRL, TIMER_CH2_PIN_SELECT, ll_capture_pin << TIMER_CH2_PIN_SELECT_Pos);
991 }
992
993 /**
994 * @brief Get timer channel2 capture pin
995 *
996 * Register|BitsName
997 * --------|--------
998 * CTRL | TIMER_CH2_PIN_SELECT
999 *
1000 * @param TIMERx Timer instance
1001 * @retval capture pin of channel2
1002 */
1003 __STATIC_INLINE ll_timer_capture_pin_t ll_timer_get_channel2_capture_pin(timer_regs_t *TIMERx)
1004 {
1005 return (ll_timer_capture_pin_t )(READ_BITS(TIMERx->CTRL, TIMER_CH2_PIN_SELECT) >> TIMER_CH2_PIN_SELECT_Pos);
1006 }
1007
1008 /**
1009 * @brief Set timer channel3 capture pin.
1010 *
1011 * Register|BitsName
1012 * --------|--------
1013 * CTRL | TIMER_CH3_PIN_SELECT
1014 *
1015 * @param TIMERx Timer instance
1016 * @param ll_capture_pin capture pin select
1017 * @retval None
1018 */
1019 __STATIC_INLINE void ll_timer_set_channel3_capture_pin(timer_regs_t *TIMERx, ll_timer_capture_pin_t ll_capture_pin)
1020 {
1021 MODIFY_REG(TIMERx->CTRL, TIMER_CH3_PIN_SELECT, ll_capture_pin << TIMER_CH3_PIN_SELECT_Pos);
1022 }
1023
1024 /**
1025 * @brief Get timer channel3 capture pin
1026 *
1027 * Register|BitsName
1028 * --------|--------
1029 * CTRL | TIMER_CH3_PIN_SELECT
1030 *
1031 * @param TIMERx Timer instance
1032 * @retval capture pin of channel3
1033 */
1034 __STATIC_INLINE ll_timer_capture_pin_t ll_timer_get_channel3_capture_pin(timer_regs_t *TIMERx)
1035 {
1036 return (ll_timer_capture_pin_t )(READ_BITS(TIMERx->CTRL, TIMER_CH3_PIN_SELECT) >> TIMER_CH3_PIN_SELECT_Pos);
1037 }
1038
1039 /**
1040 * @brief Get timer interrupt flag
1041 *
1042 * Register|BitsName
1043 * --------|--------
1044 * INTSTAT | COUNTDONE_INTSTAT/CHx_INTSTAT
1045 *
1046 * @param TIMERx Timer instance
1047 * @retval interrupt flag
1048 */
1049 __STATIC_INLINE uint32_t ll_timer_get_it_flag(timer_regs_t *TIMERx)
1050 {
1051 return (uint32_t )(READ_BITS(TIMERx->INTSTAT, TIMER_INT_STAT));
1052 }
1053
1054 /**
1055 * @brief Get current value of channel0.
1056 *
1057 * Register|BitsName
1058 * --------|--------
1059 * CHANNEL0_VAL | CHANNEL0_VAL
1060 *
1061 * @param TIMERx Timer instance
1062 * @retval Current timer value
1063 */
1064 __STATIC_INLINE uint32_t ll_timer_get_channel0_val(timer_regs_t *TIMERx)
1065 {
1066 return (uint32_t )(READ_REG(TIMERx->CHANNEL0_VAL));
1067 }
1068
1069 /**
1070 * @brief Get current value of channel1.
1071 *
1072 * Register|BitsName
1073 * --------|--------
1074 * CHANNEL1_VAL | CHANNEL1_VAL
1075 *
1076 * @param TIMERx Timer instance
1077 * @retval Current timer value
1078 */
1079 __STATIC_INLINE uint32_t ll_timer_get_channel1_val(timer_regs_t *TIMERx)
1080 {
1081 return (uint32_t )(READ_REG(TIMERx->CHANNEL1_VAL));
1082 }
1083
1084 /**
1085 * @brief Get current value of channel2.
1086 *
1087 * Register|BitsName
1088 * --------|--------
1089 * CHANNEL2_VAL | CHANNEL2_VAL
1090 *
1091 * @param TIMERx Timer instance
1092 * @retval Current timer value
1093 */
1094 __STATIC_INLINE uint32_t ll_timer_get_channel2_val(timer_regs_t *TIMERx)
1095 {
1096 return (uint32_t )(READ_REG(TIMERx->CHANNEL2_VAL));
1097 }
1098
1099 /**
1100 * @brief Get current value of channel3.
1101 *
1102 * Register|BitsName
1103 * --------|--------
1104 * CHANNEL3_VAL | CHANNEL3_VAL
1105 *
1106 * @param TIMERx Timer instance
1107 * @retval Current timer value
1108 */
1109 __STATIC_INLINE uint32_t ll_timer_get_channel3_val(timer_regs_t *TIMERx)
1110 {
1111 return (uint32_t )(READ_REG(TIMERx->CHANNEL3_VAL));
1112 }
1113
1114 /**
1115 * @brief Enable timer BLE pulse.
1116 *
1117 * Register|BitsName
1118 * --------|--------
1119 * CTRL | BLE_PULSE_CTRL
1120 *
1121 * @param TIMERx Timer instance
1122 * @retval None
1123 */
1124 __STATIC_INLINE void ll_timer_enable_ble_pulse(timer_regs_t *TIMERx)
1125 {
1126 SET_BITS(TIMERx->CTRL, TIMER_BLE_PULSE_CTRL);
1127 }
1128
1129 /**
1130 * @brief Disable timer BLE pulse.
1131 *
1132 * Register|BitsName
1133 * --------|--------
1134 * CTRL | BLE_PULSE_CTRL
1135 *
1136 * @param TIMERx Timer instance
1137 * @retval None
1138 */
1139 __STATIC_INLINE void ll_timer_disable_ble_pulse(timer_regs_t *TIMERx)
1140 {
1141 CLEAR_BITS(TIMERx->CTRL, TIMER_BLE_PULSE_CTRL);
1142 }
1143
1144 /**
1145 * @brief Indicate whether the timer BLE pulse is enabled.
1146 *
1147 * Register|BitsName
1148 * --------|--------
1149 * CTRL | BLE_PULSE_CTRL
1150 *
1151 * @param TIMERx Timer instance
1152 * @retval State of bit (1 or 0).
1153 */
1154 __STATIC_INLINE uint32_t ll_timer_is_enabled_ble_pulse(timer_regs_t *TIMERx)
1155 {
1156 return (READ_BITS(TIMERx->CTRL, TIMER_BLE_PULSE_CTRL) == (TIMER_BLE_PULSE_CTRL));
1157 }
1158
1159 /**
1160 * @brief Set the BLE count value1.
1161 *
1162 * Register|BitsName
1163 * --------|--------
1164 * BLE_COUNTVAL1 | BLE_VAL1
1165 *
1166 * @param TIMERx Timer instance
1167 * @param value count value between Min_Data=0 and Max_Data=0xFFFFFFFF
1168 * @retval None
1169 */
1170 __STATIC_INLINE void ll_timer_set_BLE_val1(timer_regs_t *TIMERx, uint32_t value)
1171 {
1172 WRITE_REG(TIMERx->BLE_COUNTVAL1, value);
1173 }
1174
1175 /**
1176 * @brief Get the BLE count value1.
1177 *
1178 * Register|BitsName
1179 * --------|--------
1180 * BLE_COUNTVAL1 | BLE_VAL1
1181 *
1182 * @param TIMERx Timer instance
1183 * @retval BLE count value1
1184 */
1185 __STATIC_INLINE uint32_t ll_timer_get_BLE_val1(timer_regs_t *TIMERx)
1186 {
1187 return (uint32_t)(READ_REG(TIMERx->BLE_COUNTVAL1));
1188 }
1189
1190 /**
1191 * @brief Set the BLE count value2.
1192 *
1193 * Register|BitsName
1194 * --------|--------
1195 * BLE_COUNTVAL2 | BLE_VAL2
1196 *
1197 * @param TIMERx Timer instance
1198 * @param value count value between Min_Data=0 and Max_Data=0xFFFFFFFF
1199 * @retval None
1200 */
1201 __STATIC_INLINE void ll_timer_set_BLE_val2(timer_regs_t *TIMERx, uint32_t value)
1202 {
1203 WRITE_REG(TIMERx->BLE_COUNTVAL2, value);
1204 }
1205
1206 /**
1207 * @brief Get the BLE count value2.
1208 *
1209 * Register|BitsName
1210 * --------|--------
1211 * BLE_COUNTVAL2 | BLE_VAL2
1212 *
1213 * @param TIMERx Timer instance
1214 * @retval BLE count value2
1215 */
1216 __STATIC_INLINE uint32_t ll_timer_get_BLE_val2(timer_regs_t *TIMERx)
1217 {
1218 return (uint32_t)(READ_REG(TIMERx->BLE_COUNTVAL2));
1219 }
1220
1221 /**
1222 * @brief Set the BLE pulse width.
1223 *
1224 * Register|BitsName
1225 * --------|--------
1226 * BLE_PULSEWIDTH | BLE_PLS
1227 *
1228 * @param TIMERx Timer instance
1229 * @param width pulse width
1230 * @retval None
1231 */
1232 __STATIC_INLINE void ll_timer_set_BLE_pulse_width(timer_regs_t *TIMERx, uint32_t width)
1233 {
1234 MODIFY_REG(TIMERx->BLE_PULSEWIDTH, TIMER_BLE_PLS, width << TIMER_BLE_PLS_Pos);
1235 }
1236
1237 /**
1238 * @brief Get the BLE pulse width.
1239 *
1240 * Register|BitsName
1241 * --------|--------
1242 * BLE_PULSEWIDTH | BLE_PLS
1243 *
1244 * @param TIMERx Timer instance
1245 * @retval BLE pulse width
1246 */
1247 __STATIC_INLINE uint32_t ll_timer_get_pulse_width(timer_regs_t *TIMERx)
1248 {
1249 return (uint32_t)(READ_BITS(TIMERx->BLE_PULSEWIDTH, TIMER_BLE_PLS) >> TIMER_BLE_PLS_Pos);
1250 }
1251
1252 /** @} */
1253
1254 /** @} */
1255
1256 #endif /* TIMER0 || TIMER1 */
1257
1258 #ifdef __cplusplus
1259 }
1260 #endif
1261
1262 #endif /* __GR533X_LL_TIMER_H__ */
1263
1264 /** @} */
1265
1266 /** @} */
1267
1268 /** @} */
LL_TIMER_CAPTURE_IO28
@ LL_TIMER_CAPTURE_IO28
Definition: gr533x_ll_tim.h:117
_ll_timer_capture_channel_init::ll_edge_capture
ll_timer_capture_type_t ll_edge_capture
Definition: gr533x_ll_tim.h:128
ll_timer_disable_ble_pulse
__STATIC_INLINE void ll_timer_disable_ble_pulse(timer_regs_t *TIMERx)
Disable timer BLE pulse.
Definition: gr533x_ll_tim.h:1139
LL_TIMER_CAPTURE_NONE
@ LL_TIMER_CAPTURE_NONE
Definition: gr533x_ll_tim.h:78
LL_TIMER_CAPTURE_IO26
@ LL_TIMER_CAPTURE_IO26
Definition: gr533x_ll_tim.h:115
ll_timer_enable_blepulse1_it
__STATIC_INLINE void ll_timer_enable_blepulse1_it(timer_regs_t *TIMERx)
Enable timer ble pulse 1 interrupt.
Definition: gr533x_ll_tim.h:547
ll_timer_enable_counter
__STATIC_INLINE void ll_timer_enable_counter(timer_regs_t *TIMERx)
Enable timer counter.
Definition: gr533x_ll_tim.h:245
LL_TIMER_CAPTURE_IO18
@ LL_TIMER_CAPTURE_IO18
Definition: gr533x_ll_tim.h:107
LL_TIMER_CAPTURE_IO31
@ LL_TIMER_CAPTURE_IO31
Definition: gr533x_ll_tim.h:120
ll_timer_set_channel1_capture_pin
__STATIC_INLINE void ll_timer_set_channel1_capture_pin(timer_regs_t *TIMERx, ll_timer_capture_pin_t ll_capture_pin)
Set timer channel1 capture pin.
Definition: gr533x_ll_tim.h:957
ll_timer_init
error_status_t ll_timer_init(timer_regs_t *TIMERx, ll_timer_init_t *p_timer_init)
Initialize TIMER registers according to the specified parameters in TIMER_InitStruct.
ll_timer_set_BLE_pulse_width
__STATIC_INLINE void ll_timer_set_BLE_pulse_width(timer_regs_t *TIMERx, uint32_t width)
Set the BLE pulse width.
Definition: gr533x_ll_tim.h:1232
LL_TIMER_CAPTURE_IO0
@ LL_TIMER_CAPTURE_IO0
Definition: gr533x_ll_tim.h:89
ll_timer_get_channel3_capture_pin
__STATIC_INLINE ll_timer_capture_pin_t ll_timer_get_channel3_capture_pin(timer_regs_t *TIMERx)
Get timer channel3 capture pin.
Definition: gr533x_ll_tim.h:1034
ll_timer_disable_channel2_it
__STATIC_INLINE void ll_timer_disable_channel2_it(timer_regs_t *TIMERx)
Disable timer channel2 interrput.
Definition: gr533x_ll_tim.h:502
_ll_timer_init_t::ll_capture_channel1
ll_timer_capture_channel_init_t ll_capture_channel1
Definition: gr533x_ll_tim.h:145
ll_timer_capture_pin_t
ll_timer_capture_pin_t
LL TIMER capture pin Enumerations definition.
Definition: gr533x_ll_tim.h:88
ll_timer_disable_channel3_it
__STATIC_INLINE void ll_timer_disable_channel3_it(timer_regs_t *TIMERx)
Disable timer channel3 interrput.
Definition: gr533x_ll_tim.h:532
LL_TIMER_CAPTURE_IO9
@ LL_TIMER_CAPTURE_IO9
Definition: gr533x_ll_tim.h:98
ll_timer_enable_all_it
__STATIC_INLINE void ll_timer_enable_all_it(timer_regs_t *TIMERx)
Enable timer all interrupt.
Definition: gr533x_ll_tim.h:359
LL_TIMER_CAPTURE_IO14
@ LL_TIMER_CAPTURE_IO14
Definition: gr533x_ll_tim.h:103
ll_timer_enable_channel1_it
__STATIC_INLINE void ll_timer_enable_channel1_it(timer_regs_t *TIMERx)
Enable timer channel1 interrupt.
Definition: gr533x_ll_tim.h:457
ll_timer_get_pulse_width
__STATIC_INLINE uint32_t ll_timer_get_pulse_width(timer_regs_t *TIMERx)
Get the BLE pulse width.
Definition: gr533x_ll_tim.h:1247
ll_timer_disable_counter
__STATIC_INLINE void ll_timer_disable_counter(timer_regs_t *TIMERx)
Disable timer counter.
Definition: gr533x_ll_tim.h:260
ll_timer_set_BLE_val1
__STATIC_INLINE void ll_timer_set_BLE_val1(timer_regs_t *TIMERx, uint32_t value)
Set the BLE count value1.
Definition: gr533x_ll_tim.h:1170
ll_timer_set_counter
__STATIC_INLINE void ll_timer_set_counter(timer_regs_t *TIMERx, uint32_t counter)
Set the counter value.
Definition: gr533x_ll_tim.h:291
ll_timer_get_channel2_capture_type
__STATIC_INLINE ll_timer_capture_type_t ll_timer_get_channel2_capture_type(timer_regs_t *TIMERx)
Get timer channel2 capture type.
Definition: gr533x_ll_tim.h:879
LL_TIMER_CAPTURE_IO1
@ LL_TIMER_CAPTURE_IO1
Definition: gr533x_ll_tim.h:90
LL_TIMER_CAPTURE_IO29
@ LL_TIMER_CAPTURE_IO29
Definition: gr533x_ll_tim.h:118
LL_TIMER_CAPTURE_BOTH
@ LL_TIMER_CAPTURE_BOTH
Definition: gr533x_ll_tim.h:81
ll_timer_set_channel2_capture_type
__STATIC_INLINE void ll_timer_set_channel2_capture_type(timer_regs_t *TIMERx, ll_timer_capture_type_t ll_edge_capture)
Set timer channel2 capture type.
Definition: gr533x_ll_tim.h:864
LL_TIMER_CAPTURE_IO6
@ LL_TIMER_CAPTURE_IO6
Definition: gr533x_ll_tim.h:95
ll_timer_is_enabled_counter
__STATIC_INLINE uint32_t ll_timer_is_enabled_counter(timer_regs_t *TIMERx)
Indicate whether the timer counter is enabled.
Definition: gr533x_ll_tim.h:275
ll_timer_get_BLE_val2
__STATIC_INLINE uint32_t ll_timer_get_BLE_val2(timer_regs_t *TIMERx)
Get the BLE count value2.
Definition: gr533x_ll_tim.h:1216
ll_timer_deinit
error_status_t ll_timer_deinit(timer_regs_t *TIMERx)
De-initialize TIMER registers (Registers restored to their default values).
ll_timer_clear_channel0_flag_it
__STATIC_INLINE void ll_timer_clear_channel0_flag_it(timer_regs_t *TIMERx)
Clear the CHANNEL0 interrupt flag.
Definition: gr533x_ll_tim.h:646
_ll_timer_init_t
LL TIMER init Structure definition.
Definition: gr533x_ll_tim.h:136
ll_timer_set_channel3_capture_pin
__STATIC_INLINE void ll_timer_set_channel3_capture_pin(timer_regs_t *TIMERx, ll_timer_capture_pin_t ll_capture_pin)
Set timer channel3 capture pin.
Definition: gr533x_ll_tim.h:1019
LL_TIMER_CAPTURE_IO7
@ LL_TIMER_CAPTURE_IO7
Definition: gr533x_ll_tim.h:96
LL_TIMER_CAPTURE_IO13
@ LL_TIMER_CAPTURE_IO13
Definition: gr533x_ll_tim.h:102
ll_timer_disable_blepulse2_it
__STATIC_INLINE void ll_timer_disable_blepulse2_it(timer_regs_t *TIMERx)
Disable timer ble pulse 2 interrput.
Definition: gr533x_ll_tim.h:592
LL_TIMER_CAPTURE_IO17
@ LL_TIMER_CAPTURE_IO17
Definition: gr533x_ll_tim.h:106
ll_timer_disable_channel0_it
__STATIC_INLINE void ll_timer_disable_channel0_it(timer_regs_t *TIMERx)
Disable timer channel0 interrput.
Definition: gr533x_ll_tim.h:442
LL_TIMER_CAPTURE_IO19
@ LL_TIMER_CAPTURE_IO19
Definition: gr533x_ll_tim.h:108
ll_timer_enable_channel2_it
__STATIC_INLINE void ll_timer_enable_channel2_it(timer_regs_t *TIMERx)
Enable timer channel2 interrupt.
Definition: gr533x_ll_tim.h:487
LL_TIMER_CAPTURE_IO3
@ LL_TIMER_CAPTURE_IO3
Definition: gr533x_ll_tim.h:92
LL_TIMER_CAPTURE_IO4
@ LL_TIMER_CAPTURE_IO4
Definition: gr533x_ll_tim.h:93
ll_timer_clear_blepulse1_flag_it
__STATIC_INLINE void ll_timer_clear_blepulse1_flag_it(timer_regs_t *TIMERx)
Clear the ble pulse 1 interrupt flag.
Definition: gr533x_ll_tim.h:706
ll_timer_enable_channel0_it
__STATIC_INLINE void ll_timer_enable_channel0_it(timer_regs_t *TIMERx)
Enable timer channel0 interrupt.
Definition: gr533x_ll_tim.h:427
ll_timer_set_BLE_val2
__STATIC_INLINE void ll_timer_set_BLE_val2(timer_regs_t *TIMERx, uint32_t value)
Set the BLE count value2.
Definition: gr533x_ll_tim.h:1201
ll_timer_get_channel2_val
__STATIC_INLINE uint32_t ll_timer_get_channel2_val(timer_regs_t *TIMERx)
Get current value of channel2.
Definition: gr533x_ll_tim.h:1094
ll_timer_capture_type_t
ll_timer_capture_type_t
LL TIMER capture type Enumerations definition.
Definition: gr533x_ll_tim.h:77
ll_timer_get_channel2_capture_pin
__STATIC_INLINE ll_timer_capture_pin_t ll_timer_get_channel2_capture_pin(timer_regs_t *TIMERx)
Get timer channel2 capture pin.
Definition: gr533x_ll_tim.h:1003
LL_TIMER_CAPTURE_IO12
@ LL_TIMER_CAPTURE_IO12
Definition: gr533x_ll_tim.h:101
ll_timer_disable_blepulse1_it
__STATIC_INLINE void ll_timer_disable_blepulse1_it(timer_regs_t *TIMERx)
Disable timer ble pulse 1 interrput.
Definition: gr533x_ll_tim.h:562
ll_timer_enable_ble_pulse
__STATIC_INLINE void ll_timer_enable_ble_pulse(timer_regs_t *TIMERx)
Enable timer BLE pulse.
Definition: gr533x_ll_tim.h:1124
LL_TIMER_CAPTURE_IO5
@ LL_TIMER_CAPTURE_IO5
Definition: gr533x_ll_tim.h:94
LL_TIMER_CAPTURE_IO15
@ LL_TIMER_CAPTURE_IO15
Definition: gr533x_ll_tim.h:104
ll_timer_disable_all_it
__STATIC_INLINE void ll_timer_disable_all_it(timer_regs_t *TIMERx)
Disable timer all interrput.
Definition: gr533x_ll_tim.h:378
ll_timer_get_channel0_capture_type
__STATIC_INLINE ll_timer_capture_type_t ll_timer_get_channel0_capture_type(timer_regs_t *TIMERx)
Get timer channel0 capture type.
Definition: gr533x_ll_tim.h:817
ll_timer_clear_channel1_flag_it
__STATIC_INLINE void ll_timer_clear_channel1_flag_it(timer_regs_t *TIMERx)
Clear the CHANNEL1 interrupt flag.
Definition: gr533x_ll_tim.h:661
LL_TIMER_CAPTURE_IO10
@ LL_TIMER_CAPTURE_IO10
Definition: gr533x_ll_tim.h:99
_ll_timer_capture_channel_init
LL TIMER capture channel Structure definition.
Definition: gr533x_ll_tim.h:127
LL_TIMER_CAPTURE_RISING
@ LL_TIMER_CAPTURE_RISING
Definition: gr533x_ll_tim.h:80
_ll_timer_init_t::ll_capture_channel2
ll_timer_capture_channel_init_t ll_capture_channel2
Definition: gr533x_ll_tim.h:146
ll_timer_get_it_flag
__STATIC_INLINE uint32_t ll_timer_get_it_flag(timer_regs_t *TIMERx)
Get timer interrupt flag.
Definition: gr533x_ll_tim.h:1049
ll_timer_get_counter
__STATIC_INLINE uint32_t ll_timer_get_counter(timer_regs_t *TIMERx)
Get the counter value.
Definition: gr533x_ll_tim.h:306
ll_timer_get_channel1_capture_type
__STATIC_INLINE ll_timer_capture_type_t ll_timer_get_channel1_capture_type(timer_regs_t *TIMERx)
Get timer channel1 capture type.
Definition: gr533x_ll_tim.h:848
ll_timer_struct_init
void ll_timer_struct_init(ll_timer_init_t *p_timer_init)
Set each field of a ll_timer_init_t type structure to default value.
ll_timer_get_channel1_capture_pin
__STATIC_INLINE ll_timer_capture_pin_t ll_timer_get_channel1_capture_pin(timer_regs_t *TIMERx)
Get timer channel1 capture pin.
Definition: gr533x_ll_tim.h:972
ll_timer_get_channel1_val
__STATIC_INLINE uint32_t ll_timer_get_channel1_val(timer_regs_t *TIMERx)
Get current value of channel1.
Definition: gr533x_ll_tim.h:1079
ll_timer_is_enabled_ble_pulse
__STATIC_INLINE uint32_t ll_timer_is_enabled_ble_pulse(timer_regs_t *TIMERx)
Indicate whether the timer BLE pulse is enabled.
Definition: gr533x_ll_tim.h:1154
LL_TIMER_CAPTURE_IO24
@ LL_TIMER_CAPTURE_IO24
Definition: gr533x_ll_tim.h:113
ll_timer_clear_channel3_flag_it
__STATIC_INLINE void ll_timer_clear_channel3_flag_it(timer_regs_t *TIMERx)
Clear the CHANNEL3 interrupt flag.
Definition: gr533x_ll_tim.h:691
ll_timer_set_channel0_capture_pin
__STATIC_INLINE void ll_timer_set_channel0_capture_pin(timer_regs_t *TIMERx, ll_timer_capture_pin_t ll_capture_pin)
Set timer channel0 capture pin.
Definition: gr533x_ll_tim.h:926
ll_timer_clear_countdone_flag_it
__STATIC_INLINE void ll_timer_clear_countdone_flag_it(timer_regs_t *TIMERx)
Clear the COUNTDONE interrupt flag.
Definition: gr533x_ll_tim.h:631
LL_TIMER_CAPTURE_FALLING
@ LL_TIMER_CAPTURE_FALLING
Definition: gr533x_ll_tim.h:79
ll_timer_set_channel2_capture_pin
__STATIC_INLINE void ll_timer_set_channel2_capture_pin(timer_regs_t *TIMERx, ll_timer_capture_pin_t ll_capture_pin)
Set timer channel2 capture pin.
Definition: gr533x_ll_tim.h:988
LL_TIMER_CAPTURE_IO25
@ LL_TIMER_CAPTURE_IO25
Definition: gr533x_ll_tim.h:114
ll_timer_capture_channel_init_t
struct _ll_timer_capture_channel_init ll_timer_capture_channel_init_t
LL TIMER capture channel Structure definition.
_ll_timer_init_t::auto_reload
uint32_t auto_reload
Definition: gr533x_ll_tim.h:137
LL_TIMER_CAPTURE_IO2
@ LL_TIMER_CAPTURE_IO2
Definition: gr533x_ll_tim.h:91
ll_timer_set_channel1_capture_type
__STATIC_INLINE void ll_timer_set_channel1_capture_type(timer_regs_t *TIMERx, ll_timer_capture_type_t ll_edge_capture)
Set timer channel1 capture type.
Definition: gr533x_ll_tim.h:833
_ll_timer_init_t::ll_capture_channel3
ll_timer_capture_channel_init_t ll_capture_channel3
Definition: gr533x_ll_tim.h:147
ll_timer_set_auto_reload
__STATIC_INLINE void ll_timer_set_auto_reload(timer_regs_t *TIMERx, uint32_t auto_reload)
Set the auto-reload value.
Definition: gr533x_ll_tim.h:323
ll_timer_enable_blepulse2_it
__STATIC_INLINE void ll_timer_enable_blepulse2_it(timer_regs_t *TIMERx)
Enable timer ble pulse 2 interrupt.
Definition: gr533x_ll_tim.h:577
ll_timer_get_channel3_val
__STATIC_INLINE uint32_t ll_timer_get_channel3_val(timer_regs_t *TIMERx)
Get current value of channel3.
Definition: gr533x_ll_tim.h:1109
ll_timer_get_auto_reload
__STATIC_INLINE uint32_t ll_timer_get_auto_reload(timer_regs_t *TIMERx)
Get the auto-reload value.
Definition: gr533x_ll_tim.h:338
LL_TIMER_CAPTURE_IO8
@ LL_TIMER_CAPTURE_IO8
Definition: gr533x_ll_tim.h:97
ll_timer_disable_channel1_it
__STATIC_INLINE void ll_timer_disable_channel1_it(timer_regs_t *TIMERx)
Disable timer channel1 interrput.
Definition: gr533x_ll_tim.h:472
LL_TIMER_CAPTURE_IO30
@ LL_TIMER_CAPTURE_IO30
Definition: gr533x_ll_tim.h:119
LL_TIMER_CAPTURE_IO20
@ LL_TIMER_CAPTURE_IO20
Definition: gr533x_ll_tim.h:109
ll_timer_enable_countdone_it
__STATIC_INLINE void ll_timer_enable_countdone_it(timer_regs_t *TIMERx)
Enable timer countdone interrupt.
Definition: gr533x_ll_tim.h:397
LL_TIMER_CAPTURE_IO23
@ LL_TIMER_CAPTURE_IO23
Definition: gr533x_ll_tim.h:112
ll_timer_disable_countdone_it
__STATIC_INLINE void ll_timer_disable_countdone_it(timer_regs_t *TIMERx)
Disable timer countdone interrput.
Definition: gr533x_ll_tim.h:412
ll_timer_get_channel0_val
__STATIC_INLINE uint32_t ll_timer_get_channel0_val(timer_regs_t *TIMERx)
Get current value of channel0.
Definition: gr533x_ll_tim.h:1064
_ll_timer_init_t::ll_capture_channel0
ll_timer_capture_channel_init_t ll_capture_channel0
Definition: gr533x_ll_tim.h:144
ll_timer_is_active_flag_it
__STATIC_INLINE uint32_t ll_timer_is_active_flag_it(timer_regs_t *TIMERx)
Indicate whether interrupt flag (INTSTAT) is set (interrupt is pending).
Definition: gr533x_ll_tim.h:751
ll_timer_init_t
struct _ll_timer_init_t ll_timer_init_t
LL TIMER init Structure definition.
LL_TIMER_CAPTURE_IO22
@ LL_TIMER_CAPTURE_IO22
Definition: gr533x_ll_tim.h:111
ll_timer_is_enabled_it
__STATIC_INLINE uint32_t ll_timer_is_enabled_it(timer_regs_t *TIMERx)
Indicate whether the timer interrput is enabled.
Definition: gr533x_ll_tim.h:607
ll_timer_get_channel0_capture_pin
__STATIC_INLINE ll_timer_capture_pin_t ll_timer_get_channel0_capture_pin(timer_regs_t *TIMERx)
Get timer channel0 capture pin.
Definition: gr533x_ll_tim.h:941
LL_TIMER_CAPTURE_IO21
@ LL_TIMER_CAPTURE_IO21
Definition: gr533x_ll_tim.h:110
ll_timer_enable_channel3_it
__STATIC_INLINE void ll_timer_enable_channel3_it(timer_regs_t *TIMERx)
Enable timer channel3 interrupt.
Definition: gr533x_ll_tim.h:517
_ll_timer_capture_channel_init::ll_capture_pin
ll_timer_capture_pin_t ll_capture_pin
Definition: gr533x_ll_tim.h:129
LL_TIMER_CAPTURE_IO27
@ LL_TIMER_CAPTURE_IO27
Definition: gr533x_ll_tim.h:116
ll_timer_clear_channel2_flag_it
__STATIC_INLINE void ll_timer_clear_channel2_flag_it(timer_regs_t *TIMERx)
Clear the CHANNEL2 interrupt flag.
Definition: gr533x_ll_tim.h:676
ll_timer_set_channel3_capture_type
__STATIC_INLINE void ll_timer_set_channel3_capture_type(timer_regs_t *TIMERx, ll_timer_capture_type_t ll_edge_capture)
Set timer channel3 capture type.
Definition: gr533x_ll_tim.h:895
ll_timer_clear_blepulse2_flag_it
__STATIC_INLINE void ll_timer_clear_blepulse2_flag_it(timer_regs_t *TIMERx)
Clear the ble pulse 2 interrupt flag.
Definition: gr533x_ll_tim.h:721
ll_timer_clear_all_flag_it
__STATIC_INLINE void ll_timer_clear_all_flag_it(timer_regs_t *TIMERx)
Clear the all interrupt flag.
Definition: gr533x_ll_tim.h:736
ll_timer_get_channel3_capture_type
__STATIC_INLINE ll_timer_capture_type_t ll_timer_get_channel3_capture_type(timer_regs_t *TIMERx)
Get timer channel3 capture type.
Definition: gr533x_ll_tim.h:910
ll_timer_get_BLE_val1
__STATIC_INLINE uint32_t ll_timer_get_BLE_val1(timer_regs_t *TIMERx)
Get the BLE count value1.
Definition: gr533x_ll_tim.h:1185
ll_timer_set_channel0_capture_type
__STATIC_INLINE void ll_timer_set_channel0_capture_type(timer_regs_t *TIMERx, ll_timer_capture_type_t ll_edge_capture)
Set timer channel0 capture type.
Definition: gr533x_ll_tim.h:802
LL_TIMER_CAPTURE_IO16
@ LL_TIMER_CAPTURE_IO16
Definition: gr533x_ll_tim.h:105
LL_TIMER_CAPTURE_IO11
@ LL_TIMER_CAPTURE_IO11
Definition: gr533x_ll_tim.h:100