gr533x_ll_aon_wdt.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr533x_ll_aon_wdt.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of AON WDT LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_AON_WDT AON_WDT
47 * @brief AON_WDT LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR533X_LL_AON_WDT_H__
53 #define __GR533X_LL_AON_WDT_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr533x.h"
61
62 /**
63 * @defgroup CLK_CAL_LL_MACRO Defines
64 * @{
65 */
66
67 /** @defgroup AON_TIMER_WD_REG config read
68 * @{
69 */
70 #define AON_WDT_REG_READ (READ_BITS(AON_WDT->CFG0, AON_WDT_CFG0_EN | \
71 AON_WDT_CFG0_ALARM_EN)) /**< read register config */
72 /** @} */
73 /** @} */
74
75
76 /* Exported functions --------------------------------------------------------*/
77 /** @defgroup AON_WDT_LL_DRIVER_FUNCTIONS Functions
78 * @{
79 */
80
81 /** @defgroup AON_WDT_LL_EF_Configuration Configuration functions
82 * @{
83 */
84
85 /**
86 * @brief Enable AON watchdog counter and interrupt event.
87 *
88 * Register|BitsName
89 * --------|--------
90 * AON_WDT_CFG0 | WDT_EN
91 */
92 __STATIC_INLINE void ll_aon_wdt_enable(void)
93 {
94 WRITE_REG(AON_WDT->CFG0,AON_WDT_CFG0_CFG | AON_WDT_CFG0_EN | AON_WDT_REG_READ);
95 }
96
97 /**
98 * @brief Disable AON watchdog counter and interrupt event.
99 *
100 * Register|BitsName
101 * --------|--------
102 * AON_WDT_CFG0 | WDT_EN
103 *
104 */
105 __STATIC_INLINE void ll_aon_wdt_disable(void)
106 {
107 MODIFY_REG(AON_WDT->CFG0, 0xFFFFFFFF, AON_WDT_CFG0_CFG);
108 }
109
110 /**
111 * @brief Check if the AON_WDT peripheral is enabled or disabled.
112 *
113 * Register|BitsName
114 * --------|--------
115 * AON_WDT_CFG0 | WDT_EN
116 *
117 * @retval State of bit (1 or 0).
118 */
119 __STATIC_INLINE uint32_t ll_aon_wdt_is_enabled(void)
120 {
121 return (READ_BITS(AON_WDT->CFG0, AON_WDT_CFG0_EN) == (AON_WDT_CFG0_EN));
122 }
123
124 /**
125 * @brief Specify the AON WDT down-counter reload value.
126 *
127 * Register|BitsName
128 * --------|--------
129 * TIMER_VALUE | TIMER_VALUE
130 * @param counter: Value for reload down-counter which should ranging between 0 ~ 0xFFFF_FFFF
131 * @retval None
132 */
133 __STATIC_INLINE void ll_aon_wdt_set_reload_counter(uint32_t counter)
134 {
135 WRITE_REG(AON_WDT->TIMER_W, counter);
136 }
137
138 /**
139 * @brief Get the AON WDT down-counter reload value.
140 *
141 * Register|BitsName
142 * --------|--------
143 * WD_TIMER_VAL_W | TIMER_VALUE
144 *
145 * @retval counter Value for reload down-counter which should ranging between 0 ~ 0xFFFF_FFFF.
146 */
147 __STATIC_INLINE uint32_t ll_aon_wdt_get_reload_counter(void)
148 {
149 return (uint32_t)READ_BITS(AON_WDT->TIMER_W, AON_WDT_TIMER_W_VAL);
150 }
151
152 /**
153 * @brief Get the AON WDT down-counter read reload value.
154 *
155 * Register|BitsName
156 * --------|--------
157 * WD_TIMER_STS_0 | TIMER_VALUE
158 *
159 * @retval counter Value for reload down-counter which should ranging between 0 ~ 0xFFFF_FFFF.
160 */
161 __STATIC_INLINE uint32_t ll_aon_wdt_get_reload_read_counter()
162 {
163 return (uint32_t)READ_BITS(AON_WDT->TIMER_R, AON_WDT_TIMER_R_VAL);
164 }
165
166 /**
167 * @brief Reloads AON WDT counter.
168 * @note The value in TIMER_VALUE register will be reloaded into AON WDT down-counter
169 * after enable this bit, so ll_aon_wdt_set_reload_counter() should be called before
170 * every reload.
171 *
172 * Register|BitsName
173 * --------|--------
174 * WD_TIMER_CFG_0 | WDT_RELOAD
175 */
176 __STATIC_INLINE void ll_aon_wdt_reload_counter(void)
177 {
178 WRITE_REG(AON_WDT->CFG0, AON_WDT_CFG0_CFG | AON_WDT_CFG0_TIMER_SET | AON_WDT_REG_READ);
179 }
180
181 /**
182 * @brief Read the AON WDT counter current value.
183 *
184 * Register|BitsName
185 * --------|--------
186 * AON_PAD_CTL1 | AON_WDT_TIMER
187 * TIMER_VAL | TIMER_VAL_READ
188 *
189 * @retval Value for current counter which should ranging between 0 ~ 0xFFFF_FFFF
190 */
191 __STATIC_INLINE uint32_t ll_aon_wdt_get_counter(void)
192 {
193 return (uint32_t)READ_BITS(AON_WDT->TIMER_R, AON_WDT_TIMER_R_VAL);
194 }
195
196 /**
197 * @brief Specify the AON_WDT down-counter alarm value
198 * @note AON watchdog will generate an interrupt when it counts down to the
199 * alarm value to alram that it is almost expired.
200 *
201 * Register|BitsName
202 * --------|--------
203 * EXT_WKUP_CTL | WDT_ALARM
204 *
205 * @param counter: Value between Min_Data=0 and Max_Data=0xFF
206 * @retval None
207 */
208 __STATIC_INLINE void ll_aon_wdt_set_alarm_counter(uint32_t counter)
209 {
210 WRITE_REG(AON_WDT->ALARM_W, (counter & AON_WDT_ALARM_W_VAL));
211 }
212
213 /**
214 * @brief Specify the AON_WDT down-counter alarm value and request
215 * @note AON watchdog will generate an interrupt when it counts down to the
216 * alarm value to alram that it is almost expired.
217 *
218 * Register|BitsName
219 * --------|--------
220 * EXT_WKUP_CTL | WDT_ALARM
221 *
222 * @param counter: Value between Min_Data=0 and Max_Data=0xFF
223 * @retval None
224 */
225 __STATIC_INLINE void ll_aon_wdt_set_alarm_counter_and_request(uint32_t counter)
226 {
227 WRITE_REG(AON_WDT->ALARM_W, (counter & AON_WDT_ALARM_W_VAL));
228 WRITE_REG(AON_WDT->CFG0, AON_WDT_CFG0_CFG | AON_WDT_CFG0_ALARM_SET | AON_WDT_REG_READ);
229 }
230
231 /**
232 * @brief Get the AON_WDT down-counter alarm value
233 * @note AON watchdog will generate an interrupt when it counts down to the
234 * alarm value to alram that it is almost expired.
235 *
236 * Register|BitsName
237 * --------|--------
238 * WD_TIMER_ALARM | WDT_ALARM
239 *
240 * @retval Value between Min_Data=0 and Max_Data=0xFF
241 */
242 __STATIC_INLINE uint32_t ll_aon_wdt_get_alarm_counter(void)
243 {
244 return (uint32_t)(READ_BITS(AON_WDT->ALARM_W, AON_WDT_ALARM_W_VAL));
245 }
246
247 /**
248 * @brief Get the AON_WDT down-counter alarm value
249 *
250 * Register|BitsName
251 * --------|--------
252 * WD_TIMER_STS_1 | WDT_ALARM
253 *
254 * @retval Value between Min_Data=0 and Max_Data=0xFF
255 */
256 __STATIC_INLINE uint32_t ll_aon_wdt_get_alarm_read_counter(void)
257 {
258 return (uint32_t)(READ_BITS(AON_WDT->ALARM_R, AON_WDT_ALARM_R_VAL));
259 }
260
261 /**
262 * @brief AON WDT busy status flag.
263 *
264 * Register|BitsName
265 * --------|--------
266 * WD_TIMER_STS| WD_TIMER_STAT_BUSY
267 *
268 * @retval AON WDT busy status flag.
269 */
270 __STATIC_INLINE uint32_t ll_aon_wdt_is_busy(void)
271 {
272 return (uint32_t)(READ_BITS(AON_WDT->STAT, AON_WDT_STAT_BUSY) == (AON_WDT_STAT_BUSY));
273 }
274
275 /**
276 * @brief Enable aon wdt alarm interrupt.
277 *
278 * Register|BitsName
279 * --------|--------
280 * AON_WDT_CFG0 | ALARM_INT_EN
281 *
282 * @retval None
283 */
284 __STATIC_INLINE void ll_aon_wdt_it_enable_alarm(void)
285 {
286 WRITE_REG(AON_WDT->CFG0, AON_WDT_CFG0_CFG | AON_WDT_CFG0_ALARM_EN | AON_WDT_REG_READ);
287 }
288
289 /**
290 * @brief Disable aon wdt alarm interrupt.
291 *
292 * Register|BitsName
293 * --------|--------
294 * AON_WDT_CFG0 | ALARM_INT_EN
295 *
296 * @retval None
297 */
298 __STATIC_INLINE void ll_aon_wdt_it_disable_alarm(void)
299 {
300 WRITE_REG(AON_WDT->CFG0, (AON_WDT_REG_READ & (~AON_WDT_CFG0_ALARM_EN)) | AON_WDT_CFG0_CFG);
301 }
302
303 /**
304 * @brief Check if the aon wdt alarm interrupt is enabled or disabled.
305 *
306 * Register|BitsName
307 * --------|--------
308 * AON_WDT_CFG0 | ALARM_INT_EN
309 *
310 * @retval State of bit (1 or 0).
311 */
312 __STATIC_INLINE uint32_t ll_aon_wdt_it_is_enabled_alarm(void)
313 {
314 return (uint32_t)(READ_BITS(AON_WDT->CFG0, AON_WDT_CFG0_ALARM_EN) == AON_WDT_CFG0_ALARM_EN);
315 }
316
317 /** @} */
318
319 /** @defgroup AON_WDT_LL_EF_FLAG_Management FLAG_Management
320 * @{
321 */
322
323 /**
324 * @brief Indicate if the AON Watchdog Running Flag is set or not.
325 * @note This bit can be used to check if AON Watchdog is in running state.
326 *
327 * Register|BitsName
328 * --------|--------
329 * WD_TIMER_STS | WDT_RUNNING
330 *
331 * @retval State of bit (1 or 0).
332 */
333 __STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_running(void)
334 {
335 return (uint32_t)(READ_BITS(AON_WDT->STAT, AON_WDT_STAT_STAT) == (AON_WDT_STAT_STAT));
336 }
337
338 /**
339 * @brief Indicate if the AON WDT Alarm Event Flag is set or not.
340 * @note This bit is set by hardware when the counter has reached alarm value.
341 * It can be cleared by writing 0 to this bit.
342 *
343 * Register|BitsName
344 * --------|--------
345 * SLP_EVENT | SLP_EVENT_WDT
346 *
347 * @retval State of bit (1 or 0).
348 */
349 __STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_alarm(void)
350 {
351 return (uint32_t)(READ_BITS(AON_CTL->AON_SLP_EVENT, AON_CTL_SLP_EVENT_AON_WDT) == AON_CTL_SLP_EVENT_AON_WDT);
352 }
353
354 /**
355 * @brief Clear Interrupt Status flag.
356 *
357 * Register|BitsName
358 * --------|--------
359 * SLP_EVENT| SLP_EVENT_WDT
360 *
361 * @retval None
362 */
363 __STATIC_INLINE void ll_aon_wdt_clear_flag_alarm(void)
364 {
365 WRITE_REG(AON_CTL->AON_SLP_EVENT, ~AON_CTL_SLP_EVENT_AON_WDT);
366 }
367
368 /**
369 * @brief Enable write access.
370 *
371 * @retval None
372 */
373 __STATIC_INLINE void ll_aon_wdt_unlock(void)
374 {
375 WRITE_REG(AON_WDT->LOCK, 0x15CC5A51 << 1);
376 }
377
378 /**
379 * @brief Disable write access.
380 *
381 * @retval None
382 */
383 __STATIC_INLINE void ll_aon_wdt_lock(void)
384 {
385 WRITE_REG(AON_WDT->LOCK, 0 << 1);
386 }
387
388 /** @} */
389
390 /** @} */
391
392
393 #ifdef __cplusplus
394 }
395 #endif
396
397 #endif /* __GR533X_LL_AON_WDT_PATCH_H__ */
398
399 /** @} */
400
401 /** @} */
402
403 /** @} */
ll_aon_wdt_set_alarm_counter_and_request
__STATIC_INLINE void ll_aon_wdt_set_alarm_counter_and_request(uint32_t counter)
Specify the AON_WDT down-counter alarm value and request.
Definition: gr533x_ll_aon_wdt.h:225
ll_aon_wdt_clear_flag_alarm
__STATIC_INLINE void ll_aon_wdt_clear_flag_alarm(void)
Clear Interrupt Status flag.
Definition: gr533x_ll_aon_wdt.h:363
ll_aon_wdt_it_disable_alarm
__STATIC_INLINE void ll_aon_wdt_it_disable_alarm(void)
Disable aon wdt alarm interrupt.
Definition: gr533x_ll_aon_wdt.h:298
ll_aon_wdt_get_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_counter(void)
Read the AON WDT counter current value.
Definition: gr533x_ll_aon_wdt.h:191
ll_aon_wdt_set_alarm_counter
__STATIC_INLINE void ll_aon_wdt_set_alarm_counter(uint32_t counter)
Specify the AON_WDT down-counter alarm value.
Definition: gr533x_ll_aon_wdt.h:208
ll_aon_wdt_is_active_flag_alarm
__STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_alarm(void)
Indicate if the AON WDT Alarm Event Flag is set or not.
Definition: gr533x_ll_aon_wdt.h:349
ll_aon_wdt_reload_counter
__STATIC_INLINE void ll_aon_wdt_reload_counter(void)
Reloads AON WDT counter.
Definition: gr533x_ll_aon_wdt.h:176
ll_aon_wdt_is_enabled
__STATIC_INLINE uint32_t ll_aon_wdt_is_enabled(void)
Check if the AON_WDT peripheral is enabled or disabled.
Definition: gr533x_ll_aon_wdt.h:119
ll_aon_wdt_unlock
__STATIC_INLINE void ll_aon_wdt_unlock(void)
Enable write access.
Definition: gr533x_ll_aon_wdt.h:373
ll_aon_wdt_it_enable_alarm
__STATIC_INLINE void ll_aon_wdt_it_enable_alarm(void)
Enable aon wdt alarm interrupt.
Definition: gr533x_ll_aon_wdt.h:284
ll_aon_wdt_get_reload_read_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_reload_read_counter()
Get the AON WDT down-counter read reload value.
Definition: gr533x_ll_aon_wdt.h:161
ll_aon_wdt_is_active_flag_running
__STATIC_INLINE uint32_t ll_aon_wdt_is_active_flag_running(void)
Indicate if the AON Watchdog Running Flag is set or not.
Definition: gr533x_ll_aon_wdt.h:333
ll_aon_wdt_lock
__STATIC_INLINE void ll_aon_wdt_lock(void)
Disable write access.
Definition: gr533x_ll_aon_wdt.h:383
ll_aon_wdt_enable
__STATIC_INLINE void ll_aon_wdt_enable(void)
Enable AON watchdog counter and interrupt event.
Definition: gr533x_ll_aon_wdt.h:92
AON_WDT_REG_READ
#define AON_WDT_REG_READ
Definition: gr533x_ll_aon_wdt.h:70
ll_aon_wdt_get_alarm_read_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_alarm_read_counter(void)
Get the AON_WDT down-counter alarm value.
Definition: gr533x_ll_aon_wdt.h:256
ll_aon_wdt_get_reload_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_reload_counter(void)
Get the AON WDT down-counter reload value.
Definition: gr533x_ll_aon_wdt.h:147
ll_aon_wdt_get_alarm_counter
__STATIC_INLINE uint32_t ll_aon_wdt_get_alarm_counter(void)
Get the AON_WDT down-counter alarm value.
Definition: gr533x_ll_aon_wdt.h:242
ll_aon_wdt_set_reload_counter
__STATIC_INLINE void ll_aon_wdt_set_reload_counter(uint32_t counter)
Specify the AON WDT down-counter reload value.
Definition: gr533x_ll_aon_wdt.h:133
ll_aon_wdt_disable
__STATIC_INLINE void ll_aon_wdt_disable(void)
Disable AON watchdog counter and interrupt event.
Definition: gr533x_ll_aon_wdt.h:105
ll_aon_wdt_is_busy
__STATIC_INLINE uint32_t ll_aon_wdt_is_busy(void)
AON WDT busy status flag.
Definition: gr533x_ll_aon_wdt.h:270
ll_aon_wdt_it_is_enabled_alarm
__STATIC_INLINE uint32_t ll_aon_wdt_it_is_enabled_alarm(void)
Check if the aon wdt alarm interrupt is enabled or disabled.
Definition: gr533x_ll_aon_wdt.h:312