gr533x_ll_comp.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr533x_ll_comp.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of COMP LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_COMP COMP
47 * @brief COMP LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR533X_LL_COMP_H__
53 #define __GR533X_LL_COMP_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr533x.h"
61
62 #if defined(AON_CTL)
63
64 /** @defgroup COMP_LL_STRUCTURES Structures
65 * @{
66 */
67
68 /* Exported types ------------------------------------------------------------*/
69 /** @defgroup COMP_LL_ES_INIT COMP Exported init structures
70 * @{
71 */
72
73 /**
74 * @brief LL COMP init Structure definition
75 */
76 typedef struct _ll_comp_init
77 {
78 uint32_t input_source; /**< Specifies the input source for the comparator.
79 This parameter can be any value of @ref COMP_LL_EC_INPUT_SRC.
80 This parameter can be modified afterwards using unitary function @ref ll_comp_set_input_src(). */
81
82 uint32_t ref_source; /**< Specifies the reference source for the comparator.
83 This parameter can be any value of @ref COMP_LL_EC_INPUT_SRC.
84
85 This parameter can be modified afterwards using unitary function @ref ll_comp_set_ref_src(). */
86 uint32_t ref_value; /*!< Specifies the value of the COMP buffered reference.
87 If ref_source select to LL_COMP_REF_SRC_VBAT, this parameter can be a value between: 0 ~ 7.
88 This parameter can be modified afterwards using unitary function @ref ll_comp_set_vbatt_lvl().
89
90 If ref_source select to LL_COMP_REF_SRC_VREF, this parameter can be a value between: 0 ~ 63.
91 This parameter can be modified afterwards using unitary function @ref ll_comp_set_vref_lvl(). */
92 uint32_t hyst; /**< Specifies the hysteresis for the comparator.
93 This parameter can be modified afterwards using unitary function @ref ll_comp_positive_hysteresis() and @ref ll_comp_negative_hysteresis(). */
94
95 uint32_t edge; /**< Specifies the wakeup edge of the comparator.
96 This parameter can be any value of @ref COMP_LL_EC_WAKEUP_EDGE. */
97
98 uint32_t res_deg; /**< Specifies the calibration for the comparator.
99 This parameter can be modified afterwards using unitary function @ref ll_comp_positive_degeneration() and @ref ll_comp_negative_degeneration(). */
100 } ll_comp_init_t;
101
102 /** @} */
103
104 /** @} */
105
106 /**
107 * @defgroup COMP_LL_MACRO Defines
108 * @{
109 */
110
111 /* Exported constants --------------------------------------------------------*/
112 /** @defgroup COMP_LL_Exported_Constants COMP Exported Constants
113 * @{
114 */
115
116 /** @defgroup COMP_LL_EC_INPUT_SRC COMP INPUT SOURCE
117 * @{
118 */
119 #define LL_COMP_INPUT_SRC_IO0 (0UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_0 as inputs for the comparator */
120 #define LL_COMP_INPUT_SRC_IO1 (1UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_1 as inputs for the comparator */
121 #define LL_COMP_INPUT_SRC_IO2 (2UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_2 as inputs for the comparator */
122 #define LL_COMP_INPUT_SRC_IO3 (3UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_3 as inputs for the comparator */
123 #define LL_COMP_INPUT_SRC_IO4 (4UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_4 as inputs for the comparator */
124 #define LL_COMP_INPUT_SRC_IO5 (5UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_5 as inputs for the comparator */
125 #define LL_COMP_INPUT_SRC_IO6 (6UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_6 as inputs for the comparator */
126 #define LL_COMP_INPUT_SRC_IO7 (7UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set MSIO_7 as inputs for the comparator */
127
128 #define LL_COMP_INPUT_SRC_VBAT (9UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set VBATT as inputs for the comparator */
129 #define LL_COMP_INPUT_SRC_VREF (10UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Pos) /**< Set VREF as inputs for the comparator */
130
131 /** @} */
132
133 /** @defgroup COMP_LL_EC_REF_SRC COMP REF SOURCE
134 * @{
135 */
136 #define LL_COMP_REF_SRC_IO0 (0UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_0 as references for the comparator */
137 #define LL_COMP_REF_SRC_IO1 (1UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_1 as references for the comparator */
138 #define LL_COMP_REF_SRC_IO2 (2UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_2 as references for the comparator */
139 #define LL_COMP_REF_SRC_IO3 (3UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_3 as references for the comparator */
140 #define LL_COMP_REF_SRC_IO4 (4UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_4 as references for the comparator */
141 #define LL_COMP_REF_SRC_IO5 (5UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_5 as references for the comparator */
142 #define LL_COMP_REF_SRC_IO6 (6UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_6 as references for the comparator */
143 #define LL_COMP_REF_SRC_IO7 (7UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set MSIO_7 as references for the comparator */
144
145 #define LL_COMP_REF_SRC_VBAT (9UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set VBATT as references for the comparator */
146 #define LL_COMP_REF_SRC_VREF (10UL << AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Pos) /**< Set VREF as references for the comparator */
147 /** @} */
148
149 /** @defgroup COMP_LL_EC_HYST_SRC COMP
150 * @{
151 */
152 #define LL_COMP_HYST_POSITIVE (1UL << AON_PMU_COMP_REG_0_POSITIVE_HYS_EN_Pos ) /**< Set positive side of hysteresis for the comparator */
153 #define LL_COMP_HYST_NEGATIVE (1UL << AON_PMU_COMP_REG_0_NEGATIVE_HYS_EN_Pos ) /**< Set negative side of hysteresis for the comparator */
154
155 /** @} */
156
157 #define LL_COMP_RES_DEGENERATION_POSITIVE (1UL << AON_PMU_COMP_REG_1_CHANNEL_POSITIVE_RES_DEGENERATION_Pos ) /**< Set positive side of calibration for the comparator */
158 #define LL_COMP_RES_DEGENERATION_NEGATIVE (1UL << AON_PMU_COMP_REG_1_CHANNEL_NEGATIVE_RES_DEGENERATION_Pos ) /**< Set negative side of calibration for the comparator */
159
160 /** @} */
161
162 /** @defgroup COMP_LL_EC_WAKEUP_EDGE COMP wakeup edge
163 * @{
164 */
165 #define LL_COMP_WAKEUP_EDGE_BOTH ( 0UL ) /**< Set edge both for comp wakeup */
166 #define LL_COMP_WAKEUP_EDGE_FALLING ( 1UL ) /**< Set edge fallinng for comp wakeup */
167 #define LL_COMP_WAKEUP_EDGE_RISING ( 2UL ) /**< Set edge rising for comp wakeup */
168
169 /** @} */
170
171 /* Exported macro ------------------------------------------------------------*/
172 /** @defgroup COMP_LL_Exported_Macros COMP Exported Macros
173 * @{
174 */
175
176 /** @defgroup COMP_LL_EM_WRITE_READ Common Write and read registers Macros
177 * @{
178 */
179
180 /**
181 * @brief Write a value in COMP register
182 * @param __instance__ COMP instance
183 * @param __REG__ Register to be written
184 * @param __VALUE__ Value to be written in the register
185 * @retval None
186 */
187 #define LL_COMP_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG((__instance__)->__REG__, (__VALUE__))
188
189 /**
190 * @brief Read a value in COMP register
191 * @param __instance__ COMP instance
192 * @param __REG__ Register to be read
193 * @retval Register value
194 */
195 #define LL_COMP_ReadReg(__instance__, __REG__) READ_REG((__instance__)->__REG__)
196
197 /** @} */
198
199 /** @} */
200
201 /* Private types -------------------------------------------------------------*/
202 /* Private variables ---------------------------------------------------------*/
203 /* Private constants ---------------------------------------------------------*/
204 /* Private macros ------------------------------------------------------------*/
205 /** @defgroup COMP_LL_Private_Macros COMP Private Macros
206 * @{
207 */
208
209 /** @defgroup COMP_LL_EC_DEFAULT_CONFIG InitStruct default configuartion
210 * @{
211 */
212
213 /**
214 * @brief Default configuartion for initializing structure
215 */
216 #define LL_COMP_DEFAULT_CONFIG \
217 { \
218 .channel_p = LL_COMP_CHANNEL_IO0, \
219 .channel_n = LL_COMP_CHANNEL_IO1, \
220 }
221 /** @} */
222
223 /** @} */
224
225 /** @} */
226
227 /* Exported functions --------------------------------------------------------*/
228 /** @defgroup COMP_LL_DRIVER_FUNCTIONS Functions
229 * @{
230 */
231
232 /** @defgroup COMP_LL_EF_Configuration Basic Configuration
233 * @{
234 */
235
236 /**
237 * @brief Enable COMP module.
238 *
239 * Register|BitsName
240 * --------|--------
241 * COMP_REG_0 | COMP_EN
242 *
243 * @retval None
244 */
245 __STATIC_INLINE void ll_comp_enable(void)
246 {
247 SET_BITS(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_WAKE_COMP_EN_Msk);
248 }
249
250 /**
251 * @brief Disable COMP module.
252 *
253 * Register|BitsName
254 * --------|--------
255 * COMP_REG_0 | COMP_EN
256 *
257 * @retval None
258 */
259 __STATIC_INLINE void ll_comp_disable(void)
260 {
261 CLEAR_BITS(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_WAKE_COMP_EN_Msk);
262 }
263
264 /**
265 * @brief Set channel of COMP input source.
266 *
267 * Register|BitsName
268 * --------|--------
269 * COMP_REG_0 | AON_COMP_REG_0_CHANNEL_SEL_P
270 *
271 * @param source This parameter can be one of the following values:
272 * @arg @ref LL_COMP_INPUT_SRC_IO0
273 * @arg @ref LL_COMP_INPUT_SRC_IO1
274 * @arg @ref LL_COMP_INPUT_SRC_IO2
275 * @arg @ref LL_COMP_INPUT_SRC_IO3
276 * @arg @ref LL_COMP_INPUT_SRC_IO4
277 * @arg @ref LL_COMP_INPUT_SRC_IO5
278 * @arg @ref LL_COMP_INPUT_SRC_IO6
279 * @arg @ref LL_COMP_INPUT_SRC_IO7
280 * @arg @ref LL_COMP_INPUT_SRC_VBAT
281 * @arg @ref LL_COMP_INPUT_SRC_VREF
282 * @retval None
283 */
284 __STATIC_INLINE void ll_comp_set_input_src(uint32_t source)
285 {
286 MODIFY_REG(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_CHANNEL_SEL_P_Msk, source);
287 }
288
289 /**
290 * @brief Set channel of COMP reference source.
291 *
292 * Register|BitsName
293 * --------|--------
294 * COMP_REG_0 | AON_COMP_REG_0_CHANNEL_SEL_N
295 *
296 * @param source This parameter can be one of the following values:
297 * @arg @ref LL_COMP_REF_SRC_IO0
298 * @arg @ref LL_COMP_REF_SRC_IO1
299 * @arg @ref LL_COMP_REF_SRC_IO2
300 * @arg @ref LL_COMP_REF_SRC_IO3
301 * @arg @ref LL_COMP_REF_SRC_IO4
302 * @arg @ref LL_COMP_REF_SRC_IO5
303 * @arg @ref LL_COMP_REF_SRC_IO6
304 * @arg @ref LL_COMP_REF_SRC_IO7
305 * @arg @ref LL_COMP_REF_SRC_VBAT
306 * @arg @ref LL_COMP_REF_SRC_VREF
307 * @retval None
308 */
309 __STATIC_INLINE void ll_comp_set_ref_src(uint32_t source)
310 {
311 MODIFY_REG(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_CHANNEL_SEL_N_Msk, source);
312 }
313
314 /**
315 * @brief Set VBATT control level.
316 *
317 * Register|BitsName
318 * --------|--------
319 * COMP_REG_0 | BATT_LVL_CTRL_LV
320 *
321 * @param level This parameter can be a value between: 0 ~ 7
322 * Vbatt_ref = ((level+1)/10) * VBATT
323 * @retval None
324 */
325 __STATIC_INLINE void ll_comp_set_vbatt_lvl(uint32_t level)
326 {
327 MODIFY_REG(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_COMP_BATT_LVL_CTRL_Msk, level << AON_PMU_COMP_REG_0_COMP_BATT_LVL_CTRL_Pos);
328 }
329
330 /**
331 * @brief Set VREF control level.
332 *
333 * Register|BitsName
334 * --------|--------
335 * COMP_REG_1 | COMP_REF_CTRL
336 *
337 * @param level This parameter can be a value between: 0 ~ 255
338 * Vref = 50.82nA * [166.5k * level] + 30mv
339 * @retval None
340 */
341 __STATIC_INLINE void ll_comp_set_vref_lvl(uint32_t level)
342 {
343 MODIFY_REG(AON_PMU->COMP_REG_1, AON_PMU_COMP_REG_1_COMP_REF_CTRL_Msk, level << AON_PMU_COMP_REG_1_COMP_REF_CTRL_Pos);
344 }
345 /**
346 * @brief set current of comparator.
347 *
348 * Register|BitsName
349 * --------|--------
350 * COMP_REG_0 | icomp_ctrl
351 *
352 * @param level The current of comparator
353 * @retval None
354 */
355 __STATIC_INLINE void ll_comp_set_current(uint32_t level)
356 {
357 MODIFY_REG(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_ICOMP_CTRL_Msk, level << AON_PMU_COMP_REG_0_ICOMP_CTRL_Pos);
358 }
359
360 /**
361 * @brief set power of comparator.
362 *
363 * Register|BitsName
364 * --------|--------
365 * COMP_REG_0 | cascres_half
366 *
367 * @param level The power of comparator
368 * @retval None
369 */
370 __STATIC_INLINE void ll_comp_cascres_half_high(uint32_t level)
371 {
372 MODIFY_REG(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_CASCRES_HALF_CTRL_Msk, level <<AON_PMU_COMP_REG_0_CASCRES_HALF_CTRL_Pos);
373 }
374
375 /**
376 * @brief Set positive hysteresis comparator
377 *
378 * Register|BitsName
379 * --------|--------
380 * COMP_REG_0 | P_HYS_EN
381 *
382 * @param hyst This parameter can be the following value:
383 * @arg @ref LL_COMP_HYST_POSITIVE
384 *
385 * @retval None
386 */
387 __STATIC_INLINE void ll_comp_positive_hysteresis(uint32_t hyst)
388 {
389 MODIFY_REG(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_POSITIVE_HYS_EN , hyst);
390 }
391
392 /**
393 * @brief Set negative hysteresis comparator
394 *
395 * Register|BitsName
396 * --------|--------
397 * COMP_REG_0 | N_HYS_EN
398 *
399 * @param hyst This parameter can be the following value:
400 * @arg @ref LL_COMP_HYST_NEGATIVE
401 *
402 * @retval None
403 */
404 __STATIC_INLINE void ll_comp_negative_hysteresis(uint32_t hyst)
405 {
406 MODIFY_REG(AON_PMU->COMP_REG_0, AON_PMU_COMP_REG_0_NEGATIVE_HYS_EN , hyst);
407 }
408
409 /**
410 * @brief Set calibration of comparator
411 *
412 * Register|BitsName
413 * --------|--------
414 * COMP_REG_1 | RDEG_P
415 *
416 * @param res_deg This parameter can be the following value:
417 * @arg @ref LL_COMP_RES_DEGENERATION_POSITIVE
418 *
419 * @retval None
420 */
421 __STATIC_INLINE void ll_comp_positive_degeneration(uint32_t res_deg)
422 {
423 MODIFY_REG(AON_PMU->COMP_REG_1, AON_PMU_COMP_REG_1_CHANNEL_POSITIVE_RES_DEGENERATION , res_deg);
424 }
425
426 /**
427 * @brief Set calibration of comparator
428 *
429 * Register|BitsName
430 * --------|--------
431 * COMP_REG_1 | RDEG_N
432 *
433 * @param res_deg This parameter can be the following value:
434 * @arg @ref LL_COMP_RES_DEGENERATION_NEGATIVE
435 *
436 * @retval None
437 */
438 __STATIC_INLINE void ll_comp_negative_degeneration(uint32_t res_deg)
439 {
440 MODIFY_REG(AON_PMU->COMP_REG_1, AON_PMU_COMP_REG_1_CHANNEL_NEGATIVE_RES_DEGENERATION , res_deg);
441 }
442
443 /**
444 * @brief Enable Wakeup Interrupt for COMP Rising.
445 *
446 * Register|BitsName
447 * --------|--------
448 * MCU_WAKEUP_CTRL | MSIO_COMP
449 *
450 * @retval None.
451 */
452 __STATIC_INLINE void ll_comp_enable_rising_wakeup(void)
453 {
454 BIT_ADDR((uint32_t)&AON_CTL->MCU_WAKEUP_CTRL, AON_CTL_MCU_WAKEUP_CTRL_COMP_RISE_Pos) = 1;
455 }
456
457 /**
458 * @brief Disable Wakeup Interrupt for COMP Rising.
459 *
460 * Register|BitsName
461 * --------|--------
462 * MCU_WAKEUP_CTRL | MSIO_COMP
463 *
464 * @retval None.
465 */
466 __STATIC_INLINE void ll_comp_disable_rising_wakeup(void)
467 {
468 BIT_ADDR((uint32_t)&AON_CTL->MCU_WAKEUP_CTRL, AON_CTL_MCU_WAKEUP_CTRL_COMP_RISE_Pos) = 0;
469 }
470
471 /**
472 * @brief Get Wakeup Interrupt for COMP Rising.
473 *
474 * Register|BitsName
475 * --------|--------
476 * MCU_WAKEUP_CTRL | MSIO_COMP
477 *
478 * @retval State of bit (1 or o).
479 */
480 __STATIC_INLINE uint32_t ll_comp_is_enable_rising_wakeup(void)
481 {
482 return (READ_BITS(AON_CTL->MCU_WAKEUP_CTRL, AON_CTL_MCU_WAKEUP_CTRL_COMP_RISE) == AON_CTL_MCU_WAKEUP_CTRL_COMP_RISE);
483 }
484
485 /**
486 * @brief Enable Wakeup Interrupt for COMP Falling.
487 *
488 * Register|BitsName
489 * --------|--------
490 * MCU_WAKEUP_CTRL | MSIO_COMP
491 *
492 * @retval None.
493 */
494 __STATIC_INLINE void ll_comp_enable_falling_wakeup(void)
495 {
496 BIT_ADDR((uint32_t)&AON_CTL->MCU_WAKEUP_CTRL, AON_CTL_MCU_WAKEUP_CTRL_COMP_FALL_Pos) = 1;
497 }
498
499 /**
500 * @brief Disable Wakeup Interrupt for COMP Falling.
501 *
502 * Register|BitsName
503 * --------|--------
504 * MCU_WAKEUP_CTRL | MSIO_COMP
505 *
506 * @retval None.
507 */
508 __STATIC_INLINE void ll_comp_disable_falling_wakeup(void)
509 {
510 BIT_ADDR((uint32_t)&AON_CTL->MCU_WAKEUP_CTRL, AON_CTL_MCU_WAKEUP_CTRL_COMP_FALL_Pos) = 0;
511 }
512
513 /**
514 * @brief Get Wakeup Interrupt for COMP Falling.
515 *
516 * Register|BitsName
517 * --------|--------
518 * MCU_WAKEUP_CTRL | MSIO_COMP
519 *
520 * @retval State of bit (1 or o).
521 */
522 __STATIC_INLINE uint32_t ll_comp_is_enable_falling_wakeup(void)
523 {
524 return (READ_BITS(AON_CTL->MCU_WAKEUP_CTRL, AON_CTL_MCU_WAKEUP_CTRL_COMP_FALL) == AON_CTL_MCU_WAKEUP_CTRL_COMP_FALL);
525 }
526
527 /**
528 * @brief Indicate if the COMP rising_triger Flag is set or not.
529 *
530 * Register|BitsName
531 * --------|--------
532 * AON_SLEEP_EVENT | MSIO_COMP
533 *
534 * @retval State of bit (1 or o).
535 */
536 SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_comp_is_rising_triger_flag_it(void)
537 {
538 return (READ_BITS(AON_CTL->AON_SLP_EVENT, AON_CTL_SLP_EVENT_COMP_RISE) == AON_CTL_SLP_EVENT_COMP_RISE);
539 }
540
541 /**
542 * @brief Clear rising_triger flag for COMP.
543 *
544 * Register|BitsName
545 * --------|--------
546 * AON_SLEEP_EVENT | MSIO_COMP
547 *
548 * @retval None.
549 */
550 SECTION_RAM_CODE __STATIC_INLINE void ll_comp_clear_rising_triger_flag_it(void)
551 {
552 WRITE_REG(AON_CTL->AON_SLP_EVENT, ~AON_CTL_SLP_EVENT_COMP_RISE);
553 }
554
555 /**
556 * @brief Indicate if the COMP falling_triger Flag is set or not.
557 *
558 * Register|BitsName
559 * --------|--------
560 * AON_SLEEP_EVENT | MSIO_COMP
561 *
562 * @retval State of bit (1 or o).
563 */
564 SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_comp_is_falling_triger_flag_it(void)
565 {
566 return (READ_BITS(AON_CTL->AON_SLP_EVENT, AON_CTL_SLP_EVENT_COMP_FALL) == AON_CTL_SLP_EVENT_COMP_FALL);
567 }
568
569 /**
570 * @brief Clear falling_triger flag for COMP.
571 *
572 * Register|BitsName
573 * --------|--------
574 * AON_SLEEP_EVENT | MSIO_COMP
575 *
576 * @retval None.
577 */
578 SECTION_RAM_CODE __STATIC_INLINE void ll_comp_clear_falling_triger_flag_it(void)
579 {
580 WRITE_REG(AON_CTL->AON_SLP_EVENT, ~AON_CTL_SLP_EVENT_COMP_FALL);
581 }
582
583 /**
584 * @brief Set compator glitch remove cycles
585 *
586 * Register|BitsName
587 * --------|--------
588 * AON_CTL_PMU_COMP_GLITCH_REMOVE | AON_CTL_PMU_COMP_GLITCH_REMOVE_CYCLE
589 *
590 * @retval None.
591 */
592 __STATIC_INLINE void ll_comp_set_remove_cycle(uint32_t cycle)
593 {
594 MODIFY_REG(AON_CTL->PMU_COMP_GLITCH_REMOVE, AON_CTL_PMU_COMP_GLITCH_REMOVE_CYCLE, cycle << AON_CTL_PMU_COMP_GLITCH_REMOVE_CYCLE_Pos);
595 }
596
597 /**
598 * @brief Set compator glitch remove cycles
599 *
600 * Register|BitsName
601 * --------|--------
602 * AON_CTL_PMU_COMP_GLITCH_REMOVE | AON_CTL_PMU_COMP_GLITCH_REMOVE_CYCLE
603 *
604 * @retval None.
605 */
606 __STATIC_INLINE uint32_t ll_comp_get_remove_cycle(void)
607 {
608 return (uint32_t)(READ_BITS(AON_CTL->PMU_COMP_GLITCH_REMOVE, AON_CTL_PMU_COMP_GLITCH_REMOVE_CYCLE_Msk) >> AON_CTL_PMU_COMP_GLITCH_REMOVE_CYCLE_Pos);
609 }
610
611 /** @} */
612
613 /** @defgroup COMP_LL_EF_Init Initialization and de-initialization functions
614 * @{
615 */
616
617 /**
618 * @brief De-initialize COMP registers (Registers restored to their default values).
619 * @retval An error_status_t enumeration value:
620 * - SUCCESS: COMP registers are de-initialized
621 * - ERROR: COMP registers are not de-initialized
622 */
623 error_status_t ll_comp_deinit(void);
624
625 /**
626 * @brief Initialize COMP registers according to the specified.
627 * parameters in p_comp_init.
628 * @param p_comp_init Pointer to a ll_comp_init_t structure that contains the configuration
629 * information for the specified COMP peripheral.
630 * @retval An error_status_t enumeration value:
631 * - SUCCESS: COMP registers are initialized according to p_comp_init content
632 * - ERROR: Problem occurred during COMP Registers initialization
633 */
634 error_status_t ll_comp_init(ll_comp_init_t *p_comp_init);
635
636 /**
637 * @brief Set each field of a @ref ll_comp_init_t type structure to default value.
638 * @param p_comp_init Pointer to a @ref ll_comp_init_t structure
639 * whose fields will be set to default values.
640 * @retval None
641 */
642 void ll_comp_struct_init(ll_comp_init_t *p_comp_init);
643
644 /** @} */
645
646 /** @} */
647
648 #endif /* AON */
649
650 #ifdef __cplusplus
651 }
652 #endif
653
654 #endif /* __GR533X_LL_COMP_H__ */
655
656 /** @} */
657
658 /** @} */
659
660 /** @} */