Macros | |
#define | LL_DUAL_TIMER_PRESCALER_DIV0 0x00000000U |
#define | LL_DUAL_TIMER_PRESCALER_DIV16 (1UL << DUAL_TIMER_CTRL_PRE_Pos) |
#define | LL_DUAL_TIMER_PRESCALER_DIV256 (2UL << DUAL_TIMER_CTRL_PRE_Pos) |
#define LL_DUAL_TIMER_PRESCALER_DIV0 0x00000000U |
0 stage of prescale, clock is divided by 1.
Definition at line 125 of file ll_dual_tim.h.
#define LL_DUAL_TIMER_PRESCALER_DIV16 (1UL << DUAL_TIMER_CTRL_PRE_Pos) |
4 stages of prescale, clock is divided by 16.
Definition at line 126 of file ll_dual_tim.h.
#define LL_DUAL_TIMER_PRESCALER_DIV256 (2UL << DUAL_TIMER_CTRL_PRE_Pos) |
8 stages of prescale, clock is divided by 256.
Definition at line 127 of file ll_dual_tim.h.