app_drv_config.h
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/**
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****************************************************************************************
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*
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* @file app_drv_config.h
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* @author BLE Driver Team
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* @brief Header file of app driver config code.
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*
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****************************************************************************************
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* @attention
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#####Copyright (c) 2019 GOODIX
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of GOODIX nor the names of its contributors may be used
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to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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****************************************************************************************
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*/
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/** @addtogroup PERIPHERAL Peripheral Driver
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* @{
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*/
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/** @addtogroup APP_DRIVER APP DRIVER
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* @{
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*/
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/** @defgroup APP_DRIVER_CONFIG DRIVER CONFIG
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* @brief APP DRIVER CONFIG
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* @{
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*/
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#ifndef _APP_DRV_CONFIG_H_
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#define _APP_DRV_CONFIG_H_
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#include "custom_config.h"
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#include "
grx_hal.h
"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#define APP_DVR_LOG_LVL_NONE (0)
/**< None log level define */
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#define APP_DVR_LOG_LVL_ERR (1)
/**< Error log level define */
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#define APP_DVR_LOG_LVL_WARN (2)
/**< Warning log level define */
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#define APP_DVR_LOG_LVL_INFO (3)
/**< Info log level define */
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#ifndef APP_DRV_LOG_LEVEL
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#define APP_DRV_LOG_LEVEL APP_DVR_LOG_LVL_NONE
/**< App driver log level setting */
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#endif
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#ifndef APP_DRV_LOG_INTERFACE
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#define APP_DRV_LOG_INTERFACE printf
/**< App driver log interface setting */
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#endif
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#ifndef APP_DRV_ASSERT_ENABLE
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#define APP_DRV_ASSERT_ENABLE 0
/**< App driver assert enable */
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#endif
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#define APP_DRIVER_GR551X 0x0
/**< APP_DRIVER for GR551X */
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#define APP_DRIVER_GR5525X 0x1
/**< APP_DRIVER for GR5525X */
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#define APP_DRIVER_GR5526X 0x2
/**< APP_DRIVER for GR5526X */
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#define APP_DRIVER_GR5332X 0x3
/**< APP_DRIVER for GR5332X */
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#define APP_DRIVER_GR5405 0x3
/**< APP_DRIVER for GR5405 */
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#ifdef SOC_GR5515
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#define APP_DRIVER_CHIP_TYPE APP_DRIVER_GR551X
/**< GR5515 chip type*/
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#define SOC_GPIO_PINS_MAX (32)
/**< GR5515 max gpio pins */
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#define SOC_AON_PINS_MAX (8)
/**< GR5515 max aon pins */
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#elif defined(SOC_GR5X25)
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#define APP_DRIVER_CHIP_TYPE APP_DRIVER_GR5525X
/**< GR5525 chip type*/
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#define SOC_GPIO_PINS_MAX (32)
/**< GR5525 max gpio pins */
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#define SOC_AON_PINS_MAX (8)
/**< GR5525 max aon pins */
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#elif defined(SOC_GR5526)
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#define APP_DRIVER_CHIP_TYPE APP_DRIVER_GR5526X
/**< GR5526 chip type*/
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#define SOC_GPIO_PINS_MAX (34)
/**< GR5526 max gpio pins */
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#define SOC_AON_PINS_MAX (8)
/**< GR5526 max aon pins */
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#elif defined(SOC_GR533X)
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#define APP_DRIVER_CHIP_TYPE APP_DRIVER_GR5332X
/**< GR533X chip type*/
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#define SOC_GPIO_PINS_MAX (14)
/**< GR533X max gpio pins */
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#define SOC_AON_PINS_MAX (8)
/**< GR533X max aon pins */
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#elif defined(SOC_GR5405)
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#define APP_DRIVER_CHIP_TYPE APP_DRIVER_GR5405
/**< GR5405 chip type*/
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#define SOC_GPIO_PINS_MAX (14)
/**< GR5405 max gpio pins */
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#define SOC_AON_PINS_MAX (8)
/**< GR5405 max aon pins */
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#elif defined(SOC_GR5410)
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#define SOC_GPIO_PINS_MAX (14)
/**< GR5405 max gpio pins */
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#define SOC_AON_PINS_MAX (8)
/**< GR5405 max aon pins */
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#endif
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#if defined(SOC_GR515)
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#define GPIO_INSTANCE_MAX 2
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#elif defined(SOC_GR5X25) || defined(SOC_GR5526)
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#define GPIO_INSTANCE_MAX 3
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#elif defined(SOC_GR533X) || defined(SOC_GR5405)
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#define GPIO_INSTANCE_MAX 1
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#elif defined(SOC_GR5410)
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#define GPIO_INSTANCE_MAX 2
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#endif
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#if defined(SOC_GR5410)
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#define GPIOA_IRQn AON_EXT_IRQn
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#else
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#define GPIOA_IRQn EXT0_IRQn
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#endif
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#if defined(SOC_GR5515) || defined(SOC_GR5X25) || defined(SOC_GR5526) || defined(SOC_GR533X) || defined(SOC_GR5405)
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#define APP_IO_AON_GPIO_ENABLE
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#define APP_IO_MSIO_ENABLE
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#endif
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#if defined(SOC_GR5X25) || defined(SOC_GR5526) || defined(SOC_GR533X) || defined(SOC_GR5405) || defined(SOC_GR5410)
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#define APP_IO_IT_BOTH_EDGE_ENABLE
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#endif
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#if defined(SOC_GR5X25) || defined(SOC_GR533X) || defined(SOC_GR5405) || defined(SOC_GR5410)
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#define APP_IO_STRENGTH_ENABLE
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#define APP_IO_SPEED_ENABLE
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#define APP_IO_INPUT_TYPE_ENABLE
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#endif
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#if defined(SOC_GR5515)
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#define APP_IO_GR551X_LEGACY_ENABLE
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#endif
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#if defined(SOC_GR533X) || defined(SOC_GR5405)
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#define APP_IO_MUX_ARBITRARY_V0
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#endif
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#if defined(SOC_GR533X) || defined(SOC_GR5405) || defined(SOC_GR5410)
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#define APP_IO_MUX APP_IO_MUX_0
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#elif defined(SOC_GR5X25)
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#define APP_IO_MUX APP_IO_MUX_8
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#elif defined(SOC_GR5515) || defined(SOC_GR5526)
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#define APP_IO_MUX APP_IO_MUX_7
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#endif
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#if defined(SOC_GR5410)
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#define APP_IO_GPIO_SUPPORT_ANA_MODE
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#endif
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#if defined(SOC_GR5515) || defined(SOC_GR533X) || defined(SOC_GR5405) || defined(SOC_GR5410)
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#ifndef DMA0
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#define DMA_INSTANCE_MAX 1
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#else
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#define DMA_INSTANCE_MAX 1
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#endif
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#elif defined(SOC_GR5526) || defined(SOC_GR5X25)
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#define DMA_INSTANCE_MAX 2
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#define APP_DMA_SG_LLP_ENABLE
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#endif
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#define DMA_CHANNEL_MAX DMA_Channel_NUM_MAX
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#if defined(SOC_GR5515) || defined(SOC_GR5X25) || defined(SOC_GR5526)
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#define APP_DMA_MODE_ENABLE
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#endif
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#if defined(SOC_GR5515)
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#define APP_DMA_GR551X_LEGACY
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#endif
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#if defined(SOC_GR5410)
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#ifndef DMA0_IRQn
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#define DMA0_IRQn DMA_IRQn
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#endif
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#ifndef DMA0_REQUEST_MEM
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#define DMA0_REQUEST_MEM 0
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#endif
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#ifndef DMA0_REQUEST_UART0_TX
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#define DMA0_REQUEST_UART0_TX DMA_REQUEST_UART0_TX
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#endif
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#ifndef DMA0_REQUEST_UART0_RX
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#define DMA0_REQUEST_UART0_RX DMA_REQUEST_UART0_RX
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#endif
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#ifndef DMA0_REQUEST_UART1_TX
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#define DMA0_REQUEST_UART1_TX DMA_REQUEST_UART1_TX
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#endif
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#ifndef DMA0_REQUEST_UART1_RX
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#define DMA0_REQUEST_UART1_RX DMA_REQUEST_UART1_RX
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#endif
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#ifndef DMA0_REQUEST_I2C0_TX
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#define DMA0_REQUEST_I2C0_TX DMA_REQUEST_I2C0_TX
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#endif
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#ifndef DMA0_REQUEST_I2C0_RX
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#define DMA0_REQUEST_I2C0_RX DMA_REQUEST_I2C0_RX
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#endif
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#ifndef DMA0_REQUEST_I2C1_TX
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#define DMA0_REQUEST_I2C1_TX DMA_REQUEST_I2C1_TX
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#endif
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#ifndef DMA0_REQUEST_I2C1_RX
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#define DMA0_REQUEST_I2C1_RX DMA_REQUEST_I2C1_RX
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#endif
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#ifndef DMA0_REQUEST_PWM0
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#define DMA0_REQUEST_PWM0 DMA_REQUEST_PWM0
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#endif
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#ifndef DMA0_REQUEST_SPIM0_TX
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#define DMA0_REQUEST_SPIM0_TX DMA_REQUEST_SPIM0_TX
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#endif
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#ifndef DMA0_REQUEST_SPIM0_RX
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#define DMA0_REQUEST_SPIM0_RX DMA_REQUEST_SPIM0_RX
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#endif
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#ifndef DMA0_REQUEST_SPIM1_TX
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#define DMA0_REQUEST_SPIM1_TX DMA_REQUEST_SPIM1_TX
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#endif
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#ifndef DMA0_REQUEST_SPIM1_RX
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#define DMA0_REQUEST_SPIM1_RX DMA_REQUEST_SPIM1_RX
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#endif
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#ifndef DMA0_REQUEST_SPIM2_TX
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#define DMA0_REQUEST_SPIM2_TX DMA_REQUEST_SPIM2_TX
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#endif
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#ifndef DMA0_REQUEST_SPIM2_RX
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#define DMA0_REQUEST_SPIM2_RX DMA_REQUEST_SPIM2_RX
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#endif
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#endif
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#if defined(SOC_GR515)
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#define UART_INSTANCE_MAX 2
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#elif defined(SOC_GR5X25)
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#define UART_INSTANCE_MAX 4
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#elif defined(SOC_GR5526)
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#define UART_INSTANCE_MAX 6
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#elif defined(SOC_GR533X) || defined(SOC_GR5405)
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#define UART_INSTANCE_MAX 2
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#elif defined(SOC_GR5410)
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#define UART_INSTANCE_MAX 2
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#endif
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#if defined(SOC_GR515)
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#define UART1_NO_DMA
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#endif
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#if defined(SOC_GR5526)
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#define UART0_DMA1_REQ_ENABLE
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#endif
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#if defined(SOC_GR515)
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#define I2C_INSTANCE_MAX 2
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#elif defined(SOC_GR5X25)
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#define I2C_INSTANCE_MAX 4
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#elif defined(SOC_GR5526)
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#define I2C_INSTANCE_MAX 6
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#elif defined(SOC_GR533X) || defined(SOC_GR5405)
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#define I2C_INSTANCE_MAX 2
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#elif defined(SOC_GR5410)
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#define I2C_INSTANCE_MAX 2
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#endif
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#if defined(SOC_GR5X25) || defined(SOC_GR5526)
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#define I2C0_DMA1_REQ_ENABLE
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#define I2C1_DMA1_REQ_ENABLE
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#endif
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#if defined(SOC_GR5515) || defined(SOC_GR533X) || defined(SOC_GR5405) || defined(SOC_GR5410)
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#define I2C0_DMA0_REQ_ENABLE
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#define I2C1_DMA0_REQ_ENABLE
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#endif
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#if defined(SOC_GR5515)
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#define APP_I2C_TIMING_API_ENABLE
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#define APP_I2C_TX_RX_ARBITRARY
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#define APP_I2C_MEM_CALLBACK_ENABLE
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#endif
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#if defined(SOC_GR5515)
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#define APP_SPI_GR551X_LEGACY
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#endif
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#if defined(SOC_GR5X25) || defined(SOC_GR5526)
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#define APP_SPI_DMA_LLP_DISPLAY_ENABLE
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#define APP_SPI_DMA1_HS_ENABLE
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#endif
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#if defined(SOC_GR5526)
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#define APP_SPI_TX_WITH_IA_32_ENABLE
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#endif
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#if defined(SOC_GR5410)
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#define APP_SPI_NOT_SUPPORT_SLAVE
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#endif
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#if defined(SOC_GR533X) || defined(SOC_GR5405) || defined(SOC_GR5410)
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#define APP_TIM_IO_CAPTURE_ENABLE
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#define APP_DUAL_TIM_IO_ENABLE
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#endif
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#if defined(SOC_GR5410)
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#define APP_DUAL_TIM_IO_MUX_ENABLE
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#endif
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#ifndef DUAL_TIMER0_BASE
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#define DUAL_TIMER0_BASE DUAL_TIM0_BASE
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#endif
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#ifndef DUAL_TIMER1_BASE
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#define DUAL_TIMER1_BASE DUAL_TIM1_BASE
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#endif
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#if defined(SOC_GR533X) || defined(SOC_GR5405) || defined(SOC_GR5410)
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#define APP_PWM_CODING_ENABLE
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#endif
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#if !defined(SOC_GR5515)
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#define APP_PWM_STOP_SPEC_CH_ENABLE
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#endif
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#if defined(SOC_GR5X25) || defined(SOC_GR5526) || defined(SOC_GR533X) || defined(SOC_GR5405)
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#define APP_RTC_TIME_SYNC_ENABLE
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#endif
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#if defined(SOC_GR5X25) || defined(SOC_GR533X) || defined(SOC_GR5405)
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#define SYSTEM_RTC_SLOW_CLOCK_ENABLE
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#endif
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#if defined(SOC_GR533X) || defined(SOC_GR5405) || defined(SOC_GR5410)
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#if defined(ENV_USE_FREERTOS)
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#define OS_TICK_BASE_RTC_ENABLE
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#endif
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#endif
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#if (CFG_LPCLK_INTERNAL_EN == 0) || defined(SOC_GR5X25) || defined(SOC_GR533X) || defined(SOC_GR5405) || defined(SOC_GR5410)
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#define APP_RTC_WORK_AROUND_DISABLE
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#endif
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#if defined(SOC_GR5515)
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#define APP_RTC_GR551X_LEGACY
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#endif
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#if defined(SOC_GR5410)
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#ifndef CALENDAR_IRQn
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#define CALENDAR_IRQn RTC_IRQn
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#endif
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#define APP_RTC_NO_LL_CALENDAR_DRIVER
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#endif
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#if defined(SOC_GR5X25) || defined(SOC_GR533X) || defined(SOC_GR5405)
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#define SYSTEM_SLOW_CLOCK_ENABLE
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#endif
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#if !defined(SOC_GR5515)
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#define APP_ADC_VBAT_TEMP_CONV_ENABLE
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#endif
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#if defined(SOC_GR5526)
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#define APP_ADC_CLOCK_START_ENABLE
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#define APP_ADC_GET_AVG_ENABLE
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#endif
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#if defined(SOC_GR5515)
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#define APP_ADC_INPUT_SRC_GR551X_LEGACY_ENABLE
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#endif
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#if defined(SOC_GR5515) || defined(SOC_GR5X25) || defined(SOC_GR5526) || defined(SOC_GR533X) || defined(SOC_GR5405)
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#define APP_ADC_SNSADC_ENABLE
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#define APP_ADC_IO_TYPE APP_IO_TYPE_MSIO
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#define APP_ADC_IO_MUX APP_IO_MUX
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#endif
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#if defined(SOC_GR5410)
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#define APP_ADC_GPADC_ENABLE
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#define APP_ADC_IO_TYPE APP_IO_TYPE_GPIOA
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#define APP_ADC_IO_MUX APP_IO_MUX_2
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#endif
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#if defined(SOC_GR5X25) || defined(SOC_GR5526) || defined(SOC_GR533X) || defined(SOC_GR5405) || defined(SOC_GR5410)
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#define APP_BOD_DEASSERT_ENABLE
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#endif
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#if defined(SOC_GR533X) || defined(SOC_GR5405) || defined(SOC_GR5410)
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#define APP_BOD_AUTO_POWER_BYPASS_ENABLE
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#endif
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#if defined(SOC_GR5526)
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#define APP_BOD_LEVEL_8_15_ENABLE
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#endif
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#if !defined(SOC_GR5515)
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#define APP_COMP_EDGE_ENABLE
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#endif
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#if defined(SOC_GR5515)
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#define APP_COMP_WAKE_SOURCE_CFG_ENABLE
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#endif
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#if defined(SOC_GR5410)
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#ifndef COMP_EXT_IRQn
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#define COMP_EXT_IRQn COMP_IRQn
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#endif
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#ifndef COMP_EXT_IRQn
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#define COMP_EXT_IRQn COMP_IRQn
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#endif
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#endif
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#if defined(SOC_GR5515)
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#define APP_WDT_GR515_LEGACY
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#endif
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#if defined(SOC_GR5410)
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#define APP_AON_WDT_MULTI_INSTANCE
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#define AON_WDT_INSTANCE_MAX 2
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#define APP_AON_WDT_SUPPORT_FREQ_DIV
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#else
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#define AON_WDT_INSTANCE_MAX 1
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#endif
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#if defined(SOC_GR5515)
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#define APP_PWR_MGMT_HAL_INIT_ENABLE
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#endif
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#if defined(SOC_GR5X25) || defined(SOC_GR5526) || defined(SOC_GR533X)
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#define APP_PWR_MGMT_HAL_REG_ENABLE
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#define APP_PWR_MGMT_WORD_CHECK_ENABLE
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#if defined(SOC_GR5X25) || defined(SOC_GR5526)
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#define APP_PWR_MGMT_WORD_CHECK_EXTRA_ENABLE
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#endif
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#endif
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#if defined(SOC_GR5405) || defined(SOC_GR5410)
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#define APP_PWR_MGMT_HAL_REG_ENABLE
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#endif
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#if defined(SOC_GR5410)
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#define LIN_INSTANCE_MAX 2
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#endif
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/**
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* @defgroup APP_DRV_PERIPHERAL_PRIORITY_DEFINE Defines
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* @{
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*/
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/**@brief APP driver peripheral priority define. */
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#ifndef APP_DRIVER_ADC_WAKEUP_PRIORITY
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#define APP_DRIVER_ADC_WAKEUP_PRIORITY WAKEUP_PRIORITY_HIGH
/**< ADC Wakeup priority High */
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#endif
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#ifndef APP_DRIVER_AES_WAKEUP_PRIORITY
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#define APP_DRIVER_AES_WAKEUP_PRIORITY WAKEUP_PRIORITY_MID
/**< AES Wakeup priority Mid */
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#endif
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#ifndef APP_DRIVER_COMP_WAKEUP_PRIORITY
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#define APP_DRIVER_COMP_WAKEUP_PRIORITY WAKEUP_PRIORITY_LOW
/**< COMP Wakeup priority Low */
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#endif
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#ifndef APP_DRIVER_DUAL_TIM_WAKEUP_PRIORITY
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#define APP_DRIVER_DUAL_TIM_WAKEUP_PRIORITY WAKEUP_PRIORITY_MID
/**< DUAL TIM Wakeup priority Mid */
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#endif
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#ifndef APP_DRIVER_DMA_WAKEUP_PRIORITY
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#define APP_DRIVER_DMA_WAKEUP_PRIORITY WAKEUP_PRIORITY_HIGH
/**< DMA Wakeup priority High */
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#endif
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#ifndef APP_DRIVER_UART_WAKEUP_PRIORITY
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#define APP_DRIVER_UART_WAKEUP_PRIORITY WAKEUP_PRIORITY_HIGH
/**< Uart Wakeup priority High */
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#endif
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#ifndef APP_DRIVER_HMAC_WAKEUP_PRIORITY
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#define APP_DRIVER_HMAC_WAKEUP_PRIORITY WAKEUP_PRIORITY_MID
/**< Hmac Wakeup priority Mid */
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#endif
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#ifndef APP_DRIVER_I2C_WAKEUP_PRIORITY
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#define APP_DRIVER_I2C_WAKEUP_PRIORITY WAKEUP_PRIORITY_HIGH
/**< I2C Wakeup priority High */
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#endif
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#ifndef APP_DRIVER_I2S_WAKEUP_PRIORITY
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#define APP_DRIVER_I2S_WAKEUP_PRIORITY WAKEUP_PRIORITY_HIGH
/**< I2S Wakeup priority High */
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#endif
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#ifndef APP_DRIVER_QSPI_WAKEUP_PRIORITY
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#define APP_DRIVER_QSPI_WAKEUP_PRIORITY WAKEUP_PRIORITY_HIGH
/**< QSPI Wakeup priority High */
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#endif
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#ifndef APP_DRIVER_RNG_WAKEUP_PRIORITY
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#define APP_DRIVER_RNG_WAKEUP_PRIORITY WAKEUP_PRIORITY_MID
/**< RNG Wakeup priority Mid */
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#endif
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#ifndef APP_DRIVER_SPI_WAKEUP_PRIORITY
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#define APP_DRIVER_SPI_WAKEUP_PRIORITY WAKEUP_PRIORITY_HIGH
/**< SPI Wakeup priority High */
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#endif
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#ifndef APP_DRIVER_TIM_WAKEUP_PRIORITY
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#define APP_DRIVER_TIM_WAKEUP_PRIORITY WAKEUP_PRIORITY_MID
/**< TIM Wakeup priority Mid */
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#endif
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#ifndef APP_DRIVER_PWM_WAKEUP_PRIORITY
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#define APP_DRIVER_PWM_WAKEUP_PRIORITY WAKEUP_PRIORITY_MID
/**< PWM Wakeup priority Mid */
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#endif
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#ifndef APP_DRIVER_ISO7816_WAKEUP_PRIORITY
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#define APP_DRIVER_ISO7816_WAKEUP_PRIORITY WAKEUP_PRIORITY_HIGH
/**< ISO7816 Wakeup priority High */
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#endif
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#ifndef APP_DRIVER_PKC_WAKEUP_PRIORITY
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#define APP_DRIVER_PKC_WAKEUP_PRIORITY WAKEUP_PRIORITY_HIGH
/**< PKC Wakeup priority High */
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#endif
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#ifndef APP_DRIVER_DSPI_WAKEUP_PRIORITY
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#define APP_DRIVER_DSPI_WAKEUP_PRIORITY WAKEUP_PRIORITY_HIGH
/**< DSPI Wakeup priority High */
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#endif
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#ifndef APP_DRIVER_PDM_WAKEUP_PRIORITY
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#define APP_DRIVER_PDM_WAKEUP_PRIORITY WAKEUP_PRIORITY_HIGH
/**< PDM Wakeup priority High */
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#endif
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#ifndef APP_DRIVER_CAN_WAKEUP_PRIORITY
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#define APP_DRIVER_CAN_WAKEUP_PRIORITY WAKEUP_PRIORITY_HIGH
/**< CAN Wakeup priority High */
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#endif
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#ifndef APP_DRIVER_LIN_WAKEUP_PRIORITY
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#define APP_DRIVER_LIN_WAKEUP_PRIORITY WAKEUP_PRIORITY_HIGH
/**< LIN Wakeup priority High */
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#endif
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/**@} */
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/**@addtogroup APP_DRV_WAKEUP_PRIORITY_ENUM Enumerations
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* @{
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*/
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/**@brief APP driver peripheral wakeup priority define. */
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typedef
enum
501
{
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WAKEUP_PRIORITY_LOW
= 1,
/**< Wakeup priority low */
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WAKEUP_PRIORITY_MID
,
/**< Wakeup priority mid */
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WAKEUP_PRIORITY_HIGH
/**< Wakeup priority high */
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}
wakeup_priority_t
;
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/** @} */
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#ifndef APP_DRIVER_WAKEUP_CALL_FUN
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//#define APP_DRIVER_WAKEUP_CALL_FUN
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
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/** @} */
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/** @} */
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/** @} */
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WAKEUP_PRIORITY_LOW
@ WAKEUP_PRIORITY_LOW
Definition:
app_drv_config.h:502
wakeup_priority_t
wakeup_priority_t
APP driver peripheral wakeup priority define.
Definition:
app_drv_config.h:501
WAKEUP_PRIORITY_MID
@ WAKEUP_PRIORITY_MID
Definition:
app_drv_config.h:503
grx_hal.h
This file contains all the functions prototypes for the HAL module driver.
WAKEUP_PRIORITY_HIGH
@ WAKEUP_PRIORITY_HIGH
Definition:
app_drv_config.h:504