Macros | |
#define | LL_DMA0_PERIPH_MEM ((uint32_t)0x0000000BU) |
#define | LL_DMA0_PERIPH_CTE ((uint32_t)0x00000000U) |
#define | LL_DMA0_PERIPH_PWM0 ((uint32_t)0x00000001U) |
#define | LL_DMA0_PERIPH_SPIM_TX ((uint32_t)0x00000002U) |
#define | LL_DMA0_PERIPH_SPIM_RX ((uint32_t)0x00000003U) |
#define | LL_DMA0_PERIPH_SPIS_TX ((uint32_t)0x00000004U) |
#define | LL_DMA0_PERIPH_SPIS_RX ((uint32_t)0x00000005U) |
#define | LL_DMA0_PERIPH_UART0_TX ((uint32_t)0x00000006U) |
#define | LL_DMA0_PERIPH_UART0_RX ((uint32_t)0x00000007U) |
#define | LL_DMA0_PERIPH_UART1_TX ((uint32_t)0x00000008U) |
#define | LL_DMA0_PERIPH_UART1_RX ((uint32_t)0x00000009U) |
#define | LL_DMA0_PERIPH_SNSADC ((uint32_t)0x0000000AU) |
#define | LL_DMA0_PERIPH_I2C0_TX ((uint32_t)0x0000000CU) |
#define | LL_DMA0_PERIPH_I2C0_RX ((uint32_t)0x0000000DU) |
#define | LL_DMA0_PERIPH_I2C1_TX ((uint32_t)0x0000000EU) |
#define | LL_DMA0_PERIPH_I2C1_RX ((uint32_t)0x0000000FU) |
#define LL_DMA0_PERIPH_CTE ((uint32_t)0x00000000U) |
#define LL_DMA0_PERIPH_I2C0_RX ((uint32_t)0x0000000DU) |
#define LL_DMA0_PERIPH_I2C0_TX ((uint32_t)0x0000000CU) |
#define LL_DMA0_PERIPH_I2C1_RX ((uint32_t)0x0000000FU) |
#define LL_DMA0_PERIPH_I2C1_TX ((uint32_t)0x0000000EU) |
#define LL_DMA0_PERIPH_MEM ((uint32_t)0x0000000BU) |
#define LL_DMA0_PERIPH_PWM0 ((uint32_t)0x00000001U) |
#define LL_DMA0_PERIPH_SNSADC ((uint32_t)0x0000000AU) |
#define LL_DMA0_PERIPH_SPIM_RX ((uint32_t)0x00000003U) |
#define LL_DMA0_PERIPH_SPIM_TX ((uint32_t)0x00000002U) |
#define LL_DMA0_PERIPH_SPIS_RX ((uint32_t)0x00000005U) |
#define LL_DMA0_PERIPH_SPIS_TX ((uint32_t)0x00000004U) |
#define LL_DMA0_PERIPH_UART0_RX ((uint32_t)0x00000007U) |
#define LL_DMA0_PERIPH_UART0_TX ((uint32_t)0x00000006U) |
#define LL_DMA0_PERIPH_UART1_RX ((uint32_t)0x00000009U) |