Macros
Power State Control Commands
Peripheral Driver » LL Driver » PWR » Defines » PWR Exported Constants

## Macros
#define | LL_PWR_CMD_LOOPBACK AON_PSC_CMD_OPC_OPCODE_LOOPBACK
#define | LL_PWR_CMD_EF_DIR_ON AON_PSC_CMD_OPC_OPCODE_EF_DIR_ON
#define | LL_PWR_CMD_32_TIMER_LD AON_PSC_CMD_OPC_OPCODE_32_TIMER_LD
#define | LL_PWR_CMD_DEEP_SLEEP AON_PSC_CMD_OPC_OPCODE_DEEP_SLEEP
#define | LL_PWR_CMD_EF_DIR_OFF AON_PSC_CMD_OPC_OPCODE_EF_DIR_OFF
#define | LL_PWR_CMD_EXT_CLK AON_PSC_CMD_OPC_OPCODE_EXT_CLK
#define | LL_PWR_CMD_RNG_CLK AON_PSC_CMD_OPC_OPCODE_RNG_CLK
#define | LL_PWR_CMD_RTC_CLK AON_PSC_CMD_OPC_OPCODE_RTC_CLK
#define | LL_PWR_CMD_RNG2_CLK AON_PSC_CMD_OPC_OPCODE_RNG2_CLK
#define | LL_PWR_CMD_LD_MEM_SLP_CFG AON_PSC_CMD_OPC_OPCODE_LD_MEM_SLP_CFG
#define | LL_PWR_CMD_LD_MEM_WKUP_CFG AON_PSC_CMD_OPC_OPCODE_LD_MEM_WKUP_CFG
#define | LL_PWR_CMD_DPAD_LE_HI AON_PSC_CMD_OPC_OPCODE_DPAD_LE_HI
#define | LL_PWR_CMD_DPAD_LE_LO AON_PSC_CMD_OPC_OPCODE_DPAD_LE_LO
#define | LL_PWR_CMD_SLP_TIMER_MODE_NORMAL AON_PSC_CMD_OPC_OPCODE_SLP_TIMER_MODE_0
#define | LL_PWR_CMD_SLP_TIMER_MODE_SINGLE AON_PSC_CMD_OPC_OPCODE_SLP_TIMER_MODE_1
#define | LL_PWR_CMD_SLP_TIMER_MODE_RELOAD AON_PSC_CMD_OPC_OPCODE_SLP_TIMER_MODE_2
#define | LL_PWR_CMD_SLP_TIMER_MODE_DISABLE AON_PSC_CMD_OPC_OPCODE_SLP_TIMER_MODE_3

## Detailed Description

## Macro Definition Documentation

## ◆ LL_PWR_CMD_32_TIMER_LD

#define LL_PWR_CMD_32_TIMER_LD AON_PSC_CMD_OPC_OPCODE_32_TIMER_LD

Load sleep timer command

## ◆ LL_PWR_CMD_DEEP_SLEEP

#define LL_PWR_CMD_DEEP_SLEEP AON_PSC_CMD_OPC_OPCODE_DEEP_SLEEP

Enter Deep Sleep Mode command

## ◆ LL_PWR_CMD_DPAD_LE_HI

#define LL_PWR_CMD_DPAD_LE_HI AON_PSC_CMD_OPC_OPCODE_DPAD_LE_HI

Force dpad_le high

## ◆ LL_PWR_CMD_DPAD_LE_LO

#define LL_PWR_CMD_DPAD_LE_LO AON_PSC_CMD_OPC_OPCODE_DPAD_LE_LO

Force dpad_le low

## ◆ LL_PWR_CMD_EF_DIR_OFF

#define LL_PWR_CMD_EF_DIR_OFF AON_PSC_CMD_OPC_OPCODE_EF_DIR_OFF

Reserved command 2

## ◆ LL_PWR_CMD_EF_DIR_ON

#define LL_PWR_CMD_EF_DIR_ON AON_PSC_CMD_OPC_OPCODE_EF_DIR_ON

Reserved command 1

## ◆ LL_PWR_CMD_EXT_CLK

#define LL_PWR_CMD_EXT_CLK AON_PSC_CMD_OPC_OPCODE_EXT_CLK

Select external clock (xo_32KHz) command

## ◆ LL_PWR_CMD_LD_MEM_SLP_CFG

#define LL_PWR_CMD_LD_MEM_SLP_CFG AON_PSC_CMD_OPC_OPCODE_LD_MEM_SLP_CFG

Load memory sleep settings command

## ◆ LL_PWR_CMD_LD_MEM_WKUP_CFG

#define LL_PWR_CMD_LD_MEM_WKUP_CFG AON_PSC_CMD_OPC_OPCODE_LD_MEM_WKUP_CFG

Load memory wakeup settings command

## ◆ LL_PWR_CMD_LOOPBACK

#define LL_PWR_CMD_LOOPBACK AON_PSC_CMD_OPC_OPCODE_LOOPBACK

Reserved command 0

## ◆ LL_PWR_CMD_RNG2_CLK

#define LL_PWR_CMD_RNG2_CLK AON_PSC_CMD_OPC_OPCODE_RNG2_CLK

Select RING OSC clock command

## ◆ LL_PWR_CMD_RNG_CLK

#define LL_PWR_CMD_RNG_CLK AON_PSC_CMD_OPC_OPCODE_RNG_CLK

Select RING OSC clock command

## ◆ LL_PWR_CMD_RTC_CLK

#define LL_PWR_CMD_RTC_CLK AON_PSC_CMD_OPC_OPCODE_RTC_CLK

Select RTC clock command

## ◆ LL_PWR_CMD_SLP_TIMER_MODE_DISABLE

#define LL_PWR_CMD_SLP_TIMER_MODE_DISABLE AON_PSC_CMD_OPC_OPCODE_SLP_TIMER_MODE_3

Enable sleep timer mode 3 command

## ◆ LL_PWR_CMD_SLP_TIMER_MODE_NORMAL

#define LL_PWR_CMD_SLP_TIMER_MODE_NORMAL AON_PSC_CMD_OPC_OPCODE_SLP_TIMER_MODE_0

Enable sleep timer mode 0 command

## ◆ LL_PWR_CMD_SLP_TIMER_MODE_RELOAD

#define LL_PWR_CMD_SLP_TIMER_MODE_RELOAD AON_PSC_CMD_OPC_OPCODE_SLP_TIMER_MODE_2

Enable sleep timer mode 2 command

## ◆ LL_PWR_CMD_SLP_TIMER_MODE_SINGLE

#define LL_PWR_CMD_SLP_TIMER_MODE_SINGLE AON_PSC_CMD_OPC_OPCODE_SLP_TIMER_MODE_1

Enable sleep timer mode 1 command