Macros
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Peripheral Driver » HAL Driver » CGC » Defines » CGC Exported Constants

## Macros
#define | CGC_FRC_SECU_HCLK ((uint32_t)0x00000001U)
#define | CGC_FRC_SIM_HCLK ((uint32_t)0x00000002U)
#define | CGC_FRC_HTB_HCLK ((uint32_t)0x00000004U)
#define | CGC_FRC_PWM_HCLK ((uint32_t)0x00000008U)
#define | CGC_FRC_ROM_HCLK ((uint32_t)0x00000010U)
#define | CGC_FRC_SNSADC_HCLK ((uint32_t)0x00000020U)
#define | CGC_FRC_GPIO_HCLK ((uint32_t)0x00000040U)
#define | CGC_FRC_DMA_HCLK ((uint32_t)0x00000080U)
#define | CGC_FRC_BLE_BRG_HCLK ((uint32_t)0x00000100U)
#define | CGC_FRC_APB_SUB_HCLK ((uint32_t)0x00000200U)
#define | CGC_FRC_SERIAL_HCLK ((uint32_t)0x00000400U)
#define | CGC_FRC_I2S_S_HCLK ((uint32_t)0x00000800U)
#define | CGC_FRC_AON_MCUSUB_HCLK ((uint32_t)0x00001000U)
#define | CGC_FRC_XF_XQSPI_HCLK ((uint32_t)0x00002000U)
#define | CGC_FRC_SRAM_HCLK ((uint32_t)0x00004000U)
#define | CGC_FRC_UART0_HCLK ((uint32_t)0x00008000U)
#define | CGC_FRC_UART1_HCLK ((uint32_t)0x00010000U)
#define | CGC_FRC_I2C0_HCLK ((uint32_t)0x00020000U)
#define | CGC_FRC_I2C1_HCLK ((uint32_t)0x00040000U)
#define | CGC_FRC_SPIM_HCLK ((uint32_t)0x00080000U)
#define | CGC_FRC_SPIS_HCLK ((uint32_t)0x00100000U)
#define | CGC_FRC_QSPI0_HCLK ((uint32_t)0x00200000U)
#define | CGC_FRC_QSPI1_HCLK ((uint32_t)0x00400000U)
#define | CGC_FRC_I2S_HCLK ((uint32_t)0x00800000U)
#define | CGC_FRC_SECU_DIV4_PCLK ((uint32_t)0x01000000U)
#define | CGC_FRC_XQSPI_DIV4_PCLK ((uint32_t)0x04000000U)
#define | CGC_FRC_ALL_CLK ((uint32_t)0x05FFFFFFU)

## Detailed Description

## Macro Definition Documentation

## ◆ CGC_FRC_ALL_CLK

#define CGC_FRC_ALL_CLK ((uint32_t)0x05FFFFFFU)

All clocks

## ◆ CGC_FRC_AON_MCUSUB_HCLK

#define CGC_FRC_AON_MCUSUB_HCLK ((uint32_t)0x00001000U)

Hclk for Always-on register

## ◆ CGC_FRC_APB_SUB_HCLK

#define CGC_FRC_APB_SUB_HCLK ((uint32_t)0x00000200U)

Hclk for APB subsystem

## ◆ CGC_FRC_BLE_BRG_HCLK

#define CGC_FRC_BLE_BRG_HCLK ((uint32_t)0x00000100U)

Hclk for BLE MCU bridge

## ◆ CGC_FRC_DMA_HCLK

#define CGC_FRC_DMA_HCLK ((uint32_t)0x00000080U)

Hclk for DMA engine

## ◆ CGC_FRC_GPIO_HCLK

#define CGC_FRC_GPIO_HCLK ((uint32_t)0x00000040U)

Hclk for GPIOs

## ◆ CGC_FRC_HTB_HCLK

#define CGC_FRC_HTB_HCLK ((uint32_t)0x00000004U)

Hclk for hopping table

## ◆ CGC_FRC_I2C0_HCLK

#define CGC_FRC_I2C0_HCLK ((uint32_t)0x00020000U)

Hclk for i2c0

## ◆ CGC_FRC_I2C1_HCLK

#define CGC_FRC_I2C1_HCLK ((uint32_t)0x00040000U)

Hclk for i2c1

## ◆ CGC_FRC_I2S_HCLK

#define CGC_FRC_I2S_HCLK ((uint32_t)0x00800000U)

Hclk for i2s

## ◆ CGC_FRC_I2S_S_HCLK

#define CGC_FRC_I2S_S_HCLK ((uint32_t)0x00000800U)

Hclk for I2S slave

## ◆ CGC_FRC_PWM_HCLK

#define CGC_FRC_PWM_HCLK ((uint32_t)0x00000008U)

Hclk for PWM

## ◆ CGC_FRC_QSPI0_HCLK

#define CGC_FRC_QSPI0_HCLK ((uint32_t)0x00200000U)

Hclk for qspi0

## ◆ CGC_FRC_QSPI1_HCLK

#define CGC_FRC_QSPI1_HCLK ((uint32_t)0x00400000U)

Hclk for qspi1

## ◆ CGC_FRC_ROM_HCLK

#define CGC_FRC_ROM_HCLK ((uint32_t)0x00000010U)

Hclk for ROM

## ◆ CGC_FRC_SECU_DIV4_PCLK

#define CGC_FRC_SECU_DIV4_PCLK ((uint32_t)0x01000000U)

Div4 clk for security blocks

## ◆ CGC_FRC_SECU_HCLK

#define CGC_FRC_SECU_HCLK ((uint32_t)0x00000001U)

Hclk for all security blocks

## ◆ CGC_FRC_SERIAL_HCLK

#define CGC_FRC_SERIAL_HCLK ((uint32_t)0x00000400U)

Hclk for serial blocks

## ◆ CGC_FRC_SIM_HCLK

#define CGC_FRC_SIM_HCLK ((uint32_t)0x00000002U)

Hclk for sim card interface

## ◆ CGC_FRC_SNSADC_HCLK

#define CGC_FRC_SNSADC_HCLK ((uint32_t)0x00000020U)

Hclk for sense ADC

## ◆ CGC_FRC_SPIM_HCLK

#define CGC_FRC_SPIM_HCLK ((uint32_t)0x00080000U)

Hclk for spim

## ◆ CGC_FRC_SPIS_HCLK

#define CGC_FRC_SPIS_HCLK ((uint32_t)0x00100000U)

Hclk for spis

## ◆ CGC_FRC_SRAM_HCLK

#define CGC_FRC_SRAM_HCLK ((uint32_t)0x00004000U)

Hclk for SRAMs

## ◆ CGC_FRC_UART0_HCLK

#define CGC_FRC_UART0_HCLK ((uint32_t)0x00008000U)

Hclk for uart0

## ◆ CGC_FRC_UART1_HCLK

#define CGC_FRC_UART1_HCLK ((uint32_t)0x00010000U)

Hclk for uart1

## ◆ CGC_FRC_XF_XQSPI_HCLK

#define CGC_FRC_XF_XQSPI_HCLK ((uint32_t)0x00002000U)

Hclk for cache top

## ◆ CGC_FRC_XQSPI_DIV4_PCLK

#define CGC_FRC_XQSPI_DIV4_PCLK ((uint32_t)0x04000000U)

Div4 clk for xf qspi