gr55xx_hal_cgc.h
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1
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55xx_HAL_CGC_H__
53 #define __GR55xx_HAL_CGC_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx_ll_cgc.h"
61 #include "gr55xx_hal_def.h"
62
63 /* Exported types ------------------------------------------------------------*/
71 typedef enum
72 {
73 CGC_CLK_ON = 0U,
74 CGC_CLK_OFF = 1U,
75 } cgc_clk_state_t;
76
86 typedef struct _cgc_init
87 {
88 uint32_t wfi_clk;
91 uint32_t force_clk;
93 } cgc_init_t;
94
103 /* Exported constants --------------------------------------------------------*/
111 #define CGC_WFI_SECU_HCLK ((uint32_t)0x00000001U)
112 #define CGC_WFI_SIM_HCLK ((uint32_t)0x00000002U)
113 #define CGC_WFI_HTB_HCLK ((uint32_t)0x00000004U)
114 #define CGC_WFI_PWM_HCLK ((uint32_t)0x00000008U)
115 #define CGC_WFI_ROM_HCLK ((uint32_t)0x00000010U)
116 #define CGC_WFI_SNSADC_HCLK ((uint32_t)0x00000020U)
117 #define CGC_WFI_GPIO_HCLK ((uint32_t)0x00000040U)
118 #define CGC_WFI_DMA_HCLK ((uint32_t)0x00000080U)
119 #define CGC_WFI_BLE_BRG_HCLK ((uint32_t)0x00000100U)
120 #define CGC_WFI_APB_SUB_HCLK ((uint32_t)0x00000200U)
121 #define CGC_WFI_SERIAL_HCLK ((uint32_t)0x00000400U)
122 #define CGC_WFI_I2S_S_HCLK ((uint32_t)0x00000800U)
123 #define CGC_WFI_AON_MCUSUB_HCLK ((uint32_t)0x00001000U)
124 #define CGC_WFI_XF_XQSPI_HCLK ((uint32_t)0x00002000U)
125 #define CGC_WFI_SRAM_HCLK ((uint32_t)0x00004000U)
126 #define CGC_WFI_SECU_DIV4_PCLK ((uint32_t)0x00008000U)
127 #define CGC_WFI_XQSPI_DIV4_PCLK ((uint32_t)0x00020000U)
129 #define CGC_WFI_ALL_CLK ((uint32_t)0x0002FFFFU)
135 #define CGC_FRC_SECU_HCLK ((uint32_t)0x00000001U)
136 #define CGC_FRC_SIM_HCLK ((uint32_t)0x00000002U)
137 #define CGC_FRC_HTB_HCLK ((uint32_t)0x00000004U)
138 #define CGC_FRC_PWM_HCLK ((uint32_t)0x00000008U)
139 #define CGC_FRC_ROM_HCLK ((uint32_t)0x00000010U)
140 #define CGC_FRC_SNSADC_HCLK ((uint32_t)0x00000020U)
141 #define CGC_FRC_GPIO_HCLK ((uint32_t)0x00000040U)
142 #define CGC_FRC_DMA_HCLK ((uint32_t)0x00000080U)
143 #define CGC_FRC_BLE_BRG_HCLK ((uint32_t)0x00000100U)
144 #define CGC_FRC_APB_SUB_HCLK ((uint32_t)0x00000200U)
145 #define CGC_FRC_SERIAL_HCLK ((uint32_t)0x00000400U)
146 #define CGC_FRC_I2S_S_HCLK ((uint32_t)0x00000800U)
147 #define CGC_FRC_AON_MCUSUB_HCLK ((uint32_t)0x00001000U)
148 #define CGC_FRC_XF_XQSPI_HCLK ((uint32_t)0x00002000U)
149 #define CGC_FRC_SRAM_HCLK ((uint32_t)0x00004000U)
150 #define CGC_FRC_UART0_HCLK ((uint32_t)0x00008000U)
151 #define CGC_FRC_UART1_HCLK ((uint32_t)0x00010000U)
152 #define CGC_FRC_I2C0_HCLK ((uint32_t)0x00020000U)
153 #define CGC_FRC_I2C1_HCLK ((uint32_t)0x00040000U)
154 #define CGC_FRC_SPIM_HCLK ((uint32_t)0x00080000U)
155 #define CGC_FRC_SPIS_HCLK ((uint32_t)0x00100000U)
156 #define CGC_FRC_QSPI0_HCLK ((uint32_t)0x00200000U)
157 #define CGC_FRC_QSPI1_HCLK ((uint32_t)0x00400000U)
158 #define CGC_FRC_I2S_HCLK ((uint32_t)0x00800000U)
159 #define CGC_FRC_SECU_DIV4_PCLK ((uint32_t)0x01000000U)
160 #define CGC_FRC_XQSPI_DIV4_PCLK ((uint32_t)0x04000000U)
162 #define CGC_FRC_ALL_CLK ((uint32_t)0x05FFFFFFU)
170 #define CGC_DEFAULT_CONFIG \
171 { \
172 .wfi_clk = ~CGC_WFI_ALL_CLK, \
173 .force_clk = ~CGC_FRC_ALL_CLK, \
174 }
175
180 /* Exported functions --------------------------------------------------------*/
197 void hal_cgc_init(cgc_init_t *p_cgc_init);
198
204 void hal_cgc_deinit(void);
205
241 void hal_cgc_config_wfi_clk(uint32_t blocks, cgc_clk_state_t clk_state);
242
269 cgc_clk_state_t hal_cgc_get_wfi_clk(uint32_t block);
270
308 void hal_cgc_config_force_clk(uint32_t blocks, cgc_clk_state_t clk_state);
309
345 cgc_clk_state_t hal_cgc_get_force_clk(uint32_t block);
346
347
352 #ifdef __cplusplus
353 }
354 #endif
355
356 #endif /* __GR55xx_HAL_CGC_H__ */
357
cgc_clk_state_t
cgc_clk_state_t
CGC Bit Open and Bit Close Enumerations.
Definition: gr55xx_hal_cgc.h:72
CGC_CLK_ON
@ CGC_CLK_ON
Definition: gr55xx_hal_cgc.h:73
_cgc_init::force_clk
uint32_t force_clk
Definition: gr55xx_hal_cgc.h:91
hal_cgc_get_wfi_clk
cgc_clk_state_t hal_cgc_get_wfi_clk(uint32_t block)
Get the clock state for a specified block during WFI.
hal_cgc_get_force_clk
cgc_clk_state_t hal_cgc_get_force_clk(uint32_t block)
Get the clock status of the currently specified block.
cgc_init_t
struct _cgc_init cgc_init_t
CGC init structure definition.
CGC_CLK_OFF
@ CGC_CLK_OFF
Definition: gr55xx_hal_cgc.h:74
gr55xx_ll_cgc.h
Header file containing functions prototypes of CGC LL library.
_cgc_init::wfi_clk
uint32_t wfi_clk
Definition: gr55xx_hal_cgc.h:88
hal_cgc_config_force_clk
void hal_cgc_config_force_clk(uint32_t blocks, cgc_clk_state_t clk_state)
Forced to Configure the clock state for a specified block.
_cgc_init
CGC init structure definition.
Definition: gr55xx_hal_cgc.h:87
hal_cgc_config_wfi_clk
void hal_cgc_config_wfi_clk(uint32_t blocks, cgc_clk_state_t clk_state)
Configure the clock state for a specified block during WFI.
hal_cgc_init
void hal_cgc_init(cgc_init_t *p_cgc_init)
Initialize the CGC registers according to the specified parameters in the cgc_init_t.
gr55xx_hal_def.h
This file contains HAL common definitions, enumeration, macros and structures definitions.
hal_cgc_deinit
void hal_cgc_deinit(void)
De-initialize the CGC registers to their default reset values.