Macros
ADC CLOCK
Peripheral Driver » LL Driver » ADC » Defines » ADC Exported Constants

## Macros
#define | LL_ADC_CLK_16 (0x00000000UL)
#define | LL_ADC_CLK_8 (1UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)
#define | LL_ADC_CLK_4 (2UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)
#define | LL_ADC_CLK_2 (3UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)
#define | LL_ADC_CLK_1P6 (4UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)
#define | LL_ADC_CLK_1 (5UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)

## Detailed Description

## Macro Definition Documentation

## ◆ LL_ADC_CLK_1

#define LL_ADC_CLK_1 (5UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)

1 MHz

## ◆ LL_ADC_CLK_16

#define LL_ADC_CLK_16 (0x00000000UL)

16 MHz

## ◆ LL_ADC_CLK_1P6

#define LL_ADC_CLK_1P6 (4UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)

1.6 MHz

## ◆ LL_ADC_CLK_2

#define LL_ADC_CLK_2 (3UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)

2 MHz

## ◆ LL_ADC_CLK_4

#define LL_ADC_CLK_4 (2UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)

4 MHz

## ◆ LL_ADC_CLK_8

#define LL_ADC_CLK_8 (1UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)

8 MHz