gr55xx_ll_adc.h
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1
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55XX_LL_ADC_H__
53 #define __GR55XX_LL_ADC_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx.h"
61
62 #if defined(AON)
63
68 /* Exported types ------------------------------------------------------------*/
76 typedef struct _ll_adc_init
77 {
78 uint32_t channel_p;
83 uint32_t channel_n;
88 uint32_t input_mode;
93 uint32_t ref_source;
98 uint32_t ref_value;
103 uint32_t clock;
108 } ll_adc_init_t;
109
119 /* Exported constants --------------------------------------------------------*/
127 #define LL_ADC_CLK_16 (0x00000000UL)
128 #define LL_ADC_CLK_8 (1UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)
129 #define LL_ADC_CLK_4 (2UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)
130 #define LL_ADC_CLK_2 (3UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)
131 #define LL_ADC_CLK_1P6 (4UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)
132 #define LL_ADC_CLK_1 (5UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos)
138 #define LL_ADC_REF_VALUE_0P8 (0x3UL << AON_SNSADC_CFG_REF_VALUE_Pos)
139 #define LL_ADC_REF_VALUE_1P2 (0x7UL << AON_SNSADC_CFG_REF_VALUE_Pos)
140 #define LL_ADC_REF_VALUE_1P6 (0xAUL << AON_SNSADC_CFG_REF_VALUE_Pos)
141 //#define LL_ADC_REF_VALUE_2P0 (0xFUL << AON_SNSADC_CFG_REF_VALUE_Pos)
147 #define LL_ADC_INPUT_SINGLE (1UL << AON_SNSADC_CFG_SINGLE_EN_Pos)
148 #define LL_ADC_INPUT_DIFFERENTIAL (0x00000000UL)
154 #define LL_ADC_INPUT_SRC_IO0 (0UL)
155 #define LL_ADC_INPUT_SRC_IO1 (1UL)
156 #define LL_ADC_INPUT_SRC_IO2 (2UL)
157 #define LL_ADC_INPUT_SRC_IO3 (3UL)
158 #define LL_ADC_INPUT_SRC_IO4 (4UL)
159 #define LL_ADC_INPUT_SRC_TMP (5UL)
160 #define LL_ADC_INPUT_SRC_BAT (6UL)
161 #define LL_ADC_INPUT_SRC_REF (7UL)
168 #define LL_ADC_REF_SRC_BUF_INT (0x00000000UL)
169 #define LL_ADC_REF_SRC_IO0 (3UL << AON_SNSADC_CFG_REF_SEL_Pos)
170 #define LL_ADC_REF_SRC_IO1 (4UL << AON_SNSADC_CFG_REF_SEL_Pos)
171 #define LL_ADC_REF_SRC_IO2 (5UL << AON_SNSADC_CFG_REF_SEL_Pos)
172 #define LL_ADC_REF_SRC_IO3 (6UL << AON_SNSADC_CFG_REF_SEL_Pos)
177 /* Exported macro ------------------------------------------------------------*/
178
193 #define LL_ADC_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG((__instance__)->__REG__, (__VALUE__))
194
201 #define LL_ADC_ReadReg(__instance__, __REG__) READ_REG((__instance__)->__REG__)
202
207 /* Private types -------------------------------------------------------------*/
208 /* Private variables ---------------------------------------------------------*/
209 /* Private constants ---------------------------------------------------------*/
210 /* Private macros ------------------------------------------------------------*/
222 #define LL_ADC_DEFAULT_CONFIG \
223 { \
224 .channel_p = LL_ADC_INPUT_SRC_IO0, \
225 .channel_n = LL_ADC_INPUT_SRC_IO1, \
226 .input_mode = LL_ADC_INPUT_DIFFERENTIAL, \
227 .ref_source = LL_ADC_REF_SRC_BUF_INT, \
228 .ref_value = LL_ADC_REF_VALUE_1P5, \
229 .clock = LL_ADC_CLK_16 \
230 }
231
237 /* Exported functions --------------------------------------------------------*/
255 __STATIC_INLINE void ll_adc_enable(void)
256 {
257 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_EN_Msk);
258 }
259
269 __STATIC_INLINE void ll_adc_disable(void)
270 {
271 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_EN_Msk);
272 }
273
283 __STATIC_INLINE uint32_t ll_adc_is_enabled(void)
284 {
285 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_EN_Msk) == (AON_SNSADC_CFG_EN_Msk));
286 }
287
297 __STATIC_INLINE void ll_adc_enable_clock(void)
298 {
299 GLOBAL_EXCEPTION_DISABLE();
300 SET_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_EN);
301 GLOBAL_EXCEPTION_ENABLE();
302 }
303
313 __STATIC_INLINE void ll_adc_disable_clock(void)
314 {
315 GLOBAL_EXCEPTION_DISABLE();
316 CLEAR_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_EN);
317 GLOBAL_EXCEPTION_ENABLE();
318 }
319
329 __STATIC_INLINE uint32_t ll_adc_is_enabled_clock(void)
330 {
331 return (READ_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_EN) == (AON_MSIO_PAD_CFG_1_ADC_CLK_EN));
332 }
333
350 __STATIC_INLINE void ll_adc_set_clock(uint32_t clk)
351 {
352 GLOBAL_EXCEPTION_DISABLE();
353 MODIFY_REG(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_SEL, clk);
354 GLOBAL_EXCEPTION_ENABLE();
355 }
356
372 __STATIC_INLINE uint32_t ll_adc_get_clock(void)
373 {
374 return (uint32_t)(READ_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_SEL) >> AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos);
375 }
376
390 __STATIC_INLINE void ll_adc_set_ref_value(uint32_t value)
391 {
392 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_VALUE_Msk, value);
393 }
394
407 __STATIC_INLINE uint32_t ll_adc_get_ref_value(void)
408 {
409 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_VALUE_Msk) >> AON_SNSADC_CFG_REF_VALUE_Pos);
410 }
411
421 __STATIC_INLINE void ll_adc_enable_temp(void)
422 {
423 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_TEMP_EN_Msk);
424 }
425
435 __STATIC_INLINE void ll_adc_disable_temp(void)
436 {
437 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_TEMP_EN_Msk);
438 }
439
449 __STATIC_INLINE uint32_t ll_adc_is_enabled_temp(void)
450 {
451 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_TEMP_EN_Msk) == (AON_SNSADC_CFG_TEMP_EN_Msk));
452 }
453
463 __STATIC_INLINE void ll_adc_enable_vbat(void)
464 {
465 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_VBAT_EN_Msk);
466 }
467
477 __STATIC_INLINE void ll_adc_disable_vbat(void)
478 {
479 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_VBAT_EN_Msk);
480 }
481
491 __STATIC_INLINE uint32_t ll_adc_is_enabled_vbat(void)
492 {
493 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_VBAT_EN_Msk) == (AON_SNSADC_CFG_VBAT_EN_Msk));
494 }
495
508 __STATIC_INLINE void ll_adc_set_input_mode(uint32_t mode)
509 {
510 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_SINGLE_EN_Msk, mode);
511 }
512
524 __STATIC_INLINE uint32_t ll_adc_get_input_mode(void)
525 {
526 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_SINGLE_EN_Msk) >> AON_SNSADC_CFG_SINGLE_EN_Pos);
527 }
528
540 __STATIC_INLINE void ll_adc_enable_ofs_cal(void)
541 {
542 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_OFS_CAL_EN_Msk);
543 }
544
554 __STATIC_INLINE void ll_adc_disable_ofs_cal(void)
555 {
556 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_OFS_CAL_EN_Msk);
557 }
558
568 __STATIC_INLINE uint32_t ll_adc_is_enabled_ofs_cal(void)
569 {
570 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_OFS_CAL_EN_Msk) == (AON_SNSADC_CFG_OFS_CAL_EN_Msk));
571 }
572
584 __STATIC_INLINE void ll_adc_set_dynamic_rang(uint32_t rang)
585 {
586 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_DYMAMIC_Msk, (rang & 0x7) << AON_SNSADC_CFG_DYMAMIC_Pos);
587 }
588
598 __STATIC_INLINE uint32_t ll_adc_get_dynamic_rang(void)
599 {
600 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_DYMAMIC_Msk) >> AON_SNSADC_CFG_DYMAMIC_Pos);
601 }
602
620 __STATIC_INLINE void ll_adc_set_channelp(uint32_t source)
621 {
622 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_P_Msk, source << AON_SNSADC_CFG_CHN_P_Pos);
623 }
624
641 __STATIC_INLINE uint32_t ll_adc_get_channelp(void)
642 {
643 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_P_Msk) >> AON_SNSADC_CFG_CHN_P_Pos);
644 }
645
663 __STATIC_INLINE void ll_adc_set_channeln(uint32_t source)
664 {
665 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_N_Msk, source << AON_SNSADC_CFG_CHN_N_Pos);
666 }
667
684 __STATIC_INLINE uint32_t ll_adc_get_channeln(void)
685 {
686 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_N_Msk) >> AON_SNSADC_CFG_CHN_N_Pos);
687 }
688
698 __STATIC_INLINE void ll_adc_enable_mas_rst(void)
699 {
700 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_MAS_RST_Msk);
701 }
702
712 __STATIC_INLINE void ll_adc_disable_mas_rst(void)
713 {
714 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_MAS_RST_Msk);
715 }
716
726 __STATIC_INLINE uint32_t ll_adc_is_enabled_mas_rst(void)
727 {
728 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_MAS_RST_Msk) == (AON_SNSADC_CFG_MAS_RST_Msk));
729 }
730
746 __STATIC_INLINE void ll_adc_set_ref(uint32_t source)
747 {
748 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_SEL_Msk, source);
749 }
750
765 __STATIC_INLINE uint32_t ll_adc_get_ref(void)
766 {
767 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_SEL_Msk) >> AON_SNSADC_CFG_REF_SEL_Pos);
768 }
769
782 __STATIC_INLINE void ll_adc_set_ref_current(uint32_t source)
783 {
784 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_HP_Msk, (source & 0x7) << AON_SNSADC_CFG_REF_HP_Pos);
785 }
786
796 __STATIC_INLINE uint32_t ll_adc_get_ref_current(void)
797 {
798 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_HP_Msk) >> AON_SNSADC_CFG_REF_HP_Pos);
799 }
800
817 __STATIC_INLINE uint32_t ll_adc_read_fifo(void)
818 {
819 return (uint32_t)(READ_REG(MCU_SUB->SENSE_ADC_FIFO));
820 }
821
832 __STATIC_INLINE void ll_adc_set_thresh(uint32_t thresh)
833 {
834 MODIFY_REG(MCU_SUB->SENSE_FF_THRESH, MCU_SUB_SNSADC_FF_THRESH, (thresh & 0x3F) << MCU_SUB_SNSADC_FF_THRESH_Pos);
835 }
836
846 __STATIC_INLINE uint32_t ll_adc_get_thresh(void)
847 {
848 return (uint32_t)(READ_BITS(MCU_SUB->SENSE_FF_THRESH, MCU_SUB_SNSADC_FF_THRESH) >> MCU_SUB_SNSADC_FF_THRESH_Pos);
849 }
850
860 __STATIC_INLINE uint32_t ll_adc_is_fifo_notempty(void)
861 {
862 return (uint32_t)(READ_BITS(MCU_SUB->SENSE_ADC_STAT, MCU_SUB_SNSADC_STAT_VAL) == MCU_SUB_SNSADC_STAT_VAL);
863 }
864
874 __STATIC_INLINE uint32_t ll_adc_get_fifo_count(void)
875 {
876 return (uint32_t)(READ_BITS(MCU_SUB->SENSE_ADC_STAT, MCU_SUB_SNSADC_STAT_FF_COUNT) >> MCU_SUB_SNSADC_STAT_FF_COUNT_Pos);
877 }
878
891 error_status_t ll_adc_deinit(void);
892
902 error_status_t ll_adc_init(ll_adc_init_t *p_adc_init);
903
910 void ll_adc_struct_init(ll_adc_init_t *p_adc_init);
911
916 #endif /* AON */
917
918 #ifdef __cplusplus
919 }
920 #endif
921
922 #endif /* __GR55XX_LL_ADC_H__ */
923
ll_adc_enable_mas_rst
__STATIC_INLINE void ll_adc_enable_mas_rst(void)
Enable ADC MAS_RST.
Definition: gr55xx_ll_adc.h:698
ll_adc_enable
__STATIC_INLINE void ll_adc_enable(void)
Enable ADC module.
Definition: gr55xx_ll_adc.h:255
ll_adc_deinit
error_status_t ll_adc_deinit(void)
De-initialize ADC registers (Registers restored to their default values).
ll_adc_is_enabled_vbat
__STATIC_INLINE uint32_t ll_adc_is_enabled_vbat(void)
Check if Vbattery sensor is enabled.
Definition: gr55xx_ll_adc.h:491
ll_adc_is_enabled_temp
__STATIC_INLINE uint32_t ll_adc_is_enabled_temp(void)
Check if temperature sensor is enabled.
Definition: gr55xx_ll_adc.h:449
ll_adc_disable_vbat
__STATIC_INLINE void ll_adc_disable_vbat(void)
Disable Vbattery sensor.
Definition: gr55xx_ll_adc.h:477
_ll_adc_init::channel_p
uint32_t channel_p
Definition: gr55xx_ll_adc.h:78
ll_adc_get_fifo_count
__STATIC_INLINE uint32_t ll_adc_get_fifo_count(void)
Return count of ADC FIFO.
Definition: gr55xx_ll_adc.h:874
ll_adc_enable_clock
__STATIC_INLINE void ll_adc_enable_clock(void)
Enable ADC clock.
Definition: gr55xx_ll_adc.h:297
ll_adc_get_clock
__STATIC_INLINE uint32_t ll_adc_get_clock(void)
Return source for ADC clock.
Definition: gr55xx_ll_adc.h:372
ll_adc_get_thresh
__STATIC_INLINE uint32_t ll_adc_get_thresh(void)
Return threshold of ADC FIFO.
Definition: gr55xx_ll_adc.h:846
ll_adc_set_thresh
__STATIC_INLINE void ll_adc_set_thresh(uint32_t thresh)
Set threshold of ADC FIFO.
Definition: gr55xx_ll_adc.h:832
ll_adc_is_enabled_ofs_cal
__STATIC_INLINE uint32_t ll_adc_is_enabled_ofs_cal(void)
Check if offset calibration is enabled.
Definition: gr55xx_ll_adc.h:568
ll_adc_get_ref_value
__STATIC_INLINE uint32_t ll_adc_get_ref_value(void)
Return ADC bias reference.
Definition: gr55xx_ll_adc.h:407
ll_adc_get_channelp
__STATIC_INLINE uint32_t ll_adc_get_channelp(void)
Return source of ADC input channelP.
Definition: gr55xx_ll_adc.h:641
ll_adc_is_enabled
__STATIC_INLINE uint32_t ll_adc_is_enabled(void)
Check if ADC module is enabled.
Definition: gr55xx_ll_adc.h:283
ll_adc_is_enabled_clock
__STATIC_INLINE uint32_t ll_adc_is_enabled_clock(void)
Check if ADC clock is enabled.
Definition: gr55xx_ll_adc.h:329
ll_adc_get_input_mode
__STATIC_INLINE uint32_t ll_adc_get_input_mode(void)
Return ADC input mode.
Definition: gr55xx_ll_adc.h:524
_ll_adc_init
LL ADC init Structure definition.
Definition: gr55xx_ll_adc.h:77
ll_adc_set_ref_value
__STATIC_INLINE void ll_adc_set_ref_value(uint32_t value)
Set ADC bias reference.
Definition: gr55xx_ll_adc.h:390
ll_adc_init_t
struct _ll_adc_init ll_adc_init_t
LL ADC init Structure definition.
ll_adc_set_clock
__STATIC_INLINE void ll_adc_set_clock(uint32_t clk)
Set ADC clock source.
Definition: gr55xx_ll_adc.h:350
ll_adc_get_ref_current
__STATIC_INLINE uint32_t ll_adc_get_ref_current(void)
Return current of ADC reference circuit.
Definition: gr55xx_ll_adc.h:796
_ll_adc_init::ref_value
uint32_t ref_value
Definition: gr55xx_ll_adc.h:98
ll_adc_enable_ofs_cal
__STATIC_INLINE void ll_adc_enable_ofs_cal(void)
Enable offset calibration.
Definition: gr55xx_ll_adc.h:540
_ll_adc_init::channel_n
uint32_t channel_n
Definition: gr55xx_ll_adc.h:83
ll_adc_set_input_mode
__STATIC_INLINE void ll_adc_set_input_mode(uint32_t mode)
Set ADC input mode.
Definition: gr55xx_ll_adc.h:508
ll_adc_enable_vbat
__STATIC_INLINE void ll_adc_enable_vbat(void)
Enable Vbattery sensor.
Definition: gr55xx_ll_adc.h:463
ll_adc_set_channeln
__STATIC_INLINE void ll_adc_set_channeln(uint32_t source)
Set source of ADC input channelN.
Definition: gr55xx_ll_adc.h:663
ll_adc_get_ref
__STATIC_INLINE uint32_t ll_adc_get_ref(void)
Return source of ADC reference.
Definition: gr55xx_ll_adc.h:765
_ll_adc_init::input_mode
uint32_t input_mode
Definition: gr55xx_ll_adc.h:88
ll_adc_set_channelp
__STATIC_INLINE void ll_adc_set_channelp(uint32_t source)
Set source of ADC input channelP.
Definition: gr55xx_ll_adc.h:620
ll_adc_disable_temp
__STATIC_INLINE void ll_adc_disable_temp(void)
Disable temperature sensor.
Definition: gr55xx_ll_adc.h:435
ll_adc_disable
__STATIC_INLINE void ll_adc_disable(void)
Disable ADC module.
Definition: gr55xx_ll_adc.h:269
ll_adc_init
error_status_t ll_adc_init(ll_adc_init_t *p_adc_init)
Initialize ADC registers according to the specified. parameters in p_adc_init.
_ll_adc_init::ref_source
uint32_t ref_source
Definition: gr55xx_ll_adc.h:93
ll_adc_get_channeln
__STATIC_INLINE uint32_t ll_adc_get_channeln(void)
Return source of ADC input channelN.
Definition: gr55xx_ll_adc.h:684
ll_adc_set_ref
__STATIC_INLINE void ll_adc_set_ref(uint32_t source)
Set source of ADC reference.
Definition: gr55xx_ll_adc.h:746
ll_adc_is_enabled_mas_rst
__STATIC_INLINE uint32_t ll_adc_is_enabled_mas_rst(void)
Check if ADC MAS_RST is enabled.
Definition: gr55xx_ll_adc.h:726
ll_adc_struct_init
void ll_adc_struct_init(ll_adc_init_t *p_adc_init)
Set each field of a ll_adc_init_t type structure to default value.
ll_adc_disable_ofs_cal
__STATIC_INLINE void ll_adc_disable_ofs_cal(void)
Disable offset calibration.
Definition: gr55xx_ll_adc.h:554
ll_adc_enable_temp
__STATIC_INLINE void ll_adc_enable_temp(void)
Enable temperature sensor.
Definition: gr55xx_ll_adc.h:421
ll_adc_disable_mas_rst
__STATIC_INLINE void ll_adc_disable_mas_rst(void)
Disable ADC MAS_RST.
Definition: gr55xx_ll_adc.h:712
ll_adc_set_dynamic_rang
__STATIC_INLINE void ll_adc_set_dynamic_rang(uint32_t rang)
Set dynamic rang of ADC.
Definition: gr55xx_ll_adc.h:584
ll_adc_disable_clock
__STATIC_INLINE void ll_adc_disable_clock(void)
Disable ADC clock.
Definition: gr55xx_ll_adc.h:313
_ll_adc_init::clock
uint32_t clock
Definition: gr55xx_ll_adc.h:103
ll_adc_is_fifo_notempty
__STATIC_INLINE uint32_t ll_adc_is_fifo_notempty(void)
Check if ADC FIFO is not empty.
Definition: gr55xx_ll_adc.h:860
ll_adc_set_ref_current
__STATIC_INLINE void ll_adc_set_ref_current(uint32_t source)
Set current of ADC reference circuit.
Definition: gr55xx_ll_adc.h:782
ll_adc_read_fifo
__STATIC_INLINE uint32_t ll_adc_read_fifo(void)
Return samples value of ADC by reading FIFO.
Definition: gr55xx_ll_adc.h:817
ll_adc_get_dynamic_rang
__STATIC_INLINE uint32_t ll_adc_get_dynamic_rang(void)
Return ADC dynamic rang.
Definition: gr55xx_ll_adc.h:598