gr55xx_ll_hmac.h
Go to the documentation of this file.
1
50 /* Define to prevent recursive inclusion -------------------------------------*/
51 #ifndef __GR55XX_LL_HMAC_H__
52 #define __GR55XX_LL_HMAC_H__
53
54 #ifdef __cplusplus
55 extern "C" {
56 #endif
57
58 /* Includes ------------------------------------------------------------------*/
59 #include "gr55xx.h"
60
61 #if defined (HMAC)
62
67 /* Exported types ------------------------------------------------------------*/
75 typedef struct _ll_hmac_init_t
76 {
77 uint32_t *p_key;
79 uint32_t *p_hash;
81 } ll_hmac_init_t;
82
92 /* Exported constants --------------------------------------------------------*/
101 #define LL_HMAC_FLAG_DATAREADY_SHA HMAC_STATUS_DATAREADY_SHA
102 #define LL_HMAC_FLAG_DATAREADY_HMAC HMAC_STATUS_DATAREADY_HMAC
103 #define LL_HMAC_FLAG_DMA_MESSAGEDONE HMAC_STATUS_MESSAGEDONE_DMA
104 #define LL_HMAC_FLAG_DMA_DONE HMAC_STATUS_TRANSDONE_DMA
105 #define LL_HMAC_FLAG_DMA_ERR HMAC_STATUS_TRANSERR_DMA
106 #define LL_HMAC_FLAG_KEY_VALID HMAC_STATUS_KEYVALID
112 #define LL_HMAC_HASH_STANDARD 0x00000000U
113 #define LL_HMAC_HASH_USER (1UL << HMAC_CONFIG_ENABLE_USERHASH)
119 #define LL_HMAC_CALCULATETYPE_HMAC 0x00000000U
120 #define LL_HMAC_CALCULATETYPE_SHA (1UL << HMAC_CONFIG_CALCTYPE_Pos)
126 #define LL_HMAC_KEYTYPE_MCU 0x00000000U
127 #define LL_HMAC_KEYTYPE_AHB (1UL << HMAC_CONFIG_KEYTYPE_Pos)
128 #define LL_HMAC_KEYTYPE_KRAM (2UL << HMAC_CONFIG_KEYTYPE_Pos)
134 #define LL_HMAC_DMA_TRANSIZE_MIN (1)
135 #define LL_HMAC_DMA_TRANSIZE_MAX (512)
140 /* Exported macro ------------------------------------------------------------*/
141
156 #define LL_HMAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
157
164 #define LL_HMAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
165
172 /* Exported functions --------------------------------------------------------*/
191 __STATIC_INLINE void ll_hmac_enable(hmac_regs_t *HMACx)
192 {
193 SET_BITS(HMACx->CTRL, HMAC_CTRL_ENABLE);
194 }
195
206 __STATIC_INLINE void ll_hmac_disable(hmac_regs_t *HMACx)
207 {
208 CLEAR_BITS(HMACx->CTRL, HMAC_CTRL_ENABLE);
209 }
210
221 __STATIC_INLINE uint32_t ll_hmac_is_enabled(hmac_regs_t *HMACx)
222 {
223 return (READ_BITS(HMACx->CTRL, HMAC_CTRL_ENABLE) == (HMAC_CTRL_ENABLE));
224 }
225
236 __STATIC_INLINE void ll_hmac_enable_dma_start(hmac_regs_t *HMACx)
237 {
238 SET_BITS(HMACx->CTRL, HMAC_CTRL_START_DMA);
239 }
240
251 __STATIC_INLINE void ll_hmac_disable_dma_start(hmac_regs_t *HMACx)
252 {
253 CLEAR_BITS(HMACx->CTRL, HMAC_CTRL_START_DMA);
254 }
255
266 __STATIC_INLINE uint32_t ll_hmac_is_enabled_dma_start(hmac_regs_t *HMACx)
267 {
268 return (READ_BITS(HMACx->CTRL, HMAC_CTRL_START_DMA) == (HMAC_CTRL_START_DMA));
269 }
270
281 __STATIC_INLINE void ll_hmac_enable_read_key(hmac_regs_t *HMACx)
282 {
283 SET_BITS(HMACx->CTRL, HMAC_CTRL_ENABLE_RKEY);
284 }
285
296 __STATIC_INLINE void ll_hmac_enable_last_transfer(hmac_regs_t *HMACx)
297 {
298 SET_BITS(HMACx->CTRL, HMAC_CTRL_LASTTRANSFER);
299 }
300
311 __STATIC_INLINE void ll_hmac_enable_user_hash(hmac_regs_t *HMACx)
312 {
313 SET_BITS(HMACx->CONFIG, HMAC_CONFIG_ENABLE_USERHASH);
314 }
315
326 __STATIC_INLINE void ll_hmac_disable_user_hash(hmac_regs_t *HMACx)
327 {
328 CLEAR_BITS(HMACx->CONFIG, HMAC_CONFIG_ENABLE_USERHASH);
329 }
330
341 __STATIC_INLINE uint32_t ll_hmac_is_enabled_user_hash(hmac_regs_t *HMACx)
342 {
343 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_ENABLE_USERHASH) == (HMAC_CONFIG_ENABLE_USERHASH));
344 }
345
356 __STATIC_INLINE void ll_hmac_enable_little_endian(hmac_regs_t *HMACx)
357 {
358 SET_BITS(HMACx->CONFIG, HMAC_CONFIG_ENDIAN);
359 }
360
371 __STATIC_INLINE void ll_hmac_disable_little_endian(hmac_regs_t *HMACx)
372 {
373 CLEAR_BITS(HMACx->CONFIG, HMAC_CONFIG_ENDIAN);
374 }
375
386 __STATIC_INLINE uint32_t ll_hmac_is_enabled_little_endian(hmac_regs_t *HMACx)
387 {
388 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_ENDIAN) == (HMAC_CONFIG_ENDIAN));
389 }
390
405 __STATIC_INLINE void ll_hmac_set_key_type(hmac_regs_t *HMACx, uint32_t type)
406 {
407 MODIFY_REG(HMACx->CONFIG, HMAC_CONFIG_KEYTYPE, type);
408 }
409
423 __STATIC_INLINE uint32_t ll_hmac_get_key_type(hmac_regs_t *HMACx)
424 {
425 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_KEYTYPE));
426 }
427
438 __STATIC_INLINE void ll_hmac_enable_sha(hmac_regs_t *HMACx)
439 {
440 SET_BITS(HMACx->CONFIG, HMAC_CONFIG_CALCTYPE);
441 }
442
453 __STATIC_INLINE void ll_hmac_disable_sha(hmac_regs_t *HMACx)
454 {
455 CLEAR_BITS(HMACx->CONFIG, HMAC_CONFIG_CALCTYPE);
456 }
457
468 __STATIC_INLINE uint32_t ll_hmac_is_enabled_sha(hmac_regs_t *HMACx)
469 {
470 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_CALCTYPE) == (HMAC_CONFIG_CALCTYPE));
471 }
472
483 __STATIC_INLINE void ll_hmac_enable_private(hmac_regs_t *HMACx)
484 {
485 SET_BITS(HMACx->CONFIG, HMAC_CONFIG_PRIVATE);
486 }
487
498 __STATIC_INLINE void ll_hmac_disable_private(hmac_regs_t *HMACx)
499 {
500 CLEAR_BITS(HMACx->CONFIG, HMAC_CONFIG_PRIVATE);
501 }
502
513 __STATIC_INLINE uint32_t ll_hmac_is_enabled_private(hmac_regs_t *HMACx)
514 {
515 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_PRIVATE) == (HMAC_CONFIG_PRIVATE));
516 }
517
534 __STATIC_INLINE void ll_hmac_enable_it_done(hmac_regs_t *HMACx)
535 {
536 SET_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_ENABLE);
537 }
538
549 __STATIC_INLINE void ll_hmac_disable_it_done(hmac_regs_t *HMACx)
550 {
551 CLEAR_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_ENABLE);
552 }
553
564 __STATIC_INLINE uint32_t ll_hmac_is_enabled_it_done(hmac_regs_t *HMACx)
565 {
566 return (READ_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_ENABLE) == (HMAC_INTERRUPT_ENABLE));
567 }
568
585 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_sha_ready(hmac_regs_t *HMACx)
586 {
587 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_DATAREADY_SHA) == HMAC_STATUS_DATAREADY_SHA);
588 }
589
600 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_hmac_ready(hmac_regs_t *HMACx)
601 {
602 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_DATAREADY_HMAC) == HMAC_STATUS_DATAREADY_HMAC);
603 }
604
615 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_message_done(hmac_regs_t *HMACx)
616 {
617 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_MESSAGEDONE_DMA) == HMAC_STATUS_MESSAGEDONE_DMA);
618 }
619
630 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_done(hmac_regs_t *HMACx)
631 {
632 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_TRANSDONE_DMA) == HMAC_STATUS_TRANSDONE_DMA);
633 }
634
645 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_error(hmac_regs_t *HMACx)
646 {
647 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_TRANSERR_DMA) == HMAC_STATUS_TRANSERR_DMA);
648 }
649
660 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_key_valid(hmac_regs_t *HMACx)
661 {
662 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_KEYVALID) == HMAC_STATUS_KEYVALID);
663 }
664
675 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_it_done(hmac_regs_t *HMACx)
676 {
677 return (READ_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_DONE) == HMAC_INTERRUPT_DONE);
678 }
679
690 __STATIC_INLINE void ll_hmac_clear_flag_it_done(hmac_regs_t *HMACx)
691 {
692 CLEAR_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_DONE);
693 }
694
712 __STATIC_INLINE void ll_hmac_set_dma_transfer_block(hmac_regs_t *HMACx, uint32_t block)
713 {
714 MODIFY_REG(HMACx->TRAN_SIZE, HMAC_TRANSIZE, (block << 6) - 1);
715 }
716
727 __STATIC_INLINE uint32_t ll_hmac_get_dma_transfer_block(hmac_regs_t *HMACx)
728 {
729 return ((READ_BITS(HMACx->TRAN_SIZE, HMAC_TRANSIZE) + 1) >> 6);
730 }
731
743 __STATIC_INLINE void ll_hmac_set_dma_read_address(hmac_regs_t *HMACx, uint32_t address)
744 {
745 WRITE_REG(HMACx->RSTART_ADDR, address);
746 }
747
758 __STATIC_INLINE uint32_t ll_hmac_get_dma_read_address(hmac_regs_t *HMACx)
759 {
760 return (READ_REG(HMACx->RSTART_ADDR));
761 }
762
774 __STATIC_INLINE void ll_hmac_set_dma_write_address(hmac_regs_t *HMACx, uint32_t address)
775 {
776 WRITE_REG(HMACx->WSTART_ADDR, address);
777 }
778
789 __STATIC_INLINE uint32_t ll_hmac_get_dma_write_address(hmac_regs_t *HMACx)
790 {
791 return (READ_REG(HMACx->WSTART_ADDR));
792 }
793
811 __STATIC_INLINE void ll_hmac_set_user_hash_255_224(hmac_regs_t *HMACx, uint32_t hash)
812 {
813 WRITE_REG(HMACx->USER_HASH[0], hash);
814 }
815
827 __STATIC_INLINE void ll_hmac_set_user_hash_223_192(hmac_regs_t *HMACx, uint32_t hash)
828 {
829 WRITE_REG(HMACx->USER_HASH[1], hash);
830 }
831
843 __STATIC_INLINE void ll_hmac_set_user_hash_191_160(hmac_regs_t *HMACx, uint32_t hash)
844 {
845 WRITE_REG(HMACx->USER_HASH[2], hash);
846 }
847
859 __STATIC_INLINE void ll_hmac_set_user_hash_159_128(hmac_regs_t *HMACx, uint32_t hash)
860 {
861 WRITE_REG(HMACx->USER_HASH[3], hash);
862 }
863
875 __STATIC_INLINE void ll_hmac_set_user_hash_127_96(hmac_regs_t *HMACx, uint32_t hash)
876 {
877 WRITE_REG(HMACx->USER_HASH[4], hash);
878 }
879
891 __STATIC_INLINE void ll_hmac_set_user_hash_95_64(hmac_regs_t *HMACx, uint32_t hash)
892 {
893 WRITE_REG(HMACx->USER_HASH[5], hash);
894 }
895
907 __STATIC_INLINE void ll_hmac_set_user_hash_63_32(hmac_regs_t *HMACx, uint32_t hash)
908 {
909 WRITE_REG(HMACx->USER_HASH[6], hash);
910 }
911
923 __STATIC_INLINE void ll_hmac_set_user_hash_31_0(hmac_regs_t *HMACx, uint32_t hash)
924 {
925 WRITE_REG(HMACx->USER_HASH[7], hash);
926 }
927
938 __STATIC_INLINE uint32_t ll_hmac_get_data(hmac_regs_t *HMACx)
939 {
940 return (READ_REG(HMACx->FIFO_OUT));
941 }
942
954 __STATIC_INLINE void ll_hmac_set_data(hmac_regs_t *HMACx, uint32_t data)
955 {
956 WRITE_REG(HMACx->MESSAGE_FIFO, data);
957 }
958
970 __STATIC_INLINE void ll_hmac_set_key0(hmac_regs_t *HMACx, uint32_t key)
971 {
972 WRITE_REG(HMACx->KEY[0], key);
973 }
974
986 __STATIC_INLINE void ll_hmac_set_key1(hmac_regs_t *HMACx, uint32_t key)
987 {
988 WRITE_REG(HMACx->KEY[1], key);
989 }
990
1002 __STATIC_INLINE void ll_hmac_set_key2(hmac_regs_t *HMACx, uint32_t key)
1003 {
1004 WRITE_REG(HMACx->KEY[2], key);
1005 }
1006
1018 __STATIC_INLINE void ll_hmac_set_key3(hmac_regs_t *HMACx, uint32_t key)
1019 {
1020 WRITE_REG(HMACx->KEY[3], key);
1021 }
1022
1034 __STATIC_INLINE void ll_hmac_set_key4(hmac_regs_t *HMACx, uint32_t key)
1035 {
1036 WRITE_REG(HMACx->KEY[4], key);
1037 }
1038
1050 __STATIC_INLINE void ll_hmac_set_key5(hmac_regs_t *HMACx, uint32_t key)
1051 {
1052 WRITE_REG(HMACx->KEY[5], key);
1053 }
1054
1066 __STATIC_INLINE void ll_hmac_set_key6(hmac_regs_t *HMACx, uint32_t key)
1067 {
1068 WRITE_REG(HMACx->KEY[6], key);
1069 }
1070
1082 __STATIC_INLINE void ll_hmac_set_key7(hmac_regs_t *HMACx, uint32_t key)
1083 {
1084 WRITE_REG(HMACx->KEY[7], key);
1085 }
1086
1098 __STATIC_INLINE void ll_hmac_set_key_address(hmac_regs_t *HMACx, uint32_t address)
1099 {
1100 WRITE_REG(HMACx->KEY_ADDR, address);
1101 }
1102
1113 __STATIC_INLINE uint32_t ll_hmac_get_key_address(hmac_regs_t *HMACx)
1114 {
1115 return (READ_REG(HMACx->KEY_ADDR));
1116 }
1117
1129 __STATIC_INLINE void ll_hmac_set_key_port_mask(hmac_regs_t *HMACx, uint32_t mask)
1130 {
1131 WRITE_REG(HMACx->KPORT_MASK, mask);
1132 }
1133
1147 error_status_t ll_hmac_deinit(hmac_regs_t *HMACx);
1148
1159 error_status_t ll_hmac_init(hmac_regs_t *HMACx, ll_hmac_init_t *p_hmac_init);
1160
1167 void ll_hmac_struct_init(ll_hmac_init_t *p_hmac_init);
1168
1173 #endif /* HMAC */
1174
1175 #ifdef __cplusplus
1176 }
1177 #endif
1178
1179 #endif /* __GR55XX_LL_HMAC_H__ */
1180
ll_hmac_set_data
__STATIC_INLINE void ll_hmac_set_data(hmac_regs_t *HMACx, uint32_t data)
Send data to calculate.
Definition: gr55xx_ll_hmac.h:954
ll_hmac_set_key_type
__STATIC_INLINE void ll_hmac_set_key_type(hmac_regs_t *HMACx, uint32_t type)
Set ways to obtain HMAC key.
Definition: gr55xx_ll_hmac.h:405
ll_hmac_is_enabled_private
__STATIC_INLINE uint32_t ll_hmac_is_enabled_private(hmac_regs_t *HMACx)
Indicate whether the private mode is enabled.
Definition: gr55xx_ll_hmac.h:513
ll_hmac_enable_read_key
__STATIC_INLINE void ll_hmac_enable_read_key(hmac_regs_t *HMACx)
Enable fetch key through AHB/key port.
Definition: gr55xx_ll_hmac.h:281
ll_hmac_init_t
struct _ll_hmac_init_t ll_hmac_init_t
LL HMAC Init Structure definition.
ll_hmac_set_key_port_mask
__STATIC_INLINE void ll_hmac_set_key_port_mask(hmac_regs_t *HMACx, uint32_t mask)
Set HMAC fetch key port mask.
Definition: gr55xx_ll_hmac.h:1129
ll_hmac_is_action_flag_sha_ready
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_sha_ready(hmac_regs_t *HMACx)
Indicate whether SHA Ready flag is set.
Definition: gr55xx_ll_hmac.h:585
ll_hmac_is_enabled
__STATIC_INLINE uint32_t ll_hmac_is_enabled(hmac_regs_t *HMACx)
Indicate whether the HMAC is enabled.
Definition: gr55xx_ll_hmac.h:221
ll_hmac_set_user_hash_223_192
__STATIC_INLINE void ll_hmac_set_user_hash_223_192(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[223:192].
Definition: gr55xx_ll_hmac.h:827
ll_hmac_clear_flag_it_done
__STATIC_INLINE void ll_hmac_clear_flag_it_done(hmac_regs_t *HMACx)
Clear Done interrupt flag.
Definition: gr55xx_ll_hmac.h:690
ll_hmac_disable_dma_start
__STATIC_INLINE void ll_hmac_disable_dma_start(hmac_regs_t *HMACx)
Disable HMAC DMA mode.
Definition: gr55xx_ll_hmac.h:251
ll_hmac_is_enabled_it_done
__STATIC_INLINE uint32_t ll_hmac_is_enabled_it_done(hmac_regs_t *HMACx)
Indicate whether Done Interrupt is enabled.
Definition: gr55xx_ll_hmac.h:564
ll_hmac_set_key7
__STATIC_INLINE void ll_hmac_set_key7(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key7.
Definition: gr55xx_ll_hmac.h:1082
ll_hmac_disable_sha
__STATIC_INLINE void ll_hmac_disable_sha(hmac_regs_t *HMACx)
Disable SHA mode.
Definition: gr55xx_ll_hmac.h:453
ll_hmac_set_key_address
__STATIC_INLINE void ll_hmac_set_key_address(hmac_regs_t *HMACx, uint32_t address)
Set HMAC key address in memory.
Definition: gr55xx_ll_hmac.h:1098
ll_hmac_is_action_flag_key_valid
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_key_valid(hmac_regs_t *HMACx)
Indicate whether Key Valid flag is set.
Definition: gr55xx_ll_hmac.h:660
ll_hmac_get_dma_write_address
__STATIC_INLINE uint32_t ll_hmac_get_dma_write_address(hmac_regs_t *HMACx)
Get HMAC write address of RAM in DMA mode.
Definition: gr55xx_ll_hmac.h:789
ll_hmac_set_key4
__STATIC_INLINE void ll_hmac_set_key4(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key4.
Definition: gr55xx_ll_hmac.h:1034
ll_hmac_enable
__STATIC_INLINE void ll_hmac_enable(hmac_regs_t *HMACx)
Enable HMAC.
Definition: gr55xx_ll_hmac.h:191
ll_hmac_is_enabled_little_endian
__STATIC_INLINE uint32_t ll_hmac_is_enabled_little_endian(hmac_regs_t *HMACx)
Indicate whether the HMAC is in little endian.
Definition: gr55xx_ll_hmac.h:386
ll_hmac_set_key1
__STATIC_INLINE void ll_hmac_set_key1(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key1.
Definition: gr55xx_ll_hmac.h:986
ll_hmac_enable_user_hash
__STATIC_INLINE void ll_hmac_enable_user_hash(hmac_regs_t *HMACx)
Enable user HASH.
Definition: gr55xx_ll_hmac.h:311
ll_hmac_is_enabled_sha
__STATIC_INLINE uint32_t ll_hmac_is_enabled_sha(hmac_regs_t *HMACx)
Indicate whether the SHA mode is enabled.
Definition: gr55xx_ll_hmac.h:468
ll_hmac_enable_last_transfer
__STATIC_INLINE void ll_hmac_enable_last_transfer(hmac_regs_t *HMACx)
Enable last block transfer in MCU/DMA mode.
Definition: gr55xx_ll_hmac.h:296
ll_hmac_enable_little_endian
__STATIC_INLINE void ll_hmac_enable_little_endian(hmac_regs_t *HMACx)
Enable HMAC in little endian.
Definition: gr55xx_ll_hmac.h:356
ll_hmac_init
error_status_t ll_hmac_init(hmac_regs_t *HMACx, ll_hmac_init_t *p_hmac_init)
Initialize HMAC registers according to the specified parameters in p_hmac_init.
ll_hmac_set_dma_transfer_block
__STATIC_INLINE void ll_hmac_set_dma_transfer_block(hmac_regs_t *HMACx, uint32_t block)
Set HMAC transfer blocks in DMA mode.
Definition: gr55xx_ll_hmac.h:712
ll_hmac_set_user_hash_63_32
__STATIC_INLINE void ll_hmac_set_user_hash_63_32(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[63:32].
Definition: gr55xx_ll_hmac.h:907
ll_hmac_is_enabled_dma_start
__STATIC_INLINE uint32_t ll_hmac_is_enabled_dma_start(hmac_regs_t *HMACx)
Indicate whether the HMAC DMA mode is enabled.
Definition: gr55xx_ll_hmac.h:266
ll_hmac_get_key_type
__STATIC_INLINE uint32_t ll_hmac_get_key_type(hmac_regs_t *HMACx)
Get ways to obtain HMAC key.
Definition: gr55xx_ll_hmac.h:423
ll_hmac_set_user_hash_31_0
__STATIC_INLINE void ll_hmac_set_user_hash_31_0(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[31:0].
Definition: gr55xx_ll_hmac.h:923
ll_hmac_disable_little_endian
__STATIC_INLINE void ll_hmac_disable_little_endian(hmac_regs_t *HMACx)
Disable HMAC in little endian.
Definition: gr55xx_ll_hmac.h:371
ll_hmac_is_action_flag_hmac_ready
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_hmac_ready(hmac_regs_t *HMACx)
Indicate whether HMAC Ready flag is set.
Definition: gr55xx_ll_hmac.h:600
ll_hmac_get_key_address
__STATIC_INLINE uint32_t ll_hmac_get_key_address(hmac_regs_t *HMACx)
Get HMAC key address in memory.
Definition: gr55xx_ll_hmac.h:1113
ll_hmac_is_action_flag_dma_message_done
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_message_done(hmac_regs_t *HMACx)
Indicate whether DMA Transmit Message Done flag is set.
Definition: gr55xx_ll_hmac.h:615
ll_hmac_is_action_flag_dma_error
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_error(hmac_regs_t *HMACx)
Indicate whether DMA Transfer Error flag is set.
Definition: gr55xx_ll_hmac.h:645
ll_hmac_set_key2
__STATIC_INLINE void ll_hmac_set_key2(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key2.
Definition: gr55xx_ll_hmac.h:1002
ll_hmac_enable_private
__STATIC_INLINE void ll_hmac_enable_private(hmac_regs_t *HMACx)
Enable private mode.
Definition: gr55xx_ll_hmac.h:483
ll_hmac_set_key3
__STATIC_INLINE void ll_hmac_set_key3(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key3.
Definition: gr55xx_ll_hmac.h:1018
ll_hmac_set_key5
__STATIC_INLINE void ll_hmac_set_key5(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key5.
Definition: gr55xx_ll_hmac.h:1050
ll_hmac_set_user_hash_191_160
__STATIC_INLINE void ll_hmac_set_user_hash_191_160(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[191:160].
Definition: gr55xx_ll_hmac.h:843
ll_hmac_is_enabled_user_hash
__STATIC_INLINE uint32_t ll_hmac_is_enabled_user_hash(hmac_regs_t *HMACx)
Indicate whether the user HASH is enabled.
Definition: gr55xx_ll_hmac.h:341
ll_hmac_struct_init
void ll_hmac_struct_init(ll_hmac_init_t *p_hmac_init)
Set each field of a ll_hmac_init_t type structure to default value.
ll_hmac_disable
__STATIC_INLINE void ll_hmac_disable(hmac_regs_t *HMACx)
Disable HMAC.
Definition: gr55xx_ll_hmac.h:206
ll_hmac_disable_user_hash
__STATIC_INLINE void ll_hmac_disable_user_hash(hmac_regs_t *HMACx)
Disable user HASH.
Definition: gr55xx_ll_hmac.h:326
ll_hmac_is_action_flag_dma_done
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_done(hmac_regs_t *HMACx)
Indicate whether DMA Transfer Done flag is set.
Definition: gr55xx_ll_hmac.h:630
ll_hmac_is_action_flag_it_done
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_it_done(hmac_regs_t *HMACx)
Indicate whether Done interrupt flag is set.
Definition: gr55xx_ll_hmac.h:675
_ll_hmac_init_t::p_key
uint32_t * p_key
Definition: gr55xx_ll_hmac.h:77
ll_hmac_enable_sha
__STATIC_INLINE void ll_hmac_enable_sha(hmac_regs_t *HMACx)
Enable SHA mode.
Definition: gr55xx_ll_hmac.h:438
ll_hmac_set_key6
__STATIC_INLINE void ll_hmac_set_key6(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key6.
Definition: gr55xx_ll_hmac.h:1066
_ll_hmac_init_t::p_hash
uint32_t * p_hash
Definition: gr55xx_ll_hmac.h:79
ll_hmac_deinit
error_status_t ll_hmac_deinit(hmac_regs_t *HMACx)
De-initialize HMAC registers (Registers restored to their default values).
ll_hmac_enable_it_done
__STATIC_INLINE void ll_hmac_enable_it_done(hmac_regs_t *HMACx)
Enable the done interrupt for HMAC.
Definition: gr55xx_ll_hmac.h:534
ll_hmac_get_data
__STATIC_INLINE uint32_t ll_hmac_get_data(hmac_regs_t *HMACx)
Get abstract from HMAC.
Definition: gr55xx_ll_hmac.h:938
ll_hmac_set_user_hash_255_224
__STATIC_INLINE void ll_hmac_set_user_hash_255_224(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[255:224].
Definition: gr55xx_ll_hmac.h:811
ll_hmac_set_dma_write_address
__STATIC_INLINE void ll_hmac_set_dma_write_address(hmac_regs_t *HMACx, uint32_t address)
Set HMAC write address of RAM in DMA mode.
Definition: gr55xx_ll_hmac.h:774
_ll_hmac_init_t
LL HMAC Init Structure definition.
Definition: gr55xx_ll_hmac.h:76
ll_hmac_set_user_hash_95_64
__STATIC_INLINE void ll_hmac_set_user_hash_95_64(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[95:64].
Definition: gr55xx_ll_hmac.h:891
ll_hmac_disable_private
__STATIC_INLINE void ll_hmac_disable_private(hmac_regs_t *HMACx)
Disable private mode.
Definition: gr55xx_ll_hmac.h:498
ll_hmac_set_user_hash_127_96
__STATIC_INLINE void ll_hmac_set_user_hash_127_96(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[127:96].
Definition: gr55xx_ll_hmac.h:875
ll_hmac_set_user_hash_159_128
__STATIC_INLINE void ll_hmac_set_user_hash_159_128(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[159:128].
Definition: gr55xx_ll_hmac.h:859
ll_hmac_set_key0
__STATIC_INLINE void ll_hmac_set_key0(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key0.
Definition: gr55xx_ll_hmac.h:970
ll_hmac_disable_it_done
__STATIC_INLINE void ll_hmac_disable_it_done(hmac_regs_t *HMACx)
Disable the done interrupt for HMAC.
Definition: gr55xx_ll_hmac.h:549
ll_hmac_set_dma_read_address
__STATIC_INLINE void ll_hmac_set_dma_read_address(hmac_regs_t *HMACx, uint32_t address)
Set HMAC read address of RAM in DMA mode.
Definition: gr55xx_ll_hmac.h:743
ll_hmac_enable_dma_start
__STATIC_INLINE void ll_hmac_enable_dma_start(hmac_regs_t *HMACx)
Enable HMAC DMA mode.
Definition: gr55xx_ll_hmac.h:236
ll_hmac_get_dma_transfer_block
__STATIC_INLINE uint32_t ll_hmac_get_dma_transfer_block(hmac_regs_t *HMACx)
Get HMAC transfer blocks in DMA mode.
Definition: gr55xx_ll_hmac.h:727
ll_hmac_get_dma_read_address
__STATIC_INLINE uint32_t ll_hmac_get_dma_read_address(hmac_regs_t *HMACx)
Get HMAC read address of RAM in DMA mode.
Definition: gr55xx_ll_hmac.h:758