gr55xx_ll_adc.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_adc.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of ADC LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_ADC ADC
47 * @brief ADC LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55XX_LL_ADC_H__
53 #define __GR55XX_LL_ADC_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx.h"
61
62 #if defined(AON)
63
64 /** @defgroup LL_ADC_STRUCTURES Structures
65 * @{
66 */
67
68 /* Exported types ------------------------------------------------------------*/
69 /** @defgroup LL_ADC_ES_INIT ADC Exported init structures
70 * @{
71 */
72
73 /**
74 * @brief LL ADC init Structure definition
75 */
76 typedef struct _ll_adc_init
77 {
78 uint32_t channel_p; /**< Specifies the input source to ADC channel P.
79 This parameter can be any value of @ref LL_ADC_EC_INPUT_SRC.
80
81 This parament can be modified afterwards using unitary function @ref ll_adc_set_channelp(). */
82
83 uint32_t channel_n; /**< Specifies the input source to ADC channel N.
84 This parameter can be any value of @ref LL_ADC_EC_INPUT_SRC.
85
86 This parament can be modified afterwards using unitary function @ref ll_adc_set_channeln(). */
87
88 uint32_t input_mode; /**< Specifies the operation mode for the ADC sample.
89 This parameter can be a value of @ref LL_ADC_EC_INPUT_MODE.
90
91 This parament can be modified afterwards using unitary function @ref ll_adc_set_input_mode(). */
92
93 uint32_t ref_source; /**< Specifies the source of the ADC reference.
94 This parameter can be a value of @ref LL_ADC_EC_REFERENCE_SRC.
95
96 This parament can be modified afterwards using unitary function @ref ll_adc_set_ref().*/
97
98 uint32_t ref_value; /*!< Specifies the value of the ADC buffered reference.
99 This parameter can be a value of @ref LL_ADC_EC_REFERENCE.
100
101 This parament can be modified afterwards using unitary function @ref ll_adc_set_ref_value().*/
102
103 uint32_t clock; /**< Specifies the clock of ADC.
104 This parameter can be a value of @ref LL_ADC_EC_CLK.
105
106 This parament can be modified afterwards using unitary function @ref ll_adc_set_clock().*/
107
108 } ll_adc_init_t;
109
110 /** @} */
111
112 /** @} */
113
114 /**
115 * @defgroup LL_ADC_MACRO Defines
116 * @{
117 */
118
119 /* Exported constants --------------------------------------------------------*/
120 /** @defgroup LL_ADC_Exported_Constants ADC Exported Constants
121 * @{
122 */
123
124 /** @defgroup LL_ADC_EC_CLK ADC CLOCK
125 * @{
126 */
127 #define LL_ADC_CLK_16 (0x00000000UL) /**< 16 MHz */
128 #define LL_ADC_CLK_8 (1UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 8 MHz */
129 #define LL_ADC_CLK_4 (2UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 4 MHz */
130 #define LL_ADC_CLK_2 (3UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 2 MHz */
131 #define LL_ADC_CLK_1P6 (4UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 1.6 MHz */
132 #define LL_ADC_CLK_1 (5UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 1 MHz */
133 /** @} */
134
135 /** @defgroup LL_ADC_EC_REFERENCE ADC Buffered Internal Reference Value
136 * @{
137 */
138 #define LL_ADC_REF_VALUE_0P8 (0x3UL << AON_SNSADC_CFG_REF_VALUE_Pos) /**< Reference = 0.85 V */
139 #define LL_ADC_REF_VALUE_1P2 (0x7UL << AON_SNSADC_CFG_REF_VALUE_Pos) /**< Reference = 1.28 V */
140 #define LL_ADC_REF_VALUE_1P6 (0xAUL << AON_SNSADC_CFG_REF_VALUE_Pos) /**< Reference = 1.60 V */
141 //#define LL_ADC_REF_VALUE_2P0 (0xFUL << AON_SNSADC_CFG_REF_VALUE_Pos) /**< Reference = 2.00 V */
142 /** @} */
143
144 /** @defgroup LL_ADC_EC_INPUT_MODE ADC Input Mode
145 * @{
146 */
147 #define LL_ADC_INPUT_SINGLE (1UL << AON_SNSADC_CFG_SINGLE_EN_Pos) /**< Single ended mode */
148 #define LL_ADC_INPUT_DIFFERENTIAL (0x00000000UL) /**< Differential mode */
149 /** @} */
150
151 /** @defgroup LL_ADC_EC_INPUT_SRC ADC Input Source
152 * @{
153 */
154 #define LL_ADC_INPUT_SRC_IO0 (0UL) /**< Select MSIO0 as input */
155 #define LL_ADC_INPUT_SRC_IO1 (1UL) /**< Select MSIO1 as input */
156 #define LL_ADC_INPUT_SRC_IO2 (2UL) /**< Select MSIO2 as input */
157 #define LL_ADC_INPUT_SRC_IO3 (3UL) /**< Select MSIO3 as input */
158 #define LL_ADC_INPUT_SRC_IO4 (4UL) /**< Select MSIO4 as input */
159 #define LL_ADC_INPUT_SRC_TMP (5UL) /**< Select temperature as input */
160 #define LL_ADC_INPUT_SRC_BAT (6UL) /**< Select Vbattery as input */
161 #define LL_ADC_INPUT_SRC_REF (7UL) /**< Select reference as input */
162
163 /** @} */
164
165 /** @defgroup LL_ADC_EC_REFERENCE_SRC ADC Reference Source
166 * @{
167 */
168 #define LL_ADC_REF_SRC_BUF_INT (0x00000000UL) /**< Select buffered internal reference as reference */
169 #define LL_ADC_REF_SRC_IO0 (3UL << AON_SNSADC_CFG_REF_SEL_Pos) /**< Select MSIO0 as reference */
170 #define LL_ADC_REF_SRC_IO1 (4UL << AON_SNSADC_CFG_REF_SEL_Pos) /**< Select MSIO1 as reference */
171 #define LL_ADC_REF_SRC_IO2 (5UL << AON_SNSADC_CFG_REF_SEL_Pos) /**< Select MSIO2 as reference */
172 #define LL_ADC_REF_SRC_IO3 (6UL << AON_SNSADC_CFG_REF_SEL_Pos) /**< Select MSIO3 as reference */
173 /** @} */
174
175 /** @} */
176
177 /* Exported macro ------------------------------------------------------------*/
178 /** @defgroup LL_ADC_Exported_Macros ADC Exported Macros
179 * @{
180 */
181
182 /** @defgroup LL_ADC_EM_WRITE_READ Common Write and read registers Macros
183 * @{
184 */
185
186 /**
187 * @brief Write a value in ADC register
188 * @param __instance__ ADC instance
189 * @param __REG__ Register to be written
190 * @param __VALUE__ Value to be written in the register
191 * @retval None
192 */
193 #define LL_ADC_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG((__instance__)->__REG__, (__VALUE__))
194
195 /**
196 * @brief Read a value in ADC register
197 * @param __instance__ ADC instance
198 * @param __REG__ Register to be read
199 * @retval Register value
200 */
201 #define LL_ADC_ReadReg(__instance__, __REG__) READ_REG((__instance__)->__REG__)
202
203 /** @} */
204
205 /** @} */
206
207 /* Private types -------------------------------------------------------------*/
208 /* Private variables ---------------------------------------------------------*/
209 /* Private constants ---------------------------------------------------------*/
210 /* Private macros ------------------------------------------------------------*/
211 /** @defgroup LL_ADC_Private_Macros ADC Private Macros
212 * @{
213 */
214
215 /** @defgroup LL_ADC_EC_DEFAULT_CONFIG InitStruct default configuartion
216 * @{
217 */
218
219 /**
220 * @brief LL ADC InitStrcut default configuartion
221 */
222 #define LL_ADC_DEFAULT_CONFIG \
223 { \
224 .channel_p = LL_ADC_INPUT_SRC_IO0, \
225 .channel_n = LL_ADC_INPUT_SRC_IO1, \
226 .input_mode = LL_ADC_INPUT_DIFFERENTIAL, \
227 .ref_source = LL_ADC_REF_SRC_BUF_INT, \
228 .ref_value = LL_ADC_REF_VALUE_1P5, \
229 .clock = LL_ADC_CLK_16 \
230 }
231 /** @} */
232
233 /** @} */
234
235 /** @} */
236
237 /* Exported functions --------------------------------------------------------*/
238 /** @defgroup LL_ADC_DRIVER_FUNCTIONS Functions
239 * @{
240 */
241
242 /** @defgroup LL_ADC_EF_Configuration Basic Configuration
243 * @{
244 */
245
246 /**
247 * @brief Enable ADC module.
248 *
249 * Register|BitsName
250 * --------|--------
251 * SNSADC_CFG | REG4
252 *
253 * @retval None
254 */
255 __STATIC_INLINE void ll_adc_enable(void)
256 {
257 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_EN_Msk);
258 }
259
260 /**
261 * @brief Disable ADC module.
262 *
263 * Register|BitsName
264 * --------|--------
265 * SNSADC_CFG | REG4
266 *
267 * @retval None
268 */
269 __STATIC_INLINE void ll_adc_disable(void)
270 {
271 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_EN_Msk);
272 }
273
274 /**
275 * @brief Check if ADC module is enabled.
276 *
277 * Register|BitsName
278 * --------|--------
279 * SNSADC_CFG | REG4
280 *
281 * @retval State of bit (1 or 0).
282 */
283 __STATIC_INLINE uint32_t ll_adc_is_enabled(void)
284 {
285 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_EN_Msk) == (AON_SNSADC_CFG_EN_Msk));
286 }
287
288 /**
289 * @brief Enable ADC clock.
290 *
291 * Register|BitsName
292 * --------|--------
293 * MSIO_PAD_CFG_1 | ADC_CLK_EN
294 *
295 * @retval None
296 */
297 __STATIC_INLINE void ll_adc_enable_clock(void)
298 {
299 GLOBAL_EXCEPTION_DISABLE();
300 SET_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_EN);
301 GLOBAL_EXCEPTION_ENABLE();
302 }
303
304 /**
305 * @brief Disable ADC clock.
306 *
307 * Register|BitsName
308 * --------|--------
309 * MSIO_PAD_CFG_1 | ADC_CLK_EN
310 *
311 * @retval None
312 */
313 __STATIC_INLINE void ll_adc_disable_clock(void)
314 {
315 GLOBAL_EXCEPTION_DISABLE();
316 CLEAR_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_EN);
317 GLOBAL_EXCEPTION_ENABLE();
318 }
319
320 /**
321 * @brief Check if ADC clock is enabled.
322 *
323 * Register|BitsName
324 * --------|--------
325 * MSIO_PAD_CFG_1 | ADC_CLK_EN
326 *
327 * @retval State of bit (1 or 0).
328 */
329 __STATIC_INLINE uint32_t ll_adc_is_enabled_clock(void)
330 {
331 return (READ_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_EN) == (AON_MSIO_PAD_CFG_1_ADC_CLK_EN));
332 }
333
334 /**
335 * @brief Set ADC clock source.
336 *
337 * Register|BitsName
338 * --------|--------
339 * MSIO_PAD_CFG_1 | ADC_CLK_SEL
340 *
341 * @param clk This parameter can be one of the following values:
342 * @arg @ref LL_ADC_CLK_16
343 * @arg @ref LL_ADC_CLK_8
344 * @arg @ref LL_ADC_CLK_4
345 * @arg @ref LL_ADC_CLK_2
346 * @arg @ref LL_ADC_CLK_1P6
347 * @arg @ref LL_ADC_CLK_1
348 * @retval None
349 */
350 __STATIC_INLINE void ll_adc_set_clock(uint32_t clk)
351 {
352 GLOBAL_EXCEPTION_DISABLE();
353 MODIFY_REG(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_SEL, clk);
354 GLOBAL_EXCEPTION_ENABLE();
355 }
356
357 /**
358 * @brief Return source for ADC clock.
359 *
360 * Register|BitsName
361 * --------|--------
362 * MSIO_PAD_CFG_1 | ADC_CLK_SEL
363 *
364 * @retval Returned value can be one of the following values:
365 * @arg @ref LL_ADC_CLK_16
366 * @arg @ref LL_ADC_CLK_8
367 * @arg @ref LL_ADC_CLK_4
368 * @arg @ref LL_ADC_CLK_2
369 * @arg @ref LL_ADC_CLK_1P6
370 * @arg @ref LL_ADC_CLK_1
371 */
372 __STATIC_INLINE uint32_t ll_adc_get_clock(void)
373 {
374 return (uint32_t)(READ_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_SEL) >> AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos);
375 }
376
377 /**
378 * @brief Set ADC bias reference.
379 *
380 * Register|BitsName
381 * --------|--------
382 * SNSADC_CFG | REG1
383 *
384 * @param value This parameter can be one of the following values:
385 * @arg @ref LL_ADC_REF_VALUE_0P8
386 * @arg @ref LL_ADC_REF_VALUE_1P2
387 * @arg @ref LL_ADC_REF_VALUE_1P6
388 * @retval None
389 */
390 __STATIC_INLINE void ll_adc_set_ref_value(uint32_t value)
391 {
392 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_VALUE_Msk, value);
393 }
394
395 /**
396 * @brief Return ADC bias reference.
397 *
398 * Register|BitsName
399 * --------|--------
400 * SNSADC_CFG | REG1
401 *
402 * @retval Returned value can be one of the following values:
403 * @arg @ref LL_ADC_REF_VALUE_0P8
404 * @arg @ref LL_ADC_REF_VALUE_1P2
405 * @arg @ref LL_ADC_REF_VALUE_1P6
406 */
407 __STATIC_INLINE uint32_t ll_adc_get_ref_value(void)
408 {
409 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_VALUE_Msk) >> AON_SNSADC_CFG_REF_VALUE_Pos);
410 }
411
412 /**
413 * @brief Enable temperature sensor.
414 *
415 * Register|BitsName
416 * --------|--------
417 * SNSADC_CFG | REG2
418 *
419 * @retval None
420 */
421 __STATIC_INLINE void ll_adc_enable_temp(void)
422 {
423 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_TEMP_EN_Msk);
424 }
425
426 /**
427 * @brief Disable temperature sensor.
428 *
429 * Register|BitsName
430 * --------|--------
431 * SNSADC_CFG | REG2
432 *
433 * @retval None
434 */
435 __STATIC_INLINE void ll_adc_disable_temp(void)
436 {
437 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_TEMP_EN_Msk);
438 }
439
440 /**
441 * @brief Check if temperature sensor is enabled.
442 *
443 * Register|BitsName
444 * --------|--------
445 * SNSADC_CFG | REG2
446 *
447 * @retval State of bit (1 or 0).
448 */
449 __STATIC_INLINE uint32_t ll_adc_is_enabled_temp(void)
450 {
451 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_TEMP_EN_Msk) == (AON_SNSADC_CFG_TEMP_EN_Msk));
452 }
453
454 /**
455 * @brief Enable Vbattery sensor.
456 *
457 * Register|BitsName
458 * --------|--------
459 * SNSADC_CFG | REG2
460 *
461 * @retval None
462 */
463 __STATIC_INLINE void ll_adc_enable_vbat(void)
464 {
465 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_VBAT_EN_Msk);
466 }
467
468 /**
469 * @brief Disable Vbattery sensor.
470 *
471 * Register|BitsName
472 * --------|--------
473 * SNSADC_CFG | REG2
474 *
475 * @retval None
476 */
477 __STATIC_INLINE void ll_adc_disable_vbat(void)
478 {
479 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_VBAT_EN_Msk);
480 }
481
482 /**
483 * @brief Check if Vbattery sensor is enabled.
484 *
485 * Register|BitsName
486 * --------|--------
487 * SNSADC_CFG | REG2
488 *
489 * @retval State of bit (1 or 0).
490 */
491 __STATIC_INLINE uint32_t ll_adc_is_enabled_vbat(void)
492 {
493 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_VBAT_EN_Msk) == (AON_SNSADC_CFG_VBAT_EN_Msk));
494 }
495
496 /**
497 * @brief Set ADC input mode.
498 *
499 * Register|BitsName
500 * --------|--------
501 * SNSADC_CFG | REG2
502 *
503 * @param mode This parameter can be one of the following values:
504 * @arg @ref LL_ADC_INPUT_SINGLE
505 * @arg @ref LL_ADC_INPUT_DIFFERENTIAL
506 * @retval None
507 */
508 __STATIC_INLINE void ll_adc_set_input_mode(uint32_t mode)
509 {
510 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_SINGLE_EN_Msk, mode);
511 }
512
513 /**
514 * @brief Return ADC input mode.
515 *
516 * Register|BitsName
517 * --------|--------
518 * SNSADC_CFG | REG2
519 *
520 * @retval Returned value can be one of the following values:
521 * @arg @ref LL_ADC_INPUT_SINGLE
522 * @arg @ref LL_ADC_INPUT_DIFFERENTIAL
523 */
524 __STATIC_INLINE uint32_t ll_adc_get_input_mode(void)
525 {
526 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_SINGLE_EN_Msk) >> AON_SNSADC_CFG_SINGLE_EN_Pos);
527 }
528
529 /**
530 * @brief Enable offset calibration.
531 * @note Enable offset calibration, used to swap inputs of comparator for offset
532 * calibration.
533 *
534 * Register|BitsName
535 * --------|--------
536 * SNSADC_CFG | REG2
537 *
538 * @retval None
539 */
540 __STATIC_INLINE void ll_adc_enable_ofs_cal(void)
541 {
542 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_OFS_CAL_EN_Msk);
543 }
544
545 /**
546 * @brief Disable offset calibration.
547 *
548 * Register|BitsName
549 * --------|--------
550 * SNSADC_CFG | REG2
551 *
552 * @retval None
553 */
554 __STATIC_INLINE void ll_adc_disable_ofs_cal(void)
555 {
556 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_OFS_CAL_EN_Msk);
557 }
558
559 /**
560 * @brief Check if offset calibration is enabled.
561 *
562 * Register|BitsName
563 * --------|--------
564 * SNSADC_CFG | REG2
565 *
566 * @retval State of bit (1 or 0).
567 */
568 __STATIC_INLINE uint32_t ll_adc_is_enabled_ofs_cal(void)
569 {
570 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_OFS_CAL_EN_Msk) == (AON_SNSADC_CFG_OFS_CAL_EN_Msk));
571 }
572
573 /**
574 * @brief Set dynamic rang of ADC.
575 * @note When higher input signal frequencies close to Nyquist rate, you should set 1.
576 *
577 * Register|BitsName
578 * --------|--------
579 * SNSADC_CFG | REG2
580 *
581 * @param rang This parameter can be a value between: 1 ~ 7
582 * @retval None
583 */
584 __STATIC_INLINE void ll_adc_set_dynamic_rang(uint32_t rang)
585 {
586 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_DYMAMIC_Msk, (rang & 0x7) << AON_SNSADC_CFG_DYMAMIC_Pos);
587 }
588
589 /**
590 * @brief Return ADC dynamic rang.
591 *
592 * Register|BitsName
593 * --------|--------
594 * SNSADC_CFG | REG2
595 *
596 * @retval Returned value can be a value between: 1 ~ 7
597 */
598 __STATIC_INLINE uint32_t ll_adc_get_dynamic_rang(void)
599 {
600 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_DYMAMIC_Msk) >> AON_SNSADC_CFG_DYMAMIC_Pos);
601 }
602
603 /**
604 * @brief Set source of ADC input channelP.
605 *
606 * Register|BitsName
607 * --------|--------
608 * SNSADC_CFG | REG3
609 *
610 * @param source This parameter can be one of the following values:
611 * @arg @ref LL_ADC_INPUT_SRC_IO0
612 * @arg @ref LL_ADC_INPUT_SRC_IO1
613 * @arg @ref LL_ADC_INPUT_SRC_IO2
614 * @arg @ref LL_ADC_INPUT_SRC_IO3
615 * @arg @ref LL_ADC_INPUT_SRC_IO4
616 * @arg @ref LL_ADC_INPUT_SRC_TMP
617 * @arg @ref LL_ADC_INPUT_SRC_BAT
618 * @retval None
619 */
620 __STATIC_INLINE void ll_adc_set_channelp(uint32_t source)
621 {
622 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_P_Msk, source << AON_SNSADC_CFG_CHN_P_Pos);
623 }
624
625 /**
626 * @brief Return source of ADC input channelP.
627 *
628 * Register|BitsName
629 * --------|--------
630 * SNSADC_CFG | REG3
631 *
632 * @retval Returned value can be one of the following values:
633 * @arg @ref LL_ADC_INPUT_SRC_IO0
634 * @arg @ref LL_ADC_INPUT_SRC_IO1
635 * @arg @ref LL_ADC_INPUT_SRC_IO2
636 * @arg @ref LL_ADC_INPUT_SRC_IO3
637 * @arg @ref LL_ADC_INPUT_SRC_IO4
638 * @arg @ref LL_ADC_INPUT_SRC_TMP
639 * @arg @ref LL_ADC_INPUT_SRC_BAT
640 */
641 __STATIC_INLINE uint32_t ll_adc_get_channelp(void)
642 {
643 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_P_Msk) >> AON_SNSADC_CFG_CHN_P_Pos);
644 }
645
646 /**
647 * @brief Set source of ADC input channelN.
648 *
649 * Register|BitsName
650 * --------|--------
651 * SNSADC_CFG | REG3
652 *
653 * @param source This parameter can be one of the following values:
654 * @arg @ref LL_ADC_INPUT_SRC_IO0
655 * @arg @ref LL_ADC_INPUT_SRC_IO1
656 * @arg @ref LL_ADC_INPUT_SRC_IO2
657 * @arg @ref LL_ADC_INPUT_SRC_IO3
658 * @arg @ref LL_ADC_INPUT_SRC_IO4
659 * @arg @ref LL_ADC_INPUT_SRC_TMP
660 * @arg @ref LL_ADC_INPUT_SRC_BAT
661 * @retval None
662 */
663 __STATIC_INLINE void ll_adc_set_channeln(uint32_t source)
664 {
665 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_N_Msk, source << AON_SNSADC_CFG_CHN_N_Pos);
666 }
667
668 /**
669 * @brief Return source of ADC input channelN.
670 *
671 * Register|BitsName
672 * --------|--------
673 * SNSADC_CFG | REG3
674 *
675 * @retval Returned value can be one of the following values:
676 * @arg @ref LL_ADC_INPUT_SRC_IO0
677 * @arg @ref LL_ADC_INPUT_SRC_IO1
678 * @arg @ref LL_ADC_INPUT_SRC_IO2
679 * @arg @ref LL_ADC_INPUT_SRC_IO3
680 * @arg @ref LL_ADC_INPUT_SRC_IO4
681 * @arg @ref LL_ADC_INPUT_SRC_TMP
682 * @arg @ref LL_ADC_INPUT_SRC_BAT
683 */
684 __STATIC_INLINE uint32_t ll_adc_get_channeln(void)
685 {
686 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_N_Msk) >> AON_SNSADC_CFG_CHN_N_Pos);
687 }
688
689 /**
690 * @brief Enable ADC MAS_RST.
691 *
692 * Register|BitsName
693 * --------|--------
694 * SNSADC_CFG | REG4
695 *
696 * @retval None
697 */
698 __STATIC_INLINE void ll_adc_enable_mas_rst(void)
699 {
700 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_MAS_RST_Msk);
701 }
702
703 /**
704 * @brief Disable ADC MAS_RST.
705 *
706 * Register|BitsName
707 * --------|--------
708 * SNSADC_CFG | REG4
709 *
710 * @retval None
711 */
712 __STATIC_INLINE void ll_adc_disable_mas_rst(void)
713 {
714 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_MAS_RST_Msk);
715 }
716
717 /**
718 * @brief Check if ADC MAS_RST is enabled.
719 *
720 * Register|BitsName
721 * --------|--------
722 * SNSADC_CFG | REG4
723 *
724 * @retval State of bit (1 or 0).
725 */
726 __STATIC_INLINE uint32_t ll_adc_is_enabled_mas_rst(void)
727 {
728 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_MAS_RST_Msk) == (AON_SNSADC_CFG_MAS_RST_Msk));
729 }
730
731 /**
732 * @brief Set source of ADC reference.
733 *
734 * Register|BitsName
735 * --------|--------
736 * SNSADC_CFG | REG4
737 *
738 * @param source This parameter can be one of the following values:
739 * @arg @ref LL_ADC_REF_SRC_BUF_INT
740 * @arg @ref LL_ADC_REF_SRC_IO0
741 * @arg @ref LL_ADC_REF_SRC_IO1
742 * @arg @ref LL_ADC_REF_SRC_IO2
743 * @arg @ref LL_ADC_REF_SRC_IO3
744 * @retval None
745 */
746 __STATIC_INLINE void ll_adc_set_ref(uint32_t source)
747 {
748 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_SEL_Msk, source);
749 }
750
751 /**
752 * @brief Return source of ADC reference.
753 *
754 * Register|BitsName
755 * --------|--------
756 * SNSADC_CFG | REG4
757 *
758 * @retval Returned value can be one of the following values:
759 * @arg @ref LL_ADC_REF_SRC_BUF_INT
760 * @arg @ref LL_ADC_REF_SRC_IO0
761 * @arg @ref LL_ADC_REF_SRC_IO1
762 * @arg @ref LL_ADC_REF_SRC_IO2
763 * @arg @ref LL_ADC_REF_SRC_IO3
764 */
765 __STATIC_INLINE uint32_t ll_adc_get_ref(void)
766 {
767 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_SEL_Msk) >> AON_SNSADC_CFG_REF_SEL_Pos);
768 }
769
770 /**
771 * @brief Set current of ADC reference circuit.
772 * @note When samples at 100kbps, you should set 0.
773 * When samples at 1mbps, you should set 7.
774 *
775 * Register|BitsName
776 * --------|--------
777 * SNSADC_CFG | REG4
778 *
779 * @param source This parameter can be a value between: 0 ~ 7
780 * @retval None
781 */
782 __STATIC_INLINE void ll_adc_set_ref_current(uint32_t source)
783 {
784 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_HP_Msk, (source & 0x7) << AON_SNSADC_CFG_REF_HP_Pos);
785 }
786
787 /**
788 * @brief Return current of ADC reference circuit.
789 *
790 * Register|BitsName
791 * --------|--------
792 * SNSADC_CFG | REG4
793 *
794 * @retval Returned value can be a value between: 0 ~ 7
795 */
796 __STATIC_INLINE uint32_t ll_adc_get_ref_current(void)
797 {
798 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_HP_Msk) >> AON_SNSADC_CFG_REF_HP_Pos);
799 }
800
801 /** @} */
802
803 /** @defgroup LL_ADC_EF_FIFO_Access FIFO Access
804 * @{
805 */
806
807 /**
808 * @brief Return samples value of ADC by reading FIFO.
809 * @note There are two value in the register, both of them is 16bits.
810 *
811 * Register|BitsName
812 * --------|--------
813 * SENSE_ADC_FIFO | SENSE_ADC_FIFO
814 *
815 * @retval Smaples value of input
816 */
817 __STATIC_INLINE uint32_t ll_adc_read_fifo(void)
818 {
819 return (uint32_t)(READ_REG(MCU_SUB->SENSE_ADC_FIFO));
820 }
821
822 /**
823 * @brief Set threshold of ADC FIFO.
824 *
825 * Register|BitsName
826 * --------|--------
827 * SENSE_FF_THRESH | SENSE_FF_THRESH
828 *
829 * @param thresh This parameter can be a value between: 0 ~ 64
830 * @retval None
831 */
832 __STATIC_INLINE void ll_adc_set_thresh(uint32_t thresh)
833 {
834 MODIFY_REG(MCU_SUB->SENSE_FF_THRESH, MCU_SUB_SNSADC_FF_THRESH, (thresh & 0x3F) << MCU_SUB_SNSADC_FF_THRESH_Pos);
835 }
836
837 /**
838 * @brief Return threshold of ADC FIFO.
839 *
840 * Register|BitsName
841 * --------|--------
842 * SENSE_FF_THRESH | SENSE_FF_THRESH
843 *
844 * @retval Returned value can be a value between: 0 ~ 64
845 */
846 __STATIC_INLINE uint32_t ll_adc_get_thresh(void)
847 {
848 return (uint32_t)(READ_BITS(MCU_SUB->SENSE_FF_THRESH, MCU_SUB_SNSADC_FF_THRESH) >> MCU_SUB_SNSADC_FF_THRESH_Pos);
849 }
850
851 /**
852 * @brief Check if ADC FIFO is not empty.
853 *
854 * Register|BitsName
855 * --------|--------
856 * SENSE_ADC_STAT | VAL
857 *
858 * @retval State of bit (1 or 0).
859 */
860 __STATIC_INLINE uint32_t ll_adc_is_fifo_notempty(void)
861 {
862 return (uint32_t)(READ_BITS(MCU_SUB->SENSE_ADC_STAT, MCU_SUB_SNSADC_STAT_VAL) == MCU_SUB_SNSADC_STAT_VAL);
863 }
864
865 /**
866 * @brief Return count of ADC FIFO.
867 *
868 * Register|BitsName
869 * --------|--------
870 * SENSE_ADC_STAT | FF_COUNT
871 *
872 * @retval Returned value can be a value between: 0 ~ 64
873 */
874 __STATIC_INLINE uint32_t ll_adc_get_fifo_count(void)
875 {
876 return (uint32_t)(READ_BITS(MCU_SUB->SENSE_ADC_STAT, MCU_SUB_SNSADC_STAT_FF_COUNT) >> MCU_SUB_SNSADC_STAT_FF_COUNT_Pos);
877 }
878
879 /** @} */
880
881 /** @defgroup LL_ADC_EF_Init Initialization and de-initialization functions
882 * @{
883 */
884
885 /**
886 * @brief De-initialize ADC registers (Registers restored to their default values).
887 * @retval An error_status_t enumeration value:
888 * - SUCCESS: ADC registers are de-initialized
889 * - ERROR: ADC registers are not de-initialized
890 */
891 error_status_t ll_adc_deinit(void);
892
893 /**
894 * @brief Initialize ADC registers according to the specified.
895 * parameters in p_adc_init.
896 * @param p_adc_init Pointer to a ll_adc_init_t structure that contains the configuration
897 * information for the specified ADC peripheral.
898 * @retval An error_status_t enumeration value:
899 * - SUCCESS: ADC registers are initialized according to p_adc_init content
900 * - ERROR: Problem occurred during ADC Registers initialization
901 */
902 error_status_t ll_adc_init(ll_adc_init_t *p_adc_init);
903
904 /**
905 * @brief Set each field of a @ref ll_adc_init_t type structure to default value.
906 * @param p_adc_init Pointer to a @ref ll_adc_init_t structure
907 * whose fields will be set to default values.
908 * @retval None
909 */
910 void ll_adc_struct_init(ll_adc_init_t *p_adc_init);
911
912 /** @} */
913
914 /** @} */
915
916 #endif /* AON */
917
918 #ifdef __cplusplus
919 }
920 #endif
921
922 #endif /* __GR55XX_LL_ADC_H__ */
923
924 /** @} */
925
926 /** @} */
927
928 /** @} */
ll_adc_enable_mas_rst
__STATIC_INLINE void ll_adc_enable_mas_rst(void)
Enable ADC MAS_RST.
Definition: gr55xx_ll_adc.h:698
ll_adc_enable
__STATIC_INLINE void ll_adc_enable(void)
Enable ADC module.
Definition: gr55xx_ll_adc.h:255
ll_adc_deinit
error_status_t ll_adc_deinit(void)
De-initialize ADC registers (Registers restored to their default values).
ll_adc_is_enabled_vbat
__STATIC_INLINE uint32_t ll_adc_is_enabled_vbat(void)
Check if Vbattery sensor is enabled.
Definition: gr55xx_ll_adc.h:491
ll_adc_is_enabled_temp
__STATIC_INLINE uint32_t ll_adc_is_enabled_temp(void)
Check if temperature sensor is enabled.
Definition: gr55xx_ll_adc.h:449
ll_adc_disable_vbat
__STATIC_INLINE void ll_adc_disable_vbat(void)
Disable Vbattery sensor.
Definition: gr55xx_ll_adc.h:477
_ll_adc_init::channel_p
uint32_t channel_p
Specifies the input source to ADC channel P.
Definition: gr55xx_ll_adc.h:78
ll_adc_get_fifo_count
__STATIC_INLINE uint32_t ll_adc_get_fifo_count(void)
Return count of ADC FIFO.
Definition: gr55xx_ll_adc.h:874
ll_adc_enable_clock
__STATIC_INLINE void ll_adc_enable_clock(void)
Enable ADC clock.
Definition: gr55xx_ll_adc.h:297
ll_adc_get_clock
__STATIC_INLINE uint32_t ll_adc_get_clock(void)
Return source for ADC clock.
Definition: gr55xx_ll_adc.h:372
ll_adc_get_thresh
__STATIC_INLINE uint32_t ll_adc_get_thresh(void)
Return threshold of ADC FIFO.
Definition: gr55xx_ll_adc.h:846
ll_adc_set_thresh
__STATIC_INLINE void ll_adc_set_thresh(uint32_t thresh)
Set threshold of ADC FIFO.
Definition: gr55xx_ll_adc.h:832
ll_adc_is_enabled_ofs_cal
__STATIC_INLINE uint32_t ll_adc_is_enabled_ofs_cal(void)
Check if offset calibration is enabled.
Definition: gr55xx_ll_adc.h:568
ll_adc_get_ref_value
__STATIC_INLINE uint32_t ll_adc_get_ref_value(void)
Return ADC bias reference.
Definition: gr55xx_ll_adc.h:407
ll_adc_get_channelp
__STATIC_INLINE uint32_t ll_adc_get_channelp(void)
Return source of ADC input channelP.
Definition: gr55xx_ll_adc.h:641
ll_adc_is_enabled
__STATIC_INLINE uint32_t ll_adc_is_enabled(void)
Check if ADC module is enabled.
Definition: gr55xx_ll_adc.h:283
ll_adc_is_enabled_clock
__STATIC_INLINE uint32_t ll_adc_is_enabled_clock(void)
Check if ADC clock is enabled.
Definition: gr55xx_ll_adc.h:329
ll_adc_get_input_mode
__STATIC_INLINE uint32_t ll_adc_get_input_mode(void)
Return ADC input mode.
Definition: gr55xx_ll_adc.h:524
_ll_adc_init
LL ADC init Structure definition.
Definition: gr55xx_ll_adc.h:77
ll_adc_set_ref_value
__STATIC_INLINE void ll_adc_set_ref_value(uint32_t value)
Set ADC bias reference.
Definition: gr55xx_ll_adc.h:390
ll_adc_init_t
struct _ll_adc_init ll_adc_init_t
LL ADC init Structure definition.
ll_adc_set_clock
__STATIC_INLINE void ll_adc_set_clock(uint32_t clk)
Set ADC clock source.
Definition: gr55xx_ll_adc.h:350
ll_adc_get_ref_current
__STATIC_INLINE uint32_t ll_adc_get_ref_current(void)
Return current of ADC reference circuit.
Definition: gr55xx_ll_adc.h:796
_ll_adc_init::ref_value
uint32_t ref_value
Definition: gr55xx_ll_adc.h:98
ll_adc_enable_ofs_cal
__STATIC_INLINE void ll_adc_enable_ofs_cal(void)
Enable offset calibration.
Definition: gr55xx_ll_adc.h:540
_ll_adc_init::channel_n
uint32_t channel_n
Specifies the input source to ADC channel N.
Definition: gr55xx_ll_adc.h:83
ll_adc_set_input_mode
__STATIC_INLINE void ll_adc_set_input_mode(uint32_t mode)
Set ADC input mode.
Definition: gr55xx_ll_adc.h:508
ll_adc_enable_vbat
__STATIC_INLINE void ll_adc_enable_vbat(void)
Enable Vbattery sensor.
Definition: gr55xx_ll_adc.h:463
ll_adc_set_channeln
__STATIC_INLINE void ll_adc_set_channeln(uint32_t source)
Set source of ADC input channelN.
Definition: gr55xx_ll_adc.h:663
ll_adc_get_ref
__STATIC_INLINE uint32_t ll_adc_get_ref(void)
Return source of ADC reference.
Definition: gr55xx_ll_adc.h:765
_ll_adc_init::input_mode
uint32_t input_mode
Specifies the operation mode for the ADC sample.
Definition: gr55xx_ll_adc.h:88
ll_adc_set_channelp
__STATIC_INLINE void ll_adc_set_channelp(uint32_t source)
Set source of ADC input channelP.
Definition: gr55xx_ll_adc.h:620
ll_adc_disable_temp
__STATIC_INLINE void ll_adc_disable_temp(void)
Disable temperature sensor.
Definition: gr55xx_ll_adc.h:435
ll_adc_disable
__STATIC_INLINE void ll_adc_disable(void)
Disable ADC module.
Definition: gr55xx_ll_adc.h:269
ll_adc_init
error_status_t ll_adc_init(ll_adc_init_t *p_adc_init)
Initialize ADC registers according to the specified.
_ll_adc_init::ref_source
uint32_t ref_source
Specifies the source of the ADC reference.
Definition: gr55xx_ll_adc.h:93
ll_adc_get_channeln
__STATIC_INLINE uint32_t ll_adc_get_channeln(void)
Return source of ADC input channelN.
Definition: gr55xx_ll_adc.h:684
ll_adc_set_ref
__STATIC_INLINE void ll_adc_set_ref(uint32_t source)
Set source of ADC reference.
Definition: gr55xx_ll_adc.h:746
ll_adc_is_enabled_mas_rst
__STATIC_INLINE uint32_t ll_adc_is_enabled_mas_rst(void)
Check if ADC MAS_RST is enabled.
Definition: gr55xx_ll_adc.h:726
ll_adc_struct_init
void ll_adc_struct_init(ll_adc_init_t *p_adc_init)
Set each field of a ll_adc_init_t type structure to default value.
ll_adc_disable_ofs_cal
__STATIC_INLINE void ll_adc_disable_ofs_cal(void)
Disable offset calibration.
Definition: gr55xx_ll_adc.h:554
ll_adc_enable_temp
__STATIC_INLINE void ll_adc_enable_temp(void)
Enable temperature sensor.
Definition: gr55xx_ll_adc.h:421
ll_adc_disable_mas_rst
__STATIC_INLINE void ll_adc_disable_mas_rst(void)
Disable ADC MAS_RST.
Definition: gr55xx_ll_adc.h:712
ll_adc_set_dynamic_rang
__STATIC_INLINE void ll_adc_set_dynamic_rang(uint32_t rang)
Set dynamic rang of ADC.
Definition: gr55xx_ll_adc.h:584
ll_adc_disable_clock
__STATIC_INLINE void ll_adc_disable_clock(void)
Disable ADC clock.
Definition: gr55xx_ll_adc.h:313
_ll_adc_init::clock
uint32_t clock
Specifies the clock of ADC.
Definition: gr55xx_ll_adc.h:103
ll_adc_is_fifo_notempty
__STATIC_INLINE uint32_t ll_adc_is_fifo_notempty(void)
Check if ADC FIFO is not empty.
Definition: gr55xx_ll_adc.h:860
ll_adc_set_ref_current
__STATIC_INLINE void ll_adc_set_ref_current(uint32_t source)
Set current of ADC reference circuit.
Definition: gr55xx_ll_adc.h:782
ll_adc_read_fifo
__STATIC_INLINE uint32_t ll_adc_read_fifo(void)
Return samples value of ADC by reading FIFO.
Definition: gr55xx_ll_adc.h:817
ll_adc_get_dynamic_rang
__STATIC_INLINE uint32_t ll_adc_get_dynamic_rang(void)
Return ADC dynamic rang.
Definition: gr55xx_ll_adc.h:598