52 #ifndef __GR55XX_LL_AON_WDT_H__
53 #define __GR55XX_LL_AON_WDT_H__
84 SET_BITS(AON->EXT_WKUP_CTL, AON_EXT_WKUP_CTL_WDT_EN);
98 CLEAR_BITS(AON->EXT_WKUP_CTL, AON_EXT_WKUP_CTL_WDT_EN);
112 return (READ_BITS(AON->EXT_WKUP_CTL, AON_EXT_WKUP_CTL_WDT_EN) == (AON_EXT_WKUP_CTL_WDT_EN));
127 WRITE_REG(AON->TIMER_VALUE, counter);
144 SET_BITS(AON->EXT_WKUP_CTL, AON_EXT_WKUP_CTL_WDT_RELOAD);
159 MODIFY_REG(AON->AON_PAD_CTL1, AON_PAD_CTL1_TIMER_READ_SEL, AON_PAD_CTL1_TIMER_READ_SEL_AON_WDT);
160 return (uint32_t)READ_REG(AON->TIMER_VAL);
177 MODIFY_REG(AON->EXT_WKUP_CTL, AON_EXT_WKUP_CTL_WDT_ALARM, (counter << AON_EXT_WKUP_CTL_WDT_ALARM_Pos) & AON_EXT_WKUP_CTL_WDT_ALARM);
191 return (uint32_t)(READ_BITS(AON->EXT_WKUP_CTL, AON_EXT_WKUP_CTL_WDT_ALARM) >> AON_EXT_WKUP_CTL_WDT_ALARM_Pos);
212 return (uint32_t)(READ_BITS(AON->EXT_WKUP_CTL, AON_EXT_WKUP_CTL_WDT_RUNNING) == (AON_EXT_WKUP_CTL_WDT_RUNNING));
228 return (uint32_t)(READ_BITS(AON->SLP_EVENT, AON_SLP_EVENT_WDT_REBOOT) == AON_SLP_EVENT_WDT_REBOOT);
242 WRITE_REG(AON->SLP_EVENT, ~AON_SLP_EVENT_WDT_REBOOT);