Macros
InitStrcut default configuartion
Peripheral Driver » LL Driver » SPI » Defines » SPI Exported Constants

## Macros
#define | LL_SPIM_DEFAULT_CONFIG
| LL SPIM InitStrcut default configuartion. More...
#define | LL_SPIS_DEFAULT_CONFIG
| LL SPIS InitStrcut default configuartion. More...
#define | LL_QSPI_DEFAULT_CONFIG
| LL QSPI InitStrcut default configuartion. More...

## Detailed Description

## Macro Definition Documentation

## ◆ LL_QSPI_DEFAULT_CONFIG

#define LL_QSPI_DEFAULT_CONFIG

Value:
{ \
.transfer_direction = LL_SSI_SIMPLEX_TX, \
.instruction_size = LL_SSI_INSTSIZE_8BIT, \
.address_size = LL_SSI_ADDRSIZE_24BIT, \
.inst_addr_transfer_format = LL_SSI_INST_ADDR_ALL_IN_SPI,\
.wait_cycles = 0, \
.data_size = LL_SSI_DATASIZE_8BIT, \
.clock_polarity = LL_SSI_SCPOL_LOW, \
.clock_phase = LL_SSI_SCPHA_1EDGE, \
.baud_rate = SystemCoreClock / 1000000, \
.rx_sample_delay = 0, \
}

LL QSPI InitStrcut default configuartion.

Definition at line 446 of file gr55xx_ll_spi.h.

## ◆ LL_SPIM_DEFAULT_CONFIG

#define LL_SPIM_DEFAULT_CONFIG

Value:
{ \
.transfer_direction = LL_SSI_FULL_DUPLEX, \
.data_size = LL_SSI_DATASIZE_8BIT, \
.clock_polarity = LL_SSI_SCPOL_LOW, \
.clock_phase = LL_SSI_SCPHA_1EDGE, \
.slave_select = LL_SSI_SLAVE0, \
.baud_rate = SystemCoreClock / 2000000, \
}

LL SPIM InitStrcut default configuartion.

Definition at line 423 of file gr55xx_ll_spi.h.

## ◆ LL_SPIS_DEFAULT_CONFIG

#define LL_SPIS_DEFAULT_CONFIG

Value:
{ \
.data_size = LL_SSI_DATASIZE_8BIT, \
.clock_polarity = LL_SSI_SCPOL_LOW, \
.clock_phase = LL_SSI_SCPHA_1EDGE, \
}

LL SPIS InitStrcut default configuartion.

Definition at line 436 of file gr55xx_ll_spi.h.

LL_SSI_ADDRSIZE_24BIT
#define LL_SSI_ADDRSIZE_24BIT
Address length for QSPI transfer: 24 bits.
Definition: gr55xx_ll_spi.h:396
LL_SSI_INSTSIZE_8BIT
#define LL_SSI_INSTSIZE_8BIT
Instructoin length for QSPI transfer: 8 bits.
Definition: gr55xx_ll_spi.h:383
LL_SSI_SLAVE0
#define LL_SSI_SLAVE0
Enable slave0 select pin for SPI transfer
Definition: gr55xx_ll_spi.h:365
LL_SSI_FULL_DUPLEX
#define LL_SSI_FULL_DUPLEX
Full-Duplex mode.
Definition: gr55xx_ll_spi.h:320
LL_SSI_SCPOL_LOW
#define LL_SSI_SCPOL_LOW
Clock to 0 when idle.
Definition: gr55xx_ll_spi.h:336
LL_SSI_INST_ADDR_ALL_IN_SPI
#define LL_SSI_INST_ADDR_ALL_IN_SPI
Instruction and address are sent in SPI mode.
Definition: gr55xx_ll_spi.h:411
LL_SSI_SIMPLEX_TX
#define LL_SSI_SIMPLEX_TX
Simplex Tx mode.
Definition: gr55xx_ll_spi.h:321
LL_SSI_DATASIZE_8BIT
#define LL_SSI_DATASIZE_8BIT
Data length for SPI transfer: 8 bits.
Definition: gr55xx_ll_spi.h:255
LL_SSI_SCPHA_1EDGE
#define LL_SSI_SCPHA_1EDGE
First clock transition is the first data capture edge
Definition: gr55xx_ll_spi.h:329