Header file containing functions prototypes of DMA HAL library. More...
Go to the source code of this file.
Classes | |
struct | _dma_init |
DMA Configuration Structure definition. More... | |
struct | _dma_handle |
DMA handle Structure definition. More... | |
Macros | |
#define | HAL_DMA_ERROR_NONE ((uint32_t)0x00000000U) |
No error More... | |
#define | HAL_DMA_ERROR_TE ((uint32_t)0x00000001U) |
Transfer error More... | |
#define | HAL_DMA_ERROR_NO_XFER ((uint32_t)0x00000004U) |
no ongoing transfer More... | |
#define | HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020U) |
Timeout error More... | |
#define | DMA_REQUEST_SPIM_TX LL_DMA_PERIPH_SPIM_TX |
DMA SPIM transmit request More... | |
#define | DMA_REQUEST_SPIM_RX LL_DMA_PERIPH_SPIM_RX |
DMA SPIM receive request More... | |
#define | DMA_REQUEST_SPIS_TX LL_DMA_PERIPH_SPIS_TX |
DMA SPIS transmit request More... | |
#define | DMA_REQUEST_SPIS_RX LL_DMA_PERIPH_SPIS_RX |
DMA SPIS receive request More... | |
#define | DMA_REQUEST_QSPI0_TX LL_DMA_PERIPH_QSPI0_TX |
DMA QSPI0 transmit request. More... | |
#define | DMA_REQUEST_QSPI0_RX LL_DMA_PERIPH_QSPI0_RX |
DMA QSPI0 receive request More... | |
#define | DMA_REQUEST_I2C0_TX LL_DMA_PERIPH_I2C0_TX |
DMA I2C0 transmit request More... | |
#define | DMA_REQUEST_I2C0_RX LL_DMA_PERIPH_I2C0_RX |
DMA I2C0 receive request More... | |
#define | DMA_REQUEST_I2C1_TX LL_DMA_PERIPH_I2C1_TX |
DMA I2C1 transmit request More... | |
#define | DMA_REQUEST_I2C1_RX LL_DMA_PERIPH_I2C1_RX |
DMA I2C1 receive request More... | |
#define | DMA_REQUEST_I2S_S_TX LL_DMA_PERIPH_I2S_S_TX |
DMA I2S_S transmit request. More... | |
#define | DMA_REQUEST_I2S_S_RX LL_DMA_PERIPH_I2S_S_RX |
DMA I2S_S receive request More... | |
#define | DMA_REQUEST_UART0_TX LL_DMA_PERIPH_UART0_TX |
DMA UART0 transmit request. More... | |
#define | DMA_REQUEST_UART0_RX LL_DMA_PERIPH_UART0_RX |
DMA UART0 receive request More... | |
#define | DMA_REQUEST_QSPI1_TX LL_DMA_PERIPH_QSPI1_TX |
DMA QSPI1 transmit request. More... | |
#define | DMA_REQUEST_QSPI1_RX LL_DMA_PERIPH_QSPI1_RX |
DMA QSPI1 receive request More... | |
#define | DMA_REQUEST_I2S_M_TX LL_DMA_PERIPH_I2S_M_TX |
DMA I2S_M transmit request. More... | |
#define | DMA_REQUEST_I2S_M_RX LL_DMA_PERIPH_I2S_M_RX |
DMA I2S_M receive request More... | |
#define | DMA_REQUEST_SNSADC LL_DMA_PERIPH_SNSADC |
DMA SenseADC request More... | |
#define | DMA_REQUEST_MEM LL_DMA_PERIPH_MEM |
DMA Memory request More... | |
#define | DMA_MEMORY_TO_MEMORY LL_DMA_DIRECTION_MEMORY_TO_MEMORY |
Memory to memory direction More... | |
#define | DMA_MEMORY_TO_PERIPH LL_DMA_DIRECTION_MEMORY_TO_PERIPH |
Memory to peripheral direction. More... | |
#define | DMA_PERIPH_TO_MEMORY LL_DMA_DIRECTION_PERIPH_TO_MEMORY |
Peripheral to memory direction. More... | |
#define | DMA_PERIPH_TO_PERIPH LL_DMA_DIRECTION_PERIPH_TO_PERIPH |
Peripheral to Peripheral direction. More... | |
#define | DMA_SRC_INCREMENT LL_DMA_SRC_INCREMENT |
Source increment mode. More... | |
#define | DMA_SRC_DECREMENT LL_DMA_SRC_DECREMENT |
Source decrement mode. More... | |
#define | DMA_SRC_NO_CHANGE LL_DMA_SRC_NO_CHANGE |
Source no change mode. More... | |
#define | DMA_DST_INCREMENT LL_DMA_DST_INCREMENT |
Destination increment mode. More... | |
#define | DMA_DST_DECREMENT LL_DMA_DST_DECREMENT |
Destination decrement mode. More... | |
#define | DMA_DST_NO_CHANGE LL_DMA_DST_NO_CHANGE |
Destination no change mode. More... | |
#define | DMA_SDATAALIGN_BYTE LL_DMA_SDATAALIGN_BYTE |
Source data alignment : Byte More... | |
#define | DMA_SDATAALIGN_HALFWORD LL_DMA_SDATAALIGN_HALFWORD |
Source data alignment : HalfWord. More... | |
#define | DMA_SDATAALIGN_WORD LL_DMA_SDATAALIGN_WORD |
Source data alignment : Word More... | |
#define | DMA_DDATAALIGN_BYTE LL_DMA_DDATAALIGN_BYTE |
Destination data alignment : Byte More... | |
#define | DMA_DDATAALIGN_HALFWORD LL_DMA_DDATAALIGN_HALFWORD |
Destination data alignment : HalfWord. More... | |
#define | DMA_DDATAALIGN_WORD LL_DMA_DDATAALIGN_WORD |
Destination data alignment : Word More... | |
#define | DMA_NORMAL LL_DMA_MODE_SINGLE_BLOCK |
Normal Mode More... | |
#define | DMA_CIRCULAR LL_DMA_MODE_MULTI_BLOCK_ALL_RELOAD |
Circular Mode More... | |
#define | DMA_PRIORITY_LOW LL_DMA_PRIORITY_0 |
Priority level : Low More... | |
#define | DMA_PRIORITY_MEDIUM LL_DMA_PRIORITY_2 |
Priority level : Medium More... | |
#define | DMA_PRIORITY_HIGH LL_DMA_PRIORITY_5 |
Priority level : High More... | |
#define | DMA_PRIORITY_VERY_HIGH LL_DMA_PRIORITY_7 |
Priority level : Very High. More... | |
#define | IS_DMA_ALL_INSTANCE(__instance__) |
Check if DMA channel instance is valid. More... | |
#define | IS_DMA_ALL_REQUEST(__REQUEST__) |
Check if DMA request is valid. More... | |
#define | IS_DMA_DIRECTION(__DIRECTION__) |
Check if DMA direction is valid. More... | |
#define | IS_DMA_BUFFER_SIZE(__SIZE__) (((__SIZE__) >= 0x1) && ((__SIZE__) < 0xFFF)) |
Check if DMA buffer size is valid. More... | |
#define | IS_DMA_SOURCE_INC_STATE(__STATE__) |
Check if DMA source address increment state is valid. More... | |
#define | IS_DMA_DESTINATION_INC_STATE(__STATE__) |
Check if DMA destination address increment state is valid. More... | |
#define | IS_DMA_SOURCE_DATA_SIZE(__SIZE__) |
Check if DMA source data size is valid. More... | |
#define | IS_DMA_DESTINATION_DATA_SIZE(__SIZE__) |
Check if DMA destination data size is valid. More... | |
#define | IS_DMA_MODE(__MODE__) |
Check if DMA mode is valid. More... | |
#define | IS_DMA_PRIORITY(__PRIORITY__) |
Check if DMA priority is valid. More... | |
Typedefs | |
typedef struct _dma_init | dma_init_t |
DMA Configuration Structure definition. More... | |
typedef struct _dma_handle | dma_handle_t |
DMA handle Structure definition. More... | |
Enumerations | |
enum | hal_dma_state_t { HAL_DMA_STATE_RESET = 0x00U, HAL_DMA_STATE_READY = 0x01U, HAL_DMA_STATE_BUSY = 0x02U, HAL_DMA_STATE_TIMEOUT = 0x03U, HAL_DMA_STATE_ERROR = 0x04U } |
HAL DMA State Enumerations definition. More... | |
enum | dma_channel_t { DMA_Channel0 = 0U, DMA_Channel1 = 1U, DMA_Channel2 = 2U, DMA_Channel3 = 3U, DMA_Channel4 = 4U, DMA_Channel5 = 5U, DMA_Channel6 = 6U, DMA_Channel7 = 7U } |
HAL DMA Channel Enumerations definition. More... | |
enum | hal_dma_callback_id_t { HAL_DMA_XFER_TFR_CB_ID = 0x00, HAL_DMA_XFER_BLK_CB_ID = 0x01, HAL_DMA_XFER_ERROR_CB_ID = 0x02, HAL_DMA_XFER_ABORT_CB_ID = 0x03, HAL_DMA_XFER_ALL_CB_ID = 0x04 } |
HAL DMA Callback ID Enumerations definition. More... | |
Functions | |
hal_status_t | hal_dma_init (dma_handle_t *p_dma) |
Initialize the DMA according to the specified parameters in the dma_init_t and initialize the associated handle. More... | |
hal_status_t | hal_dma_deinit (dma_handle_t *p_dma) |
De-initialize the DMA peripheral. More... | |
hal_status_t | hal_dma_start (dma_handle_t *p_dma, uint32_t src_address, uint32_t dst_address, uint32_t data_length) |
Start the DMA Transfer. More... | |
hal_status_t | hal_dma_start_it (dma_handle_t *p_dma, uint32_t src_address, uint32_t dst_address, uint32_t data_length) |
Start the DMA Transfer with interrupt enabled. More... | |
hal_status_t | hal_dma_abort (dma_handle_t *p_dma) |
Abort the DMA Transfer. More... | |
hal_status_t | hal_dma_abort_it (dma_handle_t *p_dma) |
Aborts the DMA Transfer in Interrupt mode. More... | |
hal_status_t | hal_dma_poll_for_transfer (dma_handle_t *p_dma, uint32_t timeout) |
Polling for transfer complete. More... | |
void | hal_dma_irq_handler (dma_handle_t *p_dma) |
Handle DMA interrupt request. More... | |
hal_status_t | hal_dma_register_callback (dma_handle_t *p_dma, hal_dma_callback_id_t id, void(*callback)(dma_handle_t *p_dma)) |
Register callbacks. More... | |
hal_status_t | hal_dma_unregister_callback (dma_handle_t *p_dma, hal_dma_callback_id_t id) |
UnRegister callbacks. More... | |
hal_dma_state_t | hal_dma_get_state (dma_handle_t *p_dma) |
Return the DMA hande state. More... | |
uint32_t | hal_dma_get_error (dma_handle_t *p_dma) |
Return the DMA error code. More... | |
hal_status_t | hal_dma_suspend_reg (dma_handle_t *p_dma) |
Suspend some registers related to DMA configuration before sleep. More... | |
hal_status_t | hal_dma_resume_reg (dma_handle_t *p_dma) |
Restore some registers related to DMA configuration after sleep. More... | |
Header file containing functions prototypes of DMA HAL library.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. Neither the name of GOODIX nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Definition in file gr55xx_hal_dma.h.