gr55xx_ll_pkc.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_pkc.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of PKC LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_PKC PKC
47 * @brief PKC LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55XX_LL_PKC_H__
53 #define __GR55XX_LL_PKC_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx.h"
61
62 #if defined (PKC)
63
64 /** @addtogroup PKC_LL_MACRO
65 * @{
66 */
67
68 /* Private macros ------------------------------------------------------------*/
69 /** @defgroup PKC_LL_Private_Macro PKC Private Macros
70 * @{
71 */
72 #define ECC_U32_LENGTH (8) /**< ECC Array Length */
73 #define RSA_U32_LENGTH (64) /**< RSA Array Length */
74
75 /** @} */
76
77 /** @} */
78
79 /** @defgroup PKC_LL_STRUCTURES Structures
80 * @{
81 */
82
83 /* Exported types ------------------------------------------------------------*/
84 /** @defgroup PKC_LL_ES_INIT PKC Exported Init structures
85 * @{
86 */
87
88 /**
89 * @brief LL PKC ECC Point Structure definition
90 */
91 typedef struct _ll_ecc_point
92 {
93 uint32_t X[ECC_U32_LENGTH]; /**< Specifies the point in x-axis */
94
95 uint32_t Y[ECC_U32_LENGTH]; /**< Specifies the point in y-axis */
96
97 } ll_ecc_point_t;
98
99 /**
100 * @brief LL PKC ECC P-256 Elliptic Curve Init Structure definition
101 */
102 typedef struct _ll_ecc_curve_init
103 {
104 uint32_t A[ECC_U32_LENGTH]; /**< Operand A array */
105 uint32_t B[ECC_U32_LENGTH]; /**< Operand B array */
106
107 uint32_t P[ECC_U32_LENGTH]; /**< Prime number P array */
108 uint32_t PRSquare[ECC_U32_LENGTH]; /**< R^2 mod P, where R = 2^256 */
109 uint32_t ConstP; /**< Montgomery multiplication constant in prime field P, ConstP = 1 */
110
111 uint32_t N[ECC_U32_LENGTH]; /**< Prime number N array */
112 uint32_t NRSquare[ECC_U32_LENGTH]; /**< R^2 mod N, where R = 2^256 */
113 uint32_t ConstN; /**< Montgomery multiplication constant in prime field N, ConstN = 0xee00bc4f */
114
115 uint32_t H; /**< H */
116
117 ll_ecc_point_t G; /**< ECC Point G */
118
119 } ll_ecc_curve_init_t;
120
121 /**
122 * @brief LL PKC Init Structure definition
123 */
124 typedef struct _ll_pkc_init
125 {
126 ll_ecc_curve_init_t *p_ecc_curve; /**< Specifies the pointer to elliptic curve description */
127
128 uint32_t data_bits; /**< Specifies the Data size: 256 ~ 2048bits */
129
130 } ll_pkc_init_t;
131
132 /** @} */
133
134 /** @} */
135
136 /**
137 * @defgroup PKC_LL_MACRO Defines
138 * @{
139 */
140
141 /* Exported constants --------------------------------------------------------*/
142 /** @defgroup PKC_LL_Exported_Constants PKC Exported Constants
143 * @{
144 */
145
146 /** @defgroup PKC_LL_EC_GET_FLAG Get Flags Defines
147 * @brief Flags defines which can be used with LL_PKC_ReadReg function
148 * @{
149 */
150 #define LL_PKC_WORKSTAT_BUSY PKC_WORKSTAT_BUSY /**< Busy flag */
151 /** @} */
152
153 /** @defgroup PKC_LL_EC_IT IT Defines
154 * @brief Interrupt defines which can be used with LL_PKC_ReadReg and LL_PKC_WriteReg functions
155 * @{
156 */
157 #define LL_PKC_INTEN_DONE PKC_INTEN_DONE /**< Operation Done Interrupt source */
158 #define LL_PKC_INTEN_ERR PKC_INTEN_ERR /**< Operation Error Interrupt source */
159 #define LL_PKC_INTEN_BAOVF PKC_INTEN_BAOVF /**< Big Integer Result Overflow Interrupt source */
160 /** @} */
161
162 /** @defgroup PKC_LL_EC_BITS_LENGTH Bits Length
163 * @{
164 */
165 #define LL_PKC_BITS_LENGTH_MIN (256U) /**< Bits length min value */
166 #define LL_PKC_BITS_LENGTH_MAX (2048U) /**< Bits length max value */
167 #define LL_PKC_BIGMULTI_BITS_LENGTH_MAX (1024U) /**< Big number multiplication bits Length max value */
168 /** @} */
169
170 /** @defgroup PKC_LL_EC_OPERATION_MODE Operation Mode
171 * @{
172 */
173 #define LL_PKC_operation_mode_MULTIPLY (0x00000000U) /**< Multiplication operation mode */
174 #define LL_PKC_operation_mode_INVERTION (1UL << PKC_SW_CTRL_OPMODE_Pos) /**< Inversion operation mode */
175 #define LL_PKC_operation_mode_ADD (2UL << PKC_SW_CTRL_OPMODE_Pos) /**< Addition operation mode */
176 #define LL_PKC_operation_mode_SUB (3UL << PKC_SW_CTRL_OPMODE_Pos) /**< Subtraction operation mode */
177 #define LL_PKC_operation_mode_COMPARE (4UL << PKC_SW_CTRL_OPMODE_Pos) /**< Comparison operation mode */
178 #define LL_PKC_operation_mode_LEFTSHIFT (5UL << PKC_SW_CTRL_OPMODE_Pos) /**< Left Shift operation mode */
179 #define LL_PKC_operation_mode_BIGINTEGERMULTIPLY (6UL << PKC_SW_CTRL_OPMODE_Pos) /**< Big Number Multiplication operation mode */
180 #define LL_PKC_operation_mode_BIGINTEGERADD (7UL << PKC_SW_CTRL_OPMODE_Pos) /**< Big Number Addition operation mode */
181 /** @} */
182
183 /** @defgroup PKC_LL_EC_DEFAULT_CONFIG InitStrcut default configuartion
184 * @{
185 */
186
187 /**
188 * @brief LL PKC ECC Curve default configuretion.
189 */
190 #define LL_ECC_CURVE_DEFAULT_CONFIG LL_ECC_CURVE_SECP256R1_CONFIG
191
192 /**
193 * @brief LL PKC ECC Curve SECP256R1 configuretion.
194 */
195 #define LL_ECC_CURVE_SECP256R1_CONFIG \
196 { \
197 .A = {0xFFFFFFFC, 0x00000004, 0x00000000, 0x00000000, 0x00000003, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFC}, \
198 .B = {0xDC30061D, 0x04874834, 0xE5A220AB, 0xF7212ED6, 0xACF005CD, 0x78843090, 0xD89CDF62, 0x29C4BDDF}, \
199 .P = {0xFFFFFFFF, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF}, \
200 .PRSquare = {0x00000004, 0xFFFFFFFD, 0xFFFFFFFF, 0xFFFFFFFE, 0xFFFFFFFB, 0xFFFFFFFF, 0x00000000, 0x00000003}, \
201 .ConstP = 1, \
202 .N = {0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0xBCE6FAAD, 0xA7179E84, 0xF3B9CAC2, 0xFC632551}, \
203 .NRSquare = {0x66E12D94, 0xF3D95620, 0x2845B239, 0x2B6BEC59, 0x4699799C, 0x49BD6FA6, 0x83244C95, 0xBE79EEA2}, \
204 .ConstN = 0xEE00BC4F, \
205 .H = 1, \
206 .G.X = {0x6B17D1F2, 0xE12C4247, 0xF8BCE6E5, 0x63A440F2, 0x77037D81, 0x2DEB33A0, 0xF4A13945, 0xD898C296}, \
207 .G.Y = {0x4FE342E2, 0xFE1A7F9B, 0x8EE7EB4A, 0x7C0F9E16, 0x2BCE3357, 0x6B315ECE, 0xCBB64068, 0x37BF51F5}, \
208 }
209
210 /**
211 * @brief LL PKC ECC Curve SECP256K1 configuretion.
212 */
213 #define LL_ECC_CURVE_SECP256K1_CONFIG \
214 { \
215 .A = {0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
216 .B = {0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000007, 0x00001AB7}, \
217 .P = {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFE, 0xFFFFFC2F}, \
218 .PRSquare = {0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x000007A2, 0x000E90A1}, \
219 .ConstP = 0XD2253531, \
220 .N = {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFE, 0xBAAEDCE6, 0xAF48A03B, 0xBFD25E8C, 0xD0364141}, \
221 .NRSquare = {0x9D671CD5, 0x81C69BC5, 0xE697F5E4, 0x5BCD07C6, 0x741496C2, 0x0E7CF878, 0x896CF214, 0x67D7D140}, \
222 .ConstN = 0X5588B13F, \
223 .H = 1, \
224 .G.X = {0x79BE667E, 0xF9DCBBAC, 0x55A06295, 0xCE870B07, 0x029BFCDB, 0x2DCE28D9, 0x59F2815B, 0x16F81798}, \
225 .G.Y = {0x483ADA77, 0x26A3C465, 0x5DA4FBFC, 0x0E1108A8, 0xFD17B448, 0xA6855419, 0x9C47D08F, 0xFB10D4B8}, \
226 }
227
228 /** @} */
229
230 /** @} */
231
232 /* Exported macro ------------------------------------------------------------*/
233 /** @defgroup PKC_LL_Exported_Macros PKC Exported Macros
234 * @{
235 */
236
237 /** @defgroup PKC_LL_EM_WRITE_READ Common Write and read registers Macros
238 * @{
239 */
240
241 /**
242 * @brief Write a value in PKC register
243 * @param __INSTANCE__ PKC Instance
244 * @param __REG__ Register to be written
245 * @param __VALUE__ Value to be written in the register
246 * @retval None
247 */
248 #define LL_PKC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
249
250 /**
251 * @brief Read a value in PKC register
252 * @param __INSTANCE__ PKC Instance
253 * @param __REG__ Register to be read
254 * @retval Register value
255 */
256 #define LL_PKC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
257
258 /** @} */
259
260 /** @} */
261
262 /** @} */
263
264 /* Exported functions --------------------------------------------------------*/
265 /** @defgroup PKC_LL_DRIVER_FUNCTIONS Functions
266 * @{
267 */
268
269 /** @defgroup PKC_LL_EF_Configuration Configuration functions
270 * @{
271 */
272
273 /**
274 * @brief Enable pkc.
275 *
276 * Register|BitsName
277 * --------|--------
278 * CTRL | EN
279 *
280 * @param PKCx PKC instance
281 * @retval None
282 */
283 __STATIC_INLINE void ll_pkc_enable(pkc_regs_t *PKCx)
284 {
285 SET_BITS(PKCx->CTRL, PKC_CTRL_EN);
286 }
287
288 /**
289 * @brief Disable pkc.
290 *
291 * Register|BitsName
292 * --------|--------
293 * CTRL | EN
294 *
295 * @param PKCx PKC instance
296 * @retval None
297 */
298 __STATIC_INLINE void ll_pkc_disable(pkc_regs_t *PKCx)
299 {
300 CLEAR_BITS(PKCx->CTRL, PKC_CTRL_EN);
301 }
302
303 /**
304 * @brief Indicate whether the pkc is enabled.
305 *
306 * Register|BitsName
307 * --------|--------
308 * CTRL | EN
309 *
310 * @param PKCx PKC instance
311 * @retval State of bit (1 or 0).
312 */
313 __STATIC_INLINE uint32_t ll_pkc_is_enabled(pkc_regs_t *PKCx)
314 {
315 return (READ_BITS(PKCx->CTRL, PKC_CTRL_EN) == (PKC_CTRL_EN));
316 }
317
318 /**
319 * @brief Enable pkc start in hardware mode.
320 *
321 * Register|BitsName
322 * --------|--------
323 * CTRL | START
324 *
325 * @param PKCx PKC instance
326 * @retval None
327 */
328 __STATIC_INLINE void ll_pkc_enable_hardware_start(pkc_regs_t *PKCx)
329 {
330 SET_BITS(PKCx->CTRL, PKC_CTRL_START);
331 }
332
333 /**
334 * @brief Disable pkc start in hardware mode.
335 *
336 * Register|BitsName
337 * --------|--------
338 * CTRL | START
339 *
340 * @param PKCx PKC instance
341 * @retval None
342 */
343 __STATIC_INLINE void ll_pkc_disable_hardware_start(pkc_regs_t *PKCx)
344 {
345 CLEAR_BITS(PKCx->CTRL, PKC_CTRL_START);
346 }
347
348 /**
349 * @brief Indicate whether the pkc start in hardware mode is enabled.
350 *
351 * Register|BitsName
352 * --------|--------
353 * CTRL | START
354 *
355 * @param PKCx PKC instance
356 * @retval State of bit (1 or 0).
357 */
358 __STATIC_INLINE uint32_t ll_pkc_is_enabled_hardware_start(pkc_regs_t *PKCx)
359 {
360 return (READ_BITS(PKCx->CTRL, PKC_CTRL_START) == (PKC_CTRL_START));
361 }
362
363 /**
364 * @brief Enable pkc software mode.
365 *
366 * Register|BitsName
367 * --------|--------
368 * CTRL | SWCTRL
369 *
370 * @param PKCx PKC instance
371 * @retval None
372 */
373 __STATIC_INLINE void ll_pkc_enable_software(pkc_regs_t *PKCx)
374 {
375 SET_BITS(PKCx->CTRL, PKC_CTRL_SWCTRL);
376 }
377
378 /**
379 * @brief Disable pkc software mode.
380 *
381 * Register|BitsName
382 * --------|--------
383 * CTRL | SWCTRL
384 *
385 * @param PKCx PKC instance
386 * @retval None
387 */
388 __STATIC_INLINE void ll_pkc_disable_software(pkc_regs_t *PKCx)
389 {
390 CLEAR_BITS(PKCx->CTRL, PKC_CTRL_SWCTRL);
391 }
392
393 /**
394 * @brief Indicate whether the pkc software mode is enabled.
395 *
396 * Register|BitsName
397 * --------|--------
398 * CTRL | SWCTRL
399 *
400 * @param PKCx PKC instance
401 * @retval State of bit (1 or 0).
402 */
403 __STATIC_INLINE uint32_t ll_pkc_is_enabled_software(pkc_regs_t *PKCx)
404 {
405 return (READ_BITS(PKCx->CTRL, PKC_CTRL_SWCTRL) == (PKC_CTRL_SWCTRL));
406 }
407
408 /**
409 * @brief Enable pkc reset.
410 *
411 * Register|BitsName
412 * --------|--------
413 * CTRL | SWRST
414 *
415 * @param PKCx PKC instance
416 * @retval None
417 */
418 __STATIC_INLINE void ll_pkc_enable_reset(pkc_regs_t *PKCx)
419 {
420 SET_BITS(PKCx->CTRL, PKC_CTRL_SWRST);
421 }
422
423 /**
424 * @brief Disable pkc reset.
425 *
426 * Register|BitsName
427 * --------|--------
428 * CTRL | SWRST
429 *
430 * @param PKCx PKC instance
431 * @retval None
432 */
433 __STATIC_INLINE void ll_pkc_disable_reset(pkc_regs_t *PKCx)
434 {
435 CLEAR_BITS(PKCx->CTRL, PKC_CTRL_SWRST);
436 }
437
438 /**
439 * @brief Indicate whether the pkc reset is enabled.
440 *
441 * Register|BitsName
442 * --------|--------
443 * CTRL | SWRST
444 *
445 * @param PKCx PKC instance
446 * @retval State of bit (1 or 0).
447 */
448 __STATIC_INLINE uint32_t ll_pkc_is_enabled_reset(pkc_regs_t *PKCx)
449 {
450 return (READ_BITS(PKCx->CTRL, PKC_CTRL_SWRST) == (PKC_CTRL_SWRST));
451 }
452
453 /**
454 * @brief Set PKC parameter k pointer in pkc sram.
455 *
456 * Register|BitsName
457 * --------|--------
458 * CONFIG0 | KPTR
459 *
460 * @param PKCx PKC instance
461 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
462 * @retval None
463 */
464 __STATIC_INLINE void ll_pkc_set_k_pointer(pkc_regs_t *PKCx, uint32_t pointer)
465 {
466 MODIFY_REG(PKCx->CONFIG0, PKC_CONFIG0_KPTR, pointer << PKC_CONFIG0_KPTR_Pos);
467 }
468
469 /**
470 * @brief Get PKC parameter k pointer in pkc sram.
471 *
472 * Register|BitsName
473 * --------|--------
474 * CONFIG0 | KPTR
475 *
476 * @param PKCx PKC instance
477 * @retval Return value is between: 0 ~ 0x200
478 */
479 __STATIC_INLINE uint32_t ll_pkc_get_k_pointer(pkc_regs_t *PKCx)
480 {
481 return (READ_BITS(PKCx->CONFIG0, PKC_CONFIG0_KPTR) >> PKC_CONFIG0_KPTR_Pos);
482 }
483
484 /**
485 * @brief Set PKC parameter r pointer in pkc sram.
486 *
487 * Register|BitsName
488 * --------|--------
489 * CONFIG0 | RPTR
490 *
491 * @param PKCx PKC instance
492 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
493 * @retval None
494 */
495 __STATIC_INLINE void ll_pkc_set_r_pointer(pkc_regs_t *PKCx, uint32_t pointer)
496 {
497 MODIFY_REG(PKCx->CONFIG0, PKC_CONFIG0_RPTR, pointer << PKC_CONFIG0_RPTR_Pos);
498 }
499
500 /**
501 * @brief Get PKC parameter r pointer in pkc sram.
502 *
503 * Register|BitsName
504 * --------|--------
505 * CONFIG0 | RPTR
506 *
507 * @param PKCx PKC instance
508 * @retval Return value is between: 0 ~ 0x200
509 */
510 __STATIC_INLINE uint32_t ll_pkc_get_r_pointer(pkc_regs_t *PKCx)
511 {
512 return (READ_BITS(PKCx->CONFIG0, PKC_CONFIG0_RPTR) >> PKC_CONFIG0_RPTR_Pos);
513 }
514
515 /**
516 * @brief Set PKC parameter p pointer in pkc sram.
517 *
518 * Register|BitsName
519 * --------|--------
520 * CONFIG1 | PPTR
521 *
522 * @param PKCx PKC instance
523 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
524 * @retval None
525 */
526 __STATIC_INLINE void ll_pkc_set_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
527 {
528 MODIFY_REG(PKCx->CONFIG1, PKC_CONFIG1_PPTR, pointer << PKC_CONFIG1_PPTR_Pos);
529 }
530
531 /**
532 * @brief Get PKC parameter p pointer in pkc sram.
533 *
534 * Register|BitsName
535 * --------|--------
536 * CONFIG1 | PPTR
537 *
538 * @param PKCx PKC instance
539 * @retval Return value is between: 0 ~ 0x200
540 */
541 __STATIC_INLINE uint32_t ll_pkc_get_p_pointer(pkc_regs_t *PKCx)
542 {
543 return (READ_BITS(PKCx->CONFIG1, PKC_CONFIG1_PPTR) >> PKC_CONFIG1_PPTR_Pos);
544 }
545
546 /**
547 * @brief Set PKC parameter R^2 pointer in pkc sram.
548 *
549 * Register|BitsName
550 * --------|--------
551 * CONFIG1 | RSQPTR
552 *
553 * @param PKCx PKC instance
554 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
555 * @retval None
556 */
557 __STATIC_INLINE void ll_pkc_set_rsq_pointer(pkc_regs_t *PKCx, uint32_t pointer)
558 {
559 MODIFY_REG(PKCx->CONFIG1, PKC_CONFIG1_RSQPTR, pointer << PKC_CONFIG1_RSQPTR_Pos);
560 }
561
562 /**
563 * @brief Get PKC parameter R^2 pointer in pkc sram.
564 *
565 * Register|BitsName
566 * --------|--------
567 * CONFIG1 | RSQPTR
568 *
569 * @param PKCx PKC instance
570 * @retval Return value is between: 0 ~ 0x200
571 */
572 __STATIC_INLINE uint32_t ll_pkc_get_rsq_pointer(pkc_regs_t *PKCx)
573 {
574 return (READ_BITS(PKCx->CONFIG1, PKC_CONFIG1_RSQPTR) >> PKC_CONFIG1_RSQPTR_Pos);
575 }
576
577 /**
578 * @brief Set PKC parameter Gx pointer in pkc sram.
579 *
580 * Register|BitsName
581 * --------|--------
582 * CONFIG2 | GXPTR
583 *
584 * @param PKCx PKC instance
585 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
586 * @retval None
587 */
588 __STATIC_INLINE void ll_pkc_set_gx_pointer(pkc_regs_t *PKCx, uint32_t pointer)
589 {
590 MODIFY_REG(PKCx->CONFIG2, PKC_CONFIG2_GXPTR, pointer << PKC_CONFIG2_GXPTR_Pos);
591 }
592
593 /**
594 * @brief Get PKC parameter Gx pointer in pkc sram.
595 *
596 * Register|BitsName
597 * --------|--------
598 * CONFIG2 | GXPTR
599 *
600 * @param PKCx PKC instance
601 * @retval Return value is between: 0 ~ 0x200
602 */
603 __STATIC_INLINE uint32_t ll_pkc_get_gx_pointer(pkc_regs_t *PKCx)
604 {
605 return (READ_BITS(PKCx->CONFIG2, PKC_CONFIG2_GXPTR) >> PKC_CONFIG2_GXPTR_Pos);
606 }
607
608 /**
609 * @brief Set PKC parameter Gy pointer in pkc sram.
610 *
611 * Register|BitsName
612 * --------|--------
613 * CONFIG2 | GYPTR
614 *
615 * @param PKCx PKC instance
616 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
617 * @retval None
618 */
619 __STATIC_INLINE void ll_pkc_set_gy_pointer(pkc_regs_t *PKCx, uint32_t pointer)
620 {
621 MODIFY_REG(PKCx->CONFIG2, PKC_CONFIG2_GYPTR, pointer << PKC_CONFIG2_GYPTR_Pos);
622 }
623
624 /**
625 * @brief Get PKC parameter Gy pointer in pkc sram.
626 *
627 * Register|BitsName
628 * --------|--------
629 * CONFIG2 | GYPTR
630 *
631 * @param PKCx PKC instance
632 * @retval Return value is between: 0 ~ 0x200
633 */
634 __STATIC_INLINE uint32_t ll_pkc_get_gy_pointer(pkc_regs_t *PKCx)
635 {
636 return (READ_BITS(PKCx->CONFIG2, PKC_CONFIG2_GYPTR) >> PKC_CONFIG2_GYPTR_Pos);
637 }
638
639 /**
640 * @brief Set PKC parameter Gz pointer in pkc sram.
641 *
642 * Register|BitsName
643 * --------|--------
644 * CONFIG3 | GZPTR
645 *
646 * @param PKCx PKC instance
647 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
648 * @retval None
649 */
650 __STATIC_INLINE void ll_pkc_set_gz_pointer(pkc_regs_t *PKCx, uint32_t pointer)
651 {
652 MODIFY_REG(PKCx->CONFIG3, PKC_CONFIG3_GZPTR, pointer << PKC_CONFIG3_GZPTR_Pos);
653 }
654
655 /**
656 * @brief Get PKC parameter Gz pointer in pkc sram.
657 *
658 * Register|BitsName
659 * --------|--------
660 * CONFIG3 | GZPTR
661 *
662 * @param PKCx PKC instance
663 * @retval Return value is between: 0 ~ 0x200
664 */
665 __STATIC_INLINE uint32_t ll_pkc_get_gz_pointer(pkc_regs_t *PKCx)
666 {
667 return (READ_BITS(PKCx->CONFIG3, PKC_CONFIG3_GZPTR) >> PKC_CONFIG3_GZPTR_Pos);
668 }
669
670 /**
671 * @brief Set PKC parameter R0x pointer in pkc sram.
672 *
673 * Register|BitsName
674 * --------|--------
675 * CONFIG3 | R0XPTR
676 *
677 * @param PKCx PKC instance
678 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
679 * @retval None
680 */
681 __STATIC_INLINE void ll_pkc_set_r0x_pointer(pkc_regs_t *PKCx, uint32_t pointer)
682 {
683 MODIFY_REG(PKCx->CONFIG3, PKC_CONFIG3_R0XPTR, pointer << PKC_CONFIG3_R0XPTR_Pos);
684 }
685
686 /**
687 * @brief Get PKC parameter R0x pointer in pkc sram.
688 *
689 * Register|BitsName
690 * --------|--------
691 * CONFIG3 | R0XPTR
692 *
693 * @param PKCx PKC instance
694 * @retval Return value is between: 0 ~ 0x200
695 */
696 __STATIC_INLINE uint32_t ll_pkc_get_r0x_pointer(pkc_regs_t *PKCx)
697 {
698 return (READ_BITS(PKCx->CONFIG3, PKC_CONFIG3_R0XPTR) >> PKC_CONFIG3_R0XPTR_Pos);
699 }
700
701 /**
702 * @brief Set PKC parameter R0y pointer in pkc sram.
703 *
704 * Register|BitsName
705 * --------|--------
706 * CONFIG4 | R0YPTR
707 *
708 * @param PKCx PKC instance
709 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
710 * @retval None
711 */
712 __STATIC_INLINE void ll_pkc_set_r0y_pointer(pkc_regs_t *PKCx, uint32_t pointer)
713 {
714 MODIFY_REG(PKCx->CONFIG4, PKC_CONFIG4_R0YPTR, pointer << PKC_CONFIG4_R0YPTR_Pos);
715 }
716
717 /**
718 * @brief Get PKC parameter R0y pointer in pkc sram.
719 *
720 * Register|BitsName
721 * --------|--------
722 * CONFIG4 | R0YPTR
723 *
724 * @param PKCx PKC instance
725 * @retval Return value is between: 0 ~ 0x200
726 */
727 __STATIC_INLINE uint32_t ll_pkc_get_r0y_pointer(pkc_regs_t *PKCx)
728 {
729 return (READ_BITS(PKCx->CONFIG4, PKC_CONFIG4_R0YPTR) >> PKC_CONFIG4_R0YPTR_Pos);
730 }
731
732 /**
733 * @brief Set PKC parameter R0z pointer in pkc sram.
734 *
735 * Register|BitsName
736 * --------|--------
737 * CONFIG4 | R0ZPTR
738 *
739 * @param PKCx PKC instance
740 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
741 * @retval None
742 */
743 __STATIC_INLINE void ll_pkc_set_r0z_pointer(pkc_regs_t *PKCx, uint32_t pointer)
744 {
745 MODIFY_REG(PKCx->CONFIG4, PKC_CONFIG4_R0ZPTR, pointer << PKC_CONFIG4_R0ZPTR_Pos);
746 }
747
748 /**
749 * @brief Get PKC parameter R0z pointer in pkc sram.
750 *
751 * Register|BitsName
752 * --------|--------
753 * CONFIG4 | R0ZPTR
754 *
755 * @param PKCx PKC instance
756 * @retval Return value is between: 0 ~ 0x200
757 */
758 __STATIC_INLINE uint32_t ll_pkc_get_r0z_pointer(pkc_regs_t *PKCx)
759 {
760 return (READ_BITS(PKCx->CONFIG4, PKC_CONFIG4_R0ZPTR) >> PKC_CONFIG4_R0ZPTR_Pos);
761 }
762
763 /**
764 * @brief Set PKC parameter R1x pointer in pkc sram.
765 *
766 * Register|BitsName
767 * --------|--------
768 * CONFIG5 | R1XPTR
769 *
770 * @param PKCx PKC instance
771 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
772 * @retval None
773 */
774 __STATIC_INLINE void ll_pkc_set_r1x_pointer(pkc_regs_t *PKCx, uint32_t pointer)
775 {
776 MODIFY_REG(PKCx->CONFIG5, PKC_CONFIG5_R1XPTR, pointer << PKC_CONFIG5_R1XPTR_Pos);
777 }
778
779 /**
780 * @brief Get PKC parameter R1x pointer in pkc sram.
781 *
782 * Register|BitsName
783 * --------|--------
784 * CONFIG5 | R1XPTR
785 *
786 * @param PKCx PKC instance
787 * @retval Return value is between: 0 ~ 0x200
788 */
789 __STATIC_INLINE uint32_t ll_pkc_get_r1x_pointer(pkc_regs_t *PKCx)
790 {
791 return (READ_BITS(PKCx->CONFIG5, PKC_CONFIG5_R1XPTR) >> PKC_CONFIG5_R1XPTR_Pos);
792 }
793
794 /**
795 * @brief Set PKC parameter R1y pointer in pkc sram.
796 *
797 * Register|BitsName
798 * --------|--------
799 * CONFIG5 | R1YPTR
800 *
801 * @param PKCx PKC instance
802 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
803 * @retval None
804 */
805 __STATIC_INLINE void ll_pkc_set_r1y_pointer(pkc_regs_t *PKCx, uint32_t pointer)
806 {
807 MODIFY_REG(PKCx->CONFIG5, PKC_CONFIG5_R1YPTR, pointer << PKC_CONFIG5_R1YPTR_Pos);
808 }
809
810 /**
811 * @brief Get PKC parameter R1y pointer in pkc sram.
812 *
813 * Register|BitsName
814 * --------|--------
815 * CONFIG5 | R1YPTR
816 *
817 * @param PKCx PKC instance
818 * @retval Return value is between: 0 ~ 0x200
819 */
820 __STATIC_INLINE uint32_t ll_pkc_get_r1y_pointer(pkc_regs_t *PKCx)
821 {
822 return (READ_BITS(PKCx->CONFIG5, PKC_CONFIG5_R1YPTR) >> PKC_CONFIG5_R1YPTR_Pos);
823 }
824
825 /**
826 * @brief Set PKC parameter R1z pointer in pkc sram.
827 *
828 * Register|BitsName
829 * --------|--------
830 * CONFIG6 | R1ZPTR
831 *
832 * @param PKCx PKC instance
833 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
834 * @retval None
835 */
836 __STATIC_INLINE void ll_pkc_set_r1z_pointer(pkc_regs_t *PKCx, uint32_t pointer)
837 {
838 MODIFY_REG(PKCx->CONFIG6, PKC_CONFIG6_R1ZPTR, pointer << PKC_CONFIG6_R1ZPTR_Pos);
839 }
840
841 /**
842 * @brief Get PKC parameter R1z pointer in pkc sram.
843 *
844 * Register|BitsName
845 * --------|--------
846 * CONFIG6 | R1ZPTR
847 *
848 * @param PKCx PKC instance
849 * @retval Return value is between: 0 ~ 0x200
850 */
851 __STATIC_INLINE uint32_t ll_pkc_get_r1z_pointer(pkc_regs_t *PKCx)
852 {
853 return (READ_BITS(PKCx->CONFIG6, PKC_CONFIG6_R1ZPTR) >> PKC_CONFIG6_R1ZPTR_Pos);
854 }
855
856 /**
857 * @brief Set PKC parameter Tmp1 pointer in pkc sram.
858 *
859 * Register|BitsName
860 * --------|--------
861 * CONFIG6 | TMP1PTR
862 *
863 * @param PKCx PKC instance
864 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
865 * @retval None
866 */
867 __STATIC_INLINE void ll_pkc_set_tmp1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
868 {
869 MODIFY_REG(PKCx->CONFIG6, PKC_CONFIG6_TMP1PTR, pointer << PKC_CONFIG6_TMP1PTR_Pos);
870 }
871
872 /**
873 * @brief Get PKC parameter Tmp1 pointer in pkc sram.
874 *
875 * Register|BitsName
876 * --------|--------
877 * CONFIG6 | TMP1PTR
878 *
879 * @param PKCx PKC instance
880 * @retval Return value is between: 0 ~ 0x200
881 */
882 __STATIC_INLINE uint32_t ll_pkc_get_tmp1_pointer(pkc_regs_t *PKCx)
883 {
884 return (READ_BITS(PKCx->CONFIG6, PKC_CONFIG6_TMP1PTR) >> PKC_CONFIG6_TMP1PTR_Pos);
885 }
886
887 /**
888 * @brief Set PKC parameter Tmp2 pointer in pkc sram.
889 *
890 * Register|BitsName
891 * --------|--------
892 * CONFIG7 | TMP2PTR
893 *
894 * @param PKCx PKC instance
895 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
896 * @retval None
897 */
898 __STATIC_INLINE void ll_pkc_set_tmp2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
899 {
900 MODIFY_REG(PKCx->CONFIG7, PKC_CONFIG7_TMP2PTR, pointer << PKC_CONFIG7_TMP2PTR_Pos);
901 }
902
903 /**
904 * @brief Get PKC parameter Tmp2 pointer in pkc sram.
905 *
906 * Register|BitsName
907 * --------|--------
908 * CONFIG7 | TMP2PTR
909 *
910 * @param PKCx PKC instance
911 * @retval Return value is between: 0 ~ 0x200
912 */
913 __STATIC_INLINE uint32_t ll_pkc_get_tmp2_pointer(pkc_regs_t *PKCx)
914 {
915 return (READ_BITS(PKCx->CONFIG7, PKC_CONFIG7_TMP2PTR) >> PKC_CONFIG7_TMP2PTR_Pos);
916 }
917
918 /**
919 * @brief Set PKC parameter Tmp3 pointer in pkc sram.
920 *
921 * Register|BitsName
922 * --------|--------
923 * CONFIG7 | TMP3PTR
924 *
925 * @param PKCx PKC instance
926 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
927 * @retval None
928 */
929 __STATIC_INLINE void ll_pkc_set_tmp3_pointer(pkc_regs_t *PKCx, uint32_t pointer)
930 {
931 MODIFY_REG(PKCx->CONFIG7, PKC_CONFIG7_TMP3PTR, pointer << PKC_CONFIG7_TMP3PTR_Pos);
932 }
933
934 /**
935 * @brief Get PKC parameter Tmp3 pointer in pkc sram.
936 *
937 * Register|BitsName
938 * --------|--------
939 * CONFIG7 | TMP3PTR
940 *
941 * @param PKCx PKC instance
942 * @retval Return value is between: 0 ~ 0x200
943 */
944 __STATIC_INLINE uint32_t ll_pkc_get_tmp3_pointer(pkc_regs_t *PKCx)
945 {
946 return (READ_BITS(PKCx->CONFIG7, PKC_CONFIG7_TMP3PTR) >> PKC_CONFIG7_TMP3PTR_Pos);
947 }
948
949 /**
950 * @brief Set PKC parameter Tmp4 pointer in pkc sram.
951 *
952 * Register|BitsName
953 * --------|--------
954 * CONFIG8 | TMP4PTR
955 *
956 * @param PKCx PKC instance
957 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
958 * @retval None
959 */
960 __STATIC_INLINE void ll_pkc_set_tmp4_pointer(pkc_regs_t *PKCx, uint32_t pointer)
961 {
962 MODIFY_REG(PKCx->CONFIG8, PKC_CONFIG8_TMP4PTR, pointer << PKC_CONFIG8_TMP4PTR_Pos);
963 }
964
965 /**
966 * @brief Get PKC parameter Tmp4 pointer in pkc sram.
967 *
968 * Register|BitsName
969 * --------|--------
970 * CONFIG8 | TMP4PTR
971 *
972 * @param PKCx PKC instance
973 * @retval Return value is between: 0 ~ 0x200
974 */
975 __STATIC_INLINE uint32_t ll_pkc_get_tmp4_pointer(pkc_regs_t *PKCx)
976 {
977 return (READ_BITS(PKCx->CONFIG8, PKC_CONFIG8_TMP4PTR) >> PKC_CONFIG8_TMP4PTR_Pos);
978 }
979
980 /**
981 * @brief Set PKC parameter Tmp5 pointer in pkc sram.
982 *
983 * Register|BitsName
984 * --------|--------
985 * CONFIG8 | TMP5PTR
986 *
987 * @param PKCx PKC instance
988 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
989 * @retval None
990 */
991 __STATIC_INLINE void ll_pkc_set_tmp5_pointer(pkc_regs_t *PKCx, uint32_t pointer)
992 {
993 MODIFY_REG(PKCx->CONFIG8, PKC_CONFIG8_TMP5PTR, pointer << PKC_CONFIG8_TMP5PTR_Pos);
994 }
995
996 /**
997 * @brief Get PKC parameter Tmp5 pointer in pkc sram.
998 *
999 * Register|BitsName
1000 * --------|--------
1001 * CONFIG8 | TMP5PTR
1002 *
1003 * @param PKCx PKC instance
1004 * @retval Return value is between: 0 ~ 0x200
1005 */
1006 __STATIC_INLINE uint32_t ll_pkc_get_tmp5_pointer(pkc_regs_t *PKCx)
1007 {
1008 return (READ_BITS(PKCx->CONFIG8, PKC_CONFIG8_TMP5PTR) >> PKC_CONFIG8_TMP5PTR_Pos);
1009 }
1010
1011 /**
1012 * @brief Set PKC parameter Tmp6 pointer in pkc sram.
1013 *
1014 * Register|BitsName
1015 * --------|--------
1016 * CONFIG9 | TMP6PTR
1017 *
1018 * @param PKCx PKC instance
1019 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1020 * @retval None
1021 */
1022 __STATIC_INLINE void ll_pkc_set_tmp6_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1023 {
1024 MODIFY_REG(PKCx->CONFIG9, PKC_CONFIG9_TMP6PTR, pointer << PKC_CONFIG9_TMP6PTR_Pos);
1025 }
1026
1027 /**
1028 * @brief Get PKC parameter Tmp6 pointer in pkc sram.
1029 *
1030 * Register|BitsName
1031 * --------|--------
1032 * CONFIG9 | TMP6PTR
1033 *
1034 * @param PKCx PKC instance
1035 * @retval Return value is between: 0 ~ 0x200
1036 */
1037 __STATIC_INLINE uint32_t ll_pkc_get_tmp6_pointer(pkc_regs_t *PKCx)
1038 {
1039 return (READ_BITS(PKCx->CONFIG9, PKC_CONFIG9_TMP6PTR) >> PKC_CONFIG9_TMP6PTR_Pos);
1040 }
1041
1042 /**
1043 * @brief Set PKC parameter Constant1 pointer in pkc sram.
1044 *
1045 * Register|BitsName
1046 * --------|--------
1047 * CONFIG9 | CONST1PTR
1048 *
1049 * @param PKCx PKC instance
1050 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1051 * @retval None
1052 */
1053 __STATIC_INLINE void ll_pkc_set_constant1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1054 {
1055 MODIFY_REG(PKCx->CONFIG9, PKC_CONFIG9_CONST1PTR, pointer << PKC_CONFIG9_CONST1PTR_Pos);
1056 }
1057
1058 /**
1059 * @brief Get PKC parameter Constant1 pointer in pkc sram.
1060 *
1061 * Register|BitsName
1062 * --------|--------
1063 * CONFIG9 | CONST1PTR
1064 *
1065 * @param PKCx PKC instance
1066 * @retval Return value is between: 0 ~ 0x200
1067 */
1068 __STATIC_INLINE uint32_t ll_pkc_get_constant1_pointer(pkc_regs_t *PKCx)
1069 {
1070 return (READ_BITS(PKCx->CONFIG9, PKC_CONFIG9_CONST1PTR) >> PKC_CONFIG9_CONST1PTR_Pos);
1071 }
1072
1073 /**
1074 * @brief Set PKC parameter X1 pointer in pkc sram.
1075 *
1076 * Register|BitsName
1077 * --------|--------
1078 * CONFIG10 | X1PTR
1079 *
1080 * @param PKCx PKC instance
1081 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1082 * @retval None
1083 */
1084 __STATIC_INLINE void ll_pkc_set_x1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1085 {
1086 MODIFY_REG(PKCx->CONFIG10, PKC_CONFIG10_X1PTR, pointer << PKC_CONFIG10_X1PTR_Pos);
1087 }
1088
1089 /**
1090 * @brief Get PKC parameter X1 pointer in pkc sram.
1091 *
1092 * Register|BitsName
1093 * --------|--------
1094 * CONFIG10 | X1PTR
1095 *
1096 * @param PKCx PKC instance
1097 * @retval Return value is between: 0 ~ 0x200
1098 */
1099 __STATIC_INLINE uint32_t ll_pkc_get_x1_pointer(pkc_regs_t *PKCx)
1100 {
1101 return (READ_BITS(PKCx->CONFIG10, PKC_CONFIG10_X1PTR) >> PKC_CONFIG10_X1PTR_Pos);
1102 }
1103
1104 /**
1105 * @brief Set PKC parameter X2 pointer in pkc sram.
1106 *
1107 * Register|BitsName
1108 * --------|--------
1109 * CONFIG10 | X2PTR
1110 *
1111 * @param PKCx PKC instance
1112 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1113 * @retval None
1114 */
1115 __STATIC_INLINE void ll_pkc_set_x2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1116 {
1117 MODIFY_REG(PKCx->CONFIG10, PKC_CONFIG10_X2PTR, pointer << PKC_CONFIG10_X2PTR_Pos);
1118 }
1119
1120 /**
1121 * @brief Get PKC parameter X2 pointer in pkc sram.
1122 *
1123 * Register|BitsName
1124 * --------|--------
1125 * CONFIG10 | X2PTR
1126 *
1127 * @param PKCx PKC instance
1128 * @retval Return value is between: 0 ~ 0x200
1129 */
1130 __STATIC_INLINE uint32_t ll_pkc_get_x2_pointer(pkc_regs_t *PKCx)
1131 {
1132 return (READ_BITS(PKCx->CONFIG10, PKC_CONFIG10_X2PTR) >> PKC_CONFIG10_X2PTR_Pos);
1133 }
1134
1135 /**
1136 * @brief Set PKC parameter MITmp pointer in pkc sram.
1137 *
1138 * Register|BitsName
1139 * --------|--------
1140 * CONFIG11 | MITMPPTR
1141 *
1142 * @param PKCx PKC instance
1143 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1144 * @retval None
1145 */
1146 __STATIC_INLINE void ll_pkc_set_mitmp_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1147 {
1148 MODIFY_REG(PKCx->CONFIG11, PKC_CONFIG11_MITMPPTR, pointer << PKC_CONFIG11_MITMPPTR_Pos);
1149 }
1150
1151 /**
1152 * @brief Get PKC parameter MITmp pointer in pkc sram.
1153 *
1154 * Register|BitsName
1155 * --------|--------
1156 * CONFIG11 | MITMPPTR
1157 *
1158 * @param PKCx PKC instance
1159 * @retval Return value is between: 0 ~ 0x200
1160 */
1161 __STATIC_INLINE uint32_t ll_pkc_get_mitmp_pointer(pkc_regs_t *PKCx)
1162 {
1163 return (READ_BITS(PKCx->CONFIG11, PKC_CONFIG11_MITMPPTR) >> PKC_CONFIG11_MITMPPTR_Pos);
1164 }
1165
1166 /**
1167 * @brief Set PKC parameter TmpK pointer in pkc sram.
1168 *
1169 * Register|BitsName
1170 * --------|--------
1171 * CONFIG11 | TMPKPTR
1172 *
1173 * @param PKCx PKC instance
1174 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1175 * @retval None
1176 */
1177 __STATIC_INLINE void ll_pkc_set_tmpk_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1178 {
1179 MODIFY_REG(PKCx->CONFIG11, PKC_CONFIG11_TMPKPTR, pointer << PKC_CONFIG11_TMPKPTR_Pos);
1180 }
1181
1182 /**
1183 * @brief Get PKC parameter TmpK pointer in pkc sram.
1184 *
1185 * Register|BitsName
1186 * --------|--------
1187 * CONFIG11 | TMPKPTR
1188 *
1189 * @param PKCx PKC instance
1190 * @retval Return value is between: 0 ~ 0x200
1191 */
1192 __STATIC_INLINE uint32_t ll_pkc_get_tmpk_pointer(pkc_regs_t *PKCx)
1193 {
1194 return (READ_BITS(PKCx->CONFIG11, PKC_CONFIG11_TMPKPTR) >> PKC_CONFIG11_TMPKPTR_Pos);
1195 }
1196
1197 /**
1198 * @brief Set ECC parameter A pointer in pkc sram.
1199 *
1200 * Register|BitsName
1201 * --------|--------
1202 * CONFIG12 | APTR
1203 *
1204 * @param PKCx PKC instance
1205 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1206 * @retval None
1207 */
1208 __STATIC_INLINE void ll_pkc_set_ecc_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1209 {
1210 MODIFY_REG(PKCx->CONFIG12, PKC_CONFIG12_APTR, pointer << PKC_CONFIG12_APTR_Pos);
1211 }
1212
1213 /**
1214 * @brief Get ECC parameter A pointer in pkc sram.
1215 *
1216 * Register|BitsName
1217 * --------|--------
1218 * CONFIG12 | APTR
1219 *
1220 * @param PKCx PKC instance
1221 * @retval Return value is between: 0 ~ 0x200
1222 */
1223 __STATIC_INLINE uint32_t ll_pkc_get_ecc_a_pointer(pkc_regs_t *PKCx)
1224 {
1225 return (READ_BITS(PKCx->CONFIG12, PKC_CONFIG12_APTR) >> PKC_CONFIG12_APTR_Pos);
1226 }
1227
1228 /**
1229 * @brief Set ECC parameter B pointer in pkc sram.
1230 *
1231 * Register|BitsName
1232 * --------|--------
1233 * CONFIG12 | BPTR
1234 *
1235 * @param PKCx PKC instance
1236 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1237 * @retval None
1238 */
1239 __STATIC_INLINE void ll_pkc_set_ecc_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1240 {
1241 MODIFY_REG(PKCx->CONFIG12, PKC_CONFIG12_BPTR, pointer << PKC_CONFIG12_BPTR_Pos);
1242 }
1243
1244 /**
1245 * @brief Get ECC parameter B pointer in pkc sram.
1246 *
1247 * Register|BitsName
1248 * --------|--------
1249 * CONFIG12 | BPTR
1250 *
1251 * @param PKCx PKC instance
1252 * @retval Return value is between: 0 ~ 0x200
1253 */
1254 __STATIC_INLINE uint32_t ll_pkc_get_ecc_b_pointer(pkc_regs_t *PKCx)
1255 {
1256 return (READ_BITS(PKCx->CONFIG12, PKC_CONFIG12_BPTR) >> PKC_CONFIG12_BPTR_Pos);
1257 }
1258
1259 /**
1260 * @brief Set constant value for montgomery multiply in pkc sram.
1261 *
1262 * Register|BitsName
1263 * --------|--------
1264 * CONFIG13 | CONSTP
1265 *
1266 * @param PKCx PKC instance
1267 * @param ConstP This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1268 * @retval None
1269 */
1270 __STATIC_INLINE void ll_pkc_set_constp(pkc_regs_t *PKCx, uint32_t ConstP)
1271 {
1272 WRITE_REG(PKCx->CONFIG13, ConstP);
1273 }
1274
1275 /**
1276 * @brief Get constant value for montgomery multiply in pkc sram.
1277 *
1278 * Register|BitsName
1279 * --------|--------
1280 * CONFIG13 | CONSTP
1281 *
1282 * @param PKCx PKC instance
1283 * @retval Return value is between: 0 ~ 0x200
1284 */
1285 __STATIC_INLINE uint32_t ll_pkc_get_constp(pkc_regs_t *PKCx)
1286 {
1287 return (READ_REG(PKCx->CONFIG13));
1288 }
1289
1290 /**
1291 * @brief Enable pkc start in software mode.
1292 *
1293 * Register|BitsName
1294 * --------|--------
1295 * SW_CTRL | OPSTART
1296 *
1297 * @param PKCx PKC instance
1298 * @retval None
1299 */
1300 __STATIC_INLINE void ll_pkc_enable_software_start(pkc_regs_t *PKCx)
1301 {
1302 SET_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_OPSTART);
1303 }
1304
1305 /**
1306 * @brief Disable pkc start in software mode.
1307 *
1308 * Register|BitsName
1309 * --------|--------
1310 * SW_CTRL | OPSTART
1311 *
1312 * @param PKCx PKC instance
1313 * @retval None
1314 */
1315 __STATIC_INLINE void ll_pkc_disable_software_start(pkc_regs_t *PKCx)
1316 {
1317 CLEAR_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_OPSTART);
1318 }
1319
1320 /**
1321 * @brief Indicate whether the pkc start in software mode is enabled.
1322 *
1323 * Register|BitsName
1324 * --------|--------
1325 * SW_CTRL | OPSTART
1326 *
1327 * @param PKCx PKC instance
1328 * @retval State of bit (1 or 0).
1329 */
1330 __STATIC_INLINE uint32_t ll_pkc_is_enabled_software_start(pkc_regs_t *PKCx)
1331 {
1332 return (READ_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_OPSTART) == (PKC_SW_CTRL_OPSTART));
1333 }
1334
1335 /**
1336 * @brief Set operation mode in software mode.
1337 *
1338 * Register|BitsName
1339 * --------|--------
1340 * SW_CTRL | OPMODE
1341 *
1342 * @param PKCx PKC instance
1343 * @param operation_mode This parameter can be one of the following values:
1344 * @arg @ref LL_PKC_operation_mode_MULTIPLY
1345 * @arg @ref LL_PKC_operation_mode_INVERTION
1346 * @arg @ref LL_PKC_operation_mode_ADD
1347 * @arg @ref LL_PKC_operation_mode_SUB
1348 * @arg @ref LL_PKC_operation_mode_COMPARE
1349 * @arg @ref LL_PKC_operation_mode_LEFTSHIFT
1350 * @arg @ref LL_PKC_operation_mode_BIGINTEGERMULTIPLY
1351 * @arg @ref LL_PKC_operation_mode_BIGINTEGERADD
1352 * @retval None
1353 */
1354 __STATIC_INLINE void ll_pkc_set_operation_mode(pkc_regs_t *PKCx, uint32_t operation_mode)
1355 {
1356 MODIFY_REG(PKCx->SW_CTRL, PKC_SW_CTRL_OPMODE, operation_mode);
1357 }
1358
1359 /**
1360 * @brief Get operation mode in software mode.
1361 *
1362 * Register|BitsName
1363 * --------|--------
1364 * SW_CTRL | OPMODE
1365 *
1366 * @param PKCx PKC instance
1367 * @retval Return value can be one of the following values:
1368 * @arg @ref LL_PKC_operation_mode_MULTIPLY
1369 * @arg @ref LL_PKC_operation_mode_INVERTION
1370 * @arg @ref LL_PKC_operation_mode_ADD
1371 * @arg @ref LL_PKC_operation_mode_SUB
1372 * @arg @ref LL_PKC_operation_mode_COMPARE
1373 * @arg @ref LL_PKC_operation_mode_LEFTSHIFT
1374 * @arg @ref LL_PKC_operation_mode_BIGINTEGERMULTIPLY
1375 * @arg @ref LL_PKC_operation_mode_BIGINTEGERADD
1376 */
1377 __STATIC_INLINE uint32_t ll_pkc_get_operation_mode(pkc_regs_t *PKCx)
1378 {
1379 return (READ_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_OPMODE));
1380 }
1381
1382 /**
1383 * @brief Enable Dummy Multi in software mode.
1384 *
1385 * Register|BitsName
1386 * --------|--------
1387 * SW_CTRL | STARTDM
1388 *
1389 * @param PKCx PKC instance
1390 * @retval None
1391 */
1392 __STATIC_INLINE void ll_pkc_enable_dummy_multi(pkc_regs_t *PKCx)
1393 {
1394 SET_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_STARTDM);
1395 }
1396
1397 /**
1398 * @brief Disable Dummy Multi in software mode.
1399 *
1400 * Register|BitsName
1401 * --------|--------
1402 * SW_CTRL | STARTDM
1403 *
1404 * @param PKCx PKC instance
1405 * @retval None
1406 */
1407 __STATIC_INLINE void ll_pkc_disable_dummy_multi(pkc_regs_t *PKCx)
1408 {
1409 CLEAR_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_STARTDM);
1410 }
1411
1412 /**
1413 * @brief Indicate whether the Dummy Multi in software mode is enabled.
1414 *
1415 * Register|BitsName
1416 * --------|--------
1417 * SW_CTRL | STARTDM
1418 *
1419 * @param PKCx PKC instance
1420 * @retval State of bit (1 or 0).
1421 */
1422 __STATIC_INLINE uint32_t ll_pkc_is_enabled_dummy_multi(pkc_regs_t *PKCx)
1423 {
1424 return (READ_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_STARTDM) == (PKC_SW_CTRL_STARTDM));
1425 }
1426
1427 /**
1428 * @brief Enable Random Clock Gating in software mode.
1429 *
1430 * Register|BitsName
1431 * --------|--------
1432 * SW_CTRL | RANDEN
1433 *
1434 * @param PKCx PKC instance
1435 * @retval None
1436 */
1437 __STATIC_INLINE void ll_pkc_enable_random_clock_gating(pkc_regs_t *PKCx)
1438 {
1439 SET_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_RANDEN);
1440 }
1441
1442 /**
1443 * @brief Disable Random Clock Gating in software mode.
1444 *
1445 * Register|BitsName
1446 * --------|--------
1447 * SW_CTRL | RANDEN
1448 *
1449 * @param PKCx PKC instance
1450 * @retval None
1451 */
1452 __STATIC_INLINE void ll_pkc_disable_random_clock_gating(pkc_regs_t *PKCx)
1453 {
1454 CLEAR_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_RANDEN);
1455 }
1456
1457 /**
1458 * @brief Indicate whether the Random Clock Gating in software mode is enabled.
1459 *
1460 * Register|BitsName
1461 * --------|--------
1462 * SW_CTRL | RANDEN
1463 *
1464 * @param PKCx PKC instance
1465 * @retval State of bit (1 or 0).
1466 */
1467 __STATIC_INLINE uint32_t ll_pkc_is_enabled_random_clock_gating(pkc_regs_t *PKCx)
1468 {
1469 return (READ_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_RANDEN) == (PKC_SW_CTRL_RANDEN));
1470 }
1471
1472 /**
1473 * @brief Set modular multiplication parameter A pointer in pkc sram.
1474 *
1475 * Register|BitsName
1476 * --------|--------
1477 * SW_CONFIG0 | MMAPTR
1478 *
1479 * @param PKCx PKC instance
1480 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1481 * @retval None
1482 */
1483 __STATIC_INLINE void ll_pkc_set_mm_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1484 {
1485 MODIFY_REG(PKCx->SW_CONFIG0, PKC_SW_CONFIG0_MMAPTR, pointer << PKC_SW_CONFIG0_MMAPTR_Pos);
1486 }
1487
1488 /**
1489 * @brief Get modular multiplication parameter A pointer in pkc sram.
1490 *
1491 * Register|BitsName
1492 * --------|--------
1493 * SW_CONFIG0 | MMAPTR
1494 *
1495 * @param PKCx PKC instance
1496 * @retval Return value is between: 0 ~ 0x200
1497 */
1498 __STATIC_INLINE uint32_t ll_pkc_get_mm_a_pointer(pkc_regs_t *PKCx)
1499 {
1500 return (READ_BITS(PKCx->SW_CONFIG0, PKC_SW_CONFIG0_MMAPTR) >> PKC_SW_CONFIG0_MMAPTR_Pos);
1501 }
1502
1503 /**
1504 * @brief Set modular multiplication parameter B pointer in pkc sram.
1505 *
1506 * Register|BitsName
1507 * --------|--------
1508 * SW_CONFIG0 | MMBPTR
1509 *
1510 * @param PKCx PKC instance
1511 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1512 * @retval None
1513 */
1514 __STATIC_INLINE void ll_pkc_set_mm_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1515 {
1516 MODIFY_REG(PKCx->SW_CONFIG0, PKC_SW_CONFIG0_MMBPTR, pointer << PKC_SW_CONFIG0_MMBPTR_Pos);
1517 }
1518
1519 /**
1520 * @brief Get modular multiplication parameter B pointer in pkc sram.
1521 *
1522 * Register|BitsName
1523 * --------|--------
1524 * SW_CONFIG0 | MMBPTR
1525 *
1526 * @param PKCx PKC instance
1527 * @retval Return value is between: 0 ~ 0x200
1528 */
1529 __STATIC_INLINE uint32_t ll_pkc_get_mm_b_pointer(pkc_regs_t *PKCx)
1530 {
1531 return (READ_BITS(PKCx->SW_CONFIG0, PKC_SW_CONFIG0_MMBPTR) >> PKC_SW_CONFIG0_MMBPTR_Pos);
1532 }
1533
1534 /**
1535 * @brief Set modular multiplication parameter P pointer in pkc sram.
1536 *
1537 * Register|BitsName
1538 * --------|--------
1539 * SW_CONFIG1 | MMPPTR
1540 *
1541 * @param PKCx PKC instance
1542 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1543 * @retval None
1544 */
1545 __STATIC_INLINE void ll_pkc_set_mm_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1546 {
1547 MODIFY_REG(PKCx->SW_CONFIG1, PKC_SW_CONFIG1_MMPPTR, pointer << PKC_SW_CONFIG1_MMPPTR_Pos);
1548 }
1549
1550 /**
1551 * @brief Get modular multiplication parameter P pointer in pkc sram.
1552 *
1553 * Register|BitsName
1554 * --------|--------
1555 * SW_CONFIG1 | MMPPTR
1556 *
1557 * @param PKCx PKC instance
1558 * @retval Return value is between: 0 ~ 0x200
1559 */
1560 __STATIC_INLINE uint32_t ll_pkc_get_mm_p_pointer(pkc_regs_t *PKCx)
1561 {
1562 return (READ_BITS(PKCx->SW_CONFIG1, PKC_SW_CONFIG1_MMPPTR) >> PKC_SW_CONFIG1_MMPPTR_Pos);
1563 }
1564
1565 /**
1566 * @brief Set modular multiplication parameter C pointer in pkc sram.
1567 *
1568 * Register|BitsName
1569 * --------|--------
1570 * SW_CONFIG1 | MMCPTR
1571 *
1572 * @param PKCx PKC instance
1573 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1574 * @retval None
1575 */
1576 __STATIC_INLINE void ll_pkc_set_mm_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1577 {
1578 MODIFY_REG(PKCx->SW_CONFIG1, PKC_SW_CONFIG1_MMCPTR, pointer << PKC_SW_CONFIG1_MMCPTR_Pos);
1579 }
1580
1581 /**
1582 * @brief Get modular multiplication parameter C pointer in pkc sram.
1583 *
1584 * Register|BitsName
1585 * --------|--------
1586 * SW_CONFIG1 | MMCPTR
1587 *
1588 * @param PKCx PKC instance
1589 * @retval Return value is between: 0 ~ 0x200
1590 */
1591 __STATIC_INLINE uint32_t ll_pkc_get_mm_c_pointer(pkc_regs_t *PKCx)
1592 {
1593 return (READ_BITS(PKCx->SW_CONFIG1, PKC_SW_CONFIG1_MMCPTR) >> PKC_SW_CONFIG1_MMCPTR_Pos);
1594 }
1595
1596 /**
1597 * @brief Set modular add/sub parameter A pointer in pkc sram.
1598 *
1599 * Register|BitsName
1600 * --------|--------
1601 * SW_CONFIG2 | MASAPTR
1602 *
1603 * @param PKCx PKC instance
1604 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1605 * @retval None
1606 */
1607 __STATIC_INLINE void ll_pkc_set_mas_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1608 {
1609 MODIFY_REG(PKCx->SW_CONFIG2, PKC_SW_CONFIG2_MASAPTR, pointer << PKC_SW_CONFIG2_MASAPTR_Pos);
1610 }
1611
1612 /**
1613 * @brief Get modular add/sub parameter A pointer in pkc sram.
1614 *
1615 * Register|BitsName
1616 * --------|--------
1617 * SW_CONFIG2 | MASAPTR
1618 *
1619 * @param PKCx PKC instance
1620 * @retval Return value is between: 0 ~ 0x200
1621 */
1622 __STATIC_INLINE uint32_t ll_pkc_get_mas_a_pointer(pkc_regs_t *PKCx)
1623 {
1624 return (READ_BITS(PKCx->SW_CONFIG2, PKC_SW_CONFIG2_MASAPTR) >> PKC_SW_CONFIG2_MASAPTR_Pos);
1625 }
1626
1627 /**
1628 * @brief Set modular add/sub parameter B pointer in pkc sram.
1629 *
1630 * Register|BitsName
1631 * --------|--------
1632 * SW_CONFIG2 | MASBPTR
1633 *
1634 * @param PKCx PKC instance
1635 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1636 * @retval None
1637 */
1638 __STATIC_INLINE void ll_pkc_set_mas_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1639 {
1640 MODIFY_REG(PKCx->SW_CONFIG2, PKC_SW_CONFIG2_MASBPTR, pointer << PKC_SW_CONFIG2_MASBPTR_Pos);
1641 }
1642
1643 /**
1644 * @brief Get modular add/sub parameter B pointer in pkc sram.
1645 *
1646 * Register|BitsName
1647 * --------|--------
1648 * SW_CONFIG2 | MASBPTR
1649 *
1650 * @param PKCx PKC instance
1651 * @retval Return value is between: 0 ~ 0x200
1652 */
1653 __STATIC_INLINE uint32_t ll_pkc_get_mas_b_pointer(pkc_regs_t *PKCx)
1654 {
1655 return (READ_BITS(PKCx->SW_CONFIG2, PKC_SW_CONFIG2_MASBPTR) >> PKC_SW_CONFIG2_MASBPTR_Pos);
1656 }
1657
1658 /**
1659 * @brief Set modular add/sub parameter P pointer in pkc sram.
1660 *
1661 * Register|BitsName
1662 * --------|--------
1663 * SW_CONFIG3 | MASPPTR
1664 *
1665 * @param PKCx PKC instance
1666 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1667 * @retval None
1668 */
1669 __STATIC_INLINE void ll_pkc_set_mas_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1670 {
1671 MODIFY_REG(PKCx->SW_CONFIG3, PKC_SW_CONFIG3_MASPPTR, pointer << PKC_SW_CONFIG3_MASPPTR_Pos);
1672 }
1673
1674 /**
1675 * @brief Get modular add/sub parameter P pointer in pkc sram.
1676 *
1677 * Register|BitsName
1678 * --------|--------
1679 * SW_CONFIG3 | MASPPTR
1680 *
1681 * @param PKCx PKC instance
1682 * @retval Return value is between: 0 ~ 0x200
1683 */
1684 __STATIC_INLINE uint32_t ll_pkc_get_mas_p_pointer(pkc_regs_t *PKCx)
1685 {
1686 return (READ_BITS(PKCx->SW_CONFIG3, PKC_SW_CONFIG3_MASPPTR) >> PKC_SW_CONFIG3_MASPPTR_Pos);
1687 }
1688
1689 /**
1690 * @brief Set modular add/sub parameter C pointer in pkc sram.
1691 *
1692 * Register|BitsName
1693 * --------|--------
1694 * SW_CONFIG3 | MASCPTR
1695 *
1696 * @param PKCx PKC instance
1697 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1698 * @retval None
1699 */
1700 __STATIC_INLINE void ll_pkc_set_mas_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1701 {
1702 MODIFY_REG(PKCx->SW_CONFIG3, PKC_SW_CONFIG3_MASCPTR, pointer << PKC_SW_CONFIG3_MASCPTR_Pos);
1703 }
1704
1705 /**
1706 * @brief Get modular add/sub parameter C pointer in pkc sram.
1707 *
1708 * Register|BitsName
1709 * --------|--------
1710 * SW_CONFIG3 | MASCPTR
1711 *
1712 * @param PKCx PKC instance
1713 * @retval Return value is between: 0 ~ 0x200
1714 */
1715 __STATIC_INLINE uint32_t ll_pkc_get_mas_c_pointer(pkc_regs_t *PKCx)
1716 {
1717 return (READ_BITS(PKCx->SW_CONFIG3, PKC_SW_CONFIG3_MASCPTR) >> PKC_SW_CONFIG3_MASCPTR_Pos);
1718 }
1719
1720 /**
1721 * @brief Set modular invertion parameter U pointer in pkc sram.
1722 *
1723 * Register|BitsName
1724 * --------|--------
1725 * SW_CONFIG4 | MIUPTR
1726 *
1727 * @param PKCx PKC instance
1728 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1729 * @retval None
1730 */
1731 __STATIC_INLINE void ll_pkc_set_mi_u_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1732 {
1733 MODIFY_REG(PKCx->SW_CONFIG4, PKC_SW_CONFIG4_MIUPTR, pointer << PKC_SW_CONFIG4_MIUPTR_Pos);
1734 }
1735
1736 /**
1737 * @brief Get modular invertion parameter U pointer in pkc sram.
1738 *
1739 * Register|BitsName
1740 * --------|--------
1741 * SW_CONFIG4 | MIUPTR
1742 *
1743 * @param PKCx PKC instance
1744 * @retval Return value is between: 0 ~ 0x200
1745 */
1746 __STATIC_INLINE uint32_t ll_pkc_get_mi_u_pointer(pkc_regs_t *PKCx)
1747 {
1748 return (READ_BITS(PKCx->SW_CONFIG4, PKC_SW_CONFIG4_MIUPTR) >> PKC_SW_CONFIG4_MIUPTR_Pos);
1749 }
1750
1751 /**
1752 * @brief Set modular invertion parameter V pointer in pkc sram.
1753 *
1754 * Register|BitsName
1755 * --------|--------
1756 * SW_CONFIG4 | MIVPTR
1757 *
1758 * @param PKCx PKC instance
1759 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1760 * @retval None
1761 */
1762 __STATIC_INLINE void ll_pkc_set_mi_v_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1763 {
1764 MODIFY_REG(PKCx->SW_CONFIG4, PKC_SW_CONFIG4_MIVPTR, pointer << PKC_SW_CONFIG4_MIVPTR_Pos);
1765 }
1766
1767 /**
1768 * @brief Get modular invertion parameter V pointer in pkc sram.
1769 *
1770 * Register|BitsName
1771 * --------|--------
1772 * SW_CONFIG4 | MIVPTR
1773 *
1774 * @param PKCx PKC instance
1775 * @retval Return value is between: 0 ~ 0x200
1776 */
1777 __STATIC_INLINE uint32_t ll_pkc_get_mi_v_pointer(pkc_regs_t *PKCx)
1778 {
1779 return (READ_BITS(PKCx->SW_CONFIG4, PKC_SW_CONFIG4_MIVPTR) >> PKC_SW_CONFIG4_MIVPTR_Pos);
1780 }
1781
1782 /**
1783 * @brief Set modular invertion parameter X1 pointer in pkc sram.
1784 *
1785 * Register|BitsName
1786 * --------|--------
1787 * SW_CONFIG5 | MIX1PTR
1788 *
1789 * @param PKCx PKC instance
1790 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1791 * @retval None
1792 */
1793 __STATIC_INLINE void ll_pkc_set_mi_x1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1794 {
1795 MODIFY_REG(PKCx->SW_CONFIG5, PKC_SW_CONFIG5_MIX1PTR, pointer << PKC_SW_CONFIG5_MIX1PTR_Pos);
1796 }
1797
1798 /**
1799 * @brief Get modular invertion parameter X1 pointer in pkc sram.
1800 *
1801 * Register|BitsName
1802 * --------|--------
1803 * SW_CONFIG5 | MIX1PTR
1804 *
1805 * @param PKCx PKC instance
1806 * @retval Return value is between: 0 ~ 0x200
1807 */
1808 __STATIC_INLINE uint32_t ll_pkc_get_mi_x1_pointer(pkc_regs_t *PKCx)
1809 {
1810 return (READ_BITS(PKCx->SW_CONFIG5, PKC_SW_CONFIG5_MIX1PTR) >> PKC_SW_CONFIG5_MIX1PTR_Pos);
1811 }
1812
1813 /**
1814 * @brief Set modular invertion parameter X1 pointer in pkc sram.
1815 *
1816 * Register|BitsName
1817 * --------|--------
1818 * SW_CONFIG5 | MIX2PTR
1819 *
1820 * @param PKCx PKC instance
1821 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1822 * @retval None
1823 */
1824 __STATIC_INLINE void ll_pkc_set_mi_x2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1825 {
1826 MODIFY_REG(PKCx->SW_CONFIG5, PKC_SW_CONFIG5_MIX2PTR, pointer << PKC_SW_CONFIG5_MIX2PTR_Pos);
1827 }
1828
1829 /**
1830 * @brief Get modular invertion parameter X1 pointer in pkc sram.
1831 *
1832 * Register|BitsName
1833 * --------|--------
1834 * SW_CONFIG5 | MIX2PTR
1835 *
1836 * @param PKCx PKC instance
1837 * @retval Return value is between: 0 ~ 0x200
1838 */
1839 __STATIC_INLINE uint32_t ll_pkc_get_mi_x2_pointer(pkc_regs_t *PKCx)
1840 {
1841 return (READ_BITS(PKCx->SW_CONFIG5, PKC_SW_CONFIG5_MIX2PTR) >> PKC_SW_CONFIG5_MIX2PTR_Pos);
1842 }
1843
1844 /**
1845 * @brief Set modular invertion parameter Tmp pointer in pkc sram.
1846 *
1847 * Register|BitsName
1848 * --------|--------
1849 * SW_CONFIG6 | MITMPPTR
1850 *
1851 * @param PKCx PKC instance
1852 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1853 * @retval None
1854 */
1855 __STATIC_INLINE void ll_pkc_set_swmi_tmp_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1856 {
1857 MODIFY_REG(PKCx->SW_CONFIG6, PKC_SW_CONFIG6_MITMPPTR, pointer << PKC_SW_CONFIG6_MITMPPTR_Pos);
1858 }
1859
1860 /**
1861 * @brief Get modular invertion parameter Tmp pointer in pkc sram.
1862 *
1863 * Register|BitsName
1864 * --------|--------
1865 * SW_CONFIG6 | MITMPPTR
1866 *
1867 * @param PKCx PKC instance
1868 * @retval Return value is between: 0 ~ 0x200
1869 */
1870 __STATIC_INLINE uint32_t ll_pkc_get_swmi_tmp_pointer(pkc_regs_t *PKCx)
1871 {
1872 return (READ_BITS(PKCx->SW_CONFIG6, PKC_SW_CONFIG6_MITMPPTR) >> PKC_SW_CONFIG6_MITMPPTR_Pos);
1873 }
1874
1875 /**
1876 * @brief Set operation word length-bits.
1877 *
1878 * Register|BitsName
1879 * --------|--------
1880 * SW_CONFIG7 | WORDLEN
1881 *
1882 * @param PKCx PKC instance
1883 * @param WordLength This parameter can be one of the following values: 256 ~ 2048
1884 * @retval None
1885 */
1886 __STATIC_INLINE void ll_pkc_set_operation_word_length(pkc_regs_t *PKCx, uint32_t WordLength)
1887 {
1888 MODIFY_REG(PKCx->SW_CONFIG7, PKC_SW_CONFIG7_WORDLEN, (WordLength >> 5) - 1);
1889 }
1890
1891 /**
1892 * @brief Get operation word length-bits.
1893 *
1894 * Register|BitsName
1895 * --------|--------
1896 * SW_CONFIG7 | WORDLEN
1897 *
1898 * @param PKCx PKC instance
1899 * @retval Return value is between: 256 ~ 2048
1900 */
1901 __STATIC_INLINE uint32_t ll_pkc_get_operation_word_length(pkc_regs_t *PKCx)
1902 {
1903 return ((READ_BITS(PKCx->SW_CONFIG7, PKC_SW_CONFIG7_WORDLEN) + 1) << 5);
1904 }
1905
1906 /**
1907 * @brief Get K output in invertion operation.
1908 *
1909 * Register|BitsName
1910 * --------|--------
1911 * SW_CONFIG8 | MIKOUT
1912 *
1913 * @param PKCx PKC instance
1914 * @retval Return value is between: 0 ~ 0x1FFF
1915 */
1916 __STATIC_INLINE uint32_t ll_pkc_get_mik_output(pkc_regs_t *PKCx)
1917 {
1918 return (READ_REG(PKCx->SW_CONFIG8) & PKC_SW_CONFIG8_MIKOUT_Msk);
1919 }
1920
1921 /**
1922 * @brief Set dummy multiply seed.
1923 *
1924 * Register|BitsName
1925 * --------|--------
1926 * SW_CONFIG9 | DMRNGSEED
1927 *
1928 * @param PKCx PKC instance
1929 * @param seed This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1930 * @retval None
1931 */
1932 __STATIC_INLINE void ll_pkc_set_dummy_multiply_seed(pkc_regs_t *PKCx, uint32_t seed)
1933 {
1934 WRITE_REG(PKCx->SW_CONFIG9, seed);
1935 }
1936
1937 /**
1938 * @brief Get dummy multiply seed.
1939 *
1940 * Register|BitsName
1941 * --------|--------
1942 * SW_CONFIG9 | DMRNGSEED
1943 *
1944 * @param PKCx PKC instance
1945 * @retval Return value is between: 0 ~ 0xFFFFFFFF
1946 */
1947 __STATIC_INLINE uint32_t ll_pkc_get_dummy_multiply_seed(pkc_regs_t *PKCx)
1948 {
1949 return (READ_REG(PKCx->SW_CONFIG9));
1950 }
1951
1952 /**
1953 * @brief Set big integer operand A pointer in pkc sram.
1954 *
1955 * Register|BitsName
1956 * --------|--------
1957 * SW_CONFIG10 | BMAPTR
1958 *
1959 * @param PKCx PKC instance
1960 * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
1961 * @retval None
1962 */
1963 __STATIC_INLINE void ll_pkc_set_bm_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1964 {
1965 MODIFY_REG(PKCx->SW_CONFIG10, PKC_SW_CONFIG10_BMAPTR, pointer << PKC_SW_CONFIG10_BMAPTR_Pos);
1966 }
1967
1968 /**
1969 * @brief Get big integer operand A pointer in pkc sram.
1970 *
1971 * Register|BitsName
1972 * --------|--------
1973 * SW_CONFIG10 | BMAPTR
1974 *
1975 * @param PKCx PKC instance
1976 * @retval Return value is between: 0 ~ 0x1FF
1977 */
1978 __STATIC_INLINE uint32_t ll_pkc_get_bm_a_pointer(pkc_regs_t *PKCx)
1979 {
1980 return (READ_BITS(PKCx->SW_CONFIG10, PKC_SW_CONFIG10_BMAPTR) >> PKC_SW_CONFIG10_BMAPTR_Pos);
1981 }
1982
1983 /**
1984 * @brief Set big integer operand B pointer in pkc sram.
1985 *
1986 * Register|BitsName
1987 * --------|--------
1988 * SW_CONFIG10 | BMBPTR
1989 *
1990 * @param PKCx PKC instance
1991 * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
1992 * @retval None
1993 */
1994 __STATIC_INLINE void ll_pkc_set_bm_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1995 {
1996 MODIFY_REG(PKCx->SW_CONFIG10, PKC_SW_CONFIG10_BMBPTR, pointer << PKC_SW_CONFIG10_BMBPTR_Pos);
1997 }
1998
1999 /**
2000 * @brief Get big integer operand B pointer in pkc sram.
2001 *
2002 * Register|BitsName
2003 * --------|--------
2004 * SW_CONFIG10 | BMBPTR
2005 *
2006 * @param PKCx PKC instance
2007 * @retval Return value is between: 0 ~ 0x1FF
2008 */
2009 __STATIC_INLINE uint32_t ll_pkc_get_bm_b_pointer(pkc_regs_t *PKCx)
2010 {
2011 return (READ_BITS(PKCx->SW_CONFIG10, PKC_SW_CONFIG10_BMBPTR) >> PKC_SW_CONFIG10_BMBPTR_Pos);
2012 }
2013
2014 /**
2015 * @brief Set big integer result C pointer in pkc sram.
2016 *
2017 * Register|BitsName
2018 * --------|--------
2019 * SW_CONFIG11 | BMCPTR
2020 *
2021 * @param PKCx PKC instance
2022 * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2023 * @retval None
2024 */
2025 __STATIC_INLINE void ll_pkc_set_bm_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2026 {
2027 MODIFY_REG(PKCx->SW_CONFIG11, PKC_SW_CONFIG11_BMCPTR, pointer << PKC_SW_CONFIG11_BMCPTR_Pos);
2028 }
2029
2030 /**
2031 * @brief Get big integer result C pointer in pkc sram.
2032 *
2033 * Register|BitsName
2034 * --------|--------
2035 * SW_CONFIG11 | BMCPTR
2036 *
2037 * @param PKCx PKC instance
2038 * @retval Return value is between: 0 ~ 0x1FF
2039 */
2040 __STATIC_INLINE uint32_t ll_pkc_get_bm_c_pointer(pkc_regs_t *PKCx)
2041 {
2042 return (READ_BITS(PKCx->SW_CONFIG11, PKC_SW_CONFIG11_BMCPTR) >> PKC_SW_CONFIG11_BMCPTR_Pos);
2043 }
2044
2045 /**
2046 * @brief Set big integer operand A pointer in pkc sram.
2047 *
2048 * Register|BitsName
2049 * --------|--------
2050 * SW_CONFIG11 | BAAPTR
2051 *
2052 * @param PKCx PKC instance
2053 * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2054 * @retval None
2055 */
2056 __STATIC_INLINE void ll_pkc_set_ba_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2057 {
2058 MODIFY_REG(PKCx->SW_CONFIG11, PKC_SW_CONFIG11_BAAPTR, pointer << PKC_SW_CONFIG11_BAAPTR_Pos);
2059 }
2060
2061 /**
2062 * @brief Get big integer operand A pointer in pkc sram.
2063 *
2064 * Register|BitsName
2065 * --------|--------
2066 * SW_CONFIG11 | BAAPTR
2067 *
2068 * @param PKCx PKC instance
2069 * @retval Return value is between: 0 ~ 0x1FF
2070 */
2071 __STATIC_INLINE uint32_t ll_pkc_get_ba_a_pointer(pkc_regs_t *PKCx)
2072 {
2073 return (READ_BITS(PKCx->SW_CONFIG11, PKC_SW_CONFIG11_BAAPTR) >> PKC_SW_CONFIG11_BAAPTR_Pos);
2074 }
2075
2076 /**
2077 * @brief Set big integer operand B pointer in pkc sram.
2078 *
2079 * Register|BitsName
2080 * --------|--------
2081 * SW_CONFIG12 | BABPTR
2082 *
2083 * @param PKCx PKC instance
2084 * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2085 * @retval None
2086 */
2087 __STATIC_INLINE void ll_pkc_set_ba_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2088 {
2089 MODIFY_REG(PKCx->SW_CONFIG12, PKC_SW_CONFIG12_BABPTR, pointer << PKC_SW_CONFIG12_BABPTR_Pos);
2090 }
2091
2092 /**
2093 * @brief Get big integer operand B pointer in pkc sram.
2094 *
2095 * Register|BitsName
2096 * --------|--------
2097 * SW_CONFIG12 | BABPTR
2098 *
2099 * @param PKCx PKC instance
2100 * @retval Return value is between: 0 ~ 0x1FF
2101 */
2102 __STATIC_INLINE uint32_t ll_pkc_get_ba_b_pointer(pkc_regs_t *PKCx)
2103 {
2104 return (READ_BITS(PKCx->SW_CONFIG12, PKC_SW_CONFIG12_BABPTR) >> PKC_SW_CONFIG12_BABPTR_Pos);
2105 }
2106
2107 /**
2108 * @brief Set big integer result C pointer in pkc sram.
2109 *
2110 * Register|BitsName
2111 * --------|--------
2112 * SW_CONFIG12 | BACPTR
2113 *
2114 * @param PKCx PKC instance
2115 * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2116 * @retval None
2117 */
2118 __STATIC_INLINE void ll_pkc_set_ba_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2119 {
2120 MODIFY_REG(PKCx->SW_CONFIG12, PKC_SW_CONFIG12_BACPTR, pointer << PKC_SW_CONFIG12_BACPTR_Pos);
2121 }
2122
2123 /**
2124 * @brief Get big integer result C pointer in pkc sram.
2125 *
2126 * Register|BitsName
2127 * --------|--------
2128 * SW_CONFIG12 | BACPTR
2129 *
2130 * @param PKCx PKC instance
2131 * @retval Return value is between: 0 ~ 0x1FF
2132 */
2133 __STATIC_INLINE uint32_t ll_pkc_get_ba_c_pointer(pkc_regs_t *PKCx)
2134 {
2135 return (READ_BITS(PKCx->SW_CONFIG12, PKC_SW_CONFIG12_BACPTR) >> PKC_SW_CONFIG12_BACPTR_Pos);
2136 }
2137
2138 /**
2139 * @brief Set random clock gating seed.
2140 *
2141 * Register|BitsName
2142 * --------|--------
2143 * SW_CONFIG13 | RANDSEED
2144 *
2145 * @param PKCx PKC instance
2146 * @param seed This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
2147 * @retval None
2148 */
2149 __STATIC_INLINE void ll_pkc_set_random_clock_gating_seed(pkc_regs_t *PKCx, uint32_t seed)
2150 {
2151 WRITE_REG(PKCx->SW_CONFIG13, seed);
2152 }
2153
2154 /**
2155 * @brief Get random clock gating seed.
2156 *
2157 * Register|BitsName
2158 * --------|--------
2159 * SW_CONFIG13 | RANDSEED
2160 *
2161 * @param PKCx PKC instance
2162 * @retval Return value is between: 0 ~ 0xFFFFFFFF
2163 */
2164 __STATIC_INLINE uint32_t ll_pkc_get_random_clock_gating_seed(pkc_regs_t *PKCx)
2165 {
2166 return (READ_REG(PKCx->SW_CONFIG13));
2167 }
2168
2169 /** @} */
2170
2171 /** @defgroup PKC_LL_EF_IT_Management IT_Management
2172 * @{
2173 */
2174
2175 /**
2176 * @brief Enable the operation done interrupt.
2177 *
2178 * Register|BitsName
2179 * --------|--------
2180 * INTEN | DONE
2181 *
2182 * @param PKCx PKC instance
2183 * @retval none.
2184 */
2185 __STATIC_INLINE void ll_pkc_enable_it_done(pkc_regs_t *PKCx)
2186 {
2187 SET_BITS(PKCx->INTEN, PKC_INTEN_DONE);
2188 }
2189
2190 /**
2191 * @brief Enable the operation error interrupt.
2192 *
2193 * Register|BitsName
2194 * --------|--------
2195 * INTEN | ERR
2196 *
2197 * @param PKCx PKC instance
2198 * @retval none.
2199 */
2200 __STATIC_INLINE void ll_pkc_enable_it_err(pkc_regs_t *PKCx)
2201 {
2202 SET_BITS(PKCx->INTEN, PKC_INTEN_ERR);
2203 }
2204
2205 /**
2206 * @brief Enable the big integer overflow interrupt.
2207 *
2208 * Register|BitsName
2209 * --------|--------
2210 * INTEN | BAOVF
2211 *
2212 * @param PKCx PKC instance
2213 * @retval none.
2214 */
2215 __STATIC_INLINE void ll_pkc_enable_it_big_add_overflow(pkc_regs_t *PKCx)
2216 {
2217 SET_BITS(PKCx->INTEN, PKC_INTEN_BAOVF);
2218 }
2219
2220 /**
2221 * @brief Disable the operation done interrupt.
2222 *
2223 * Register|BitsName
2224 * --------|--------
2225 * INTEN | DONE
2226 *
2227 * @param PKCx PKC instance
2228 * @retval none.
2229 */
2230 __STATIC_INLINE void ll_pkc_disable_it_done(pkc_regs_t *PKCx)
2231 {
2232 CLEAR_BITS(PKCx->INTEN, PKC_INTEN_DONE);
2233 }
2234
2235 /**
2236 * @brief Disable the operation error interrupt.
2237 *
2238 * Register|BitsName
2239 * --------|--------
2240 * INTEN | ERR
2241 *
2242 * @param PKCx PKC instance
2243 * @retval none.
2244 */
2245 __STATIC_INLINE void ll_pkc_disable_it_err(pkc_regs_t *PKCx)
2246 {
2247 CLEAR_BITS(PKCx->INTEN, PKC_INTEN_ERR);
2248 }
2249
2250 /**
2251 * @brief Disable the big integer overflow interrupt.
2252 *
2253 * Register|BitsName
2254 * --------|--------
2255 * INTEN | BAOVF
2256 *
2257 * @param PKCx PKC instance
2258 * @retval none.
2259 */
2260 __STATIC_INLINE void ll_pkc_disable_it_big_add_overflow(pkc_regs_t *PKCx)
2261 {
2262 CLEAR_BITS(PKCx->INTEN, PKC_INTEN_BAOVF);
2263 }
2264
2265 /**
2266 * @brief Indicate whether the operation done interrupt is enable.
2267 *
2268 * Register|BitsName
2269 * --------|--------
2270 * INTEN | DONE
2271 *
2272 * @param PKCx PKC instance
2273 * @retval State of bit (1 or 0).
2274 */
2275 __STATIC_INLINE uint32_t ll_pkc_is_enable_it_done(pkc_regs_t *PKCx)
2276 {
2277 return (READ_BITS(PKCx->INTEN, PKC_INTEN_DONE) == PKC_INTEN_DONE);
2278 }
2279
2280 /**
2281 * @brief Indicate whether the operation error interrupt is enable.
2282 *
2283 * Register|BitsName
2284 * --------|--------
2285 * INTEN | ERR
2286 *
2287 * @param PKCx PKC instance
2288 * @retval State of bit (1 or 0).
2289 */
2290 __STATIC_INLINE uint32_t ll_pkc_is_enable_it_err(pkc_regs_t *PKCx)
2291 {
2292 return (READ_BITS(PKCx->INTEN, PKC_INTEN_ERR) == PKC_INTEN_ERR);
2293 }
2294
2295 /**
2296 * @brief Indicate whether the big integer overflow interrupt is enable.
2297 *
2298 * Register|BitsName
2299 * --------|--------
2300 * INTEN | BAOVF
2301 *
2302 * @param PKCx PKC instance
2303 * @retval State of bit (1 or 0).
2304 */
2305 __STATIC_INLINE uint32_t ll_pkc_is_enable_it_big_add_overflow(pkc_regs_t *PKCx)
2306 {
2307 return (READ_BITS(PKCx->INTEN, PKC_INTEN_BAOVF) == PKC_INTEN_BAOVF);
2308 }
2309
2310 /** @} */
2311
2312 /** @defgroup PKC_LL_EF_FLAG_Management FLAG_Management
2313 * @{
2314 */
2315
2316 /**
2317 * @brief Indicate whether the operation done interrupt is pending.
2318 *
2319 * Register|BitsName
2320 * --------|--------
2321 * INTSTAT | DONE
2322 *
2323 * @param PKCx PKC instance
2324 * @retval State of bit (1 or 0).
2325 */
2326 __STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_done(pkc_regs_t *PKCx)
2327 {
2328 return (READ_BITS(PKCx->INTSTAT, PKC_INTSTAT_DONE) == PKC_INTSTAT_DONE);
2329 }
2330
2331 /**
2332 * @brief Indicate whether the operation error interrupt is pending.
2333 *
2334 * Register|BitsName
2335 * --------|--------
2336 * INTSTAT | ERR
2337 *
2338 * @param PKCx PKC instance
2339 * @retval State of bit (1 or 0).
2340 */
2341 __STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_err(pkc_regs_t *PKCx)
2342 {
2343 return (READ_BITS(PKCx->INTSTAT, PKC_INTSTAT_ERR) == PKC_INTSTAT_ERR);
2344 }
2345
2346 /**
2347 * @brief Indicate whether the big integer overflow interrupt is pending.
2348 *
2349 * Register|BitsName
2350 * --------|--------
2351 * INTSTAT | BAOVF
2352 *
2353 * @param PKCx PKC instance
2354 * @retval State of bit (1 or 0).
2355 */
2356 __STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_big_add_overflow(pkc_regs_t *PKCx)
2357 {
2358 return (READ_BITS(PKCx->INTSTAT, PKC_INTSTAT_BAOVF) == PKC_INTSTAT_BAOVF);
2359 }
2360
2361 /**
2362 * @brief Clear the operation done interrupt flag.
2363 *
2364 * Register|BitsName
2365 * --------|--------
2366 * INTSTAT | DONE
2367 *
2368 * @param PKCx PKC instance
2369 * @retval none.
2370 */
2371 __STATIC_INLINE void ll_pkc_clear_flag_it_done(pkc_regs_t *PKCx)
2372 {
2373 SET_BITS(PKCx->INTSTAT, PKC_INTSTAT_DONE);
2374 }
2375
2376 /**
2377 * @brief Clear the operation error interrupt flag.
2378 *
2379 * Register|BitsName
2380 * --------|--------
2381 * INTSTAT | ERR
2382 *
2383 * @param PKCx PKC instance
2384 * @retval none.
2385 */
2386 __STATIC_INLINE void ll_pkc_clear_flag_it_err(pkc_regs_t *PKCx)
2387 {
2388 SET_BITS(PKCx->INTSTAT, PKC_INTSTAT_ERR);
2389 }
2390
2391 /**
2392 * @brief Clear the big integer overflow interrupt flag.
2393 *
2394 * Register|BitsName
2395 * --------|--------
2396 * INTSTAT | BAOVF
2397 *
2398 * @param PKCx PKC instance
2399 * @retval none.
2400 */
2401 __STATIC_INLINE void ll_pkc_clear_flag_it_big_add_overflow(pkc_regs_t *PKCx)
2402 {
2403 SET_BITS(PKCx->INTSTAT, PKC_INTSTAT_BAOVF);
2404 }
2405
2406 /**
2407 * @brief Indicate whether the busy flag is set.
2408 *
2409 * Register|BitsName
2410 * --------|--------
2411 * WORKSTAT | BUSY
2412 *
2413 * @param PKCx PKC instance
2414 * @retval State of bit (1 or 0).
2415 */
2416 __STATIC_INLINE uint32_t ll_pkc_is_action_flag_busy(pkc_regs_t *PKCx)
2417 {
2418 return (READ_BITS(PKCx->WORKSTAT, PKC_WORKSTAT_BUSY) == PKC_WORKSTAT_BUSY);
2419 }
2420
2421 /** @} */
2422
2423 /** @defgroup PKC_LL_EF_Init Initialization and de-initialization functions
2424 * @{
2425 */
2426
2427 /**
2428 * @brief De-initialize PKC registers (Registers restored to their default values).
2429 * @param PKCx PKC Instance
2430 * @retval An error_status_t enumeration value:
2431 * - SUCCESS: PKC registers are de-initialized
2432 * - ERROR: PKC registers are not de-initialized
2433 */
2434 error_status_t ll_pkc_deinit(pkc_regs_t *PKCx);
2435
2436 /**
2437 * @brief Initialize PKC registers according to the specified
2438 * parameters in p_pkc_init.
2439 * @param PKCx PKC Instance
2440 * @param p_pkc_init pointer to a ll_pkc_init_t structure that contains the configuration
2441 * information for the specified PKC peripheral.
2442 * @retval An error_status_t enumeration value:
2443 * - SUCCESS: PKC registers are initialized according to p_pkc_init content
2444 * - ERROR: Problem occurred during PKC Registers initialization
2445 */
2446 error_status_t ll_pkc_init(pkc_regs_t *PKCx, ll_pkc_init_t *p_pkc_init);
2447
2448 /**
2449 * @brief Set each field of a @ref ll_pkc_init_t type structure to default value.
2450 * @param p_pkc_init pointer to a @ref ll_pkc_init_t structure
2451 * whose fields will be set to default values.
2452 * @retval None
2453 */
2454 void ll_pkc_struct_init(ll_pkc_init_t *p_pkc_init);
2455
2456 /** @} */
2457
2458 /** @} */
2459
2460 #endif /* PKC */
2461
2462 #ifdef __cplusplus
2463 }
2464 #endif
2465
2466 #endif /* __GR55XX_LL_PKC_H__ */
2467
2468 /** @} */
2469
2470 /** @} */
2471
2472 /** @} */
ll_pkc_is_enabled_hardware_start
__STATIC_INLINE uint32_t ll_pkc_is_enabled_hardware_start(pkc_regs_t *PKCx)
Indicate whether the pkc start in hardware mode is enabled.
Definition: gr55xx_ll_pkc.h:358
ll_pkc_enable_it_err
__STATIC_INLINE void ll_pkc_enable_it_err(pkc_regs_t *PKCx)
Enable the operation error interrupt.
Definition: gr55xx_ll_pkc.h:2200
ll_pkc_get_bm_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_bm_a_pointer(pkc_regs_t *PKCx)
Get big integer operand A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1978
ll_pkc_get_tmp6_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp6_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp6 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1037
ll_pkc_set_k_pointer
__STATIC_INLINE void ll_pkc_set_k_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter k pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:464
ll_pkc_get_tmp1_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp1_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:882
ll_pkc_set_tmpk_pointer
__STATIC_INLINE void ll_pkc_set_tmpk_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter TmpK pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1177
ll_pkc_get_gy_pointer
__STATIC_INLINE uint32_t ll_pkc_get_gy_pointer(pkc_regs_t *PKCx)
Get PKC parameter Gy pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:634
ll_pkc_disable_software
__STATIC_INLINE void ll_pkc_disable_software(pkc_regs_t *PKCx)
Disable pkc software mode.
Definition: gr55xx_ll_pkc.h:388
ll_pkc_get_tmpk_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmpk_pointer(pkc_regs_t *PKCx)
Get PKC parameter TmpK pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1192
ll_pkc_get_random_clock_gating_seed
__STATIC_INLINE uint32_t ll_pkc_get_random_clock_gating_seed(pkc_regs_t *PKCx)
Get random clock gating seed.
Definition: gr55xx_ll_pkc.h:2164
ll_pkc_is_enabled
__STATIC_INLINE uint32_t ll_pkc_is_enabled(pkc_regs_t *PKCx)
Indicate whether the pkc is enabled.
Definition: gr55xx_ll_pkc.h:313
ll_pkc_get_p_pointer
__STATIC_INLINE uint32_t ll_pkc_get_p_pointer(pkc_regs_t *PKCx)
Get PKC parameter p pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:541
ll_pkc_get_gx_pointer
__STATIC_INLINE uint32_t ll_pkc_get_gx_pointer(pkc_regs_t *PKCx)
Get PKC parameter Gx pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:603
ll_pkc_clear_flag_it_done
__STATIC_INLINE void ll_pkc_clear_flag_it_done(pkc_regs_t *PKCx)
Clear the operation done interrupt flag.
Definition: gr55xx_ll_pkc.h:2371
ll_pkc_set_mm_a_pointer
__STATIC_INLINE void ll_pkc_set_mm_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular multiplication parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1483
ll_pkc_init
error_status_t ll_pkc_init(pkc_regs_t *PKCx, ll_pkc_init_t *p_pkc_init)
Initialize PKC registers according to the specified parameters in p_pkc_init.
ll_pkc_set_mi_x1_pointer
__STATIC_INLINE void ll_pkc_set_mi_x1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1793
ll_pkc_set_operation_word_length
__STATIC_INLINE void ll_pkc_set_operation_word_length(pkc_regs_t *PKCx, uint32_t WordLength)
Set operation word length-bits.
Definition: gr55xx_ll_pkc.h:1886
ll_pkc_get_r0z_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r0z_pointer(pkc_regs_t *PKCx)
Get PKC parameter R0z pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:758
ll_pkc_get_mitmp_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mitmp_pointer(pkc_regs_t *PKCx)
Get PKC parameter MITmp pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1161
ll_pkc_set_mitmp_pointer
__STATIC_INLINE void ll_pkc_set_mitmp_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter MITmp pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1146
ll_pkc_get_mm_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mm_a_pointer(pkc_regs_t *PKCx)
Get modular multiplication parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1498
ll_pkc_set_gx_pointer
__STATIC_INLINE void ll_pkc_set_gx_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Gx pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:588
ll_pkc_get_constp
__STATIC_INLINE uint32_t ll_pkc_get_constp(pkc_regs_t *PKCx)
Get constant value for montgomery multiply in pkc sram.
Definition: gr55xx_ll_pkc.h:1285
ll_pkc_set_r_pointer
__STATIC_INLINE void ll_pkc_set_r_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter r pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:495
ll_ecc_curve_init_t
struct _ll_ecc_curve_init ll_ecc_curve_init_t
LL PKC ECC P-256 Elliptic Curve Init Structure definition.
ll_pkc_get_rsq_pointer
__STATIC_INLINE uint32_t ll_pkc_get_rsq_pointer(pkc_regs_t *PKCx)
Get PKC parameter R^2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:572
ll_pkc_enable_dummy_multi
__STATIC_INLINE void ll_pkc_enable_dummy_multi(pkc_regs_t *PKCx)
Enable Dummy Multi in software mode.
Definition: gr55xx_ll_pkc.h:1392
ll_pkc_is_enabled_reset
__STATIC_INLINE uint32_t ll_pkc_is_enabled_reset(pkc_regs_t *PKCx)
Indicate whether the pkc reset is enabled.
Definition: gr55xx_ll_pkc.h:448
ll_pkc_disable_random_clock_gating
__STATIC_INLINE void ll_pkc_disable_random_clock_gating(pkc_regs_t *PKCx)
Disable Random Clock Gating in software mode.
Definition: gr55xx_ll_pkc.h:1452
ll_pkc_set_mm_b_pointer
__STATIC_INLINE void ll_pkc_set_mm_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular multiplication parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1514
ll_pkc_set_mas_p_pointer
__STATIC_INLINE void ll_pkc_set_mas_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular add/sub parameter P pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1669
ll_pkc_get_r1z_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r1z_pointer(pkc_regs_t *PKCx)
Get PKC parameter R1z pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:851
ll_pkc_get_tmp2_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp2_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:913
ll_pkc_get_mi_x2_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mi_x2_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1839
ll_pkc_set_r1z_pointer
__STATIC_INLINE void ll_pkc_set_r1z_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R1z pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:836
ll_pkc_get_ba_c_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ba_c_pointer(pkc_regs_t *PKCx)
Get big integer result C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2133
_ll_pkc_init::p_ecc_curve
ll_ecc_curve_init_t * p_ecc_curve
Specifies the pointer to elliptic curve description.
Definition: gr55xx_ll_pkc.h:126
_ll_ecc_curve_init::A
uint32_t A[ECC_U32_LENGTH]
Operand A array.
Definition: gr55xx_ll_pkc.h:104
ll_pkc_set_bm_a_pointer
__STATIC_INLINE void ll_pkc_set_bm_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer operand A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1963
ll_pkc_is_enable_it_big_add_overflow
__STATIC_INLINE uint32_t ll_pkc_is_enable_it_big_add_overflow(pkc_regs_t *PKCx)
Indicate whether the big integer overflow interrupt is enable.
Definition: gr55xx_ll_pkc.h:2305
ll_pkc_get_mas_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mas_b_pointer(pkc_regs_t *PKCx)
Get modular add/sub parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1653
ll_pkc_disable_it_big_add_overflow
__STATIC_INLINE void ll_pkc_disable_it_big_add_overflow(pkc_regs_t *PKCx)
Disable the big integer overflow interrupt.
Definition: gr55xx_ll_pkc.h:2260
ll_pkc_set_x1_pointer
__STATIC_INLINE void ll_pkc_set_x1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1084
ll_pkc_enable_software_start
__STATIC_INLINE void ll_pkc_enable_software_start(pkc_regs_t *PKCx)
Enable pkc start in software mode.
Definition: gr55xx_ll_pkc.h:1300
ll_pkc_set_mm_c_pointer
__STATIC_INLINE void ll_pkc_set_mm_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular multiplication parameter C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1576
_ll_pkc_init::data_bits
uint32_t data_bits
Specifies the Data size: 256 ~ 2048bits
Definition: gr55xx_ll_pkc.h:128
ll_pkc_set_ecc_b_pointer
__STATIC_INLINE void ll_pkc_set_ecc_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set ECC parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1239
ll_pkc_set_mas_c_pointer
__STATIC_INLINE void ll_pkc_set_mas_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular add/sub parameter C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1700
ll_pkc_get_r1y_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r1y_pointer(pkc_regs_t *PKCx)
Get PKC parameter R1y pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:820
ll_pkc_get_r0y_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r0y_pointer(pkc_regs_t *PKCx)
Get PKC parameter R0y pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:727
ll_pkc_set_mi_v_pointer
__STATIC_INLINE void ll_pkc_set_mi_v_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter V pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1762
ll_pkc_get_bm_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_bm_b_pointer(pkc_regs_t *PKCx)
Get big integer operand B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2009
_ll_ecc_curve_init
LL PKC ECC P-256 Elliptic Curve Init Structure definition.
Definition: gr55xx_ll_pkc.h:103
_ll_pkc_init
LL PKC Init Structure definition.
Definition: gr55xx_ll_pkc.h:125
ll_pkc_set_x2_pointer
__STATIC_INLINE void ll_pkc_set_x2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter X2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1115
ll_pkc_is_action_flag_busy
__STATIC_INLINE uint32_t ll_pkc_is_action_flag_busy(pkc_regs_t *PKCx)
Indicate whether the busy flag is set.
Definition: gr55xx_ll_pkc.h:2416
ll_pkc_get_gz_pointer
__STATIC_INLINE uint32_t ll_pkc_get_gz_pointer(pkc_regs_t *PKCx)
Get PKC parameter Gz pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:665
ll_pkc_set_r1y_pointer
__STATIC_INLINE void ll_pkc_set_r1y_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R1y pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:805
ll_pkc_set_random_clock_gating_seed
__STATIC_INLINE void ll_pkc_set_random_clock_gating_seed(pkc_regs_t *PKCx, uint32_t seed)
Set random clock gating seed.
Definition: gr55xx_ll_pkc.h:2149
_ll_ecc_curve_init::PRSquare
uint32_t PRSquare[ECC_U32_LENGTH]
R^2 mod P, where R = 2^256.
Definition: gr55xx_ll_pkc.h:108
ll_pkc_disable_it_done
__STATIC_INLINE void ll_pkc_disable_it_done(pkc_regs_t *PKCx)
Disable the operation done interrupt.
Definition: gr55xx_ll_pkc.h:2230
ll_pkc_set_swmi_tmp_pointer
__STATIC_INLINE void ll_pkc_set_swmi_tmp_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter Tmp pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1855
ll_pkc_get_mas_c_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mas_c_pointer(pkc_regs_t *PKCx)
Get modular add/sub parameter C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1715
ll_pkc_get_operation_word_length
__STATIC_INLINE uint32_t ll_pkc_get_operation_word_length(pkc_regs_t *PKCx)
Get operation word length-bits.
Definition: gr55xx_ll_pkc.h:1901
ll_pkc_get_mm_c_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mm_c_pointer(pkc_regs_t *PKCx)
Get modular multiplication parameter C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1591
ll_pkc_get_mas_p_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mas_p_pointer(pkc_regs_t *PKCx)
Get modular add/sub parameter P pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1684
ll_pkc_is_action_flag_it_big_add_overflow
__STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_big_add_overflow(pkc_regs_t *PKCx)
Indicate whether the big integer overflow interrupt is pending.
Definition: gr55xx_ll_pkc.h:2356
_ll_ecc_curve_init::H
uint32_t H
H.
Definition: gr55xx_ll_pkc.h:115
ll_pkc_set_r1x_pointer
__STATIC_INLINE void ll_pkc_set_r1x_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R1x pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:774
ll_pkc_set_tmp1_pointer
__STATIC_INLINE void ll_pkc_set_tmp1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:867
ll_pkc_set_tmp4_pointer
__STATIC_INLINE void ll_pkc_set_tmp4_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp4 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:960
ll_pkc_set_tmp2_pointer
__STATIC_INLINE void ll_pkc_set_tmp2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:898
ll_pkc_set_constant1_pointer
__STATIC_INLINE void ll_pkc_set_constant1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Constant1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1053
ll_pkc_get_ecc_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ecc_b_pointer(pkc_regs_t *PKCx)
Get ECC parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1254
_ll_ecc_curve_init::ConstP
uint32_t ConstP
Montgomery multiplication constant in prime field P, ConstP = 1.
Definition: gr55xx_ll_pkc.h:109
ll_pkc_set_mm_p_pointer
__STATIC_INLINE void ll_pkc_set_mm_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular multiplication parameter P pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1545
ll_pkc_get_mm_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mm_b_pointer(pkc_regs_t *PKCx)
Get modular multiplication parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1529
ll_pkc_get_r_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r_pointer(pkc_regs_t *PKCx)
Get PKC parameter r pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:510
ll_pkc_get_tmp4_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp4_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp4 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:975
ll_pkc_disable_reset
__STATIC_INLINE void ll_pkc_disable_reset(pkc_regs_t *PKCx)
Disable pkc reset.
Definition: gr55xx_ll_pkc.h:433
ll_pkc_set_mi_x2_pointer
__STATIC_INLINE void ll_pkc_set_mi_x2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1824
ll_pkc_enable
__STATIC_INLINE void ll_pkc_enable(pkc_regs_t *PKCx)
Enable pkc.
Definition: gr55xx_ll_pkc.h:283
ll_pkc_get_operation_mode
__STATIC_INLINE uint32_t ll_pkc_get_operation_mode(pkc_regs_t *PKCx)
Get operation mode in software mode.
Definition: gr55xx_ll_pkc.h:1377
_ll_ecc_curve_init::P
uint32_t P[ECC_U32_LENGTH]
Prime number P array.
Definition: gr55xx_ll_pkc.h:107
ll_pkc_get_ba_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ba_a_pointer(pkc_regs_t *PKCx)
Get big integer operand A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2071
ll_pkc_is_action_flag_it_done
__STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_done(pkc_regs_t *PKCx)
Indicate whether the operation done interrupt is pending.
Definition: gr55xx_ll_pkc.h:2326
ll_pkc_clear_flag_it_err
__STATIC_INLINE void ll_pkc_clear_flag_it_err(pkc_regs_t *PKCx)
Clear the operation error interrupt flag.
Definition: gr55xx_ll_pkc.h:2386
_ll_ecc_point
LL PKC ECC Point Structure definition.
Definition: gr55xx_ll_pkc.h:92
ll_pkc_get_bm_c_pointer
__STATIC_INLINE uint32_t ll_pkc_get_bm_c_pointer(pkc_regs_t *PKCx)
Get big integer result C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2040
_ll_ecc_curve_init::NRSquare
uint32_t NRSquare[ECC_U32_LENGTH]
R^2 mod N, where R = 2^256.
Definition: gr55xx_ll_pkc.h:112
ll_pkc_set_tmp5_pointer
__STATIC_INLINE void ll_pkc_set_tmp5_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp5 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:991
ll_pkc_set_dummy_multiply_seed
__STATIC_INLINE void ll_pkc_set_dummy_multiply_seed(pkc_regs_t *PKCx, uint32_t seed)
Set dummy multiply seed.
Definition: gr55xx_ll_pkc.h:1932
ECC_U32_LENGTH
#define ECC_U32_LENGTH
ECC Array Length.
Definition: gr55xx_ll_pkc.h:72
ll_pkc_set_ba_c_pointer
__STATIC_INLINE void ll_pkc_set_ba_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer result C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2118
ll_pkc_get_mi_x1_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mi_x1_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1808
ll_pkc_set_bm_c_pointer
__STATIC_INLINE void ll_pkc_set_bm_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer result C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2025
ll_pkc_set_r0x_pointer
__STATIC_INLINE void ll_pkc_set_r0x_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R0x pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:681
ll_pkc_is_enabled_dummy_multi
__STATIC_INLINE uint32_t ll_pkc_is_enabled_dummy_multi(pkc_regs_t *PKCx)
Indicate whether the Dummy Multi in software mode is enabled.
Definition: gr55xx_ll_pkc.h:1422
ll_pkc_disable
__STATIC_INLINE void ll_pkc_disable(pkc_regs_t *PKCx)
Disable pkc.
Definition: gr55xx_ll_pkc.h:298
ll_pkc_get_r1x_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r1x_pointer(pkc_regs_t *PKCx)
Get PKC parameter R1x pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:789
ll_pkc_get_tmp5_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp5_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp5 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1006
ll_pkc_get_x2_pointer
__STATIC_INLINE uint32_t ll_pkc_get_x2_pointer(pkc_regs_t *PKCx)
Get PKC parameter X2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1130
ll_pkc_get_mi_v_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mi_v_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter V pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1777
ll_pkc_struct_init
void ll_pkc_struct_init(ll_pkc_init_t *p_pkc_init)
Set each field of a ll_pkc_init_t type structure to default value.
ll_pkc_disable_software_start
__STATIC_INLINE void ll_pkc_disable_software_start(pkc_regs_t *PKCx)
Disable pkc start in software mode.
Definition: gr55xx_ll_pkc.h:1315
ll_pkc_disable_it_err
__STATIC_INLINE void ll_pkc_disable_it_err(pkc_regs_t *PKCx)
Disable the operation error interrupt.
Definition: gr55xx_ll_pkc.h:2245
ll_pkc_set_r0z_pointer
__STATIC_INLINE void ll_pkc_set_r0z_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R0z pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:743
ll_pkc_get_k_pointer
__STATIC_INLINE uint32_t ll_pkc_get_k_pointer(pkc_regs_t *PKCx)
Get PKC parameter k pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:479
ll_pkc_enable_it_done
__STATIC_INLINE void ll_pkc_enable_it_done(pkc_regs_t *PKCx)
Enable the operation done interrupt.
Definition: gr55xx_ll_pkc.h:2185
ll_pkc_is_enable_it_err
__STATIC_INLINE uint32_t ll_pkc_is_enable_it_err(pkc_regs_t *PKCx)
Indicate whether the operation error interrupt is enable.
Definition: gr55xx_ll_pkc.h:2290
_ll_ecc_curve_init::G
ll_ecc_point_t G
ECC Point G.
Definition: gr55xx_ll_pkc.h:117
ll_pkc_is_enabled_random_clock_gating
__STATIC_INLINE uint32_t ll_pkc_is_enabled_random_clock_gating(pkc_regs_t *PKCx)
Indicate whether the Random Clock Gating in software mode is enabled.
Definition: gr55xx_ll_pkc.h:1467
ll_pkc_set_rsq_pointer
__STATIC_INLINE void ll_pkc_set_rsq_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R^2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:557
ll_pkc_get_mi_u_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mi_u_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter U pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1746
ll_pkc_set_tmp3_pointer
__STATIC_INLINE void ll_pkc_set_tmp3_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp3 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:929
ll_pkc_set_mas_a_pointer
__STATIC_INLINE void ll_pkc_set_mas_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular add/sub parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1607
_ll_ecc_point::Y
uint32_t Y[ECC_U32_LENGTH]
Specifies the point in y-axis.
Definition: gr55xx_ll_pkc.h:95
ll_pkc_get_r0x_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r0x_pointer(pkc_regs_t *PKCx)
Get PKC parameter R0x pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:696
ll_pkc_get_mik_output
__STATIC_INLINE uint32_t ll_pkc_get_mik_output(pkc_regs_t *PKCx)
Get K output in invertion operation.
Definition: gr55xx_ll_pkc.h:1916
ll_pkc_set_r0y_pointer
__STATIC_INLINE void ll_pkc_set_r0y_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R0y pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:712
ll_pkc_is_enable_it_done
__STATIC_INLINE uint32_t ll_pkc_is_enable_it_done(pkc_regs_t *PKCx)
Indicate whether the operation done interrupt is enable.
Definition: gr55xx_ll_pkc.h:2275
ll_pkc_get_constant1_pointer
__STATIC_INLINE uint32_t ll_pkc_get_constant1_pointer(pkc_regs_t *PKCx)
Get PKC parameter Constant1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1068
ll_pkc_get_ecc_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ecc_a_pointer(pkc_regs_t *PKCx)
Get ECC parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1223
ll_pkc_set_tmp6_pointer
__STATIC_INLINE void ll_pkc_set_tmp6_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp6 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1022
ll_pkc_enable_hardware_start
__STATIC_INLINE void ll_pkc_enable_hardware_start(pkc_regs_t *PKCx)
Enable pkc start in hardware mode.
Definition: gr55xx_ll_pkc.h:328
ll_pkc_get_mm_p_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mm_p_pointer(pkc_regs_t *PKCx)
Get modular multiplication parameter P pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1560
ll_pkc_enable_reset
__STATIC_INLINE void ll_pkc_enable_reset(pkc_regs_t *PKCx)
Enable pkc reset.
Definition: gr55xx_ll_pkc.h:418
ll_pkc_is_enabled_software_start
__STATIC_INLINE uint32_t ll_pkc_is_enabled_software_start(pkc_regs_t *PKCx)
Indicate whether the pkc start in software mode is enabled.
Definition: gr55xx_ll_pkc.h:1330
ll_pkc_is_enabled_software
__STATIC_INLINE uint32_t ll_pkc_is_enabled_software(pkc_regs_t *PKCx)
Indicate whether the pkc software mode is enabled.
Definition: gr55xx_ll_pkc.h:403
ll_pkc_disable_dummy_multi
__STATIC_INLINE void ll_pkc_disable_dummy_multi(pkc_regs_t *PKCx)
Disable Dummy Multi in software mode.
Definition: gr55xx_ll_pkc.h:1407
ll_pkc_set_p_pointer
__STATIC_INLINE void ll_pkc_set_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter p pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:526
ll_pkc_set_gz_pointer
__STATIC_INLINE void ll_pkc_set_gz_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Gz pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:650
ll_pkc_is_action_flag_it_err
__STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_err(pkc_regs_t *PKCx)
Indicate whether the operation error interrupt is pending.
Definition: gr55xx_ll_pkc.h:2341
ll_pkc_set_mas_b_pointer
__STATIC_INLINE void ll_pkc_set_mas_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular add/sub parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1638
ll_pkc_disable_hardware_start
__STATIC_INLINE void ll_pkc_disable_hardware_start(pkc_regs_t *PKCx)
Disable pkc start in hardware mode.
Definition: gr55xx_ll_pkc.h:343
ll_pkc_set_ba_a_pointer
__STATIC_INLINE void ll_pkc_set_ba_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer operand A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2056
ll_pkc_get_tmp3_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp3_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp3 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:944
_ll_ecc_curve_init::B
uint32_t B[ECC_U32_LENGTH]
Operand B array.
Definition: gr55xx_ll_pkc.h:105
_ll_ecc_point::X
uint32_t X[ECC_U32_LENGTH]
Specifies the point in x-axis.
Definition: gr55xx_ll_pkc.h:93
ll_pkc_enable_random_clock_gating
__STATIC_INLINE void ll_pkc_enable_random_clock_gating(pkc_regs_t *PKCx)
Enable Random Clock Gating in software mode.
Definition: gr55xx_ll_pkc.h:1437
_ll_ecc_curve_init::N
uint32_t N[ECC_U32_LENGTH]
Prime number N array.
Definition: gr55xx_ll_pkc.h:111
ll_pkc_deinit
error_status_t ll_pkc_deinit(pkc_regs_t *PKCx)
De-initialize PKC registers (Registers restored to their default values).
ll_pkc_clear_flag_it_big_add_overflow
__STATIC_INLINE void ll_pkc_clear_flag_it_big_add_overflow(pkc_regs_t *PKCx)
Clear the big integer overflow interrupt flag.
Definition: gr55xx_ll_pkc.h:2401
ll_pkc_set_ba_b_pointer
__STATIC_INLINE void ll_pkc_set_ba_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer operand B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2087
ll_pkc_get_mas_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mas_a_pointer(pkc_regs_t *PKCx)
Get modular add/sub parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1622
ll_pkc_enable_it_big_add_overflow
__STATIC_INLINE void ll_pkc_enable_it_big_add_overflow(pkc_regs_t *PKCx)
Enable the big integer overflow interrupt.
Definition: gr55xx_ll_pkc.h:2215
ll_pkc_set_constp
__STATIC_INLINE void ll_pkc_set_constp(pkc_regs_t *PKCx, uint32_t ConstP)
Set constant value for montgomery multiply in pkc sram.
Definition: gr55xx_ll_pkc.h:1270
ll_pkc_get_x1_pointer
__STATIC_INLINE uint32_t ll_pkc_get_x1_pointer(pkc_regs_t *PKCx)
Get PKC parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1099
ll_pkc_init_t
struct _ll_pkc_init ll_pkc_init_t
LL PKC Init Structure definition.
ll_pkc_set_gy_pointer
__STATIC_INLINE void ll_pkc_set_gy_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Gy pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:619
ll_pkc_set_ecc_a_pointer
__STATIC_INLINE void ll_pkc_set_ecc_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set ECC parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1208
ll_ecc_point_t
struct _ll_ecc_point ll_ecc_point_t
LL PKC ECC Point Structure definition.
ll_pkc_get_dummy_multiply_seed
__STATIC_INLINE uint32_t ll_pkc_get_dummy_multiply_seed(pkc_regs_t *PKCx)
Get dummy multiply seed.
Definition: gr55xx_ll_pkc.h:1947
ll_pkc_enable_software
__STATIC_INLINE void ll_pkc_enable_software(pkc_regs_t *PKCx)
Enable pkc software mode.
Definition: gr55xx_ll_pkc.h:373
ll_pkc_set_bm_b_pointer
__STATIC_INLINE void ll_pkc_set_bm_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer operand B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1994
ll_pkc_get_ba_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ba_b_pointer(pkc_regs_t *PKCx)
Get big integer operand B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2102
ll_pkc_set_mi_u_pointer
__STATIC_INLINE void ll_pkc_set_mi_u_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter U pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1731
ll_pkc_get_swmi_tmp_pointer
__STATIC_INLINE uint32_t ll_pkc_get_swmi_tmp_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter Tmp pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1870
ll_pkc_set_operation_mode
__STATIC_INLINE void ll_pkc_set_operation_mode(pkc_regs_t *PKCx, uint32_t operation_mode)
Set operation mode in software mode.
Definition: gr55xx_ll_pkc.h:1354
_ll_ecc_curve_init::ConstN
uint32_t ConstN
Montgomery multiplication constant in prime field N, ConstN = 0xee00bc4f.
Definition: gr55xx_ll_pkc.h:113