app_qspi.h
Go to the documentation of this file.
1 /**
2 ****************************************************************************************
3 *
4 * @file app_qspi.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of QSPI app library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup APP_DRIVER APP DRIVER
43 * @{
44 */
45
46 /** @defgroup APP_QSPI QSPI
47 * @brief QSPI APP module driver.
48 * @{
49 */
50
51
52 #ifndef _APP_QSPI_H_
53 #define _APP_QSPI_H_
54
55 #include "gr55xx_hal.h"
56 #include "app_io.h"
57 #include "app_dma.h"
58 #include "app_drv_error.h"
59 #include "app_drv_config.h"
60 #include "stdbool.h"
61 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
62 #include "app_qspi_user_config.h"
63 #endif
64 #ifdef __cplusplus
65 extern "C" {
66 #endif
67
68 #ifdef HAL_QSPI_MODULE_ENABLED
69
70 /**
71 * @defgroup APP_QSPI_MACRO Defines
72 * @{
73 */
74
75 /* Exported constants --------------------------------------------------------*/
76 /** @defgroup APP_QSPI_Exported_Constants QSPI Exported Constants
77 * @{
78 */
79
80 /** @addtogroup APP_QSPI_PIN Qspi pin defines
81 * @{
82 */
83 #define APP_QSPI_PIN_ENABLE 1 /**< QSPI pin enable */
84 #define APP_QSPI_PIN_DISABLE 0 /**< QSPI pin disable */
85 /** @} */
86
87 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
88 /** @defgroup APP_MAX_XFER MAX_XREF Defines
89 * @{
90 */
91 #define QSPI_MAX_XFER_SIZE_ONCE (0xFFFCu) /**< max xfer beat in evary qspi xfer */
92 #define DMA_MAX_XFER_SIZE_ONCE (4095u) /**< max xfer beat in evary dma xfer */
93 /** @} */
94
95 #define APP_STORAGE_RAM_ID 0xf /**< Special ID to handle RAM Source */
96 #endif
97 /** @} */
98
99 /** @} */
100
101
102 /** @addtogroup APP_QSPI_ENUM Enumerations
103 * @{
104 */
105
106 /**
107 * @brief QSPI module Enumerations definition
108 */
109 typedef enum
110 {
111 APP_QSPI_ID_0, /**< QSPI module 0 */
112 APP_QSPI_ID_1, /**< QSPI module 1 */
113 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
114 APP_QSPI_ID_2, /**< QSPI module 2 */
115 #endif
116 APP_QSPI_ID_MAX /**< Only for check parameter, not used as input parameters. */
117 } app_qspi_id_t;
118
119 /**
120 * @brief APP QSPI Event Type
121 */
122 typedef enum
123 {
124 APP_QSPI_EVT_ERROR, /**< Error reported by QSPI peripheral. */
125 APP_QSPI_EVT_TX_CPLT, /**< Requested TX transfer completed. */
126 APP_QSPI_EVT_RX_DATA, /**< Requested RX transfer completed. */
127 APP_QSPI_EVT_ABORT, /**< Abort reported by QSPI peripheral. */
128 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
129 APP_QSPI_EVT_ASYNC_WR_SCRN_CPLT, /**< ASYNC-Write Quad Screen Complete */
130 APP_QSPI_EVT_ASYNC_WR_SCRN_FAIL, /**< ASYNC-Write Quad Screen Fail */
131 #endif
132 } app_qspi_evt_type_t;
133
134 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
135 /**
136 * @brief QSPI Memory-Mapped Endian Mode
137 */
138 typedef enum {
139 APP_QSPI_MMAP_ENDIAN_MODE_0 = 0, /**< MMAP Endian Mode 0 */
140 APP_QSPI_MMAP_ENDIAN_MODE_1, /**< MMAP Endian Mode 1 */
141 APP_QSPI_MMAP_ENDIAN_MODE_2, /**< MMAP Endian Mode 2 */
142 } app_qspi_mmap_endian_mode_e;
143
144 /**
145 * @brief QSPI Device supporting Memory-Mapped Mode
146 */
147 typedef enum {
148 APP_QSPI_DEVICE_UNSET = 0, /**< UnSet Device */
149 APP_QSPI_DEVICE_FLASH = 1, /**< Flash Device */
150 APP_QSPI_DEVICE_PSRAM = 2, /**< PSRAM Device */
151 } app_qspi_device_e;
152
153 /**
154 * @brief Define PSRAM's Read Command for Memory-Mapped Mode
155 */
156 typedef enum {
157 PSRAM_MMAP_CMD_QREAD_0BH = 0x00, /**< 0BH in Quad */
158 PSRAM_MMAP_CMD_QREAD_EBH = 0x01, /**< EBH in Quad */
159 PSRAM_MMAP_CMD_READ_MAX
160 } app_qspi_psram_mmap_rd_cmd_e;
161
162 /**
163 * @brief Define PSRAM's Write Command for Memory-Mapped Mode
164 */
165 typedef enum {
166 PSRAM_MMAP_CMD_QWRITE_02H = 0x00, /**< 02H in Quad */
167 PSRAM_MMAP_CMD_QWRITE_38H = 0x01, /**< 38H in Quad */
168 PSRAM_MMAP_CMD_WRITE_MAX
169 } app_qspi_psram_mmap_wr_cmd_e;
170
171 /**
172 * @brief Define Flash's Read Command for Memory-Mapped Mode
173 */
174 typedef enum {
175 FLASH_MMAP_CMD_DREAD_3BH = 0x00, /**< 3BH in Dual */
176 FLASH_MMAP_CMD_2READ_BBH = 0x01, /**< BBH in 2Read */
177 FLASH_MMAP_CMD_2READ_BBH_SIOO = 0x02, /**< BBH in 2Read with SIOO mode */
178
179 FLASH_MMAP_CMD_QREAD_6BH = 0x03, /**< 6BH in QRead */
180 FLASH_MMAP_CMD_4READ_EBH = 0x04, /**< EBH in 4Read */
181 FLASH_MMAP_CMD_4READ_EBH_SIOO = 0x05, /**< EBH in 4Read with SIOO mode */
182 FLASH_MMAP_CMD_READ_MAX,
183 } app_qspi_flash_mmap_rd_cmd_e;
184
185 /**
186 * @brief APP QSPI interface type when drawing screen
187 */
188 typedef enum {
189 DRAW_TYPE_IF_NONE = 0x00,
190 DRAW_TYPE_IF_DUAL_SCREEN,
191 DRAW_TYPE_IF_VERI_LINKED_SCREEN,
192 } app_qspi_draw_screen_interface_type_e;
193
194 /**
195 * @brief Define Pin Groups for QSPI
196 */
197 typedef enum {
198
199 QSPI0_PIN_GROUP_0 = 0x00, /**< QSPI0 Pinmux Group */
200 /* CS : GPIO_26.MUX0 */
201 /* CLK : GPIO_21.MUX0 */
202 /* IO0 : GPIO_22.MUX0 */
203 /* IO1 : GPIO_23.MUX0 */
204 /* IO2 : GPIO_24.MUX0 */
205 /* IO3 : GPIO_25.MUX0 */
206
207 QSPI1_PIN_GROUP_0 = 0x01, /**< QSPI1 Pinmux Group 0 */
208 /* CS : GPIO_10.MUX0 */
209 /* CLK : GPIO_15.MUX0 */
210 /* IO0 : GPIO_11.MUX0 */
211 /* IO1 : GPIO_12.MUX0 */
212 /* IO2 : GPIO_13.MUX0 */
213 /* IO3 : GPIO_14.MUX0 */
214
215 QSPI2_PIN_GROUP_0 = 0x02, /**< QSPI2 Pinmux Group 0 */
216 /* CS : GPIO_27.MUX0 */
217 /* CLK : GPIO_16.MUX0 */
218 /* IO0 : GPIO_17.MUX0 */
219 /* IO1 : GPIO_18.MUX0 */
220 /* IO2 : GPIO_19.MUX0 */
221 /* IO3 : GPIO_20.MUX0 */
222 QSPIx_PIN_GROUP_MAX,
223 } qspi_pins_group_e;
224
225 /**
226 * @brief Define BLIT Mode By DMA
227 */
228 typedef enum {
229 BLIT_BY_DMA_SG = 0, /**< need enable BLIT_IMAGE_FEATURE_SUPPORT */
230 BLIT_BY_DMA_LLP = 1, /**< need enable PSRAM_LLP_FEATUTE_SUPPORT */
231 } blit_xfer_type_e;
232
233 /** @} */
234
235 /** @addtogroup APP_QSPI_STRUCTURES Structures
236 * @{
237 */
238
239 /**
240 * @brief QSPI memory-mapped configuration Structures
241 */
242 typedef struct {
243 app_qspi_device_e dev_type; /**< Specifies the device type of QSPI */
244 app_qspi_psram_mmap_wr_cmd_e psram_wr; /**< Specifies the write command for PSRAM, Flash does not support this */
245 union {
246 app_qspi_flash_mmap_rd_cmd_e flash_rd; /**< Read command for flash device */
247 app_qspi_psram_mmap_rd_cmd_e psram_rd; /**< Read command for psram device */
248 } rd; /**< Specifies read command by real device */
249 void * set; /**< Reserved */
250 } app_qspi_mmap_device_t;
251 #endif
252
253 /**
254 * @brief QSPI IO configuration Structures
255 */
256 typedef struct
257 {
258 app_io_type_t type; /**< Specifies the type of QSPI IO. */
259 app_io_mux_t mux; /**< Specifies the Peripheral to be connected to the selected pins. */
260 uint32_t pin; /**< Specifies the IO pins to be configured.
261 This parameter can be any value of @ref GR5xxx_pins. */
262 app_io_mode_t mode; /**< Specifies the IO Mode for pins. */
263 app_io_pull_t pull; /**< Specifies the Pull-up or Pull-Down activation for the selected pins. */
264 uint8_t enable; /**< Enable or disable the pin. */
265 } app_qspi_pin_t;
266
267 /**
268 * @brief QSPI configuration Structures
269 */
270 typedef struct
271 {
272 app_qspi_pin_t cs; /**< Set the configuration of QSPI CS pin. */
273 app_qspi_pin_t clk; /**< Set the configuration of QSPI CLK pin. */
274 app_qspi_pin_t io_0; /**< Set the configuration of QSPI IO0 pin. */
275 app_qspi_pin_t io_1; /**< Set the configuration of QSPI IO1 pin. */
276 app_qspi_pin_t io_2; /**< Set the configuration of QSPI IO2 pin. */
277 app_qspi_pin_t io_3; /**< Set the configuration of QSPI IO3 pin. */
278 } app_qspi_pin_cfg_t;
279
280 /**
281 * @brief QSPI DMA configuration structure definition
282 */
283 typedef struct
284 {
285 dma_regs_t * dma_instance; /**< Specifies the dma instance of QSPI. */
286 dma_channel_t dma_channel; /**< Specifies the dma channel of QSPI. */
287 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
288 uint32_t wait_timeout_ms; /**< Specifies timout time of polling and dead wait, ms. */
289 uint32_t extend; /**< Specifies extend segment, to use */
290 #endif
291 } app_qspi_dma_cfg_t;
292 /** @} */
293
294 /** @addtogroup APP_QSPI_TYPEDEFS Type Definitions
295 * @{
296 */
297
298 /**
299 * @brief QSPI command structure definition
300 */
301 typedef qspi_command_t app_qspi_command_t;
302 /** @} */
303
304 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
305 /** @addtogroup APP_QSPI_STRUCTURES Structures
306 * @{
307 */
308 typedef struct
309 {
310 uint32_t instruction; /**< Specifies the Instruction to be sent.
311 This parameter can be a value (8-bit) between 0x00 and 0xFF. */
312
313 uint32_t leading_address; /**< Specifies the Address to be sent (Size from 1 to 4 bytes according AddressSize).
314 This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF. */
315
316 uint32_t ongoing_address; /**< Specifies the Address to be sent (Size from 1 to 4 bytes according AddressSize).
317 This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF. */
318
319 uint32_t instruction_size; /**< Specifies the Instruction Size.
320 This parameter can be a value of @ref QSPI_Instruction_Size. */
321
322 uint32_t address_size; /**< Specifies the Address Size.
323 This parameter can be a value of @ref QSPI_Address_Size. */
324
325 uint32_t dummy_cycles; /**< Specifies the Number of Dummy Cycles.
326 This parameter can be a number between 0 and 31. */
327
328 uint32_t data_size; /**< Specifies the QSPI address width.
329 This parameter can be a value of @ref QSPI_Data_Size. */
330
331 uint32_t instruction_address_mode; /**< Specifies the Instruction and Address Mode.
332 This parameter can be a value of @ref QSPI_Inst_Addr_Mode. */
333
334 uint32_t data_mode; /**< Specifies the Data Mode (used for dummy cycles and data phases).
335 This parameter can be a value of @ref QSPI_Data_Mode. */
336
337 bool is_one_take_cs; /**< Sent all data in one take CS or in multiple independent CS */
338
339 } app_qspi_screen_command_t;
340 /** @} */
341 #endif
342
343 /** @addtogroup APP_QSPI_STRUCTURES Structures
344 * @{
345 */
346 /**
347 * @brief QSPI event structure definition
348 */
349 typedef struct
350 {
351 app_qspi_evt_type_t type; /**< Type of event. */
352 union
353 {
354 uint32_t error_code; /**< QSPI Error code . */
355 uint16_t size; /**< QSPI transmitted/received counter. */
356 } data; /**< Event data. */
357 } app_qspi_evt_t;
358
359 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
360 /**
361 * @brief Screen Info. structure definition
362 */
363 typedef struct {
364 unsigned int scrn_pixel_width; /**< screen pixel width, such as 390 */
365 unsigned int scrn_pixel_height; /**< screen pixel height, such as 390 */
366 unsigned int scrn_pixel_depth; /**< pixel depth, unit: byte, such as 2 */
367 } app_qspi_screen_info_t;
368
369
370 /**
371 * @brief Scroll-Screen structure definition
372 */
373 typedef struct {
374 uint32_t first_frame_start_address; /**< if scroll the screen horizontally : first stands for left image, second stands for right image */
375 uint32_t second_frame_start_address; /**< if scroll the screen vertically : first stands for up image, second stands for down image */
376 uint32_t scroll_coordinate; /**< scroll to where , must be even number, belongs to [0, SCREEN_PIXEL_WIDTH] */
377 bool is_horizontal_scroll; /**< true : screen horizontally ; false : screen vertically */
378 } app_qspi_screen_scroll_t;
379
380 /**
381 * @brief Vertical Scroll-Screen Linked List Structure
382 */
383 typedef struct _screen_veri_link_scroll_t {
384 uint32_t frame_ahb_start_address; /**< Start AHB address for current frame */
385 uint32_t frame_offset_lines; /**< Offset lines for current frame */
386 uint32_t frame_draw_lines; /**< Drawing lines (start from offset line) for current frame */
387 struct _screen_veri_link_scroll_t * next; /**< Linked to next node, if empty, Set NULL */
388 } app_qspi_screen_veri_link_scroll_t;
389
390 /**
391 * @brief One block of screen Structure
392 */
393 typedef struct {
394 uint32_t frame_ahb_start_address; /**< Start AHB address for current block */
395 uint32_t frame_offset_lines; /**< Offset lines for current block */
396 uint32_t frame_draw_lines; /**< Drawing lines (start from offset line) for current block */
397 } app_qspi_screen_block_t;
398
399 /**
400 * @brief Dual Screen (HOR/VER) Scroll Structure, just used for inner driver
401 */
402 typedef struct {
403 app_qspi_screen_scroll_t scroll_config; /**< Start AHB address for current frame */
404 uint32_t image_1_ahb_address; /**< Record first frame starting AHB address */
405 uint32_t image_2_ahb_address; /**< Record second frame starting AHB address */
406 uint32_t this_send_lines; /**< Record current sent lines */
407 uint32_t total_sent_lines; /**< Record total sent lines already */
408 uint32_t sent_line_order; /**< Record current line order */
409 } dual_screen_scroll_t;
410
411 /**
412 * @brief Veritical Linked List Screen-Scroll Structure, just used for inner driver
413 */
414 typedef struct {
415 app_qspi_screen_veri_link_scroll_t vl_scroll; /**< Start AHB address for current frame */
416 app_qspi_screen_veri_link_scroll_t * p_cur_scroll; /**< Record current linked node */
417 uint32_t total_sent_lines; /**< Record total sent lines */
418 } veri_linked_screen_scroll_t;
419
420 /**
421 * @brief Async Draw Screen Structure, just used for inner driver
422 */
423 typedef struct {
424 app_qspi_draw_screen_interface_type_e if_type; /**< drawing interface type */
425 app_qspi_id_t screen_id; /**< Specify the Screen ID */
426 app_qspi_id_t storage_id; /**< Specify the Memory ID */
427 uint32_t llp_cfg_right_shift_bit; /**< Record the llp shift bit configure */
428 uint32_t llp_cfg_ctrl_low; /**< Record the llp control bits configure */
429 app_qspi_screen_info_t screen_info; /**< Record the basic screen info */
430 app_qspi_screen_command_t qspi_screen_command; /**< Record the basic screen command */
431 union {
432 dual_screen_scroll_t dual_ss; /**< info for dual screen-scroll */
433 veri_linked_screen_scroll_t veri_linked_ss; /**< info for veri linked screen-scroll */
434 } ss; /**< union record */
435 } app_qspi_async_draw_screen_info_t;
436
437
438 /**
439 * @brief Blit Image structure definition
440 */
441 typedef struct {
442 uint32_t src_img_address; /**< source address, just offset in storage device */
443 uint32_t src_img_w; /**< pixel width of source image */
444 uint32_t src_img_h; /**< pixel height of source image */
445 uint32_t src_img_x; /**< x-coordinate of source image, left-top point is Coordinate origin */
446 uint32_t src_img_x_delta; /**< blit image width in pixel, do not multiple pexel depth */
447 uint32_t src_img_y; /**< y-coordinate of source image, left-top point is Coordinate origin */
448 uint32_t src_img_y_delta; /**< blit image height in pixel, do not multiple pexel depth */
449 uint32_t dst_buff_address; /**< destination buffer address */
450 uint32_t dst_buff_width; /**< pixel width of destination buffer */
451 uint32_t dst_buff_height; /**< pixel height of destination buffer */
452 uint32_t dst_buff_x; /**< x-coordinate of destination buffer, left-top point is Coordinate origin */
453 uint32_t dst_buff_y; /**< y-coordinate of destination buffer, left-top point is Coordinate origin */
454 uint32_t pixel_depth; /**< pixel depth in byte */
455 } blit_image_config_t;
456 #endif
457 /** @} */
458
459 /** @addtogroup APP_QSPI_TYPEDEFS Type Definitions
460 * @{
461 */
462
463 /**
464 * @brief QSPI event callback definition
465 */
466 typedef void (*app_qspi_evt_handler_t)(app_qspi_evt_t *p_evt);
467 /** @} */
468
469 /** @addtogroup APP_QSPI_ENUM Enumerations
470 * @{
471 */
472 /**@brief App qspi state types. */
473 typedef enum
474 {
475 APP_QSPI_INVALID = 0,
476 APP_QSPI_ACTIVITY,
477 #ifdef APP_DRIVER_WAKEUP_CALL_FUN
478 APP_QSPI_SLEEP,
479 #endif
480 } app_qspi_state_t;
481
482 /**@brief App qspi dma_state types. */
483 typedef enum
484 {
485 APP_QSPI_DMA_INVALID = 0,
486 APP_QSPI_DMA_ACTIVITY,
487 } app_qspi_dma_state_t;
488
489 /** @} */
490
491 /** @addtogroup APP_QSPI_STRUCTURES Structures
492 * @{
493 */
494
495 /**
496 * @brief QSPI device structure definition
497 */
498 typedef struct {
499 qspi_handle_t handle; /**< QSPI handle Structure. */
500 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
501 app_qspi_dma_cfg_t dma_cfg; /**< QSPI DMA configuration structure. */
502 #endif
503 app_qspi_pin_cfg_t *p_pin_cfg; /**< QSPI configuration Structures. */
504 dma_id_t dma_id; /**< DMA id. */
505 app_qspi_state_t qspi_state; /**< App qspi state types. */
506 app_qspi_dma_state_t qspi_dma_state; /**< App qspi dma_state types. */
507 volatile bool start_flag; /**< start flag. */
508 app_qspi_evt_handler_t evt_handler; /**< QSPI event callback . */
509 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
510 app_qspi_mmap_device_t mounted_mmap_device; /**< QSPI memory-mapped configuration Structures. */
511
512 volatile uint8_t mmap_endian_mode; /**< mmap endian mode. */
513 volatile bool is_mmap_inited; /**< mmap inited. */
514 volatile bool is_mmap_prefetch_en; /**< mmap prefetch. */
515 #endif
516 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
517 volatile bool is_used_dma; /**< used dma. */
518 volatile bool is_dma_mode_m2m; /**< dma mode. */
519 #endif
520 volatile bool is_rx_done; /**< rx done. */
521 volatile bool is_tx_done; /**< tx done. */
522 volatile bool is_xfer_err; /**< xfer err. */
523 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
524 volatile bool is_dma_done; /**< dma done. */
525 volatile bool is_async_write_screen; /**< async write screen. */
526 #endif
527 }qspi_env_t;
528
529 /**
530 * @brief QSPI parameters structure definition
531 */
532 typedef struct
533 {
534 app_qspi_id_t id; /**< specified QSPI module ID. */
535 app_qspi_pin_cfg_t pin_cfg; /**< the pin configuration information for the specified QSPI module. */
536 app_qspi_dma_cfg_t dma_cfg; /**< QSPI DMA configuration. */
537 qspi_init_t init; /**< QSPI communication parameters. */
538 qspi_env_t qspi_env; /**< QSPI device structure definition. */
539 } app_qspi_params_t;
540 /** @} */
541
542
543 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
544 /** @addtogroup HAL_APP_QSPI_DRIVER_CONSTANTS Constants
545 * @{
546 */
547
548 /**
549 * @brief The Referrence to pin groups define
550 */
551 extern const app_qspi_pin_cfg_t g_qspi_pin_groups[QSPIx_PIN_GROUP_MAX];
552
553 /** @} */
554 #endif
555
556
557 /* Exported functions --------------------------------------------------------*/
558 /** @addtogroup HAL_APP_QSPI_DRIVER_FUNCTIONS Functions
559 * @{
560 */
561 /**
562 ****************************************************************************************
563 * @brief Initialize the APP QSPI DRIVER according to the specified parameters
564 * in the app_qspi_params_t and app_qspi_evt_handler_t.
565 * @note If interrupt mode is set, you can use blocking mode. Conversely, if blocking mode
566 * is set, you can't use interrupt mode.
567 *
568 * @param[in] p_params: Pointer to app_qspi_params_t parameter which contains the
569 * configuration information for the specified QSPI module.
570 * @param[in] evt_handler: QSPI user callback function.
571 *
572 * @return Result of initialization.
573 ****************************************************************************************
574 */
575 uint16_t app_qspi_init(app_qspi_params_t *p_params, app_qspi_evt_handler_t evt_handler);
576
577 /**
578 ****************************************************************************************
579 * @brief De-initialize the APP QSPI DRIVER peripheral.
580 *
581 * @param[in] id: De-initialize for a specific ID.
582 *
583 * @return Result of De-initialization.
584 ****************************************************************************************
585 */
586 uint16_t app_qspi_deinit(app_qspi_id_t id);
587
588 /**
589 ****************************************************************************************
590 * @brief Abort qspi communication with Interrupt.
591 *
592 * @param[in] id: QSPI module ID.
593 *
594 * @return Result of operation.
595 ****************************************************************************************
596 */
597 uint16_t app_qspi_abort(app_qspi_id_t id);
598
599 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
600 /**
601 ****************************************************************************************
602 * @brief Config the memory mapped mode (also called XIP mode) and Active the mode
603 *
604 * @param[in] id : QSPI module ID.
605 * @param[in] dev: device config for mmaped mode
606 *
607 * @return true/false
608 ****************************************************************************************
609 */
610 bool app_qspi_config_memory_mappped(app_qspi_id_t id, app_qspi_mmap_device_t dev);
611
612 /**
613 ****************************************************************************************
614 * @brief Active or Deactive memory mapped mode (also called XIP mode)
615 *
616 * @param[in] id : QSPI module ID.
617 * @param[in] is_active: true - Active the mode; false - Deactive the mode
618 *
619 * @return true/false
620 ****************************************************************************************
621 */
622 bool app_qspi_active_memory_mappped(app_qspi_id_t id, bool is_active);
623 #endif
624
625 /**
626 ****************************************************************************************
627 * @brief Receive an amount of data with the specified instruction, address and dummy cycles in blocking mode.
628 * @note This function is used only in Indirect Read Mode.
629 * @param[in] id: which QSPI module want to receive.
630 * @param[in] p_cmd: Pointer to a app_qspi_command_t structure that contains the instruction and address for data transfer.
631 * @param[out] p_data: Pointer to data buffer
632 * @param[in] timeout: Timeout duration
633 *
634 * @return Result of operation.
635 ****************************************************************************************
636 */
637 uint16_t app_qspi_command_receive_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout);
638
639 /**
640 ****************************************************************************************
641 * @brief Receive an amount of data with the specified instruction, address and dummy cycles in non-blocking mode with Interrupt.
642 * @note This function is used only in Indirect Read Mode.
643 * @param[in] id: which QSPI module want to receive.
644 * @param[in] p_cmd: Pointer to a app_qspi_command_t structure that contains the instruction and address for data transfer.
645 * @param[out] p_data: Pointer to data buffer
646 *
647 * @return Result of operation.
648 ****************************************************************************************
649 */
650 uint16_t app_qspi_command_receive_async(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data);
651
652 /**
653 ****************************************************************************************
654 * @brief Receive an amount of data with the specified instruction, address and dummy cycles in blocking mode.
655 * @note This function is used only in Indirect Read Mode.
656 * @param[in] id: which QSPI module want to transmit.
657 * @param[in] p_cmd: Pointer to a app_qspi_command_t structure that contains the instruction and address for data transfer.
658 * @param[out] p_data: Pointer to data buffer
659 * @param[in] timeout: Timeout duration
660 *
661 * @return Result of operation.
662 ****************************************************************************************
663 */
664 uint16_t app_qspi_command_transmit_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout);
665
666 /**
667 ****************************************************************************************
668 * @brief Receive an amount of data with the specified instruction, address and dummy cycles in non-blocking mode with Interrupt.
669 * @note This function is used only in Indirect Read Mode.
670 * @param[in] id: which QSPI module want to transmit.
671 * @param[in] p_cmd: Pointer to a app_qspi_command_t structure that contains the instruction and address for data transfer.
672 * @param[out] p_data: Pointer to data buffer
673 *
674 * @return Result of operation.
675 ****************************************************************************************
676 */
677 uint16_t app_qspi_command_transmit_async(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data);
678
679 /**
680 ****************************************************************************************
681 * @brief Transmit only instruction in blocking mode.
682 * @note This function is used only in Indirect Write Mode.
683 * @param[in] id: which QSPI module want to transmit command.
684 * @param[in] p_cmd: Pointer to a app_qspi_command_t structure that contains the instruction and address for data transfer.
685 * @param[in] timeout: Timeout duration
686 *
687 * @return Result of operation.
688 ****************************************************************************************
689 */
690 uint16_t app_qspi_command_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint32_t timeout);
691
692 /**
693 ****************************************************************************************
694 * @brief Transmit instruction in non-blocking mode with Interrupt.
695 * @note This function is used only in Indirect Write Mode.
696 * @param[in] id: which QSPI module want to transmit command.
697 * @param[in] p_cmd: Pointer to a app_qspi_command_t structure that contains the instruction and address for data transfer.
698 *
699 * @return Result of operation.
700 ****************************************************************************************
701 */
702 uint16_t app_qspi_command_async(app_qspi_id_t id, app_qspi_command_t *p_cmd);
703
704 /**
705 ****************************************************************************************
706 * @brief Transmit data without command, support std/dual/quad mode
707 *
708 * @param[in] id : QSPI module ID.
709 * @param[in] qspi_mode : @ref QSPI_DATA_MODE_SPI
710 * @ref QSPI_DATA_MODE_DUALSPI
711 * @ref QSPI_DATA_MODE_QUADSPI
712 * @param[in] data_width :@ref QSPI_DATASIZE_08_BITS
713 * @ref QSPI_DATASIZE_16_BITS
714 * @ref QSPI_DATASIZE_32_BITS
715 * @param[in] p_data : data Pointer to transmit
716 * @param[in] length : byte length of data
717 * @param[in] timeout: Timeout duration
718 *
719 * @return true/false
720 ****************************************************************************************
721 */
722 uint16_t app_qspi_transmit_sync_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length, uint32_t timeout);
723
724 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
725 /**
726 ****************************************************************************************
727 * @brief Transmit an amount of data in blocking mode with standard SPI.
728 * @note This function is used only in Indirect Write Mode.
729 * @param[in] id: which QSPI module want to transmit.
730 * @param[in] p_data: Pointer to data buffer
731 * @param[in] length: Amount of data to be sent in bytes
732 * @param[in] timeout: Timeout duration
733 *
734 * @return Result of operation.
735 ****************************************************************************************
736 */
737 uint16_t app_qspi_transmit_sync(app_qspi_id_t id, uint8_t *p_data, uint32_t length, uint32_t timeout);
738 #endif
739
740 /**
741 ****************************************************************************************
742 * @brief Transmit data without command, support std/dual/quad mode
743 *
744 * @param[in] id : QSPI module ID.
745 * @param[in] qspi_mode : @ref QSPI_DATA_MODE_SPI
746 * @ref QSPI_DATA_MODE_DUALSPI
747 * @ref QSPI_DATA_MODE_QUADSPI
748 * @param[in] data_width :@ref QSPI_DATASIZE_08_BITS
749 * @ref QSPI_DATASIZE_16_BITS
750 * @ref QSPI_DATASIZE_32_BITS
751 * @param[in] p_data : data Pointer to transmit
752 * @param[in] length : byte length of data
753 *
754 * @return true/false
755 ****************************************************************************************
756 */
757 uint16_t app_qspi_transmit_async_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length);
758
759 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
760 /**
761 ****************************************************************************************
762 * @brief Transmit an amount of data in non-blocking mode at standard SPI with Interrupt.
763 * @note This function is used only in Indirect Write Mode.
764 * @param[in] id: which QSPI module want to transmit.
765 * @param[in] p_data: Pointer to data buffer
766 * @param[in] length: Amount of data to be sent in bytes
767 *
768 * @return Result of operation.
769 ****************************************************************************************
770 */
771 uint16_t app_qspi_transmit_async(app_qspi_id_t id, uint8_t *p_data, uint32_t length);
772 #endif
773
774 /**
775 ****************************************************************************************
776 * @brief Receive data without command, support std/dual/quad mode
777 *
778 * @param[in] id : QSPI module ID.
779 * @param[in] qspi_mode : @ref QSPI_DATA_MODE_SPI
780 * @ref QSPI_DATA_MODE_DUALSPI
781 * @ref QSPI_DATA_MODE_QUADSPI
782 * @param[in] data_width :@ref QSPI_DATASIZE_08_BITS
783 * @ref QSPI_DATASIZE_16_BITS
784 * @ref QSPI_DATASIZE_32_BITS
785 * @param[in] p_data : data Pointer to transmit
786 * @param[in] length : byte length of data
787 * @param[in] timeout: Timeout duration
788 *
789 * @return true/false
790 ****************************************************************************************
791 */
792 uint16_t app_qspi_receive_sync_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length, uint32_t timeout);
793
794 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
795 /**
796 ****************************************************************************************
797 * @brief Receive an amount of data in blocking mode with standard SPI.
798 * @note This function is used only in Indirect Read Mode.
799 * @param[in] id: which QSPI module want to receive.
800 * @param[out] p_data: Pointer to data buffer
801 * @param[in] length: Amount of data to be received in bytes
802 * @param[in] timeout: Timeout duration
803 *
804 * @return Result of operation.
805 ****************************************************************************************
806 */
807 uint16_t app_qspi_receive_sync(app_qspi_id_t id, uint8_t *p_data, uint32_t length, uint32_t timeout);
808 #endif
809
810 /**
811 ****************************************************************************************
812 * @brief Receive data without command, support std/dual/quad mode
813 *
814 * @param[in] id : QSPI module ID.
815 * @param[in] qspi_mode : @ref QSPI_DATA_MODE_SPI
816 * @ref QSPI_DATA_MODE_DUALSPI
817 * @ref QSPI_DATA_MODE_QUADSPI
818 * @param[in] data_width :@ref QSPI_DATASIZE_08_BITS
819 * @ref QSPI_DATASIZE_16_BITS
820 * @ref QSPI_DATASIZE_32_BITS
821 * @param[in] p_data : data Pointer to transmit
822 * @param[in] length : byte length of data
823 *
824 * @return true/false
825 ****************************************************************************************
826 */
827 uint16_t app_qspi_receive_async_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length);
828
829 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
830 /**
831 ****************************************************************************************
832 * @brief Receive an amount of data in non-blocking mode at standard SPI with Interrupt.
833 * @note This function is used only in Indirect Read Mode.
834 * @param[in] id: which QSPI module want to receive.
835 * @param[out] p_data: Pointer to data buffer
836 * @param[in] length: Amount of data to be received in bytes
837 *
838 * @return Result of operation.
839 ****************************************************************************************
840 */
841 uint16_t app_qspi_receive_async(app_qspi_id_t id, uint8_t *p_data, uint32_t length);
842 #endif
843
844 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
845 /**
846 ****************************************************************************************
847 * @brief Set Data Endian Mode to Read in Memory mapped Mode(XIP Mode)
848 *
849 * @param[in] id : QSPI module ID.
850 * @param[in] mode : endian mode
851 * @return true/false
852 ****************************************************************************************
853 */
854 bool app_qspi_mmap_set_endian_mode(app_qspi_id_t id, app_qspi_mmap_endian_mode_e mode);
855
856 /**
857 ****************************************************************************************
858 * @brief Read U8 Data in Memory mapped Mode(XIP Mode), can be used in flash/psram device
859 *
860 * @param[in] id : QSPI module ID.
861 * @param[in] address : the address of device connected to QSPI, start from 0x000000
862 * @return the read data
863 ****************************************************************************************
864 */
865 uint8_t app_qspi_mmap_read_u8(app_qspi_id_t id, uint32_t address) ;
866
867 /**
868 ****************************************************************************************
869 * @brief Read U16 Data in Memory mapped Mode(XIP Mode), The Data is ordered by the order in flash/psram device
870 *
871 * @param[in] id : QSPI module ID.
872 * @param[in] address : the address of device connected to QSPI, start from 0x000000
873 * @return the read data
874 ****************************************************************************************
875 */
876 uint16_t app_qspi_mmap_read_u16(app_qspi_id_t id, uint32_t address);
877
878 /**
879 ****************************************************************************************
880 * @brief Read U32 Data in Memory mapped Mode(XIP Mode), The Data is ordered by the order in flash/psram device
881 *
882 * @param[in] id : QSPI module ID.
883 * @param[in] address : the address of device connected to QSPI, start from 0x000000
884 * @return the read data
885 ****************************************************************************************
886 */
887 uint32_t app_qspi_mmap_read_u32(app_qspi_id_t id, uint32_t address);
888
889 /**
890 ****************************************************************************************
891 * @brief Read data block in Memory mapped Mode(XIP Mode), The Data is ordered by the order in flash/psram device
892 *
893 * @param[in] id : QSPI module ID.
894 * @param[in] address : the address of device connected to QSPI, start from 0x000000
895 * @param[in] buffer : memory pointer to save the read data
896 * @param[in] length : the read length in byte
897 * @return true/false
898 ****************************************************************************************
899 */
900 bool app_qspi_mmap_read_block(app_qspi_id_t id, uint32_t address, uint8_t * buffer, uint32_t length);
901
902 /**
903 ****************************************************************************************
904 * @brief Return the XIP Base Address of QSPI Instance.
905 *
906 * @param[in] id: QSPI module ID.
907 *
908 * @return The XIP base address.
909 ****************************************************************************************
910 */
911 uint32_t app_qspi_get_xip_base_address(app_qspi_id_t id);
912
913 #endif
914
915 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
916 /**
917 ****************************************************************************************
918 * @brief Transmit an amount of data in QPI mode (Async Mode).
919 * @param[in] id: Which QSPI module want to Transmit.
920 * @param[in] data_width: Just support @ref QSPI_DATASIZE_08_BITS @ref QSPI_DATASIZE_16_BITS @ref QSPI_DATASIZE_32_BITS
921 * @param[in] p_data: Pointer to data buffer
922 * @param[in] length: Amount of data to be transmitted in bytes
923 *
924 * @return Result of operation.
925 ****************************************************************************************
926 */
927 uint16_t app_qspi_transmit_in_qpi_async(app_qspi_id_t id, uint32_t data_width, uint8_t *p_data, uint32_t length);
928 #endif
929
930 /**
931 ****************************************************************************************
932 * @brief Return the QSPI handle.
933 *
934 * @param[in] id: QSPI module ID.
935 *
936 * @return Pointer to the specified ID's QSPI handle.
937 ****************************************************************************************
938 */
939 qspi_handle_t *app_qspi_get_handle(app_qspi_id_t id);
940
941 /** @} */
942
943 #endif
944
945 #ifdef __cplusplus
946 }
947 #endif
948
949 #endif
950
951 /** @} */
952
953 /** @} */
954
955 /** @} */
app_qspi_command_receive_sync
uint16_t app_qspi_command_receive_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout)
Receive an amount of data with the specified instruction, address and dummy cycles in blocking mode.
app_qspi_command_t
qspi_command_t app_qspi_command_t
QSPI command structure definition.
Definition: app_qspi.h:301
app_qspi_evt_t::size
uint16_t size
QSPI transmitted/received counter.
Definition: app_qspi.h:355
app_qspi_get_handle
qspi_handle_t * app_qspi_get_handle(app_qspi_id_t id)
Return the QSPI handle.
app_qspi_pin_t::pull
app_io_pull_t pull
Specifies the Pull-up or Pull-Down activation for the selected pins.
Definition: app_qspi.h:263
qspi_env_t::handle
qspi_handle_t handle
QSPI handle Structure.
Definition: app_qspi.h:499
app_qspi_params_t::id
app_qspi_id_t id
specified QSPI module ID.
Definition: app_qspi.h:534
APP_QSPI_ID_1
@ APP_QSPI_ID_1
QSPI module 1.
Definition: app_qspi.h:112
qspi_env_t::qspi_dma_state
app_qspi_dma_state_t qspi_dma_state
App qspi dma_state types.
Definition: app_qspi.h:506
app_qspi_transmit_sync_ex
uint16_t app_qspi_transmit_sync_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length, uint32_t timeout)
Transmit data without command, support std/dual/quad mode.
app_qspi_transmit_async
uint16_t app_qspi_transmit_async(app_qspi_id_t id, uint8_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode at standard SPI with Interrupt.
qspi_env_t
QSPI device structure definition.
Definition: app_qspi.h:498
app_qspi_pin_cfg_t::io_3
app_qspi_pin_t io_3
Set the configuration of QSPI IO3 pin.
Definition: app_qspi.h:277
app_qspi_pin_t
QSPI IO configuration Structures.
Definition: app_qspi.h:257
app_qspi_command_transmit_async
uint16_t app_qspi_command_transmit_async(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data)
Receive an amount of data with the specified instruction, address and dummy cycles in non-blocking mo...
app_qspi_state_t
app_qspi_state_t
App qspi state types.
Definition: app_qspi.h:474
APP_QSPI_ID_0
@ APP_QSPI_ID_0
QSPI module 0.
Definition: app_qspi.h:111
app_qspi_params_t::qspi_env
qspi_env_t qspi_env
QSPI device structure definition.
Definition: app_qspi.h:538
app_qspi_evt_t
QSPI event structure definition.
Definition: app_qspi.h:350
app_io_pull_t
app_io_pull_t
GPIO pull Enumerations definition.
Definition: app_io.h:181
app_io_type_t
app_io_type_t
GPIO type Enumerations definition.
Definition: app_io.h:145
app_qspi_deinit
uint16_t app_qspi_deinit(app_qspi_id_t id)
De-initialize the APP QSPI DRIVER peripheral.
_qspi_init_t
QSPI init Structure definition.
Definition: gr55xx_hal_qspi.h:103
APP_QSPI_EVT_ERROR
@ APP_QSPI_EVT_ERROR
Error reported by QSPI peripheral.
Definition: app_qspi.h:124
app_qspi_receive_sync_ex
uint16_t app_qspi_receive_sync_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length, uint32_t timeout)
Receive data without command, support std/dual/quad mode.
qspi_env_t::is_tx_done
volatile bool is_tx_done
tx done.
Definition: app_qspi.h:521
app_qspi_pin_cfg_t::cs
app_qspi_pin_t cs
Set the configuration of QSPI CS pin.
Definition: app_qspi.h:272
app_qspi_evt_t::error_code
uint32_t error_code
QSPI Error code .
Definition: app_qspi.h:354
_qspi_command_t
QSPI command Structure definition.
Definition: gr55xx_hal_qspi.h:166
app_qspi_pin_t::mux
app_io_mux_t mux
Specifies the Peripheral to be connected to the selected pins.
Definition: app_qspi.h:259
app_io_mode_t
app_io_mode_t
GPIO mode Enumerations definition.
Definition: app_io.h:161
APP_QSPI_EVT_RX_DATA
@ APP_QSPI_EVT_RX_DATA
Requested RX transfer completed.
Definition: app_qspi.h:126
qspi_env_t::is_rx_done
volatile bool is_rx_done
rx done.
Definition: app_qspi.h:520
app_qspi_id_t
app_qspi_id_t
QSPI module Enumerations definition.
Definition: app_qspi.h:110
app_qspi_dma_cfg_t
QSPI DMA configuration structure definition.
Definition: app_qspi.h:284
app_io.h
Header file containing functions prototypes of GPIO app library.
app_qspi_abort
uint16_t app_qspi_abort(app_qspi_id_t id)
Abort qspi communication with Interrupt.
app_qspi_pin_cfg_t
QSPI configuration Structures.
Definition: app_qspi.h:271
app_qspi_evt_handler_t
void(* app_qspi_evt_handler_t)(app_qspi_evt_t *p_evt)
QSPI event callback definition.
Definition: app_qspi.h:466
app_qspi_command_receive_async
uint16_t app_qspi_command_receive_async(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data)
Receive an amount of data with the specified instruction, address and dummy cycles in non-blocking mo...
app_qspi_command_sync
uint16_t app_qspi_command_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint32_t timeout)
Transmit only instruction in blocking mode.
app_qspi_pin_t::pin
uint32_t pin
Specifies the IO pins to be configured.
Definition: app_qspi.h:260
APP_QSPI_DMA_INVALID
@ APP_QSPI_DMA_INVALID
Definition: app_qspi.h:485
app_qspi_dma_state_t
app_qspi_dma_state_t
App qspi dma_state types.
Definition: app_qspi.h:484
qspi_env_t::dma_id
dma_id_t dma_id
DMA id.
Definition: app_qspi.h:504
APP_QSPI_EVT_ABORT
@ APP_QSPI_EVT_ABORT
Abort reported by QSPI peripheral.
Definition: app_qspi.h:127
app_qspi_receive_async_ex
uint16_t app_qspi_receive_async_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length)
Receive data without command, support std/dual/quad mode.
app_qspi_transmit_async_ex
uint16_t app_qspi_transmit_async_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length)
Transmit data without command, support std/dual/quad mode.
app_qspi_user_config.h
app_qspi_pin_t::enable
uint8_t enable
Enable or disable the pin.
Definition: app_qspi.h:264
app_qspi_receive_sync
uint16_t app_qspi_receive_sync(app_qspi_id_t id, uint8_t *p_data, uint32_t length, uint32_t timeout)
Receive an amount of data in blocking mode with standard SPI.
APP_QSPI_ACTIVITY
@ APP_QSPI_ACTIVITY
Definition: app_qspi.h:476
app_qspi_pin_cfg_t::io_1
app_qspi_pin_t io_1
Set the configuration of QSPI IO1 pin.
Definition: app_qspi.h:275
APP_QSPI_EVT_TX_CPLT
@ APP_QSPI_EVT_TX_CPLT
Requested TX transfer completed.
Definition: app_qspi.h:125
app_qspi_params_t::init
qspi_init_t init
QSPI communication parameters.
Definition: app_qspi.h:537
qspi_env_t::p_pin_cfg
app_qspi_pin_cfg_t * p_pin_cfg
QSPI configuration Structures.
Definition: app_qspi.h:503
app_qspi_params_t::pin_cfg
app_qspi_pin_cfg_t pin_cfg
the pin configuration information for the specified QSPI module.
Definition: app_qspi.h:535
qspi_env_t::qspi_state
app_qspi_state_t qspi_state
App qspi state types.
Definition: app_qspi.h:505
app_dma.h
Header file containing functions prototypes of DMA app library.
gr55xx_hal.h
This file contains all the functions prototypes for the HAL module driver.
app_qspi_command_async
uint16_t app_qspi_command_async(app_qspi_id_t id, app_qspi_command_t *p_cmd)
Transmit instruction in non-blocking mode with Interrupt.
app_qspi_receive_async
uint16_t app_qspi_receive_async(app_qspi_id_t id, uint8_t *p_data, uint32_t length)
Receive an amount of data in non-blocking mode at standard SPI with Interrupt.
app_qspi_transmit_in_qpi_async
uint16_t app_qspi_transmit_in_qpi_async(app_qspi_id_t id, uint32_t data_width, uint8_t *p_data, uint32_t length)
Transmit an amount of data in QPI mode (Async Mode).
app_qspi_pin_cfg_t::clk
app_qspi_pin_t clk
Set the configuration of QSPI CLK pin.
Definition: app_qspi.h:273
APP_QSPI_ID_MAX
@ APP_QSPI_ID_MAX
Only for check parameter, not used as input parameters.
Definition: app_qspi.h:116
app_qspi_evt_type_t
app_qspi_evt_type_t
APP QSPI Event Type.
Definition: app_qspi.h:123
app_qspi_params_t::dma_cfg
app_qspi_dma_cfg_t dma_cfg
QSPI DMA configuration.
Definition: app_qspi.h:536
app_qspi_dma_cfg_t::dma_instance
dma_regs_t * dma_instance
Specifies the dma instance of QSPI.
Definition: app_qspi.h:285
app_io_mux_t
app_io_mux_t
GPIO mux Enumerations definition.
Definition: app_io.h:253
qspi_env_t::evt_handler
app_qspi_evt_handler_t evt_handler
QSPI event callback .
Definition: app_qspi.h:508
APP_QSPI_DMA_ACTIVITY
@ APP_QSPI_DMA_ACTIVITY
Definition: app_qspi.h:486
app_qspi_evt_t::type
app_qspi_evt_type_t type
Type of event.
Definition: app_qspi.h:351
app_qspi_pin_t::mode
app_io_mode_t mode
Specifies the IO Mode for pins.
Definition: app_qspi.h:262
app_qspi_transmit_sync
uint16_t app_qspi_transmit_sync(app_qspi_id_t id, uint8_t *p_data, uint32_t length, uint32_t timeout)
Transmit an amount of data in blocking mode with standard SPI.
app_qspi_pin_cfg_t::io_2
app_qspi_pin_t io_2
Set the configuration of QSPI IO2 pin.
Definition: app_qspi.h:276
app_drv_error.h
Header file of app driver error code.
app_drv_config.h
Header file of app driver config code.
app_qspi_pin_t::type
app_io_type_t type
Specifies the type of QSPI IO.
Definition: app_qspi.h:258
app_qspi_init
uint16_t app_qspi_init(app_qspi_params_t *p_params, app_qspi_evt_handler_t evt_handler)
Initialize the APP QSPI DRIVER according to the specified parameters in the app_qspi_params_t and app...
_qspi_handle
QSPI handle Structure definition.
Definition: gr55xx_hal_qspi.h:123
qspi_env_t::is_xfer_err
volatile bool is_xfer_err
xfer err.
Definition: app_qspi.h:522
app_qspi_command_transmit_sync
uint16_t app_qspi_command_transmit_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout)
Receive an amount of data with the specified instruction, address and dummy cycles in blocking mode.
app_qspi_params_t
QSPI parameters structure definition.
Definition: app_qspi.h:533
dma_id_t
int16_t dma_id_t
DMA id definition.
Definition: app_dma.h:98
app_qspi_pin_cfg_t::io_0
app_qspi_pin_t io_0
Set the configuration of QSPI IO0 pin.
Definition: app_qspi.h:274
app_qspi_dma_cfg_t::dma_channel
dma_channel_t dma_channel
Specifies the dma channel of QSPI.
Definition: app_qspi.h:286
qspi_env_t::start_flag
volatile bool start_flag
start flag.
Definition: app_qspi.h:507
dma_channel_t
dma_channel_t
HAL DMA Channel Enumerations definition.
Definition: gr55xx_hal_dma.h:93
APP_QSPI_INVALID
@ APP_QSPI_INVALID
Definition: app_qspi.h:475