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GR551x API Reference  V1_6_06_B5676
gr55xx_ll_pkc.h
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1 /**
2  ****************************************************************************************
3  *
4  * @file gr55xx_ll_pkc.h
5  * @author BLE Driver Team
6  * @brief Header file containing functions prototypes of PKC LL library.
7  *
8  ****************************************************************************************
9  * @attention
10  #####Copyright (c) 2019 GOODIX
11  All rights reserved.
12 
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16  notice, this list of conditions and the following disclaimer.
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18  notice, this list of conditions and the following disclaimer in the
19  documentation and/or other materials provided with the distribution.
20  * Neither the name of GOODIX nor the names of its contributors may be used
21  to endorse or promote products derived from this software without
22  specific prior written permission.
23 
24  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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33  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34  POSSIBILITY OF SUCH DAMAGE.
35  ****************************************************************************************
36  */
37 
38 /** @addtogroup PERIPHERAL Peripheral Driver
39  * @{
40  */
41 
42 /** @addtogroup LL_DRIVER LL Driver
43  * @{
44  */
45 
46 /** @defgroup LL_PKC PKC
47  * @brief PKC LL module driver.
48  * @{
49  */
50 
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55XX_LL_PKC_H__
53 #define __GR55XX_LL_PKC_H__
54 
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58 
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx.h"
61 
62 #if defined (PKC)
63 
64 /** @addtogroup PKC_LL_MACRO
65  * @{
66  */
67 
68 /* Private macros ------------------------------------------------------------*/
69 /** @defgroup PKC_LL_Private_Macro PKC Private Macros
70  * @{
71  */
72 #define ECC_U32_LENGTH (8) /**< ECC Array Length */
73 #define RSA_U32_LENGTH (64) /**< RSA Array Length */
74 
75 /** @} */
76 
77 /** @} */
78 
79 /** @defgroup PKC_LL_STRUCTURES Structures
80  * @{
81  */
82 
83 /* Exported types ------------------------------------------------------------*/
84 /** @defgroup PKC_LL_ES_INIT PKC Exported Init structures
85  * @{
86  */
87 
88 /**
89  * @brief LL PKC ECC Point Structure definition
90  */
91 typedef struct _ll_ecc_point
92 {
93  uint32_t X[ECC_U32_LENGTH]; /**< Specifies the point in x-axis */
94 
95  uint32_t Y[ECC_U32_LENGTH]; /**< Specifies the point in y-axis */
96 
98 
99 /**
100  * @brief LL PKC ECC P-256 Elliptic Curve Init Structure definition
101  */
102 typedef struct _ll_ecc_curve_init
103 {
104  uint32_t A[ECC_U32_LENGTH]; /**< Operand A array */
105  uint32_t B[ECC_U32_LENGTH]; /**< Operand B array */
106 
107  uint32_t P[ECC_U32_LENGTH]; /**< Prime number P array */
108  uint32_t PRSquare[ECC_U32_LENGTH]; /**< R^2 mod P, where R = 2^256 */
109  uint32_t ConstP; /**< Montgomery multiplication constant in prime field P, ConstP = 1 */
110 
111  uint32_t N[ECC_U32_LENGTH]; /**< Prime number N array */
112  uint32_t NRSquare[ECC_U32_LENGTH]; /**< R^2 mod N, where R = 2^256 */
113  uint32_t ConstN; /**< Montgomery multiplication constant in prime field N, ConstN = 0xee00bc4f */
114 
115  uint32_t H; /**< H */
116 
117  ll_ecc_point_t G; /**< ECC Point G */
118 
120 
121 /**
122  * @brief LL PKC Init Structure definition
123  */
124 typedef struct _ll_pkc_init
125 {
126  ll_ecc_curve_init_t *p_ecc_curve; /**< Specifies the pointer to elliptic curve description */
127 
128  uint32_t data_bits; /**< Specifies the Data size: 256 ~ 2048bits */
129 
131 
132 /** @} */
133 
134 /** @} */
135 
136 /**
137  * @defgroup PKC_LL_MACRO Defines
138  * @{
139  */
140 
141 /* Exported constants --------------------------------------------------------*/
142 /** @defgroup PKC_LL_Exported_Constants PKC Exported Constants
143  * @{
144  */
145 
146 /** @defgroup PKC_LL_EC_GET_FLAG Get Flags Defines
147  * @brief Flags defines which can be used with LL_PKC_ReadReg function
148  * @{
149  */
150 #define LL_PKC_WORKSTAT_BUSY PKC_WORKSTAT_BUSY /**< Busy flag */
151 /** @} */
152 
153 /** @defgroup PKC_LL_EC_IT IT Defines
154  * @brief Interrupt defines which can be used with LL_PKC_ReadReg and LL_PKC_WriteReg functions
155  * @{
156  */
157 #define LL_PKC_INTEN_DONE PKC_INTEN_DONE /**< Operation Done Interrupt source */
158 #define LL_PKC_INTEN_ERR PKC_INTEN_ERR /**< Operation Error Interrupt source */
159 #define LL_PKC_INTEN_BAOVF PKC_INTEN_BAOVF /**< Big Integer Result Overflow Interrupt source */
160 /** @} */
161 
162 /** @defgroup PKC_LL_EC_BITS_LENGTH Bits Length
163  * @{
164  */
165 #define LL_PKC_BITS_LENGTH_MIN (256U) /**< Bits length min value */
166 #define LL_PKC_BITS_LENGTH_MAX (2048U) /**< Bits length max value */
167 #define LL_PKC_BIGMULTI_BITS_LENGTH_MAX (1024U) /**< Big number multiplication bits Length max value */
168 /** @} */
169 
170 /** @defgroup PKC_LL_EC_OPERATION_MODE Operation Mode
171  * @{
172  */
173 #define LL_PKC_operation_mode_MULTIPLY (0x00000000U) /**< Multiplication operation mode */
174 #define LL_PKC_operation_mode_INVERTION (1UL << PKC_SW_CTRL_OPMODE_Pos) /**< Inversion operation mode */
175 #define LL_PKC_operation_mode_ADD (2UL << PKC_SW_CTRL_OPMODE_Pos) /**< Addition operation mode */
176 #define LL_PKC_operation_mode_SUB (3UL << PKC_SW_CTRL_OPMODE_Pos) /**< Subtraction operation mode */
177 #define LL_PKC_operation_mode_COMPARE (4UL << PKC_SW_CTRL_OPMODE_Pos) /**< Comparison operation mode */
178 #define LL_PKC_operation_mode_LEFTSHIFT (5UL << PKC_SW_CTRL_OPMODE_Pos) /**< Left Shift operation mode */
179 #define LL_PKC_operation_mode_BIGINTEGERMULTIPLY (6UL << PKC_SW_CTRL_OPMODE_Pos) /**< Big Number Multiplication operation mode */
180 #define LL_PKC_operation_mode_BIGINTEGERADD (7UL << PKC_SW_CTRL_OPMODE_Pos) /**< Big Number Addition operation mode */
181 /** @} */
182 
183 /** @defgroup PKC_LL_EC_DEFAULT_CONFIG InitStrcut default configuartion
184  * @{
185  */
186 
187 /**
188  * @brief LL PKC ECC Curve default configuretion.
189  */
190 #define LL_ECC_CURVE_DEFAULT_CONFIG \
191 { \
192  .A = {0xFFFFFFFC, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000003, 0x00000000, 0x00000000, 0x00000004, 0xFFFFFFFC}, \
193  .B = {0x29C4BDDF, 0xD89CDF62, 0x78843090, 0xACF005CD, 0xF7212ED6, 0xE5A220AB, 0x04874834, 0xDC30061D}, \
194  .P = {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0xFFFFFFFF}, \
195  .PRSquare = {0x00000003, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFB, 0xFFFFFFFE, 0xFFFFFFFF, 0xFFFFFFFD, 0x00000004}, \
196  .ConstP = 1, \
197  .N = {0xFC632551, 0xF3B9CAC2, 0xA7179E84, 0xBCE6FAAD, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF}, \
198  .NRSquare = {0xBE79EEA2, 0x83244C95, 0x49BD6FA6, 0x4699799C, 0x2B6BEC59, 0x2845B239, 0xF3D95620, 0x66E12D94}, \
199  .ConstN = 0xEE00BC4F, \
200  .H = 1, \
201  .G.X = {0xD898C296, 0xF4A13945, 0x2DEB33A0, 0x77037D81, 0x63A440F2, 0xF8BCE6E5, 0xE12C4247, 0x6B17D1F2}, \
202  .G.Y = {0x37BF51F5, 0xCBB64068, 0x6B315ECE, 0x2BCE3357, 0x7C0F9E16, 0x8EE7EB4A, 0xFE1A7F9B, 0x4FE342E2}, \
203 }
204 
205 /** @} */
206 
207 /** @} */
208 
209 /* Exported macro ------------------------------------------------------------*/
210 /** @defgroup PKC_LL_Exported_Macros PKC Exported Macros
211  * @{
212  */
213 
214 /** @defgroup PKC_LL_EM_WRITE_READ Common Write and read registers Macros
215  * @{
216  */
217 
218 /**
219  * @brief Write a value in PKC register
220  * @param __INSTANCE__ PKC Instance
221  * @param __REG__ Register to be written
222  * @param __VALUE__ Value to be written in the register
223  * @retval None
224  */
225 #define LL_PKC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
226 
227 /**
228  * @brief Read a value in PKC register
229  * @param __INSTANCE__ PKC Instance
230  * @param __REG__ Register to be read
231  * @retval Register value
232  */
233 #define LL_PKC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
234 
235 /** @} */
236 
237 /** @} */
238 
239 /** @} */
240 
241 /* Exported functions --------------------------------------------------------*/
242 /** @defgroup PKC_LL_DRIVER_FUNCTIONS Functions
243  * @{
244  */
245 
246 /** @defgroup PKC_LL_EF_Configuration Configuration functions
247  * @{
248  */
249 
250 /**
251  * @brief Enable pkc.
252  *
253  * Register|BitsName
254  * --------|--------
255  * CTRL | EN
256  *
257  * @param PKCx PKC instance
258  * @retval None
259  */
260 __STATIC_INLINE void ll_pkc_enable(pkc_regs_t *PKCx)
261 {
262  SET_BITS(PKCx->CTRL, PKC_CTRL_EN);
263 }
264 
265 /**
266  * @brief Disable pkc.
267  *
268  * Register|BitsName
269  * --------|--------
270  * CTRL | EN
271  *
272  * @param PKCx PKC instance
273  * @retval None
274  */
275 __STATIC_INLINE void ll_pkc_disable(pkc_regs_t *PKCx)
276 {
277  CLEAR_BITS(PKCx->CTRL, PKC_CTRL_EN);
278 }
279 
280 /**
281  * @brief Indicate whether the pkc is enabled.
282  *
283  * Register|BitsName
284  * --------|--------
285  * CTRL | EN
286  *
287  * @param PKCx PKC instance
288  * @retval State of bit (1 or 0).
289  */
290 __STATIC_INLINE uint32_t ll_pkc_is_enabled(pkc_regs_t *PKCx)
291 {
292  return (READ_BITS(PKCx->CTRL, PKC_CTRL_EN) == (PKC_CTRL_EN));
293 }
294 
295 /**
296  * @brief Enable pkc start in hardware mode.
297  *
298  * Register|BitsName
299  * --------|--------
300  * CTRL | START
301  *
302  * @param PKCx PKC instance
303  * @retval None
304  */
305 __STATIC_INLINE void ll_pkc_enable_hardware_start(pkc_regs_t *PKCx)
306 {
307  SET_BITS(PKCx->CTRL, PKC_CTRL_START);
308 }
309 
310 /**
311  * @brief Disable pkc start in hardware mode.
312  *
313  * Register|BitsName
314  * --------|--------
315  * CTRL | START
316  *
317  * @param PKCx PKC instance
318  * @retval None
319  */
320 __STATIC_INLINE void ll_pkc_disable_hardware_start(pkc_regs_t *PKCx)
321 {
322  CLEAR_BITS(PKCx->CTRL, PKC_CTRL_START);
323 }
324 
325 /**
326  * @brief Indicate whether the pkc start in hardware mode is enabled.
327  *
328  * Register|BitsName
329  * --------|--------
330  * CTRL | START
331  *
332  * @param PKCx PKC instance
333  * @retval State of bit (1 or 0).
334  */
335 __STATIC_INLINE uint32_t ll_pkc_is_enabled_hardware_start(pkc_regs_t *PKCx)
336 {
337  return (READ_BITS(PKCx->CTRL, PKC_CTRL_START) == (PKC_CTRL_START));
338 }
339 
340 /**
341  * @brief Enable pkc software mode.
342  *
343  * Register|BitsName
344  * --------|--------
345  * CTRL | SWCTRL
346  *
347  * @param PKCx PKC instance
348  * @retval None
349  */
350 __STATIC_INLINE void ll_pkc_enable_software(pkc_regs_t *PKCx)
351 {
352  SET_BITS(PKCx->CTRL, PKC_CTRL_SWCTRL);
353 }
354 
355 /**
356  * @brief Disable pkc software mode.
357  *
358  * Register|BitsName
359  * --------|--------
360  * CTRL | SWCTRL
361  *
362  * @param PKCx PKC instance
363  * @retval None
364  */
365 __STATIC_INLINE void ll_pkc_disable_software(pkc_regs_t *PKCx)
366 {
367  CLEAR_BITS(PKCx->CTRL, PKC_CTRL_SWCTRL);
368 }
369 
370 /**
371  * @brief Indicate whether the pkc software mode is enabled.
372  *
373  * Register|BitsName
374  * --------|--------
375  * CTRL | SWCTRL
376  *
377  * @param PKCx PKC instance
378  * @retval State of bit (1 or 0).
379  */
380 __STATIC_INLINE uint32_t ll_pkc_is_enabled_software(pkc_regs_t *PKCx)
381 {
382  return (READ_BITS(PKCx->CTRL, PKC_CTRL_SWCTRL) == (PKC_CTRL_SWCTRL));
383 }
384 
385 /**
386  * @brief Enable pkc reset.
387  *
388  * Register|BitsName
389  * --------|--------
390  * CTRL | SWRST
391  *
392  * @param PKCx PKC instance
393  * @retval None
394  */
395 __STATIC_INLINE void ll_pkc_enable_reset(pkc_regs_t *PKCx)
396 {
397  SET_BITS(PKCx->CTRL, PKC_CTRL_SWRST);
398 }
399 
400 /**
401  * @brief Disable pkc reset.
402  *
403  * Register|BitsName
404  * --------|--------
405  * CTRL | SWRST
406  *
407  * @param PKCx PKC instance
408  * @retval None
409  */
410 __STATIC_INLINE void ll_pkc_disable_reset(pkc_regs_t *PKCx)
411 {
412  CLEAR_BITS(PKCx->CTRL, PKC_CTRL_SWRST);
413 }
414 
415 /**
416  * @brief Indicate whether the pkc reset is enabled.
417  *
418  * Register|BitsName
419  * --------|--------
420  * CTRL | SWRST
421  *
422  * @param PKCx PKC instance
423  * @retval State of bit (1 or 0).
424  */
425 __STATIC_INLINE uint32_t ll_pkc_is_enabled_reset(pkc_regs_t *PKCx)
426 {
427  return (READ_BITS(PKCx->CTRL, PKC_CTRL_SWRST) == (PKC_CTRL_SWRST));
428 }
429 
430 /**
431  * @brief Set PKC parameter k pointer in pkc sram.
432  *
433  * Register|BitsName
434  * --------|--------
435  * CONFIG0 | KPTR
436  *
437  * @param PKCx PKC instance
438  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
439  * @retval None
440  */
441 __STATIC_INLINE void ll_pkc_set_k_pointer(pkc_regs_t *PKCx, uint32_t pointer)
442 {
443  MODIFY_REG(PKCx->CONFIG0, PKC_CONFIG0_KPTR, pointer << PKC_CONFIG0_KPTR_Pos);
444 }
445 
446 /**
447  * @brief Get PKC parameter k pointer in pkc sram.
448  *
449  * Register|BitsName
450  * --------|--------
451  * CONFIG0 | KPTR
452  *
453  * @param PKCx PKC instance
454  * @retval Return value is between: 0 ~ 0x200
455  */
456 __STATIC_INLINE uint32_t ll_pkc_get_k_pointer(pkc_regs_t *PKCx)
457 {
458  return (READ_BITS(PKCx->CONFIG0, PKC_CONFIG0_KPTR) >> PKC_CONFIG0_KPTR_Pos);
459 }
460 
461 /**
462  * @brief Set PKC parameter r pointer in pkc sram.
463  *
464  * Register|BitsName
465  * --------|--------
466  * CONFIG0 | RPTR
467  *
468  * @param PKCx PKC instance
469  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
470  * @retval None
471  */
472 __STATIC_INLINE void ll_pkc_set_r_pointer(pkc_regs_t *PKCx, uint32_t pointer)
473 {
474  MODIFY_REG(PKCx->CONFIG0, PKC_CONFIG0_RPTR, pointer << PKC_CONFIG0_RPTR_Pos);
475 }
476 
477 /**
478  * @brief Get PKC parameter r pointer in pkc sram.
479  *
480  * Register|BitsName
481  * --------|--------
482  * CONFIG0 | RPTR
483  *
484  * @param PKCx PKC instance
485  * @retval Return value is between: 0 ~ 0x200
486  */
487 __STATIC_INLINE uint32_t ll_pkc_get_r_pointer(pkc_regs_t *PKCx)
488 {
489  return (READ_BITS(PKCx->CONFIG0, PKC_CONFIG0_RPTR) >> PKC_CONFIG0_RPTR_Pos);
490 }
491 
492 /**
493  * @brief Set PKC parameter p pointer in pkc sram.
494  *
495  * Register|BitsName
496  * --------|--------
497  * CONFIG1 | PPTR
498  *
499  * @param PKCx PKC instance
500  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
501  * @retval None
502  */
503 __STATIC_INLINE void ll_pkc_set_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
504 {
505  MODIFY_REG(PKCx->CONFIG1, PKC_CONFIG1_PPTR, pointer << PKC_CONFIG1_PPTR_Pos);
506 }
507 
508 /**
509  * @brief Get PKC parameter p pointer in pkc sram.
510  *
511  * Register|BitsName
512  * --------|--------
513  * CONFIG1 | PPTR
514  *
515  * @param PKCx PKC instance
516  * @retval Return value is between: 0 ~ 0x200
517  */
518 __STATIC_INLINE uint32_t ll_pkc_get_p_pointer(pkc_regs_t *PKCx)
519 {
520  return (READ_BITS(PKCx->CONFIG1, PKC_CONFIG1_PPTR) >> PKC_CONFIG1_PPTR_Pos);
521 }
522 
523 /**
524  * @brief Set PKC parameter R^2 pointer in pkc sram.
525  *
526  * Register|BitsName
527  * --------|--------
528  * CONFIG1 | RSQPTR
529  *
530  * @param PKCx PKC instance
531  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
532  * @retval None
533  */
534 __STATIC_INLINE void ll_pkc_set_rsq_pointer(pkc_regs_t *PKCx, uint32_t pointer)
535 {
536  MODIFY_REG(PKCx->CONFIG1, PKC_CONFIG1_RSQPTR, pointer << PKC_CONFIG1_RSQPTR_Pos);
537 }
538 
539 /**
540  * @brief Get PKC parameter R^2 pointer in pkc sram.
541  *
542  * Register|BitsName
543  * --------|--------
544  * CONFIG1 | RSQPTR
545  *
546  * @param PKCx PKC instance
547  * @retval Return value is between: 0 ~ 0x200
548  */
549 __STATIC_INLINE uint32_t ll_pkc_get_rsq_pointer(pkc_regs_t *PKCx)
550 {
551  return (READ_BITS(PKCx->CONFIG1, PKC_CONFIG1_RSQPTR) >> PKC_CONFIG1_RSQPTR_Pos);
552 }
553 
554 /**
555  * @brief Set PKC parameter Gx pointer in pkc sram.
556  *
557  * Register|BitsName
558  * --------|--------
559  * CONFIG2 | GXPTR
560  *
561  * @param PKCx PKC instance
562  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
563  * @retval None
564  */
565 __STATIC_INLINE void ll_pkc_set_gx_pointer(pkc_regs_t *PKCx, uint32_t pointer)
566 {
567  MODIFY_REG(PKCx->CONFIG2, PKC_CONFIG2_GXPTR, pointer << PKC_CONFIG2_GXPTR_Pos);
568 }
569 
570 /**
571  * @brief Get PKC parameter Gx pointer in pkc sram.
572  *
573  * Register|BitsName
574  * --------|--------
575  * CONFIG2 | GXPTR
576  *
577  * @param PKCx PKC instance
578  * @retval Return value is between: 0 ~ 0x200
579  */
580 __STATIC_INLINE uint32_t ll_pkc_get_gx_pointer(pkc_regs_t *PKCx)
581 {
582  return (READ_BITS(PKCx->CONFIG2, PKC_CONFIG2_GXPTR) >> PKC_CONFIG2_GXPTR_Pos);
583 }
584 
585 /**
586  * @brief Set PKC parameter Gy pointer in pkc sram.
587  *
588  * Register|BitsName
589  * --------|--------
590  * CONFIG2 | GYPTR
591  *
592  * @param PKCx PKC instance
593  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
594  * @retval None
595  */
596 __STATIC_INLINE void ll_pkc_set_gy_pointer(pkc_regs_t *PKCx, uint32_t pointer)
597 {
598  MODIFY_REG(PKCx->CONFIG2, PKC_CONFIG2_GYPTR, pointer << PKC_CONFIG2_GYPTR_Pos);
599 }
600 
601 /**
602  * @brief Get PKC parameter Gy pointer in pkc sram.
603  *
604  * Register|BitsName
605  * --------|--------
606  * CONFIG2 | GYPTR
607  *
608  * @param PKCx PKC instance
609  * @retval Return value is between: 0 ~ 0x200
610  */
611 __STATIC_INLINE uint32_t ll_pkc_get_gy_pointer(pkc_regs_t *PKCx)
612 {
613  return (READ_BITS(PKCx->CONFIG2, PKC_CONFIG2_GYPTR) >> PKC_CONFIG2_GYPTR_Pos);
614 }
615 
616 /**
617  * @brief Set PKC parameter Gz pointer in pkc sram.
618  *
619  * Register|BitsName
620  * --------|--------
621  * CONFIG3 | GZPTR
622  *
623  * @param PKCx PKC instance
624  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
625  * @retval None
626  */
627 __STATIC_INLINE void ll_pkc_set_gz_pointer(pkc_regs_t *PKCx, uint32_t pointer)
628 {
629  MODIFY_REG(PKCx->CONFIG3, PKC_CONFIG3_GZPTR, pointer << PKC_CONFIG3_GZPTR_Pos);
630 }
631 
632 /**
633  * @brief Get PKC parameter Gz pointer in pkc sram.
634  *
635  * Register|BitsName
636  * --------|--------
637  * CONFIG3 | GZPTR
638  *
639  * @param PKCx PKC instance
640  * @retval Return value is between: 0 ~ 0x200
641  */
642 __STATIC_INLINE uint32_t ll_pkc_get_gz_pointer(pkc_regs_t *PKCx)
643 {
644  return (READ_BITS(PKCx->CONFIG3, PKC_CONFIG3_GZPTR) >> PKC_CONFIG3_GZPTR_Pos);
645 }
646 
647 /**
648  * @brief Set PKC parameter R0x pointer in pkc sram.
649  *
650  * Register|BitsName
651  * --------|--------
652  * CONFIG3 | R0XPTR
653  *
654  * @param PKCx PKC instance
655  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
656  * @retval None
657  */
658 __STATIC_INLINE void ll_pkc_set_r0x_pointer(pkc_regs_t *PKCx, uint32_t pointer)
659 {
660  MODIFY_REG(PKCx->CONFIG3, PKC_CONFIG3_R0XPTR, pointer << PKC_CONFIG3_R0XPTR_Pos);
661 }
662 
663 /**
664  * @brief Get PKC parameter R0x pointer in pkc sram.
665  *
666  * Register|BitsName
667  * --------|--------
668  * CONFIG3 | R0XPTR
669  *
670  * @param PKCx PKC instance
671  * @retval Return value is between: 0 ~ 0x200
672  */
673 __STATIC_INLINE uint32_t ll_pkc_get_r0x_pointer(pkc_regs_t *PKCx)
674 {
675  return (READ_BITS(PKCx->CONFIG3, PKC_CONFIG3_R0XPTR) >> PKC_CONFIG3_R0XPTR_Pos);
676 }
677 
678 /**
679  * @brief Set PKC parameter R0y pointer in pkc sram.
680  *
681  * Register|BitsName
682  * --------|--------
683  * CONFIG4 | R0YPTR
684  *
685  * @param PKCx PKC instance
686  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
687  * @retval None
688  */
689 __STATIC_INLINE void ll_pkc_set_r0y_pointer(pkc_regs_t *PKCx, uint32_t pointer)
690 {
691  MODIFY_REG(PKCx->CONFIG4, PKC_CONFIG4_R0YPTR, pointer << PKC_CONFIG4_R0YPTR_Pos);
692 }
693 
694 /**
695  * @brief Get PKC parameter R0y pointer in pkc sram.
696  *
697  * Register|BitsName
698  * --------|--------
699  * CONFIG4 | R0YPTR
700  *
701  * @param PKCx PKC instance
702  * @retval Return value is between: 0 ~ 0x200
703  */
704 __STATIC_INLINE uint32_t ll_pkc_get_r0y_pointer(pkc_regs_t *PKCx)
705 {
706  return (READ_BITS(PKCx->CONFIG4, PKC_CONFIG4_R0YPTR) >> PKC_CONFIG4_R0YPTR_Pos);
707 }
708 
709 /**
710  * @brief Set PKC parameter R0z pointer in pkc sram.
711  *
712  * Register|BitsName
713  * --------|--------
714  * CONFIG4 | R0ZPTR
715  *
716  * @param PKCx PKC instance
717  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
718  * @retval None
719  */
720 __STATIC_INLINE void ll_pkc_set_r0z_pointer(pkc_regs_t *PKCx, uint32_t pointer)
721 {
722  MODIFY_REG(PKCx->CONFIG4, PKC_CONFIG4_R0ZPTR, pointer << PKC_CONFIG4_R0ZPTR_Pos);
723 }
724 
725 /**
726  * @brief Get PKC parameter R0z pointer in pkc sram.
727  *
728  * Register|BitsName
729  * --------|--------
730  * CONFIG4 | R0ZPTR
731  *
732  * @param PKCx PKC instance
733  * @retval Return value is between: 0 ~ 0x200
734  */
735 __STATIC_INLINE uint32_t ll_pkc_get_r0z_pointer(pkc_regs_t *PKCx)
736 {
737  return (READ_BITS(PKCx->CONFIG4, PKC_CONFIG4_R0ZPTR) >> PKC_CONFIG4_R0ZPTR_Pos);
738 }
739 
740 /**
741  * @brief Set PKC parameter R1x pointer in pkc sram.
742  *
743  * Register|BitsName
744  * --------|--------
745  * CONFIG5 | R1XPTR
746  *
747  * @param PKCx PKC instance
748  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
749  * @retval None
750  */
751 __STATIC_INLINE void ll_pkc_set_r1x_pointer(pkc_regs_t *PKCx, uint32_t pointer)
752 {
753  MODIFY_REG(PKCx->CONFIG5, PKC_CONFIG5_R1XPTR, pointer << PKC_CONFIG5_R1XPTR_Pos);
754 }
755 
756 /**
757  * @brief Get PKC parameter R1x pointer in pkc sram.
758  *
759  * Register|BitsName
760  * --------|--------
761  * CONFIG5 | R1XPTR
762  *
763  * @param PKCx PKC instance
764  * @retval Return value is between: 0 ~ 0x200
765  */
766 __STATIC_INLINE uint32_t ll_pkc_get_r1x_pointer(pkc_regs_t *PKCx)
767 {
768  return (READ_BITS(PKCx->CONFIG5, PKC_CONFIG5_R1XPTR) >> PKC_CONFIG5_R1XPTR_Pos);
769 }
770 
771 /**
772  * @brief Set PKC parameter R1y pointer in pkc sram.
773  *
774  * Register|BitsName
775  * --------|--------
776  * CONFIG5 | R1YPTR
777  *
778  * @param PKCx PKC instance
779  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
780  * @retval None
781  */
782 __STATIC_INLINE void ll_pkc_set_r1y_pointer(pkc_regs_t *PKCx, uint32_t pointer)
783 {
784  MODIFY_REG(PKCx->CONFIG5, PKC_CONFIG5_R1YPTR, pointer << PKC_CONFIG5_R1YPTR_Pos);
785 }
786 
787 /**
788  * @brief Get PKC parameter R1y pointer in pkc sram.
789  *
790  * Register|BitsName
791  * --------|--------
792  * CONFIG5 | R1YPTR
793  *
794  * @param PKCx PKC instance
795  * @retval Return value is between: 0 ~ 0x200
796  */
797 __STATIC_INLINE uint32_t ll_pkc_get_r1y_pointer(pkc_regs_t *PKCx)
798 {
799  return (READ_BITS(PKCx->CONFIG5, PKC_CONFIG5_R1YPTR) >> PKC_CONFIG5_R1YPTR_Pos);
800 }
801 
802 /**
803  * @brief Set PKC parameter R1z pointer in pkc sram.
804  *
805  * Register|BitsName
806  * --------|--------
807  * CONFIG6 | R1ZPTR
808  *
809  * @param PKCx PKC instance
810  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
811  * @retval None
812  */
813 __STATIC_INLINE void ll_pkc_set_r1z_pointer(pkc_regs_t *PKCx, uint32_t pointer)
814 {
815  MODIFY_REG(PKCx->CONFIG6, PKC_CONFIG6_R1ZPTR, pointer << PKC_CONFIG6_R1ZPTR_Pos);
816 }
817 
818 /**
819  * @brief Get PKC parameter R1z pointer in pkc sram.
820  *
821  * Register|BitsName
822  * --------|--------
823  * CONFIG6 | R1ZPTR
824  *
825  * @param PKCx PKC instance
826  * @retval Return value is between: 0 ~ 0x200
827  */
828 __STATIC_INLINE uint32_t ll_pkc_get_r1z_pointer(pkc_regs_t *PKCx)
829 {
830  return (READ_BITS(PKCx->CONFIG6, PKC_CONFIG6_R1ZPTR) >> PKC_CONFIG6_R1ZPTR_Pos);
831 }
832 
833 /**
834  * @brief Set PKC parameter Tmp1 pointer in pkc sram.
835  *
836  * Register|BitsName
837  * --------|--------
838  * CONFIG6 | TMP1PTR
839  *
840  * @param PKCx PKC instance
841  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
842  * @retval None
843  */
844 __STATIC_INLINE void ll_pkc_set_tmp1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
845 {
846  MODIFY_REG(PKCx->CONFIG6, PKC_CONFIG6_TMP1PTR, pointer << PKC_CONFIG6_TMP1PTR_Pos);
847 }
848 
849 /**
850  * @brief Get PKC parameter Tmp1 pointer in pkc sram.
851  *
852  * Register|BitsName
853  * --------|--------
854  * CONFIG6 | TMP1PTR
855  *
856  * @param PKCx PKC instance
857  * @retval Return value is between: 0 ~ 0x200
858  */
859 __STATIC_INLINE uint32_t ll_pkc_get_tmp1_pointer(pkc_regs_t *PKCx)
860 {
861  return (READ_BITS(PKCx->CONFIG6, PKC_CONFIG6_TMP1PTR) >> PKC_CONFIG6_TMP1PTR_Pos);
862 }
863 
864 /**
865  * @brief Set PKC parameter Tmp2 pointer in pkc sram.
866  *
867  * Register|BitsName
868  * --------|--------
869  * CONFIG7 | TMP2PTR
870  *
871  * @param PKCx PKC instance
872  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
873  * @retval None
874  */
875 __STATIC_INLINE void ll_pkc_set_tmp2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
876 {
877  MODIFY_REG(PKCx->CONFIG7, PKC_CONFIG7_TMP2PTR, pointer << PKC_CONFIG7_TMP2PTR_Pos);
878 }
879 
880 /**
881  * @brief Get PKC parameter Tmp2 pointer in pkc sram.
882  *
883  * Register|BitsName
884  * --------|--------
885  * CONFIG7 | TMP2PTR
886  *
887  * @param PKCx PKC instance
888  * @retval Return value is between: 0 ~ 0x200
889  */
890 __STATIC_INLINE uint32_t ll_pkc_get_tmp2_pointer(pkc_regs_t *PKCx)
891 {
892  return (READ_BITS(PKCx->CONFIG7, PKC_CONFIG7_TMP2PTR) >> PKC_CONFIG7_TMP2PTR_Pos);
893 }
894 
895 /**
896  * @brief Set PKC parameter Tmp3 pointer in pkc sram.
897  *
898  * Register|BitsName
899  * --------|--------
900  * CONFIG7 | TMP3PTR
901  *
902  * @param PKCx PKC instance
903  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
904  * @retval None
905  */
906 __STATIC_INLINE void ll_pkc_set_tmp3_pointer(pkc_regs_t *PKCx, uint32_t pointer)
907 {
908  MODIFY_REG(PKCx->CONFIG7, PKC_CONFIG7_TMP3PTR, pointer << PKC_CONFIG7_TMP3PTR_Pos);
909 }
910 
911 /**
912  * @brief Get PKC parameter Tmp3 pointer in pkc sram.
913  *
914  * Register|BitsName
915  * --------|--------
916  * CONFIG7 | TMP3PTR
917  *
918  * @param PKCx PKC instance
919  * @retval Return value is between: 0 ~ 0x200
920  */
921 __STATIC_INLINE uint32_t ll_pkc_get_tmp3_pointer(pkc_regs_t *PKCx)
922 {
923  return (READ_BITS(PKCx->CONFIG7, PKC_CONFIG7_TMP3PTR) >> PKC_CONFIG7_TMP3PTR_Pos);
924 }
925 
926 /**
927  * @brief Set PKC parameter Tmp4 pointer in pkc sram.
928  *
929  * Register|BitsName
930  * --------|--------
931  * CONFIG8 | TMP4PTR
932  *
933  * @param PKCx PKC instance
934  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
935  * @retval None
936  */
937 __STATIC_INLINE void ll_pkc_set_tmp4_pointer(pkc_regs_t *PKCx, uint32_t pointer)
938 {
939  MODIFY_REG(PKCx->CONFIG8, PKC_CONFIG8_TMP4PTR, pointer << PKC_CONFIG8_TMP4PTR_Pos);
940 }
941 
942 /**
943  * @brief Get PKC parameter Tmp4 pointer in pkc sram.
944  *
945  * Register|BitsName
946  * --------|--------
947  * CONFIG8 | TMP4PTR
948  *
949  * @param PKCx PKC instance
950  * @retval Return value is between: 0 ~ 0x200
951  */
952 __STATIC_INLINE uint32_t ll_pkc_get_tmp4_pointer(pkc_regs_t *PKCx)
953 {
954  return (READ_BITS(PKCx->CONFIG8, PKC_CONFIG8_TMP4PTR) >> PKC_CONFIG8_TMP4PTR_Pos);
955 }
956 
957 /**
958  * @brief Set PKC parameter Tmp5 pointer in pkc sram.
959  *
960  * Register|BitsName
961  * --------|--------
962  * CONFIG8 | TMP5PTR
963  *
964  * @param PKCx PKC instance
965  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
966  * @retval None
967  */
968 __STATIC_INLINE void ll_pkc_set_tmp5_pointer(pkc_regs_t *PKCx, uint32_t pointer)
969 {
970  MODIFY_REG(PKCx->CONFIG8, PKC_CONFIG8_TMP5PTR, pointer << PKC_CONFIG8_TMP5PTR_Pos);
971 }
972 
973 /**
974  * @brief Get PKC parameter Tmp5 pointer in pkc sram.
975  *
976  * Register|BitsName
977  * --------|--------
978  * CONFIG8 | TMP5PTR
979  *
980  * @param PKCx PKC instance
981  * @retval Return value is between: 0 ~ 0x200
982  */
983 __STATIC_INLINE uint32_t ll_pkc_get_tmp5_pointer(pkc_regs_t *PKCx)
984 {
985  return (READ_BITS(PKCx->CONFIG8, PKC_CONFIG8_TMP5PTR) >> PKC_CONFIG8_TMP5PTR_Pos);
986 }
987 
988 /**
989  * @brief Set PKC parameter Tmp6 pointer in pkc sram.
990  *
991  * Register|BitsName
992  * --------|--------
993  * CONFIG9 | TMP6PTR
994  *
995  * @param PKCx PKC instance
996  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
997  * @retval None
998  */
999 __STATIC_INLINE void ll_pkc_set_tmp6_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1000 {
1001  MODIFY_REG(PKCx->CONFIG9, PKC_CONFIG9_TMP6PTR, pointer << PKC_CONFIG9_TMP6PTR_Pos);
1002 }
1003 
1004 /**
1005  * @brief Get PKC parameter Tmp6 pointer in pkc sram.
1006  *
1007  * Register|BitsName
1008  * --------|--------
1009  * CONFIG9 | TMP6PTR
1010  *
1011  * @param PKCx PKC instance
1012  * @retval Return value is between: 0 ~ 0x200
1013  */
1014 __STATIC_INLINE uint32_t ll_pkc_get_tmp6_pointer(pkc_regs_t *PKCx)
1015 {
1016  return (READ_BITS(PKCx->CONFIG9, PKC_CONFIG9_TMP6PTR) >> PKC_CONFIG9_TMP6PTR_Pos);
1017 }
1018 
1019 /**
1020  * @brief Set PKC parameter Constant1 pointer in pkc sram.
1021  *
1022  * Register|BitsName
1023  * --------|--------
1024  * CONFIG9 | CONST1PTR
1025  *
1026  * @param PKCx PKC instance
1027  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1028  * @retval None
1029  */
1030 __STATIC_INLINE void ll_pkc_set_constant1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1031 {
1032  MODIFY_REG(PKCx->CONFIG9, PKC_CONFIG9_CONST1PTR, pointer << PKC_CONFIG9_CONST1PTR_Pos);
1033 }
1034 
1035 /**
1036  * @brief Get PKC parameter Constant1 pointer in pkc sram.
1037  *
1038  * Register|BitsName
1039  * --------|--------
1040  * CONFIG9 | CONST1PTR
1041  *
1042  * @param PKCx PKC instance
1043  * @retval Return value is between: 0 ~ 0x200
1044  */
1045 __STATIC_INLINE uint32_t ll_pkc_get_constant1_pointer(pkc_regs_t *PKCx)
1046 {
1047  return (READ_BITS(PKCx->CONFIG9, PKC_CONFIG9_CONST1PTR) >> PKC_CONFIG9_CONST1PTR_Pos);
1048 }
1049 
1050 /**
1051  * @brief Set PKC parameter X1 pointer in pkc sram.
1052  *
1053  * Register|BitsName
1054  * --------|--------
1055  * CONFIG10 | X1PTR
1056  *
1057  * @param PKCx PKC instance
1058  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1059  * @retval None
1060  */
1061 __STATIC_INLINE void ll_pkc_set_x1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1062 {
1063  MODIFY_REG(PKCx->CONFIG10, PKC_CONFIG10_X1PTR, pointer << PKC_CONFIG10_X1PTR_Pos);
1064 }
1065 
1066 /**
1067  * @brief Get PKC parameter X1 pointer in pkc sram.
1068  *
1069  * Register|BitsName
1070  * --------|--------
1071  * CONFIG10 | X1PTR
1072  *
1073  * @param PKCx PKC instance
1074  * @retval Return value is between: 0 ~ 0x200
1075  */
1076 __STATIC_INLINE uint32_t ll_pkc_get_x1_pointer(pkc_regs_t *PKCx)
1077 {
1078  return (READ_BITS(PKCx->CONFIG10, PKC_CONFIG10_X1PTR) >> PKC_CONFIG10_X1PTR_Pos);
1079 }
1080 
1081 /**
1082  * @brief Set PKC parameter X2 pointer in pkc sram.
1083  *
1084  * Register|BitsName
1085  * --------|--------
1086  * CONFIG10 | X2PTR
1087  *
1088  * @param PKCx PKC instance
1089  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1090  * @retval None
1091  */
1092 __STATIC_INLINE void ll_pkc_set_x2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1093 {
1094  MODIFY_REG(PKCx->CONFIG10, PKC_CONFIG10_X2PTR, pointer << PKC_CONFIG10_X2PTR_Pos);
1095 }
1096 
1097 /**
1098  * @brief Get PKC parameter X2 pointer in pkc sram.
1099  *
1100  * Register|BitsName
1101  * --------|--------
1102  * CONFIG10 | X2PTR
1103  *
1104  * @param PKCx PKC instance
1105  * @retval Return value is between: 0 ~ 0x200
1106  */
1107 __STATIC_INLINE uint32_t ll_pkc_get_x2_pointer(pkc_regs_t *PKCx)
1108 {
1109  return (READ_BITS(PKCx->CONFIG10, PKC_CONFIG10_X2PTR) >> PKC_CONFIG10_X2PTR_Pos);
1110 }
1111 
1112 /**
1113  * @brief Set PKC parameter MITmp pointer in pkc sram.
1114  *
1115  * Register|BitsName
1116  * --------|--------
1117  * CONFIG11 | MITMPPTR
1118  *
1119  * @param PKCx PKC instance
1120  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1121  * @retval None
1122  */
1123 __STATIC_INLINE void ll_pkc_set_mitmp_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1124 {
1125  MODIFY_REG(PKCx->CONFIG11, PKC_CONFIG11_MITMPPTR, pointer << PKC_CONFIG11_MITMPPTR_Pos);
1126 }
1127 
1128 /**
1129  * @brief Get PKC parameter MITmp pointer in pkc sram.
1130  *
1131  * Register|BitsName
1132  * --------|--------
1133  * CONFIG11 | MITMPPTR
1134  *
1135  * @param PKCx PKC instance
1136  * @retval Return value is between: 0 ~ 0x200
1137  */
1138 __STATIC_INLINE uint32_t ll_pkc_get_mitmp_pointer(pkc_regs_t *PKCx)
1139 {
1140  return (READ_BITS(PKCx->CONFIG11, PKC_CONFIG11_MITMPPTR) >> PKC_CONFIG11_MITMPPTR_Pos);
1141 }
1142 
1143 /**
1144  * @brief Set PKC parameter TmpK pointer in pkc sram.
1145  *
1146  * Register|BitsName
1147  * --------|--------
1148  * CONFIG11 | TMPKPTR
1149  *
1150  * @param PKCx PKC instance
1151  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1152  * @retval None
1153  */
1154 __STATIC_INLINE void ll_pkc_set_tmpk_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1155 {
1156  MODIFY_REG(PKCx->CONFIG11, PKC_CONFIG11_TMPKPTR, pointer << PKC_CONFIG11_TMPKPTR_Pos);
1157 }
1158 
1159 /**
1160  * @brief Get PKC parameter TmpK pointer in pkc sram.
1161  *
1162  * Register|BitsName
1163  * --------|--------
1164  * CONFIG11 | TMPKPTR
1165  *
1166  * @param PKCx PKC instance
1167  * @retval Return value is between: 0 ~ 0x200
1168  */
1169 __STATIC_INLINE uint32_t ll_pkc_get_tmpk_pointer(pkc_regs_t *PKCx)
1170 {
1171  return (READ_BITS(PKCx->CONFIG11, PKC_CONFIG11_TMPKPTR) >> PKC_CONFIG11_TMPKPTR_Pos);
1172 }
1173 
1174 /**
1175  * @brief Set ECC parameter A pointer in pkc sram.
1176  *
1177  * Register|BitsName
1178  * --------|--------
1179  * CONFIG12 | APTR
1180  *
1181  * @param PKCx PKC instance
1182  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1183  * @retval None
1184  */
1185 __STATIC_INLINE void ll_pkc_set_ecc_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1186 {
1187  MODIFY_REG(PKCx->CONFIG12, PKC_CONFIG12_APTR, pointer << PKC_CONFIG12_APTR_Pos);
1188 }
1189 
1190 /**
1191  * @brief Get ECC parameter A pointer in pkc sram.
1192  *
1193  * Register|BitsName
1194  * --------|--------
1195  * CONFIG12 | APTR
1196  *
1197  * @param PKCx PKC instance
1198  * @retval Return value is between: 0 ~ 0x200
1199  */
1200 __STATIC_INLINE uint32_t ll_pkc_get_ecc_a_pointer(pkc_regs_t *PKCx)
1201 {
1202  return (READ_BITS(PKCx->CONFIG12, PKC_CONFIG12_APTR) >> PKC_CONFIG12_APTR_Pos);
1203 }
1204 
1205 /**
1206  * @brief Set ECC parameter B pointer in pkc sram.
1207  *
1208  * Register|BitsName
1209  * --------|--------
1210  * CONFIG12 | BPTR
1211  *
1212  * @param PKCx PKC instance
1213  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1214  * @retval None
1215  */
1216 __STATIC_INLINE void ll_pkc_set_ecc_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1217 {
1218  MODIFY_REG(PKCx->CONFIG12, PKC_CONFIG12_BPTR, pointer << PKC_CONFIG12_BPTR_Pos);
1219 }
1220 
1221 /**
1222  * @brief Get ECC parameter B pointer in pkc sram.
1223  *
1224  * Register|BitsName
1225  * --------|--------
1226  * CONFIG12 | BPTR
1227  *
1228  * @param PKCx PKC instance
1229  * @retval Return value is between: 0 ~ 0x200
1230  */
1231 __STATIC_INLINE uint32_t ll_pkc_get_ecc_b_pointer(pkc_regs_t *PKCx)
1232 {
1233  return (READ_BITS(PKCx->CONFIG12, PKC_CONFIG12_BPTR) >> PKC_CONFIG12_BPTR_Pos);
1234 }
1235 
1236 /**
1237  * @brief Set constant value for montgomery multiply in pkc sram.
1238  *
1239  * Register|BitsName
1240  * --------|--------
1241  * CONFIG13 | CONSTP
1242  *
1243  * @param PKCx PKC instance
1244  * @param ConstP This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1245  * @retval None
1246  */
1247 __STATIC_INLINE void ll_pkc_set_constp(pkc_regs_t *PKCx, uint32_t ConstP)
1248 {
1249  WRITE_REG(PKCx->CONFIG13, ConstP);
1250 }
1251 
1252 /**
1253  * @brief Get constant value for montgomery multiply in pkc sram.
1254  *
1255  * Register|BitsName
1256  * --------|--------
1257  * CONFIG13 | CONSTP
1258  *
1259  * @param PKCx PKC instance
1260  * @retval Return value is between: 0 ~ 0x200
1261  */
1262 __STATIC_INLINE uint32_t ll_pkc_get_constp(pkc_regs_t *PKCx)
1263 {
1264  return (READ_REG(PKCx->CONFIG13));
1265 }
1266 
1267 /**
1268  * @brief Enable pkc start in software mode.
1269  *
1270  * Register|BitsName
1271  * --------|--------
1272  * SW_CTRL | OPSTART
1273  *
1274  * @param PKCx PKC instance
1275  * @retval None
1276  */
1277 __STATIC_INLINE void ll_pkc_enable_software_start(pkc_regs_t *PKCx)
1278 {
1279  SET_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_OPSTART);
1280 }
1281 
1282 /**
1283  * @brief Disable pkc start in software mode.
1284  *
1285  * Register|BitsName
1286  * --------|--------
1287  * SW_CTRL | OPSTART
1288  *
1289  * @param PKCx PKC instance
1290  * @retval None
1291  */
1292 __STATIC_INLINE void ll_pkc_disable_software_start(pkc_regs_t *PKCx)
1293 {
1294  CLEAR_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_OPSTART);
1295 }
1296 
1297 /**
1298  * @brief Indicate whether the pkc start in software mode is enabled.
1299  *
1300  * Register|BitsName
1301  * --------|--------
1302  * SW_CTRL | OPSTART
1303  *
1304  * @param PKCx PKC instance
1305  * @retval State of bit (1 or 0).
1306  */
1307 __STATIC_INLINE uint32_t ll_pkc_is_enabled_software_start(pkc_regs_t *PKCx)
1308 {
1309  return (READ_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_OPSTART) == (PKC_SW_CTRL_OPSTART));
1310 }
1311 
1312 /**
1313  * @brief Set operation mode in software mode.
1314  *
1315  * Register|BitsName
1316  * --------|--------
1317  * SW_CTRL | OPMODE
1318  *
1319  * @param PKCx PKC instance
1320  * @param operation_mode This parameter can be one of the following values:
1321  * @arg @ref LL_PKC_operation_mode_MULTIPLY
1322  * @arg @ref LL_PKC_operation_mode_INVERTION
1323  * @arg @ref LL_PKC_operation_mode_ADD
1324  * @arg @ref LL_PKC_operation_mode_SUB
1325  * @arg @ref LL_PKC_operation_mode_COMPARE
1326  * @arg @ref LL_PKC_operation_mode_LEFTSHIFT
1327  * @arg @ref LL_PKC_operation_mode_BIGINTEGERMULTIPLY
1328  * @arg @ref LL_PKC_operation_mode_BIGINTEGERADD
1329  * @retval None
1330  */
1331 __STATIC_INLINE void ll_pkc_set_operation_mode(pkc_regs_t *PKCx, uint32_t operation_mode)
1332 {
1333  MODIFY_REG(PKCx->SW_CTRL, PKC_SW_CTRL_OPMODE, operation_mode);
1334 }
1335 
1336 /**
1337  * @brief Get operation mode in software mode.
1338  *
1339  * Register|BitsName
1340  * --------|--------
1341  * SW_CTRL | OPMODE
1342  *
1343  * @param PKCx PKC instance
1344  * @retval Return value can be one of the following values:
1345  * @arg @ref LL_PKC_operation_mode_MULTIPLY
1346  * @arg @ref LL_PKC_operation_mode_INVERTION
1347  * @arg @ref LL_PKC_operation_mode_ADD
1348  * @arg @ref LL_PKC_operation_mode_SUB
1349  * @arg @ref LL_PKC_operation_mode_COMPARE
1350  * @arg @ref LL_PKC_operation_mode_LEFTSHIFT
1351  * @arg @ref LL_PKC_operation_mode_BIGINTEGERMULTIPLY
1352  * @arg @ref LL_PKC_operation_mode_BIGINTEGERADD
1353  */
1354 __STATIC_INLINE uint32_t ll_pkc_get_operation_mode(pkc_regs_t *PKCx)
1355 {
1356  return (READ_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_OPMODE));
1357 }
1358 
1359 /**
1360  * @brief Enable Dummy Multi in software mode.
1361  *
1362  * Register|BitsName
1363  * --------|--------
1364  * SW_CTRL | STARTDM
1365  *
1366  * @param PKCx PKC instance
1367  * @retval None
1368  */
1369 __STATIC_INLINE void ll_pkc_enable_dummy_multi(pkc_regs_t *PKCx)
1370 {
1371  SET_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_STARTDM);
1372 }
1373 
1374 /**
1375  * @brief Disable Dummy Multi in software mode.
1376  *
1377  * Register|BitsName
1378  * --------|--------
1379  * SW_CTRL | STARTDM
1380  *
1381  * @param PKCx PKC instance
1382  * @retval None
1383  */
1384 __STATIC_INLINE void ll_pkc_disable_dummy_multi(pkc_regs_t *PKCx)
1385 {
1386  CLEAR_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_STARTDM);
1387 }
1388 
1389 /**
1390  * @brief Indicate whether the Dummy Multi in software mode is enabled.
1391  *
1392  * Register|BitsName
1393  * --------|--------
1394  * SW_CTRL | STARTDM
1395  *
1396  * @param PKCx PKC instance
1397  * @retval State of bit (1 or 0).
1398  */
1399 __STATIC_INLINE uint32_t ll_pkc_is_enabled_dummy_multi(pkc_regs_t *PKCx)
1400 {
1401  return (READ_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_STARTDM) == (PKC_SW_CTRL_STARTDM));
1402 }
1403 
1404 /**
1405  * @brief Enable Random Clock Gating in software mode.
1406  *
1407  * Register|BitsName
1408  * --------|--------
1409  * SW_CTRL | RANDEN
1410  *
1411  * @param PKCx PKC instance
1412  * @retval None
1413  */
1414 __STATIC_INLINE void ll_pkc_enable_random_clock_gating(pkc_regs_t *PKCx)
1415 {
1416  SET_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_RANDEN);
1417 }
1418 
1419 /**
1420  * @brief Disable Random Clock Gating in software mode.
1421  *
1422  * Register|BitsName
1423  * --------|--------
1424  * SW_CTRL | RANDEN
1425  *
1426  * @param PKCx PKC instance
1427  * @retval None
1428  */
1429 __STATIC_INLINE void ll_pkc_disable_random_clock_gating(pkc_regs_t *PKCx)
1430 {
1431  CLEAR_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_RANDEN);
1432 }
1433 
1434 /**
1435  * @brief Indicate whether the Random Clock Gating in software mode is enabled.
1436  *
1437  * Register|BitsName
1438  * --------|--------
1439  * SW_CTRL | RANDEN
1440  *
1441  * @param PKCx PKC instance
1442  * @retval State of bit (1 or 0).
1443  */
1444 __STATIC_INLINE uint32_t ll_pkc_is_enabled_random_clock_gating(pkc_regs_t *PKCx)
1445 {
1446  return (READ_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_RANDEN) == (PKC_SW_CTRL_RANDEN));
1447 }
1448 
1449 /**
1450  * @brief Set modular multiplication parameter A pointer in pkc sram.
1451  *
1452  * Register|BitsName
1453  * --------|--------
1454  * SW_CONFIG0 | MMAPTR
1455  *
1456  * @param PKCx PKC instance
1457  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1458  * @retval None
1459  */
1460 __STATIC_INLINE void ll_pkc_set_mm_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1461 {
1462  MODIFY_REG(PKCx->SW_CONFIG0, PKC_SW_CONFIG0_MMAPTR, pointer << PKC_SW_CONFIG0_MMAPTR_Pos);
1463 }
1464 
1465 /**
1466  * @brief Get modular multiplication parameter A pointer in pkc sram.
1467  *
1468  * Register|BitsName
1469  * --------|--------
1470  * SW_CONFIG0 | MMAPTR
1471  *
1472  * @param PKCx PKC instance
1473  * @retval Return value is between: 0 ~ 0x200
1474  */
1475 __STATIC_INLINE uint32_t ll_pkc_get_mm_a_pointer(pkc_regs_t *PKCx)
1476 {
1477  return (READ_BITS(PKCx->SW_CONFIG0, PKC_SW_CONFIG0_MMAPTR) >> PKC_SW_CONFIG0_MMAPTR_Pos);
1478 }
1479 
1480 /**
1481  * @brief Set modular multiplication parameter B pointer in pkc sram.
1482  *
1483  * Register|BitsName
1484  * --------|--------
1485  * SW_CONFIG0 | MMBPTR
1486  *
1487  * @param PKCx PKC instance
1488  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1489  * @retval None
1490  */
1491 __STATIC_INLINE void ll_pkc_set_mm_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1492 {
1493  MODIFY_REG(PKCx->SW_CONFIG0, PKC_SW_CONFIG0_MMBPTR, pointer << PKC_SW_CONFIG0_MMBPTR_Pos);
1494 }
1495 
1496 /**
1497  * @brief Get modular multiplication parameter B pointer in pkc sram.
1498  *
1499  * Register|BitsName
1500  * --------|--------
1501  * SW_CONFIG0 | MMBPTR
1502  *
1503  * @param PKCx PKC instance
1504  * @retval Return value is between: 0 ~ 0x200
1505  */
1506 __STATIC_INLINE uint32_t ll_pkc_get_mm_b_pointer(pkc_regs_t *PKCx)
1507 {
1508  return (READ_BITS(PKCx->SW_CONFIG0, PKC_SW_CONFIG0_MMBPTR) >> PKC_SW_CONFIG0_MMBPTR_Pos);
1509 }
1510 
1511 /**
1512  * @brief Set modular multiplication parameter P pointer in pkc sram.
1513  *
1514  * Register|BitsName
1515  * --------|--------
1516  * SW_CONFIG1 | MMPPTR
1517  *
1518  * @param PKCx PKC instance
1519  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1520  * @retval None
1521  */
1522 __STATIC_INLINE void ll_pkc_set_mm_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1523 {
1524  MODIFY_REG(PKCx->SW_CONFIG1, PKC_SW_CONFIG1_MMPPTR, pointer << PKC_SW_CONFIG1_MMPPTR_Pos);
1525 }
1526 
1527 /**
1528  * @brief Get modular multiplication parameter P pointer in pkc sram.
1529  *
1530  * Register|BitsName
1531  * --------|--------
1532  * SW_CONFIG1 | MMPPTR
1533  *
1534  * @param PKCx PKC instance
1535  * @retval Return value is between: 0 ~ 0x200
1536  */
1537 __STATIC_INLINE uint32_t ll_pkc_get_mm_p_pointer(pkc_regs_t *PKCx)
1538 {
1539  return (READ_BITS(PKCx->SW_CONFIG1, PKC_SW_CONFIG1_MMPPTR) >> PKC_SW_CONFIG1_MMPPTR_Pos);
1540 }
1541 
1542 /**
1543  * @brief Set modular multiplication parameter C pointer in pkc sram.
1544  *
1545  * Register|BitsName
1546  * --------|--------
1547  * SW_CONFIG1 | MMCPTR
1548  *
1549  * @param PKCx PKC instance
1550  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1551  * @retval None
1552  */
1553 __STATIC_INLINE void ll_pkc_set_mm_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1554 {
1555  MODIFY_REG(PKCx->SW_CONFIG1, PKC_SW_CONFIG1_MMCPTR, pointer << PKC_SW_CONFIG1_MMCPTR_Pos);
1556 }
1557 
1558 /**
1559  * @brief Get modular multiplication parameter C pointer in pkc sram.
1560  *
1561  * Register|BitsName
1562  * --------|--------
1563  * SW_CONFIG1 | MMCPTR
1564  *
1565  * @param PKCx PKC instance
1566  * @retval Return value is between: 0 ~ 0x200
1567  */
1568 __STATIC_INLINE uint32_t ll_pkc_get_mm_c_pointer(pkc_regs_t *PKCx)
1569 {
1570  return (READ_BITS(PKCx->SW_CONFIG1, PKC_SW_CONFIG1_MMCPTR) >> PKC_SW_CONFIG1_MMCPTR_Pos);
1571 }
1572 
1573 /**
1574  * @brief Set modular add/sub parameter A pointer in pkc sram.
1575  *
1576  * Register|BitsName
1577  * --------|--------
1578  * SW_CONFIG2 | MASAPTR
1579  *
1580  * @param PKCx PKC instance
1581  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1582  * @retval None
1583  */
1584 __STATIC_INLINE void ll_pkc_set_mas_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1585 {
1586  MODIFY_REG(PKCx->SW_CONFIG2, PKC_SW_CONFIG2_MASAPTR, pointer << PKC_SW_CONFIG2_MASAPTR_Pos);
1587 }
1588 
1589 /**
1590  * @brief Get modular add/sub parameter A pointer in pkc sram.
1591  *
1592  * Register|BitsName
1593  * --------|--------
1594  * SW_CONFIG2 | MASAPTR
1595  *
1596  * @param PKCx PKC instance
1597  * @retval Return value is between: 0 ~ 0x200
1598  */
1599 __STATIC_INLINE uint32_t ll_pkc_get_mas_a_pointer(pkc_regs_t *PKCx)
1600 {
1601  return (READ_BITS(PKCx->SW_CONFIG2, PKC_SW_CONFIG2_MASAPTR) >> PKC_SW_CONFIG2_MASAPTR_Pos);
1602 }
1603 
1604 /**
1605  * @brief Set modular add/sub parameter B pointer in pkc sram.
1606  *
1607  * Register|BitsName
1608  * --------|--------
1609  * SW_CONFIG2 | MASBPTR
1610  *
1611  * @param PKCx PKC instance
1612  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1613  * @retval None
1614  */
1615 __STATIC_INLINE void ll_pkc_set_mas_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1616 {
1617  MODIFY_REG(PKCx->SW_CONFIG2, PKC_SW_CONFIG2_MASBPTR, pointer << PKC_SW_CONFIG2_MASBPTR_Pos);
1618 }
1619 
1620 /**
1621  * @brief Get modular add/sub parameter B pointer in pkc sram.
1622  *
1623  * Register|BitsName
1624  * --------|--------
1625  * SW_CONFIG2 | MASBPTR
1626  *
1627  * @param PKCx PKC instance
1628  * @retval Return value is between: 0 ~ 0x200
1629  */
1630 __STATIC_INLINE uint32_t ll_pkc_get_mas_b_pointer(pkc_regs_t *PKCx)
1631 {
1632  return (READ_BITS(PKCx->SW_CONFIG2, PKC_SW_CONFIG2_MASBPTR) >> PKC_SW_CONFIG2_MASBPTR_Pos);
1633 }
1634 
1635 /**
1636  * @brief Set modular add/sub parameter P pointer in pkc sram.
1637  *
1638  * Register|BitsName
1639  * --------|--------
1640  * SW_CONFIG3 | MASPPTR
1641  *
1642  * @param PKCx PKC instance
1643  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1644  * @retval None
1645  */
1646 __STATIC_INLINE void ll_pkc_set_mas_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1647 {
1648  MODIFY_REG(PKCx->SW_CONFIG3, PKC_SW_CONFIG3_MASPPTR, pointer << PKC_SW_CONFIG3_MASPPTR_Pos);
1649 }
1650 
1651 /**
1652  * @brief Get modular add/sub parameter P pointer in pkc sram.
1653  *
1654  * Register|BitsName
1655  * --------|--------
1656  * SW_CONFIG3 | MASPPTR
1657  *
1658  * @param PKCx PKC instance
1659  * @retval Return value is between: 0 ~ 0x200
1660  */
1661 __STATIC_INLINE uint32_t ll_pkc_get_mas_p_pointer(pkc_regs_t *PKCx)
1662 {
1663  return (READ_BITS(PKCx->SW_CONFIG3, PKC_SW_CONFIG3_MASPPTR) >> PKC_SW_CONFIG3_MASPPTR_Pos);
1664 }
1665 
1666 /**
1667  * @brief Set modular add/sub parameter C pointer in pkc sram.
1668  *
1669  * Register|BitsName
1670  * --------|--------
1671  * SW_CONFIG3 | MASCPTR
1672  *
1673  * @param PKCx PKC instance
1674  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1675  * @retval None
1676  */
1677 __STATIC_INLINE void ll_pkc_set_mas_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1678 {
1679  MODIFY_REG(PKCx->SW_CONFIG3, PKC_SW_CONFIG3_MASCPTR, pointer << PKC_SW_CONFIG3_MASCPTR_Pos);
1680 }
1681 
1682 /**
1683  * @brief Get modular add/sub parameter C pointer in pkc sram.
1684  *
1685  * Register|BitsName
1686  * --------|--------
1687  * SW_CONFIG3 | MASCPTR
1688  *
1689  * @param PKCx PKC instance
1690  * @retval Return value is between: 0 ~ 0x200
1691  */
1692 __STATIC_INLINE uint32_t ll_pkc_get_mas_c_pointer(pkc_regs_t *PKCx)
1693 {
1694  return (READ_BITS(PKCx->SW_CONFIG3, PKC_SW_CONFIG3_MASCPTR) >> PKC_SW_CONFIG3_MASCPTR_Pos);
1695 }
1696 
1697 /**
1698  * @brief Set modular invertion parameter U pointer in pkc sram.
1699  *
1700  * Register|BitsName
1701  * --------|--------
1702  * SW_CONFIG4 | MIUPTR
1703  *
1704  * @param PKCx PKC instance
1705  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1706  * @retval None
1707  */
1708 __STATIC_INLINE void ll_pkc_set_mi_u_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1709 {
1710  MODIFY_REG(PKCx->SW_CONFIG4, PKC_SW_CONFIG4_MIUPTR, pointer << PKC_SW_CONFIG4_MIUPTR_Pos);
1711 }
1712 
1713 /**
1714  * @brief Get modular invertion parameter U pointer in pkc sram.
1715  *
1716  * Register|BitsName
1717  * --------|--------
1718  * SW_CONFIG4 | MIUPTR
1719  *
1720  * @param PKCx PKC instance
1721  * @retval Return value is between: 0 ~ 0x200
1722  */
1723 __STATIC_INLINE uint32_t ll_pkc_get_mi_u_pointer(pkc_regs_t *PKCx)
1724 {
1725  return (READ_BITS(PKCx->SW_CONFIG4, PKC_SW_CONFIG4_MIUPTR) >> PKC_SW_CONFIG4_MIUPTR_Pos);
1726 }
1727 
1728 /**
1729  * @brief Set modular invertion parameter V pointer in pkc sram.
1730  *
1731  * Register|BitsName
1732  * --------|--------
1733  * SW_CONFIG4 | MIVPTR
1734  *
1735  * @param PKCx PKC instance
1736  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1737  * @retval None
1738  */
1739 __STATIC_INLINE void ll_pkc_set_mi_v_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1740 {
1741  MODIFY_REG(PKCx->SW_CONFIG4, PKC_SW_CONFIG4_MIVPTR, pointer << PKC_SW_CONFIG4_MIVPTR_Pos);
1742 }
1743 
1744 /**
1745  * @brief Get modular invertion parameter V pointer in pkc sram.
1746  *
1747  * Register|BitsName
1748  * --------|--------
1749  * SW_CONFIG4 | MIVPTR
1750  *
1751  * @param PKCx PKC instance
1752  * @retval Return value is between: 0 ~ 0x200
1753  */
1754 __STATIC_INLINE uint32_t ll_pkc_get_mi_v_pointer(pkc_regs_t *PKCx)
1755 {
1756  return (READ_BITS(PKCx->SW_CONFIG4, PKC_SW_CONFIG4_MIVPTR) >> PKC_SW_CONFIG4_MIVPTR_Pos);
1757 }
1758 
1759 /**
1760  * @brief Set modular invertion parameter X1 pointer in pkc sram.
1761  *
1762  * Register|BitsName
1763  * --------|--------
1764  * SW_CONFIG5 | MIX1PTR
1765  *
1766  * @param PKCx PKC instance
1767  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1768  * @retval None
1769  */
1770 __STATIC_INLINE void ll_pkc_set_mi_x1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1771 {
1772  MODIFY_REG(PKCx->SW_CONFIG5, PKC_SW_CONFIG5_MIX1PTR, pointer << PKC_SW_CONFIG5_MIX1PTR_Pos);
1773 }
1774 
1775 /**
1776  * @brief Get modular invertion parameter X1 pointer in pkc sram.
1777  *
1778  * Register|BitsName
1779  * --------|--------
1780  * SW_CONFIG5 | MIX1PTR
1781  *
1782  * @param PKCx PKC instance
1783  * @retval Return value is between: 0 ~ 0x200
1784  */
1785 __STATIC_INLINE uint32_t ll_pkc_get_mi_x1_pointer(pkc_regs_t *PKCx)
1786 {
1787  return (READ_BITS(PKCx->SW_CONFIG5, PKC_SW_CONFIG5_MIX1PTR) >> PKC_SW_CONFIG5_MIX1PTR_Pos);
1788 }
1789 
1790 /**
1791  * @brief Set modular invertion parameter X1 pointer in pkc sram.
1792  *
1793  * Register|BitsName
1794  * --------|--------
1795  * SW_CONFIG5 | MIX2PTR
1796  *
1797  * @param PKCx PKC instance
1798  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1799  * @retval None
1800  */
1801 __STATIC_INLINE void ll_pkc_set_mi_x2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1802 {
1803  MODIFY_REG(PKCx->SW_CONFIG5, PKC_SW_CONFIG5_MIX2PTR, pointer << PKC_SW_CONFIG5_MIX2PTR_Pos);
1804 }
1805 
1806 /**
1807  * @brief Get modular invertion parameter X1 pointer in pkc sram.
1808  *
1809  * Register|BitsName
1810  * --------|--------
1811  * SW_CONFIG5 | MIX2PTR
1812  *
1813  * @param PKCx PKC instance
1814  * @retval Return value is between: 0 ~ 0x200
1815  */
1816 __STATIC_INLINE uint32_t ll_pkc_get_mi_x2_pointer(pkc_regs_t *PKCx)
1817 {
1818  return (READ_BITS(PKCx->SW_CONFIG5, PKC_SW_CONFIG5_MIX2PTR) >> PKC_SW_CONFIG5_MIX2PTR_Pos);
1819 }
1820 
1821 /**
1822  * @brief Set modular invertion parameter Tmp pointer in pkc sram.
1823  *
1824  * Register|BitsName
1825  * --------|--------
1826  * SW_CONFIG6 | MITMPPTR
1827  *
1828  * @param PKCx PKC instance
1829  * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1830  * @retval None
1831  */
1832 __STATIC_INLINE void ll_pkc_set_swmi_tmp_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1833 {
1834  MODIFY_REG(PKCx->SW_CONFIG6, PKC_SW_CONFIG6_MITMPPTR, pointer << PKC_SW_CONFIG6_MITMPPTR_Pos);
1835 }
1836 
1837 /**
1838  * @brief Get modular invertion parameter Tmp pointer in pkc sram.
1839  *
1840  * Register|BitsName
1841  * --------|--------
1842  * SW_CONFIG6 | MITMPPTR
1843  *
1844  * @param PKCx PKC instance
1845  * @retval Return value is between: 0 ~ 0x200
1846  */
1847 __STATIC_INLINE uint32_t ll_pkc_get_swmi_tmp_pointer(pkc_regs_t *PKCx)
1848 {
1849  return (READ_BITS(PKCx->SW_CONFIG6, PKC_SW_CONFIG6_MITMPPTR) >> PKC_SW_CONFIG6_MITMPPTR_Pos);
1850 }
1851 
1852 /**
1853  * @brief Set operation word length-bits.
1854  *
1855  * Register|BitsName
1856  * --------|--------
1857  * SW_CONFIG7 | WORDLEN
1858  *
1859  * @param PKCx PKC instance
1860  * @param WordLength This parameter can be one of the following values: 256 ~ 2048
1861  * @retval None
1862  */
1863 __STATIC_INLINE void ll_pkc_set_operation_word_length(pkc_regs_t *PKCx, uint32_t WordLength)
1864 {
1865  MODIFY_REG(PKCx->SW_CONFIG7, PKC_SW_CONFIG7_WORDLEN, (WordLength >> 5) - 1);
1866 }
1867 
1868 /**
1869  * @brief Get operation word length-bits.
1870  *
1871  * Register|BitsName
1872  * --------|--------
1873  * SW_CONFIG7 | WORDLEN
1874  *
1875  * @param PKCx PKC instance
1876  * @retval Return value is between: 256 ~ 2048
1877  */
1878 __STATIC_INLINE uint32_t ll_pkc_get_operation_word_length(pkc_regs_t *PKCx)
1879 {
1880  return ((READ_BITS(PKCx->SW_CONFIG7, PKC_SW_CONFIG7_WORDLEN) + 1) << 5);
1881 }
1882 
1883 /**
1884  * @brief Get K output in invertion operation.
1885  *
1886  * Register|BitsName
1887  * --------|--------
1888  * SW_CONFIG8 | MIKOUT
1889  *
1890  * @param PKCx PKC instance
1891  * @retval Return value is between: 0 ~ 0x1FFF
1892  */
1893 __STATIC_INLINE uint32_t ll_pkc_get_mik_output(pkc_regs_t *PKCx)
1894 {
1895  return (READ_REG(PKCx->SW_CONFIG8) & PKC_SW_CONFIG8_MIKOUT_Msk);
1896 }
1897 
1898 /**
1899  * @brief Set dummy multiply seed.
1900  *
1901  * Register|BitsName
1902  * --------|--------
1903  * SW_CONFIG9 | DMRNGSEED
1904  *
1905  * @param PKCx PKC instance
1906  * @param seed This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1907  * @retval None
1908  */
1909 __STATIC_INLINE void ll_pkc_set_dummy_multiply_seed(pkc_regs_t *PKCx, uint32_t seed)
1910 {
1911  WRITE_REG(PKCx->SW_CONFIG9, seed);
1912 }
1913 
1914 /**
1915  * @brief Get dummy multiply seed.
1916  *
1917  * Register|BitsName
1918  * --------|--------
1919  * SW_CONFIG9 | DMRNGSEED
1920  *
1921  * @param PKCx PKC instance
1922  * @retval Return value is between: 0 ~ 0xFFFFFFFF
1923  */
1924 __STATIC_INLINE uint32_t ll_pkc_get_dummy_multiply_seed(pkc_regs_t *PKCx)
1925 {
1926  return (READ_REG(PKCx->SW_CONFIG9));
1927 }
1928 
1929 /**
1930  * @brief Set big integer operand A pointer in pkc sram.
1931  *
1932  * Register|BitsName
1933  * --------|--------
1934  * SW_CONFIG10 | BMAPTR
1935  *
1936  * @param PKCx PKC instance
1937  * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
1938  * @retval None
1939  */
1940 __STATIC_INLINE void ll_pkc_set_bm_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1941 {
1942  MODIFY_REG(PKCx->SW_CONFIG10, PKC_SW_CONFIG10_BMAPTR, pointer << PKC_SW_CONFIG10_BMAPTR_Pos);
1943 }
1944 
1945 /**
1946  * @brief Get big integer operand A pointer in pkc sram.
1947  *
1948  * Register|BitsName
1949  * --------|--------
1950  * SW_CONFIG10 | BMAPTR
1951  *
1952  * @param PKCx PKC instance
1953  * @retval Return value is between: 0 ~ 0x1FF
1954  */
1955 __STATIC_INLINE uint32_t ll_pkc_get_bm_a_pointer(pkc_regs_t *PKCx)
1956 {
1957  return (READ_BITS(PKCx->SW_CONFIG10, PKC_SW_CONFIG10_BMAPTR) >> PKC_SW_CONFIG10_BMAPTR_Pos);
1958 }
1959 
1960 /**
1961  * @brief Set big integer operand B pointer in pkc sram.
1962  *
1963  * Register|BitsName
1964  * --------|--------
1965  * SW_CONFIG10 | BMBPTR
1966  *
1967  * @param PKCx PKC instance
1968  * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
1969  * @retval None
1970  */
1971 __STATIC_INLINE void ll_pkc_set_bm_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1972 {
1973  MODIFY_REG(PKCx->SW_CONFIG10, PKC_SW_CONFIG10_BMBPTR, pointer << PKC_SW_CONFIG10_BMBPTR_Pos);
1974 }
1975 
1976 /**
1977  * @brief Get big integer operand B pointer in pkc sram.
1978  *
1979  * Register|BitsName
1980  * --------|--------
1981  * SW_CONFIG10 | BMBPTR
1982  *
1983  * @param PKCx PKC instance
1984  * @retval Return value is between: 0 ~ 0x1FF
1985  */
1986 __STATIC_INLINE uint32_t ll_pkc_get_bm_b_pointer(pkc_regs_t *PKCx)
1987 {
1988  return (READ_BITS(PKCx->SW_CONFIG10, PKC_SW_CONFIG10_BMBPTR) >> PKC_SW_CONFIG10_BMBPTR_Pos);
1989 }
1990 
1991 /**
1992  * @brief Set big integer result C pointer in pkc sram.
1993  *
1994  * Register|BitsName
1995  * --------|--------
1996  * SW_CONFIG11 | BMCPTR
1997  *
1998  * @param PKCx PKC instance
1999  * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2000  * @retval None
2001  */
2002 __STATIC_INLINE void ll_pkc_set_bm_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2003 {
2004  MODIFY_REG(PKCx->SW_CONFIG11, PKC_SW_CONFIG11_BMCPTR, pointer << PKC_SW_CONFIG11_BMCPTR_Pos);
2005 }
2006 
2007 /**
2008  * @brief Get big integer result C pointer in pkc sram.
2009  *
2010  * Register|BitsName
2011  * --------|--------
2012  * SW_CONFIG11 | BMCPTR
2013  *
2014  * @param PKCx PKC instance
2015  * @retval Return value is between: 0 ~ 0x1FF
2016  */
2017 __STATIC_INLINE uint32_t ll_pkc_get_bm_c_pointer(pkc_regs_t *PKCx)
2018 {
2019  return (READ_BITS(PKCx->SW_CONFIG11, PKC_SW_CONFIG11_BMCPTR) >> PKC_SW_CONFIG11_BMCPTR_Pos);
2020 }
2021 
2022 /**
2023  * @brief Set big integer operand A pointer in pkc sram.
2024  *
2025  * Register|BitsName
2026  * --------|--------
2027  * SW_CONFIG11 | BAAPTR
2028  *
2029  * @param PKCx PKC instance
2030  * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2031  * @retval None
2032  */
2033 __STATIC_INLINE void ll_pkc_set_ba_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2034 {
2035  MODIFY_REG(PKCx->SW_CONFIG11, PKC_SW_CONFIG11_BAAPTR, pointer << PKC_SW_CONFIG11_BAAPTR_Pos);
2036 }
2037 
2038 /**
2039  * @brief Get big integer operand A pointer in pkc sram.
2040  *
2041  * Register|BitsName
2042  * --------|--------
2043  * SW_CONFIG11 | BAAPTR
2044  *
2045  * @param PKCx PKC instance
2046  * @retval Return value is between: 0 ~ 0x1FF
2047  */
2048 __STATIC_INLINE uint32_t ll_pkc_get_ba_a_pointer(pkc_regs_t *PKCx)
2049 {
2050  return (READ_BITS(PKCx->SW_CONFIG11, PKC_SW_CONFIG11_BAAPTR) >> PKC_SW_CONFIG11_BAAPTR_Pos);
2051 }
2052 
2053 /**
2054  * @brief Set big integer operand B pointer in pkc sram.
2055  *
2056  * Register|BitsName
2057  * --------|--------
2058  * SW_CONFIG12 | BABPTR
2059  *
2060  * @param PKCx PKC instance
2061  * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2062  * @retval None
2063  */
2064 __STATIC_INLINE void ll_pkc_set_ba_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2065 {
2066  MODIFY_REG(PKCx->SW_CONFIG12, PKC_SW_CONFIG12_BABPTR, pointer << PKC_SW_CONFIG12_BABPTR_Pos);
2067 }
2068 
2069 /**
2070  * @brief Get big integer operand B pointer in pkc sram.
2071  *
2072  * Register|BitsName
2073  * --------|--------
2074  * SW_CONFIG12 | BABPTR
2075  *
2076  * @param PKCx PKC instance
2077  * @retval Return value is between: 0 ~ 0x1FF
2078  */
2079 __STATIC_INLINE uint32_t ll_pkc_get_ba_b_pointer(pkc_regs_t *PKCx)
2080 {
2081  return (READ_BITS(PKCx->SW_CONFIG12, PKC_SW_CONFIG12_BABPTR) >> PKC_SW_CONFIG12_BABPTR_Pos);
2082 }
2083 
2084 /**
2085  * @brief Set big integer result C pointer in pkc sram.
2086  *
2087  * Register|BitsName
2088  * --------|--------
2089  * SW_CONFIG12 | BACPTR
2090  *
2091  * @param PKCx PKC instance
2092  * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2093  * @retval None
2094  */
2095 __STATIC_INLINE void ll_pkc_set_ba_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2096 {
2097  MODIFY_REG(PKCx->SW_CONFIG12, PKC_SW_CONFIG12_BACPTR, pointer << PKC_SW_CONFIG12_BACPTR_Pos);
2098 }
2099 
2100 /**
2101  * @brief Get big integer result C pointer in pkc sram.
2102  *
2103  * Register|BitsName
2104  * --------|--------
2105  * SW_CONFIG12 | BACPTR
2106  *
2107  * @param PKCx PKC instance
2108  * @retval Return value is between: 0 ~ 0x1FF
2109  */
2110 __STATIC_INLINE uint32_t ll_pkc_get_ba_c_pointer(pkc_regs_t *PKCx)
2111 {
2112  return (READ_BITS(PKCx->SW_CONFIG12, PKC_SW_CONFIG12_BACPTR) >> PKC_SW_CONFIG12_BACPTR_Pos);
2113 }
2114 
2115 /**
2116  * @brief Set random clock gating seed.
2117  *
2118  * Register|BitsName
2119  * --------|--------
2120  * SW_CONFIG13 | RANDSEED
2121  *
2122  * @param PKCx PKC instance
2123  * @param seed This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
2124  * @retval None
2125  */
2126 __STATIC_INLINE void ll_pkc_set_random_clock_gating_seed(pkc_regs_t *PKCx, uint32_t seed)
2127 {
2128  WRITE_REG(PKCx->SW_CONFIG13, seed);
2129 }
2130 
2131 /**
2132  * @brief Get random clock gating seed.
2133  *
2134  * Register|BitsName
2135  * --------|--------
2136  * SW_CONFIG13 | RANDSEED
2137  *
2138  * @param PKCx PKC instance
2139  * @retval Return value is between: 0 ~ 0xFFFFFFFF
2140  */
2141 __STATIC_INLINE uint32_t ll_pkc_get_random_clock_gating_seed(pkc_regs_t *PKCx)
2142 {
2143  return (READ_REG(PKCx->SW_CONFIG13));
2144 }
2145 
2146 /** @} */
2147 
2148 /** @defgroup PKC_LL_EF_IT_Management IT_Management
2149  * @{
2150  */
2151 
2152 /**
2153  * @brief Enable the operation done interrupt.
2154  *
2155  * Register|BitsName
2156  * --------|--------
2157  * INTEN | DONE
2158  *
2159  * @param PKCx PKC instance
2160  * @retval none.
2161  */
2162 __STATIC_INLINE void ll_pkc_enable_it_done(pkc_regs_t *PKCx)
2163 {
2164  SET_BITS(PKCx->INTEN, PKC_INTEN_DONE);
2165 }
2166 
2167 /**
2168  * @brief Enable the operation error interrupt.
2169  *
2170  * Register|BitsName
2171  * --------|--------
2172  * INTEN | ERR
2173  *
2174  * @param PKCx PKC instance
2175  * @retval none.
2176  */
2177 __STATIC_INLINE void ll_pkc_enable_it_err(pkc_regs_t *PKCx)
2178 {
2179  SET_BITS(PKCx->INTEN, PKC_INTEN_ERR);
2180 }
2181 
2182 /**
2183  * @brief Enable the big integer overflow interrupt.
2184  *
2185  * Register|BitsName
2186  * --------|--------
2187  * INTEN | BAOVF
2188  *
2189  * @param PKCx PKC instance
2190  * @retval none.
2191  */
2192 __STATIC_INLINE void ll_pkc_enable_it_big_add_overflow(pkc_regs_t *PKCx)
2193 {
2194  SET_BITS(PKCx->INTEN, PKC_INTEN_BAOVF);
2195 }
2196 
2197 /**
2198  * @brief Disable the operation done interrupt.
2199  *
2200  * Register|BitsName
2201  * --------|--------
2202  * INTEN | DONE
2203  *
2204  * @param PKCx PKC instance
2205  * @retval none.
2206  */
2207 __STATIC_INLINE void ll_pkc_disable_it_done(pkc_regs_t *PKCx)
2208 {
2209  CLEAR_BITS(PKCx->INTEN, PKC_INTEN_DONE);
2210 }
2211 
2212 /**
2213  * @brief Disable the operation error interrupt.
2214  *
2215  * Register|BitsName
2216  * --------|--------
2217  * INTEN | ERR
2218  *
2219  * @param PKCx PKC instance
2220  * @retval none.
2221  */
2222 __STATIC_INLINE void ll_pkc_disable_it_err(pkc_regs_t *PKCx)
2223 {
2224  CLEAR_BITS(PKCx->INTEN, PKC_INTEN_ERR);
2225 }
2226 
2227 /**
2228  * @brief Disable the big integer overflow interrupt.
2229  *
2230  * Register|BitsName
2231  * --------|--------
2232  * INTEN | BAOVF
2233  *
2234  * @param PKCx PKC instance
2235  * @retval none.
2236  */
2237 __STATIC_INLINE void ll_pkc_disable_it_big_add_overflow(pkc_regs_t *PKCx)
2238 {
2239  CLEAR_BITS(PKCx->INTEN, PKC_INTEN_BAOVF);
2240 }
2241 
2242 /**
2243  * @brief Indicate whether the operation done interrupt is enable.
2244  *
2245  * Register|BitsName
2246  * --------|--------
2247  * INTEN | DONE
2248  *
2249  * @param PKCx PKC instance
2250  * @retval State of bit (1 or 0).
2251  */
2252 __STATIC_INLINE uint32_t ll_pkc_is_enable_it_done(pkc_regs_t *PKCx)
2253 {
2254  return (READ_BITS(PKCx->INTEN, PKC_INTEN_DONE) == PKC_INTEN_DONE);
2255 }
2256 
2257 /**
2258  * @brief Indicate whether the operation error interrupt is enable.
2259  *
2260  * Register|BitsName
2261  * --------|--------
2262  * INTEN | ERR
2263  *
2264  * @param PKCx PKC instance
2265  * @retval State of bit (1 or 0).
2266  */
2267 __STATIC_INLINE uint32_t ll_pkc_is_enable_it_err(pkc_regs_t *PKCx)
2268 {
2269  return (READ_BITS(PKCx->INTEN, PKC_INTEN_ERR) == PKC_INTEN_ERR);
2270 }
2271 
2272 /**
2273  * @brief Indicate whether the big integer overflow interrupt is enable.
2274  *
2275  * Register|BitsName
2276  * --------|--------
2277  * INTEN | BAOVF
2278  *
2279  * @param PKCx PKC instance
2280  * @retval State of bit (1 or 0).
2281  */
2282 __STATIC_INLINE uint32_t ll_pkc_is_enable_it_big_add_overflow(pkc_regs_t *PKCx)
2283 {
2284  return (READ_BITS(PKCx->INTEN, PKC_INTEN_BAOVF) == PKC_INTEN_BAOVF);
2285 }
2286 
2287 /** @} */
2288 
2289 /** @defgroup PKC_LL_EF_FLAG_Management FLAG_Management
2290  * @{
2291  */
2292 
2293 /**
2294  * @brief Indicate whether the operation done interrupt is pending.
2295  *
2296  * Register|BitsName
2297  * --------|--------
2298  * INTSTAT | DONE
2299  *
2300  * @param PKCx PKC instance
2301  * @retval State of bit (1 or 0).
2302  */
2303 __STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_done(pkc_regs_t *PKCx)
2304 {
2305  return (READ_BITS(PKCx->INTSTAT, PKC_INTSTAT_DONE) == PKC_INTSTAT_DONE);
2306 }
2307 
2308 /**
2309  * @brief Indicate whether the operation error interrupt is pending.
2310  *
2311  * Register|BitsName
2312  * --------|--------
2313  * INTSTAT | ERR
2314  *
2315  * @param PKCx PKC instance
2316  * @retval State of bit (1 or 0).
2317  */
2318 __STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_err(pkc_regs_t *PKCx)
2319 {
2320  return (READ_BITS(PKCx->INTSTAT, PKC_INTSTAT_ERR) == PKC_INTSTAT_ERR);
2321 }
2322 
2323 /**
2324  * @brief Indicate whether the big integer overflow interrupt is pending.
2325  *
2326  * Register|BitsName
2327  * --------|--------
2328  * INTSTAT | BAOVF
2329  *
2330  * @param PKCx PKC instance
2331  * @retval State of bit (1 or 0).
2332  */
2333 __STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_big_add_overflow(pkc_regs_t *PKCx)
2334 {
2335  return (READ_BITS(PKCx->INTSTAT, PKC_INTSTAT_BAOVF) == PKC_INTSTAT_BAOVF);
2336 }
2337 
2338 /**
2339  * @brief Clear the operation done interrupt flag.
2340  *
2341  * Register|BitsName
2342  * --------|--------
2343  * INTSTAT | DONE
2344  *
2345  * @param PKCx PKC instance
2346  * @retval none.
2347  */
2348 __STATIC_INLINE void ll_pkc_clear_flag_it_done(pkc_regs_t *PKCx)
2349 {
2350  SET_BITS(PKCx->INTSTAT, PKC_INTSTAT_DONE);
2351 }
2352 
2353 /**
2354  * @brief Clear the operation error interrupt flag.
2355  *
2356  * Register|BitsName
2357  * --------|--------
2358  * INTSTAT | ERR
2359  *
2360  * @param PKCx PKC instance
2361  * @retval none.
2362  */
2363 __STATIC_INLINE void ll_pkc_clear_flag_it_err(pkc_regs_t *PKCx)
2364 {
2365  SET_BITS(PKCx->INTSTAT, PKC_INTSTAT_ERR);
2366 }
2367 
2368 /**
2369  * @brief Clear the big integer overflow interrupt flag.
2370  *
2371  * Register|BitsName
2372  * --------|--------
2373  * INTSTAT | BAOVF
2374  *
2375  * @param PKCx PKC instance
2376  * @retval none.
2377  */
2378 __STATIC_INLINE void ll_pkc_clear_flag_it_big_add_overflow(pkc_regs_t *PKCx)
2379 {
2380  SET_BITS(PKCx->INTSTAT, PKC_INTSTAT_BAOVF);
2381 }
2382 
2383 /**
2384  * @brief Indicate whether the busy flag is set.
2385  *
2386  * Register|BitsName
2387  * --------|--------
2388  * WORKSTAT | BUSY
2389  *
2390  * @param PKCx PKC instance
2391  * @retval State of bit (1 or 0).
2392  */
2393 __STATIC_INLINE uint32_t ll_pkc_is_action_flag_busy(pkc_regs_t *PKCx)
2394 {
2395  return (READ_BITS(PKCx->WORKSTAT, PKC_WORKSTAT_BUSY) == PKC_WORKSTAT_BUSY);
2396 }
2397 
2398 /** @} */
2399 
2400 /** @defgroup PKC_LL_EF_Init Initialization and de-initialization functions
2401  * @{
2402  */
2403 
2404 /**
2405  * @brief De-initialize PKC registers (Registers restored to their default values).
2406  * @param PKCx PKC Instance
2407  * @retval An error_status_t enumeration value:
2408  * - SUCCESS: PKC registers are de-initialized
2409  * - ERROR: PKC registers are not de-initialized
2410  */
2411 error_status_t ll_pkc_deinit(pkc_regs_t *PKCx);
2412 
2413 /**
2414  * @brief Initialize PKC registers according to the specified
2415  * parameters in p_pkc_init.
2416  * @param PKCx PKC Instance
2417  * @param p_pkc_init pointer to a ll_pkc_init_t structure that contains the configuration
2418  * information for the specified PKC peripheral.
2419  * @retval An error_status_t enumeration value:
2420  * - SUCCESS: PKC registers are initialized according to p_pkc_init content
2421  * - ERROR: Problem occurred during PKC Registers initialization
2422  */
2423 error_status_t ll_pkc_init(pkc_regs_t *PKCx, ll_pkc_init_t *p_pkc_init);
2424 
2425 /**
2426  * @brief Set each field of a @ref ll_pkc_init_t type structure to default value.
2427  * @param p_pkc_init pointer to a @ref ll_pkc_init_t structure
2428  * whose fields will be set to default values.
2429  * @retval None
2430  */
2432 
2433 /** @} */
2434 
2435 /** @} */
2436 
2437 #endif /* PKC */
2438 
2439 #ifdef __cplusplus
2440 }
2441 #endif
2442 
2443 #endif /* __GR55XX_LL_PKC_H__ */
2444 
2445 /** @} */
2446 
2447 /** @} */
2448 
2449 /** @} */
ll_pkc_is_enabled_hardware_start
__STATIC_INLINE uint32_t ll_pkc_is_enabled_hardware_start(pkc_regs_t *PKCx)
Indicate whether the pkc start in hardware mode is enabled.
Definition: gr55xx_ll_pkc.h:335
ll_pkc_enable_it_err
__STATIC_INLINE void ll_pkc_enable_it_err(pkc_regs_t *PKCx)
Enable the operation error interrupt.
Definition: gr55xx_ll_pkc.h:2177
ll_pkc_get_bm_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_bm_a_pointer(pkc_regs_t *PKCx)
Get big integer operand A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1955
ll_pkc_get_tmp6_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp6_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp6 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1014
ll_pkc_set_k_pointer
__STATIC_INLINE void ll_pkc_set_k_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter k pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:441
ll_pkc_get_tmp1_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp1_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:859
ll_pkc_set_tmpk_pointer
__STATIC_INLINE void ll_pkc_set_tmpk_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter TmpK pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1154
ll_pkc_get_gy_pointer
__STATIC_INLINE uint32_t ll_pkc_get_gy_pointer(pkc_regs_t *PKCx)
Get PKC parameter Gy pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:611
ll_pkc_disable_software
__STATIC_INLINE void ll_pkc_disable_software(pkc_regs_t *PKCx)
Disable pkc software mode.
Definition: gr55xx_ll_pkc.h:365
ll_pkc_get_tmpk_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmpk_pointer(pkc_regs_t *PKCx)
Get PKC parameter TmpK pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1169
ll_pkc_get_random_clock_gating_seed
__STATIC_INLINE uint32_t ll_pkc_get_random_clock_gating_seed(pkc_regs_t *PKCx)
Get random clock gating seed.
Definition: gr55xx_ll_pkc.h:2141
ll_pkc_is_enabled
__STATIC_INLINE uint32_t ll_pkc_is_enabled(pkc_regs_t *PKCx)
Indicate whether the pkc is enabled.
Definition: gr55xx_ll_pkc.h:290
ll_pkc_get_p_pointer
__STATIC_INLINE uint32_t ll_pkc_get_p_pointer(pkc_regs_t *PKCx)
Get PKC parameter p pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:518
ll_pkc_get_gx_pointer
__STATIC_INLINE uint32_t ll_pkc_get_gx_pointer(pkc_regs_t *PKCx)
Get PKC parameter Gx pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:580
ll_pkc_clear_flag_it_done
__STATIC_INLINE void ll_pkc_clear_flag_it_done(pkc_regs_t *PKCx)
Clear the operation done interrupt flag.
Definition: gr55xx_ll_pkc.h:2348
ll_pkc_set_mm_a_pointer
__STATIC_INLINE void ll_pkc_set_mm_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular multiplication parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1460
ll_pkc_init
error_status_t ll_pkc_init(pkc_regs_t *PKCx, ll_pkc_init_t *p_pkc_init)
Initialize PKC registers according to the specified parameters in p_pkc_init.
ll_pkc_set_mi_x1_pointer
__STATIC_INLINE void ll_pkc_set_mi_x1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1770
ll_pkc_set_operation_word_length
__STATIC_INLINE void ll_pkc_set_operation_word_length(pkc_regs_t *PKCx, uint32_t WordLength)
Set operation word length-bits.
Definition: gr55xx_ll_pkc.h:1863
ll_pkc_get_r0z_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r0z_pointer(pkc_regs_t *PKCx)
Get PKC parameter R0z pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:735
ll_pkc_get_mitmp_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mitmp_pointer(pkc_regs_t *PKCx)
Get PKC parameter MITmp pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1138
ll_pkc_set_mitmp_pointer
__STATIC_INLINE void ll_pkc_set_mitmp_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter MITmp pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1123
ll_pkc_get_mm_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mm_a_pointer(pkc_regs_t *PKCx)
Get modular multiplication parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1475
ll_pkc_set_gx_pointer
__STATIC_INLINE void ll_pkc_set_gx_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Gx pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:565
ll_pkc_get_constp
__STATIC_INLINE uint32_t ll_pkc_get_constp(pkc_regs_t *PKCx)
Get constant value for montgomery multiply in pkc sram.
Definition: gr55xx_ll_pkc.h:1262
ll_pkc_set_r_pointer
__STATIC_INLINE void ll_pkc_set_r_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter r pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:472
ll_ecc_curve_init_t
struct _ll_ecc_curve_init ll_ecc_curve_init_t
LL PKC ECC P-256 Elliptic Curve Init Structure definition.
ll_pkc_get_rsq_pointer
__STATIC_INLINE uint32_t ll_pkc_get_rsq_pointer(pkc_regs_t *PKCx)
Get PKC parameter R^2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:549
ll_pkc_enable_dummy_multi
__STATIC_INLINE void ll_pkc_enable_dummy_multi(pkc_regs_t *PKCx)
Enable Dummy Multi in software mode.
Definition: gr55xx_ll_pkc.h:1369
ll_pkc_is_enabled_reset
__STATIC_INLINE uint32_t ll_pkc_is_enabled_reset(pkc_regs_t *PKCx)
Indicate whether the pkc reset is enabled.
Definition: gr55xx_ll_pkc.h:425
ll_pkc_disable_random_clock_gating
__STATIC_INLINE void ll_pkc_disable_random_clock_gating(pkc_regs_t *PKCx)
Disable Random Clock Gating in software mode.
Definition: gr55xx_ll_pkc.h:1429
ll_pkc_set_mm_b_pointer
__STATIC_INLINE void ll_pkc_set_mm_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular multiplication parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1491
ll_pkc_set_mas_p_pointer
__STATIC_INLINE void ll_pkc_set_mas_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular add/sub parameter P pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1646
ll_pkc_get_r1z_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r1z_pointer(pkc_regs_t *PKCx)
Get PKC parameter R1z pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:828
ll_pkc_get_tmp2_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp2_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:890
ll_pkc_get_mi_x2_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mi_x2_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1816
ll_pkc_set_r1z_pointer
__STATIC_INLINE void ll_pkc_set_r1z_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R1z pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:813
ll_pkc_get_ba_c_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ba_c_pointer(pkc_regs_t *PKCx)
Get big integer result C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2110
_ll_pkc_init::p_ecc_curve
ll_ecc_curve_init_t * p_ecc_curve
Specifies the pointer to elliptic curve description.
Definition: gr55xx_ll_pkc.h:126
_ll_ecc_curve_init::A
uint32_t A[ECC_U32_LENGTH]
Operand A array.
Definition: gr55xx_ll_pkc.h:104
ll_pkc_set_bm_a_pointer
__STATIC_INLINE void ll_pkc_set_bm_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer operand A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1940
ll_pkc_is_enable_it_big_add_overflow
__STATIC_INLINE uint32_t ll_pkc_is_enable_it_big_add_overflow(pkc_regs_t *PKCx)
Indicate whether the big integer overflow interrupt is enable.
Definition: gr55xx_ll_pkc.h:2282
ll_pkc_get_mas_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mas_b_pointer(pkc_regs_t *PKCx)
Get modular add/sub parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1630
ll_pkc_disable_it_big_add_overflow
__STATIC_INLINE void ll_pkc_disable_it_big_add_overflow(pkc_regs_t *PKCx)
Disable the big integer overflow interrupt.
Definition: gr55xx_ll_pkc.h:2237
ll_pkc_set_x1_pointer
__STATIC_INLINE void ll_pkc_set_x1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1061
ll_pkc_enable_software_start
__STATIC_INLINE void ll_pkc_enable_software_start(pkc_regs_t *PKCx)
Enable pkc start in software mode.
Definition: gr55xx_ll_pkc.h:1277
ll_pkc_set_mm_c_pointer
__STATIC_INLINE void ll_pkc_set_mm_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular multiplication parameter C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1553
_ll_pkc_init::data_bits
uint32_t data_bits
Specifies the Data size: 256 ~ 2048bits
Definition: gr55xx_ll_pkc.h:128
ll_pkc_set_ecc_b_pointer
__STATIC_INLINE void ll_pkc_set_ecc_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set ECC parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1216
ll_pkc_set_mas_c_pointer
__STATIC_INLINE void ll_pkc_set_mas_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular add/sub parameter C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1677
ll_pkc_get_r1y_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r1y_pointer(pkc_regs_t *PKCx)
Get PKC parameter R1y pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:797
ll_pkc_get_r0y_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r0y_pointer(pkc_regs_t *PKCx)
Get PKC parameter R0y pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:704
ll_pkc_set_mi_v_pointer
__STATIC_INLINE void ll_pkc_set_mi_v_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter V pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1739
ll_pkc_get_bm_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_bm_b_pointer(pkc_regs_t *PKCx)
Get big integer operand B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1986
_ll_ecc_curve_init
LL PKC ECC P-256 Elliptic Curve Init Structure definition.
Definition: gr55xx_ll_pkc.h:103
_ll_pkc_init
LL PKC Init Structure definition.
Definition: gr55xx_ll_pkc.h:125
ll_pkc_set_x2_pointer
__STATIC_INLINE void ll_pkc_set_x2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter X2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1092
ll_pkc_is_action_flag_busy
__STATIC_INLINE uint32_t ll_pkc_is_action_flag_busy(pkc_regs_t *PKCx)
Indicate whether the busy flag is set.
Definition: gr55xx_ll_pkc.h:2393
ll_pkc_get_gz_pointer
__STATIC_INLINE uint32_t ll_pkc_get_gz_pointer(pkc_regs_t *PKCx)
Get PKC parameter Gz pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:642
ll_pkc_set_r1y_pointer
__STATIC_INLINE void ll_pkc_set_r1y_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R1y pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:782
ll_pkc_set_random_clock_gating_seed
__STATIC_INLINE void ll_pkc_set_random_clock_gating_seed(pkc_regs_t *PKCx, uint32_t seed)
Set random clock gating seed.
Definition: gr55xx_ll_pkc.h:2126
_ll_ecc_curve_init::PRSquare
uint32_t PRSquare[ECC_U32_LENGTH]
R^2 mod P, where R = 2^256.
Definition: gr55xx_ll_pkc.h:108
ll_pkc_disable_it_done
__STATIC_INLINE void ll_pkc_disable_it_done(pkc_regs_t *PKCx)
Disable the operation done interrupt.
Definition: gr55xx_ll_pkc.h:2207
ll_pkc_set_swmi_tmp_pointer
__STATIC_INLINE void ll_pkc_set_swmi_tmp_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter Tmp pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1832
ll_pkc_get_mas_c_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mas_c_pointer(pkc_regs_t *PKCx)
Get modular add/sub parameter C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1692
ll_pkc_get_operation_word_length
__STATIC_INLINE uint32_t ll_pkc_get_operation_word_length(pkc_regs_t *PKCx)
Get operation word length-bits.
Definition: gr55xx_ll_pkc.h:1878
ll_pkc_get_mm_c_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mm_c_pointer(pkc_regs_t *PKCx)
Get modular multiplication parameter C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1568
ll_pkc_get_mas_p_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mas_p_pointer(pkc_regs_t *PKCx)
Get modular add/sub parameter P pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1661
ll_pkc_is_action_flag_it_big_add_overflow
__STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_big_add_overflow(pkc_regs_t *PKCx)
Indicate whether the big integer overflow interrupt is pending.
Definition: gr55xx_ll_pkc.h:2333
_ll_ecc_curve_init::H
uint32_t H
H.
Definition: gr55xx_ll_pkc.h:115
ll_pkc_set_r1x_pointer
__STATIC_INLINE void ll_pkc_set_r1x_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R1x pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:751
ll_pkc_set_tmp1_pointer
__STATIC_INLINE void ll_pkc_set_tmp1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:844
ll_pkc_set_tmp4_pointer
__STATIC_INLINE void ll_pkc_set_tmp4_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp4 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:937
ll_pkc_set_tmp2_pointer
__STATIC_INLINE void ll_pkc_set_tmp2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:875
ll_pkc_set_constant1_pointer
__STATIC_INLINE void ll_pkc_set_constant1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Constant1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1030
ll_pkc_get_ecc_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ecc_b_pointer(pkc_regs_t *PKCx)
Get ECC parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1231
_ll_ecc_curve_init::ConstP
uint32_t ConstP
Montgomery multiplication constant in prime field P, ConstP = 1.
Definition: gr55xx_ll_pkc.h:109
ll_pkc_set_mm_p_pointer
__STATIC_INLINE void ll_pkc_set_mm_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular multiplication parameter P pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1522
ll_pkc_get_mm_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mm_b_pointer(pkc_regs_t *PKCx)
Get modular multiplication parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1506
ll_pkc_get_r_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r_pointer(pkc_regs_t *PKCx)
Get PKC parameter r pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:487
ll_pkc_get_tmp4_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp4_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp4 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:952
ll_pkc_disable_reset
__STATIC_INLINE void ll_pkc_disable_reset(pkc_regs_t *PKCx)
Disable pkc reset.
Definition: gr55xx_ll_pkc.h:410
ll_pkc_set_mi_x2_pointer
__STATIC_INLINE void ll_pkc_set_mi_x2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1801
ll_pkc_enable
__STATIC_INLINE void ll_pkc_enable(pkc_regs_t *PKCx)
Enable pkc.
Definition: gr55xx_ll_pkc.h:260
ll_pkc_get_operation_mode
__STATIC_INLINE uint32_t ll_pkc_get_operation_mode(pkc_regs_t *PKCx)
Get operation mode in software mode.
Definition: gr55xx_ll_pkc.h:1354
_ll_ecc_curve_init::P
uint32_t P[ECC_U32_LENGTH]
Prime number P array.
Definition: gr55xx_ll_pkc.h:107
ll_pkc_get_ba_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ba_a_pointer(pkc_regs_t *PKCx)
Get big integer operand A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2048
ll_pkc_is_action_flag_it_done
__STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_done(pkc_regs_t *PKCx)
Indicate whether the operation done interrupt is pending.
Definition: gr55xx_ll_pkc.h:2303
ll_pkc_clear_flag_it_err
__STATIC_INLINE void ll_pkc_clear_flag_it_err(pkc_regs_t *PKCx)
Clear the operation error interrupt flag.
Definition: gr55xx_ll_pkc.h:2363
_ll_ecc_point
LL PKC ECC Point Structure definition.
Definition: gr55xx_ll_pkc.h:92
ll_pkc_get_bm_c_pointer
__STATIC_INLINE uint32_t ll_pkc_get_bm_c_pointer(pkc_regs_t *PKCx)
Get big integer result C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2017
_ll_ecc_curve_init::NRSquare
uint32_t NRSquare[ECC_U32_LENGTH]
R^2 mod N, where R = 2^256.
Definition: gr55xx_ll_pkc.h:112
ll_pkc_set_tmp5_pointer
__STATIC_INLINE void ll_pkc_set_tmp5_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp5 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:968
ll_pkc_set_dummy_multiply_seed
__STATIC_INLINE void ll_pkc_set_dummy_multiply_seed(pkc_regs_t *PKCx, uint32_t seed)
Set dummy multiply seed.
Definition: gr55xx_ll_pkc.h:1909
ECC_U32_LENGTH
#define ECC_U32_LENGTH
ECC Array Length.
Definition: gr55xx_ll_pkc.h:72
ll_pkc_set_ba_c_pointer
__STATIC_INLINE void ll_pkc_set_ba_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer result C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2095
ll_pkc_get_mi_x1_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mi_x1_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1785
ll_pkc_set_bm_c_pointer
__STATIC_INLINE void ll_pkc_set_bm_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer result C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2002
ll_pkc_set_r0x_pointer
__STATIC_INLINE void ll_pkc_set_r0x_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R0x pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:658
ll_pkc_is_enabled_dummy_multi
__STATIC_INLINE uint32_t ll_pkc_is_enabled_dummy_multi(pkc_regs_t *PKCx)
Indicate whether the Dummy Multi in software mode is enabled.
Definition: gr55xx_ll_pkc.h:1399
ll_pkc_disable
__STATIC_INLINE void ll_pkc_disable(pkc_regs_t *PKCx)
Disable pkc.
Definition: gr55xx_ll_pkc.h:275
ll_pkc_get_r1x_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r1x_pointer(pkc_regs_t *PKCx)
Get PKC parameter R1x pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:766
ll_pkc_get_tmp5_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp5_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp5 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:983
ll_pkc_get_x2_pointer
__STATIC_INLINE uint32_t ll_pkc_get_x2_pointer(pkc_regs_t *PKCx)
Get PKC parameter X2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1107
ll_pkc_get_mi_v_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mi_v_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter V pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1754
ll_pkc_struct_init
void ll_pkc_struct_init(ll_pkc_init_t *p_pkc_init)
Set each field of a ll_pkc_init_t type structure to default value.
ll_pkc_disable_software_start
__STATIC_INLINE void ll_pkc_disable_software_start(pkc_regs_t *PKCx)
Disable pkc start in software mode.
Definition: gr55xx_ll_pkc.h:1292
ll_pkc_disable_it_err
__STATIC_INLINE void ll_pkc_disable_it_err(pkc_regs_t *PKCx)
Disable the operation error interrupt.
Definition: gr55xx_ll_pkc.h:2222
ll_pkc_set_r0z_pointer
__STATIC_INLINE void ll_pkc_set_r0z_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R0z pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:720
ll_pkc_get_k_pointer
__STATIC_INLINE uint32_t ll_pkc_get_k_pointer(pkc_regs_t *PKCx)
Get PKC parameter k pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:456
ll_pkc_enable_it_done
__STATIC_INLINE void ll_pkc_enable_it_done(pkc_regs_t *PKCx)
Enable the operation done interrupt.
Definition: gr55xx_ll_pkc.h:2162
ll_pkc_is_enable_it_err
__STATIC_INLINE uint32_t ll_pkc_is_enable_it_err(pkc_regs_t *PKCx)
Indicate whether the operation error interrupt is enable.
Definition: gr55xx_ll_pkc.h:2267
_ll_ecc_curve_init::G
ll_ecc_point_t G
ECC Point G.
Definition: gr55xx_ll_pkc.h:117
ll_pkc_is_enabled_random_clock_gating
__STATIC_INLINE uint32_t ll_pkc_is_enabled_random_clock_gating(pkc_regs_t *PKCx)
Indicate whether the Random Clock Gating in software mode is enabled.
Definition: gr55xx_ll_pkc.h:1444
ll_pkc_set_rsq_pointer
__STATIC_INLINE void ll_pkc_set_rsq_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R^2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:534
ll_pkc_get_mi_u_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mi_u_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter U pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1723
ll_pkc_set_tmp3_pointer
__STATIC_INLINE void ll_pkc_set_tmp3_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp3 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:906
ll_pkc_set_mas_a_pointer
__STATIC_INLINE void ll_pkc_set_mas_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular add/sub parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1584
_ll_ecc_point::Y
uint32_t Y[ECC_U32_LENGTH]
Specifies the point in y-axis.
Definition: gr55xx_ll_pkc.h:95
ll_pkc_get_r0x_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r0x_pointer(pkc_regs_t *PKCx)
Get PKC parameter R0x pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:673
ll_pkc_get_mik_output
__STATIC_INLINE uint32_t ll_pkc_get_mik_output(pkc_regs_t *PKCx)
Get K output in invertion operation.
Definition: gr55xx_ll_pkc.h:1893
ll_pkc_set_r0y_pointer
__STATIC_INLINE void ll_pkc_set_r0y_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R0y pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:689
ll_pkc_is_enable_it_done
__STATIC_INLINE uint32_t ll_pkc_is_enable_it_done(pkc_regs_t *PKCx)
Indicate whether the operation done interrupt is enable.
Definition: gr55xx_ll_pkc.h:2252
ll_pkc_get_constant1_pointer
__STATIC_INLINE uint32_t ll_pkc_get_constant1_pointer(pkc_regs_t *PKCx)
Get PKC parameter Constant1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1045
ll_pkc_get_ecc_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ecc_a_pointer(pkc_regs_t *PKCx)
Get ECC parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1200
ll_pkc_set_tmp6_pointer
__STATIC_INLINE void ll_pkc_set_tmp6_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp6 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:999
ll_pkc_enable_hardware_start
__STATIC_INLINE void ll_pkc_enable_hardware_start(pkc_regs_t *PKCx)
Enable pkc start in hardware mode.
Definition: gr55xx_ll_pkc.h:305
ll_pkc_get_mm_p_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mm_p_pointer(pkc_regs_t *PKCx)
Get modular multiplication parameter P pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1537
ll_pkc_enable_reset
__STATIC_INLINE void ll_pkc_enable_reset(pkc_regs_t *PKCx)
Enable pkc reset.
Definition: gr55xx_ll_pkc.h:395
ll_pkc_is_enabled_software_start
__STATIC_INLINE uint32_t ll_pkc_is_enabled_software_start(pkc_regs_t *PKCx)
Indicate whether the pkc start in software mode is enabled.
Definition: gr55xx_ll_pkc.h:1307
ll_pkc_is_enabled_software
__STATIC_INLINE uint32_t ll_pkc_is_enabled_software(pkc_regs_t *PKCx)
Indicate whether the pkc software mode is enabled.
Definition: gr55xx_ll_pkc.h:380
ll_pkc_disable_dummy_multi
__STATIC_INLINE void ll_pkc_disable_dummy_multi(pkc_regs_t *PKCx)
Disable Dummy Multi in software mode.
Definition: gr55xx_ll_pkc.h:1384
ll_pkc_set_p_pointer
__STATIC_INLINE void ll_pkc_set_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter p pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:503
ll_pkc_set_gz_pointer
__STATIC_INLINE void ll_pkc_set_gz_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Gz pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:627
ll_pkc_is_action_flag_it_err
__STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_err(pkc_regs_t *PKCx)
Indicate whether the operation error interrupt is pending.
Definition: gr55xx_ll_pkc.h:2318
ll_pkc_set_mas_b_pointer
__STATIC_INLINE void ll_pkc_set_mas_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular add/sub parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1615
ll_pkc_disable_hardware_start
__STATIC_INLINE void ll_pkc_disable_hardware_start(pkc_regs_t *PKCx)
Disable pkc start in hardware mode.
Definition: gr55xx_ll_pkc.h:320
ll_pkc_set_ba_a_pointer
__STATIC_INLINE void ll_pkc_set_ba_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer operand A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2033
ll_pkc_get_tmp3_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp3_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp3 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:921
_ll_ecc_curve_init::B
uint32_t B[ECC_U32_LENGTH]
Operand B array.
Definition: gr55xx_ll_pkc.h:105
_ll_ecc_point::X
uint32_t X[ECC_U32_LENGTH]
Specifies the point in x-axis.
Definition: gr55xx_ll_pkc.h:93
ll_pkc_enable_random_clock_gating
__STATIC_INLINE void ll_pkc_enable_random_clock_gating(pkc_regs_t *PKCx)
Enable Random Clock Gating in software mode.
Definition: gr55xx_ll_pkc.h:1414
_ll_ecc_curve_init::N
uint32_t N[ECC_U32_LENGTH]
Prime number N array.
Definition: gr55xx_ll_pkc.h:111
ll_pkc_deinit
error_status_t ll_pkc_deinit(pkc_regs_t *PKCx)
De-initialize PKC registers (Registers restored to their default values).
ll_pkc_clear_flag_it_big_add_overflow
__STATIC_INLINE void ll_pkc_clear_flag_it_big_add_overflow(pkc_regs_t *PKCx)
Clear the big integer overflow interrupt flag.
Definition: gr55xx_ll_pkc.h:2378
ll_pkc_set_ba_b_pointer
__STATIC_INLINE void ll_pkc_set_ba_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer operand B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2064
ll_pkc_get_mas_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mas_a_pointer(pkc_regs_t *PKCx)
Get modular add/sub parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1599
ll_pkc_enable_it_big_add_overflow
__STATIC_INLINE void ll_pkc_enable_it_big_add_overflow(pkc_regs_t *PKCx)
Enable the big integer overflow interrupt.
Definition: gr55xx_ll_pkc.h:2192
ll_pkc_set_constp
__STATIC_INLINE void ll_pkc_set_constp(pkc_regs_t *PKCx, uint32_t ConstP)
Set constant value for montgomery multiply in pkc sram.
Definition: gr55xx_ll_pkc.h:1247
ll_pkc_get_x1_pointer
__STATIC_INLINE uint32_t ll_pkc_get_x1_pointer(pkc_regs_t *PKCx)
Get PKC parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1076
ll_pkc_init_t
struct _ll_pkc_init ll_pkc_init_t
LL PKC Init Structure definition.
ll_pkc_set_gy_pointer
__STATIC_INLINE void ll_pkc_set_gy_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Gy pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:596
ll_pkc_set_ecc_a_pointer
__STATIC_INLINE void ll_pkc_set_ecc_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set ECC parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1185
ll_ecc_point_t
struct _ll_ecc_point ll_ecc_point_t
LL PKC ECC Point Structure definition.
ll_pkc_get_dummy_multiply_seed
__STATIC_INLINE uint32_t ll_pkc_get_dummy_multiply_seed(pkc_regs_t *PKCx)
Get dummy multiply seed.
Definition: gr55xx_ll_pkc.h:1924
ll_pkc_enable_software
__STATIC_INLINE void ll_pkc_enable_software(pkc_regs_t *PKCx)
Enable pkc software mode.
Definition: gr55xx_ll_pkc.h:350
ll_pkc_set_bm_b_pointer
__STATIC_INLINE void ll_pkc_set_bm_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer operand B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1971
ll_pkc_get_ba_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ba_b_pointer(pkc_regs_t *PKCx)
Get big integer operand B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2079
ll_pkc_set_mi_u_pointer
__STATIC_INLINE void ll_pkc_set_mi_u_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter U pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1708
ll_pkc_get_swmi_tmp_pointer
__STATIC_INLINE uint32_t ll_pkc_get_swmi_tmp_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter Tmp pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1847
ll_pkc_set_operation_mode
__STATIC_INLINE void ll_pkc_set_operation_mode(pkc_regs_t *PKCx, uint32_t operation_mode)
Set operation mode in software mode.
Definition: gr55xx_ll_pkc.h:1331
_ll_ecc_curve_init::ConstN
uint32_t ConstN
Montgomery multiplication constant in prime field N, ConstN = 0xee00bc4f.
Definition: gr55xx_ll_pkc.h:113