Header file containing functions prototypes of XQSPI LL library. More...
#include "gr55xx.h"
Go to the source code of this file.
Classes | |
struct | _ll_xqspi_init_t |
XQSPI init structures definition. More... | |
Macros | |
#define | LL_XQSPI_MODE_XIP 0 |
XIP mode More... | |
#define | LL_XQSPI_MODE_QSPI 1 |
QSPI mode More... | |
#define | LL_XQSPI_XIP_CMD_READ 0x03 |
Read mode More... | |
#define | LL_XQSPI_XIP_CMD_FAST_READ 0x0B |
Fast Read mode More... | |
#define | LL_XQSPI_XIP_CMD_DUAL_OUT_READ 0x3B |
Dual-Out Fast Read mode More... | |
#define | LL_XQSPI_XIP_CMD_DUAL_IO_READ 0xBB |
Dual-IO Fast Read mode More... | |
#define | LL_XQSPI_XIP_CMD_QUAD_OUT_READ 0x6B |
Quad-Out Fast Read mode More... | |
#define | LL_XQSPI_XIP_CMD_QUAD_IO_READ 0xEB |
Quad-IO Fast Read mode More... | |
#define | LL_XQSPI_XIP_SS0 (1UL << XQSPI_XIP_CFG_SS_Pos) |
Slave select 0. More... | |
#define | LL_XQSPI_XIP_SS1 (2UL << XQSPI_XIP_CFG_SS_Pos) |
Slave select 1. More... | |
#define | LL_XQSPI_XIP_SS2 (4UL << XQSPI_XIP_CFG_SS_Pos) |
Slave select 2. More... | |
#define | LL_XQSPI_XIP_SS3 (8UL << XQSPI_XIP_CFG_SS_Pos) |
Slave select 3. More... | |
#define | LL_XQSPI_XIP_ADDR_3BYTES 0x00000000UL |
Address command is 3 bytes More... | |
#define | LL_XQSPI_XIP_ADDR_4BYTES XQSPI_XIP_CFG_ADDR4 |
Address command is 4 bytes More... | |
#define | LL_XQSPI_XIP_ENDIAN_BIG 0x00000000UL |
Read data in big endian More... | |
#define | LL_XQSPI_XIP_ENDIAN_LITTLE XQSPI_XIP_CFG_LE32 |
Read data in little endian. More... | |
#define | LL_XQSPI_CACHE_DIS 0 |
Cache OFF. More... | |
#define | LL_XQSPI_CACHE_EN 1 |
Cache ON More... | |
#define | LL_XQSPI_CACHE_FIFO_NORMAL 0x00000000UL |
FIFO in normal mode. More... | |
#define | LL_XQSPI_CACHE_FIFO_CLEAR XQSPI_CACHE_CTRL0_FIFO |
FIFO in clear mode More... | |
#define | LL_XQSPI_CACHE_HITMISS_NORMAL 0x00000000UL |
Hit/Miss counters in normal mode. More... | |
#define | LL_XQSPI_CACHE_HITMISS_CLEAR XQSPI_CACHE_CTRL0_HITMISS |
Hit/Miss counters in clear mode More... | |
#define | LL_XQSPI_QSPI_STAT_RFTF XQSPI_QSPI_STAT_RXWMARK |
Rx FIFO watermark flag More... | |
#define | LL_XQSPI_QSPI_STAT_RFF XQSPI_QSPI_STAT_RXFULL |
Rx FIFO full flag More... | |
#define | LL_XQSPI_QSPI_STAT_RFE XQSPI_QSPI_STAT_RXEMPTY |
Rx FIFO empty flag More... | |
#define | LL_XQSPI_QSPI_STAT_TFTF XQSPI_QSPI_STAT_TXWMARK |
Tx FIFO watermark flag More... | |
#define | LL_XQSPI_QSPI_STAT_TFF XQSPI_QSPI_STAT_TXFULL |
Tx FIFO full flag More... | |
#define | LL_XQSPI_QSPI_STAT_TFE XQSPI_QSPI_STAT_TXEMPTY |
Tx FIFO empty flag More... | |
#define | LL_XQSPI_QSPI_STAT_BUSY XQSPI_QSPI_STAT_XFERIP |
Busy flag More... | |
#define | LL_XQSPI_QSPI_IM_DONE XQSPI_QSPI_XFER_DPULSE_Msk |
Transmite Done Interrupt enable More... | |
#define | LL_XQSPI_QSPI_IM_RFF XQSPI_QSPI_RX_FPULSE_Msk |
Receive FIFO Full Interrupt enable More... | |
#define | LL_XQSPI_QSPI_IM_RFTF XQSPI_QSPI_RX_WPULSE_Msk |
Receive FIFO Watermark Interrupt enable More... | |
#define | LL_XQSPI_QSPI_IM_TFTF XQSPI_QSPI_TX_WPULSE_Msk |
Transmit FIFO Watermark Interrupt enable More... | |
#define | LL_XQSPI_QSPI_IM_TFE XQSPI_QSPI_TX_EPULSE_Msk |
Transmit FIFO Empty Interrupt enable More... | |
#define | LL_XQSPI_QSPI_IS_DONE XQSPI_QSPI_XFER_DPULSE_Msk |
Transmite Done Interrupt flag More... | |
#define | LL_XQSPI_QSPI_IS_RFF XQSPI_QSPI_RX_FPULSE_Msk |
Receive FIFO Full Interrupt flag More... | |
#define | LL_XQSPI_QSPI_IS_RFTF XQSPI_QSPI_RX_WPULSE_Msk |
Receive FIFO Watermark Interrupt flag More... | |
#define | LL_XQSPI_QSPI_IS_TFTF XQSPI_QSPI_TX_WPULSE_Msk |
Transmit FIFO Watermark Interrupt flag More... | |
#define | LL_XQSPI_QSPI_IS_TFE XQSPI_QSPI_TX_EPULSE_Msk |
Transmit FIFO Empty Interrupt flag More... | |
#define | LL_XQSPI_QSPI_FIFO_WATERMARK_1_8 0UL |
FIFO depth/8 More... | |
#define | LL_XQSPI_QSPI_FIFO_WATERMARK_1_4 1UL |
FIFO depth/4 More... | |
#define | LL_XQSPI_QSPI_FIFO_WATERMARK_1_2 2UL |
FIFO depth/2 More... | |
#define | LL_XQSPI_QSPI_FIFO_WATERMARK_3_4 3UL |
FIFO depth*3/4 More... | |
#define | LL_XQSPI_QSPI_FIFO_DEPTH 16UL |
FIFO full depth More... | |
#define | LL_XQSPI_QSPI_FRF_SPI 0x00000000UL |
SPI frame format for transfer More... | |
#define | LL_XQSPI_QSPI_FRF_DUALSPI (2UL << XQSPI_QSPI_AUXCTRL_QMODE_Pos) |
Dual-SPI frame format for transfer. More... | |
#define | LL_XQSPI_QSPI_FRF_QUADSPI (3UL << XQSPI_QSPI_AUXCTRL_QMODE_Pos) |
Quad-SPI frame format for transfer. More... | |
#define | LL_XQSPI_QSPI_LSB 0x00000000UL |
LSB first for transfer. More... | |
#define | LL_XQSPI_QSPI_MSB XQSPI_QSPI_CTRL_MSB1ST |
MSB first for transfer. More... | |
#define | LL_XQSPI_QSPI_DATASIZE_4BIT 0x00000000UL |
Data length for XQSPI transfer: 4 bits. More... | |
#define | LL_XQSPI_QSPI_DATASIZE_8BIT (1UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos) |
Data length for XQSPI transfer: 8 bits. More... | |
#define | LL_XQSPI_QSPI_DATASIZE_12BIT (2UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos) |
Data length for XQSPI transfer: 12 bits. More... | |
#define | LL_XQSPI_QSPI_DATASIZE_16BIT (3UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos) |
Data length for XQSPI transfer: 16 bits. More... | |
#define | LL_XQSPI_QSPI_DATASIZE_20BIT (4UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos) |
Data length for XQSPI transfer: 20 bits. More... | |
#define | LL_XQSPI_QSPI_DATASIZE_24BIT (5UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos) |
Data length for XQSPI transfer: 24 bits. More... | |
#define | LL_XQSPI_QSPI_DATASIZE_28BIT (6UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos) |
Data length for XQSPI transfer: 28 bits. More... | |
#define | LL_XQSPI_QSPI_DATASIZE_32BIT (7UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos) |
Data length for XQSPI transfer: 32 bits. More... | |
#define | LL_XQSPI_SCPHA_1EDGE 0 |
First clock transition is the first data capture edge More... | |
#define | LL_XQSPI_SCPHA_2EDGE 1 |
Second clock transition is the first data capture edge. More... | |
#define | LL_XQSPI_SCPOL_LOW 0 |
Clock to 0 when idle. More... | |
#define | LL_XQSPI_SCPOL_HIGH 1 |
Clock to 1 when idle. More... | |
#define | LL_XQSPI_BAUD_RATE_64M 0x00000000UL |
Clock to 64MHz. More... | |
#define | LL_XQSPI_BAUD_RATE_48M (1UL << AON_PWR_REG01_XF_SCK_CLK_SEL_Pos) |
Clock to 48MHz. More... | |
#define | LL_XQSPI_BAUD_RATE_32M (2UL << AON_PWR_REG01_XF_SCK_CLK_SEL_Pos) |
Clock to 32MHz. More... | |
#define | LL_XQSPI_BAUD_RATE_24M (3UL << AON_PWR_REG01_XF_SCK_CLK_SEL_Pos) |
Clock to 24MHz. More... | |
#define | LL_XQSPI_BAUD_RATE_16M (4UL << AON_PWR_REG01_XF_SCK_CLK_SEL_Pos) |
Clock to 16MHz. More... | |
#define | LL_XQSPI_ENABLE_PRESENT 0 |
Enable Present Bypass More... | |
#define | LL_XQSPI_DISABLE_PRESENT 1 |
Disable Present Bypass. More... | |
#define | LL_XQSPI_FLASH_WRITE_128BIT 0 |
128bits flash write More... | |
#define | LL_XQSPI_FLASH_WRITE_32BIT 1 |
32bits flash write More... | |
#define | LL_XQSPI_DEFAULT_CONFIG |
LL XQSPI InitStrcut default configuartion. More... | |
#define | LL_XQSPI_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG(__instance__->__REG__, (__VALUE__)) |
Write a value in XQSPI register. More... | |
#define | LL_XQSPI_ReadReg(__instance__, __REG__) READ_REG(__instance__->__REG__) |
Read a value in XQSPI register. More... | |
Typedefs | |
typedef struct _ll_xqspi_init_t | ll_xqspi_init_t |
XQSPI init structures definition. More... | |
Functions | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_cache (xqspi_regs_t *XQSPIx) |
Enable cache function. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_cache (xqspi_regs_t *XQSPIx) |
Disable cache function. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_cache (xqspi_regs_t *XQSPIx) |
Check if cache function is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_cache_flush (xqspi_regs_t *XQSPIx) |
Enable tag memory flush. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_cache_flush (xqspi_regs_t *XQSPIx) |
Disable tag memory flush. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_cache_flush (xqspi_regs_t *XQSPIx) |
Check if tag memory flush is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_cache_fifo (xqspi_regs_t *XQSPIx, uint32_t mode) |
Set FIFO mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_cache_fifo (xqspi_regs_t *XQSPIx) |
Get FIFO mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_cache_hitmiss (xqspi_regs_t *XQSPIx, uint32_t mode) |
Set HIT/MISS mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_cache_hitmiss (xqspi_regs_t *XQSPIx) |
Get HIT/MISS mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_cache_dbgbus (xqspi_regs_t *XQSPIx, uint32_t sel) |
Set debugbus configurations signals. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_cache_dbgbus (xqspi_regs_t *XQSPIx) |
Get debugbus configurations signals. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_cache_dbgmux (xqspi_regs_t *XQSPIx) |
Enable debug bus mux. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_cache_dbgmux (xqspi_regs_t *XQSPIx) |
Disable debug bus mux. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_cache_dbgmux (xqspi_regs_t *XQSPIx) |
Check if debug bus mux is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_cache_hitcount (xqspi_regs_t *XQSPIx) |
Get hit counter. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_cache_misscount (xqspi_regs_t *XQSPIx) |
Get miss counter. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_cache_flag (xqspi_regs_t *XQSPIx) |
Get cache status. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_xip_cmd (xqspi_regs_t *XQSPIx, uint32_t cmd) |
Set read command. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_xip_cmd (xqspi_regs_t *XQSPIx) |
Get read command. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_xip_hp (xqspi_regs_t *XQSPIx) |
Enable high performance mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_xip_hp (xqspi_regs_t *XQSPIx) |
Disable high performance mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_xip_hp (xqspi_regs_t *XQSPIx) |
Check if high performance mode is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_xip_ss (xqspi_regs_t *XQSPIx, uint32_t ss) |
Set slave select. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_xip_ss (xqspi_regs_t *XQSPIx) |
Get slave select. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_xip_cpha (xqspi_regs_t *XQSPIx, uint32_t cpha) |
Set clock phase. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_xip_cpha (xqspi_regs_t *XQSPIx) |
Get clock phase. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_xip_cpol (xqspi_regs_t *XQSPIx, uint32_t cpol) |
Set clock polarity. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_xip_cpol (xqspi_regs_t *XQSPIx) |
Get clock polarity. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_xip_addr_size (xqspi_regs_t *XQSPIx, uint32_t size) |
Set address bytes in command. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_xip_addr_size (xqspi_regs_t *XQSPIx) |
Get address bytes in command. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_xip_endian (xqspi_regs_t *XQSPIx, uint32_t endian) |
Set endian in reading data. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_xip_endian (xqspi_regs_t *XQSPIx) |
Get endian in reading data. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_xip_hp_cmd (xqspi_regs_t *XQSPIx, uint32_t cmd) |
Set high performance command. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_xip_hp_cmd (xqspi_regs_t *XQSPIx) |
Get high performance command. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_xip_dummycycles (xqspi_regs_t *XQSPIx, uint32_t cycles) |
Set dummy cycles in command. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_xip_dummycycles (xqspi_regs_t *XQSPIx) |
Get dummy cycles in command. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_xip_dummy_hp (xqspi_regs_t *XQSPIx, uint32_t cycles) |
Set dummy cycles in high performance end. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_xip_dummy_hp (xqspi_regs_t *XQSPIx) |
Get dummy cycles in high performance end. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_xip (xqspi_regs_t *XQSPIx) |
Enable XIP mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_xip (xqspi_regs_t *XQSPIx) |
Disable XIP mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_xip (xqspi_regs_t *XQSPIx) |
Check if XIP mode is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_xip_flag (xqspi_regs_t *XQSPIx) |
Get XIP status. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_xip_it (xqspi_regs_t *XQSPIx) |
Check if XIP interrupt is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_flag_xip_it (xqspi_regs_t *XQSPIx) |
Get XIP interrupt flag. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_req_xip_it (xqspi_regs_t *XQSPIx) |
Get XIP interrupt request. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_xip_it (xqspi_regs_t *XQSPIx) |
Set XIP interrupt enable. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_xip_it (xqspi_regs_t *XQSPIx) |
Set XIP interrupt disable. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_qspi_transmit_data8 (xqspi_regs_t *XQSPIx, uint8_t tx_data) |
Write 8-bit in the data register. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_qspi_transmit_data16 (xqspi_regs_t *XQSPIx, uint16_t tx_data) |
Write 16-bit in the data register. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_qspi_transmit_data32 (xqspi_regs_t *XQSPIx, uint32_t tx_data) |
Write 32-bit in the data register. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint8_t | ll_xqspi_qspi_receive_data8 (xqspi_regs_t *XQSPIx) |
Read 8 bits in the data register. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint16_t | ll_xqspi_qspi_receive_data16 (xqspi_regs_t *XQSPIx) |
Read 16 bits in the data register. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_qspi_receive_data32 (xqspi_regs_t *XQSPIx) |
Read 32 bits in the data register. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_tft (xqspi_regs_t *XQSPIx, uint32_t threshold) |
Set TX FIFO threshold level. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_tft (xqspi_regs_t *XQSPIx) |
Get TX FIFO threshold level. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_rft (xqspi_regs_t *XQSPIx, uint32_t threshold) |
Set RX FIFO threshold level. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_rft (xqspi_regs_t *XQSPIx) |
Get RX FIFO threshold level. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi_dummy (xqspi_regs_t *XQSPIx) |
Enable dummy cycles. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi_dummy (xqspi_regs_t *XQSPIx) |
Disable dummy cycles. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_qspi_dummy (xqspi_regs_t *XQSPIx) |
Check if dummy cycles is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi_dma (xqspi_regs_t *XQSPIx) |
Enable DMA mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi_dma (xqspi_regs_t *XQSPIx) |
Disable DMA mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_qspi_dma (xqspi_regs_t *XQSPIx) |
Check if DMA mode is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_cpol (xqspi_regs_t *XQSPIx, uint32_t cpol) |
Set clock polarity. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_cpol (xqspi_regs_t *XQSPIx) |
Get clock polarity. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_cpha (xqspi_regs_t *XQSPIx, uint32_t cpha) |
Set clock phase. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_cpha (xqspi_regs_t *XQSPIx) |
Get clock phase. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_data_order (xqspi_regs_t *XQSPIx, uint32_t order) |
Set serial data order. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_data_order (xqspi_regs_t *XQSPIx) |
Get serial data order. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi_contxfer (xqspi_regs_t *XQSPIx) |
Enable continuous transfer mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi_contxfer (xqspi_regs_t *XQSPIx) |
Disable continuous transfer mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_qspi_contxfer (xqspi_regs_t *XQSPIx) |
Check if continuous transfer mode is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi_contxfer_extend (xqspi_regs_t *XQSPIx) |
Enable continuous transfer extend mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi_contxfer_extend (xqspi_regs_t *XQSPIx) |
Disable continuous transfer extend mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_qspi_contxfer_extend (xqspi_regs_t *XQSPIx) |
Check if continuous transfer extend mode is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_datasize (xqspi_regs_t *XQSPIx, uint32_t szie) |
Set data size. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_datasize (xqspi_regs_t *XQSPIx) |
Get data size. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_inhibt_rx (xqspi_regs_t *XQSPIx) |
Enable inhibt data input to RX FIFO. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_inhibt_rx (xqspi_regs_t *XQSPIx) |
Disable inhibt data input to RX FIFO. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_inhibt_rx (xqspi_regs_t *XQSPIx) |
Check if inhibt data input to RX FIFO is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_inhibt_tx (xqspi_regs_t *XQSPIx) |
Enable inhibt data output to TX FIFO. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_inhibt_tx (xqspi_regs_t *XQSPIx) |
Disable inhibt data output to TX FIFO. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_inhibt_tx (xqspi_regs_t *XQSPIx) |
Check if inhibt data input to TX FIFO is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_frf (xqspi_regs_t *XQSPIx, uint32_t format) |
Set frame format. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_frf (xqspi_regs_t *XQSPIx) |
Get frame format. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_status (xqspi_regs_t *XQSPIx) |
Get QSPI status. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_active_qspi_flag (xqspi_regs_t *XQSPIx, uint32_t flag) |
Check active flag. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi_ssout (xqspi_regs_t *XQSPIx, uint32_t ssout) |
Enable slave select output. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi_ssout (xqspi_regs_t *XQSPIx, uint32_t ssout) |
Disable slave select output. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_sspol (xqspi_regs_t *XQSPIx, uint32_t sspol) |
Set slave select output polarity. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_sspol (xqspi_regs_t *XQSPIx) |
Get slave select output polarity. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_tx_fifo_level (xqspi_regs_t *XQSPIx) |
Get FIFO Transmission Level. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_rx_fifo_level (xqspi_regs_t *XQSPIx) |
Get FIFO reception Level. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi_it (xqspi_regs_t *XQSPIx, uint32_t mask) |
Enable interrupt. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi_it (xqspi_regs_t *XQSPIx, uint32_t mask) |
Disable interrupt. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_qspi_it (xqspi_regs_t *XQSPIx, uint32_t mask) |
Check if interrupt is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_it_flag (xqspi_regs_t *XQSPIx) |
Get XQSPI interrupt flags. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_qspi_it_flag (xqspi_regs_t *XQSPIx, uint32_t flag) |
Check interrupt flag. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_clear_qspi_flag (xqspi_regs_t *XQSPIx, uint32_t flag) |
Clear interrupt flag. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_wait (xqspi_regs_t *XQSPIx, uint32_t wait) |
Set master inter-transfer delay. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_wait (xqspi_regs_t *XQSPIx) |
Get master inter-transfer delay. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi (xqspi_regs_t *XQSPIx) |
Enable QSPI. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi (xqspi_regs_t *XQSPIx) |
Disable QSPI. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_qspi (xqspi_regs_t *XQSPIx) |
Check if QSPI is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_flash_write (xqspi_regs_t *XQSPIx, uint32_t bits) |
Set QSPI Flash write bits. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_flash_write (xqspi_regs_t *XQSPIx) |
Get QSPI Flash write bits. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_present_bypass (xqspi_regs_t *XQSPIx, uint32_t bypass) |
Set QSPI Present Bypass. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_present_bypass (xqspi_regs_t *XQSPIx) |
Get QSPI Present Bypass. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_exflash_power (void) |
Enable exflash power. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_exflash_power (void) |
Disable exflash power. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enable_exflash_power (void) |
Check if exflash power is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_speed (uint32_t speed) |
Set XQSPI serial clock. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_speed (void) |
Get XQSPI serial clock. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_cache_retention (void) |
Enable cache data retention. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_cache_retention (void) |
Disable cache data retention. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enable_cache_retention (void) |
Check if tag memory retention is enabled. More... | |
error_status_t | ll_xqspi_deinit (xqspi_regs_t *XQSPIx) |
De-initialize XQSPI registers (Registers restored to their default values). More... | |
error_status_t | ll_xqspi_init (xqspi_regs_t *XQSPIx, ll_xqspi_init_t *p_xqspi_init) |
Initialize XQSPI registers according to the specified parameters in default. More... | |
void | ll_xqspi_struct_init (ll_xqspi_init_t *p_xqspi_init) |
Set each field of a ll_xqspi_init_t type structure to default value. More... | |
Header file containing functions prototypes of XQSPI LL library.
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Definition in file gr55xx_ll_xqspi.h.