52 #ifndef __GR55xx_LL_ISO7816_H__
53 #define __GR55xx_LL_ISO7816_H__
97 #define LL_ISO7816_ACTION_NONE 0x00000000U
98 #define LL_ISO7816_ACTION_OFF 0x00000001U
99 #define LL_ISO7816_ACTION_STOPCLK 0x00000002U
100 #define LL_ISO7816_ACTION_ON 0x00000003U
101 #define LL_ISO7816_ACTION_WARMRST 0x00000004U
102 #define LL_ISO7816_ACTION_RX 0x00000005U
103 #define LL_ISO7816_ACTION_TX 0x00000006U
104 #define LL_ISO7816_ACTION_TXRX 0x00000007U
111 #define LL_ISO7816_INTR_TEST ISO7816_STAT_IRQ_TEST
112 #define LL_ISO7816_INTR_PRESENCE ISO7816_STAT_IRQ_PRESENCE
113 #define LL_ISO7816_INTR_STATE_ERR ISO7816_STAT_IRQ_STAT_ERR
114 #define LL_ISO7816_INTR_DMA_ERR ISO7816_STAT_IRQ_DMA_ERR
115 #define LL_ISO7816_INTR_RETRY_ERR ISO7816_STAT_IRQ_RETRY_ERR
116 #define LL_ISO7816_INTR_RX_ERR ISO7816_STAT_IRQ_RX_ERR
117 #define LL_ISO7816_INTR_DONE ISO7816_STAT_IRQ_DONE
119 #define LL_ISO7816_INTR_MASK_ALL ISO7816_INTR_ALL
125 #define LL_ISO7816_CARD_ABSENT 0x00000000U
126 #define LL_ISO7816_CARD_PRESENT 0x00000001U
132 #define LL_ISO7816_IO_STATE_OFF (0x0UL << ISO7816_STAT_IO_STAT_POS)
133 #define LL_ISO7816_IO_STATE_IDLE (0x1UL << ISO7816_STAT_IO_STAT_POS)
134 #define LL_ISO7816_IO_STATE_RX_WAIT (0x4UL << ISO7816_STAT_IO_STAT_POS)
135 #define LL_ISO7816_IO_STATE_RX (0x5UL << ISO7816_STAT_IO_STAT_POS)
136 #define LL_ISO7816_IO_STATE_TX (0x6UL << ISO7816_STAT_IO_STAT_POS)
137 #define LL_ISO7816_IO_STATE_TX_GUARD (0x7UL << ISO7816_STAT_IO_STAT_POS)
143 #define LL_ISO7816_PWR_STATE_OFF (0x0UL << ISO7816_STAT_PWR_STAT_POS)
144 #define LL_ISO7816_PWR_STATE_PWRUP_VCC (0x1UL << ISO7816_STAT_PWR_STAT_POS)
145 #define LL_ISO7816_PWR_STATE_PWRUP_RST (0x2UL << ISO7816_STAT_PWR_STAT_POS)
146 #define LL_ISO7816_PWR_STATE_PWRDN_RST (0x3UL << ISO7816_STAT_PWR_STAT_POS)
147 #define LL_ISO7816_PWR_STATE_PWRDN_VCC (0x4UL << ISO7816_STAT_PWR_STAT_POS)
148 #define LL_ISO7816_PWR_STATE_STOP_PRE (0x5UL << ISO7816_STAT_PWR_STAT_POS)
149 #define LL_ISO7816_PWR_STATE_STOP (0x6UL << ISO7816_STAT_PWR_STAT_POS)
150 #define LL_ISO7816_PWR_STATE_STOP_POST (0x7UL << ISO7816_STAT_PWR_STAT_POS)
151 #define LL_ISO7816_PWR_STATE_IDLE (0x8UL << ISO7816_STAT_PWR_STAT_POS)
152 #define LL_ISO7816_PWR_STATE_RX_TS0 (0x9UL << ISO7816_STAT_PWR_STAT_POS)
153 #define LL_ISO7816_PWR_STATE_RX_TS1 (0xAUL << ISO7816_STAT_PWR_STAT_POS)
154 #define LL_ISO7816_PWR_STATE_RX (0xBUL << ISO7816_STAT_PWR_STAT_POS)
155 #define LL_ISO7816_PWR_STATE_TX (0xCUL << ISO7816_STAT_PWR_STAT_POS)
156 #define LL_ISO7816_PWR_STATE_TX_RX (0xDUL << ISO7816_STAT_PWR_STAT_POS)
162 #define LL_ISO7816_CLKSTOP_LOW (0x00000000UL)
163 #define LL_ISO7816_CLKSTOP_HIGH (0x80000000UL)
169 #define LL_ISO7816_CODING_DEFAULT (0x00000000UL)
170 #define LL_ISO7816_CODING_INVERSE (0x00000001UL)
191 #define LL_ISO7816_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG(__instance__->__REG__, (__VALUE__))
199 #define LL_ISO7816_ReadReg(__instance__, __REG__) READ_REG(__instance__->__REG__)
245 WRITE_REG(ISO7816x->CTRL, action);
265 return (READ_BITS(ISO7816x->STAT, ISO7816_STAT_BUSY) == (ISO7816_STAT_BUSY));
284 WRITE_REG(ISO7816x->CTRL, ISO7816_CTRL_TX_RETYR_MC);
303 WRITE_REG(ISO7816x->CTRL, ISO7816_CTRL_RX_RETYR_MC);
324 return (uint32_t)(READ_BITS(ISO7816x->STAT, ISO7816_STAT_PRESENCE_STAT) >> ISO7816_STAT_PRESENCE_STAT_POS);
343 return (uint32_t)(READ_BITS(ISO7816x->STAT, ISO7816_STAT_TX_RETRY_MAX) >> ISO7816_STAT_RX_RETRY_MAX_POS);
362 return (uint32_t)(READ_BITS(ISO7816x->STAT, ISO7816_STAT_RX_RETRY_MAX) >> ISO7816_STAT_RX_RETRY_MAX_POS);
387 return (uint32_t)(READ_BITS(ISO7816x->STAT, ISO7816_STAT_IO_STAT) >> ISO7816_STAT_IO_STAT_POS);
420 return (uint32_t)(READ_BITS(ISO7816x->STAT, ISO7816_STAT_PWR_STAT));
442 MODIFY_REG(ISO7816x->CLK_CFG, ISO7816_CLK_CFG_CLK_STOP_SEL, level);
463 return (uint32_t)(READ_BITS(ISO7816x->CLK_CFG, ISO7816_CLK_CFG_CLK_STOP_SEL));
484 MODIFY_REG(ISO7816x->CLK_CFG, ISO7816_CLK_CFG_CLK_DIV, value << ISO7816_CLK_CFG_CLK_DIV_POS);
503 return (uint32_t)(READ_BITS(ISO7816x->CLK_CFG, ISO7816_CLK_CFG_CLK_DIV) >> ISO7816_CLK_CFG_CLK_DIV_POS);
525 MODIFY_REG(ISO7816x->CLK_CFG, ISO7816_CLK_CFG_ETU_DIV, divide);
544 return (uint32_t)(READ_BITS(ISO7816x->CLK_CFG, ISO7816_CLK_CFG_ETU_DIV));
566 MODIFY_REG(ISO7816x->TIMES_CFG, ISO7816_TIMES_CFG_WAIT_TIME, wait_time << ISO7816_TIMES_CFG_WAIT_TIME_POS);
585 return (uint32_t)(READ_BITS(ISO7816x->TIMES_CFG, ISO7816_TIMES_CFG_WAIT_TIME) >> ISO7816_TIMES_CFG_WAIT_TIME_POS);
607 MODIFY_REG(ISO7816x->TIMES_CFG, ISO7816_TIMES_CFG_GUARD_TIME, guardtime);
625 return (uint32_t)(READ_BITS(ISO7816x->TIMES_CFG, ISO7816_TIMES_CFG_GUARD_TIME));
645 MODIFY_REG(ISO7816x->DATA_CFG, ISO7816_DATA_CFG_RETRY_LIMIT, number << ISO7816_DATA_CFG_RETRY_LIMIT_POS);
664 return (uint32_t)(READ_BITS(ISO7816x->DATA_CFG, ISO7816_DATA_CFG_RETRY_LIMIT) >> ISO7816_DATA_CFG_RETRY_LIMIT_POS);
683 SET_BITS(ISO7816x->DATA_CFG, ISO7816_DATA_CFG_DETECT_CODING);
702 CLEAR_BITS(ISO7816x->DATA_CFG, ISO7816_DATA_CFG_DETECT_CODING);
724 MODIFY_REG(ISO7816x->DATA_CFG, ISO7816_DATA_CFG_CODING, convention);
745 return (uint32_t)(READ_BITS(ISO7816x->DATA_CFG, ISO7816_DATA_CFG_CODING));
764 return (uint32_t)(READ_BITS(ISO7816x->ADDR, ISO7816_ADDR_ADDR) >> ISO7816_ADDR_ADDR_POS);
783 return (uint32_t)(READ_BITS(ISO7816x->ADDR, ISO7816_ADDR_ADDR_FRAC));
799 WRITE_REG(ISO7816x->START_ADDR, addr);
813 return (uint32_t)(READ_REG(ISO7816x->START_ADDR));
829 MODIFY_REG(ISO7816x->START_ADDR, ISO7816_START_ADDR_BASE_ADDR, addr << ISO7816_START_ADDR_BASE_ADDR_POS);
844 return (uint32_t)(READ_BITS(ISO7816x->START_ADDR, ISO7816_START_ADDR_BASE_ADDR) >> ISO7816_START_ADDR_BASE_ADDR_POS);
860 MODIFY_REG(ISO7816x->START_ADDR, ISO7816_START_ADDR_START_ADDR, addr << ISO7816_START_ADDR_START_ADDR_POS);
875 return (uint32_t)(READ_BITS(ISO7816x->START_ADDR, ISO7816_START_ADDR_START_ADDR) >> ISO7816_START_ADDR_START_ADDR_POS);
891 MODIFY_REG(ISO7816x->RX_END_ADDR, ISO7816_RX_END_ADDR_RX_END_ADDR, addr << ISO7816_RX_END_ADDR_RX_END_ADDR_POS);
907 WRITE_REG(ISO7816x->RX_END_ADDR, addr);
922 return (uint32_t)(READ_BITS(ISO7816x->RX_END_ADDR, ISO7816_RX_END_ADDR_RX_END_ADDR) >> ISO7816_RX_END_ADDR_RX_END_ADDR_POS);
938 MODIFY_REG(ISO7816x->RX_END_ADDR, ISO7816_RX_END_ADDR_RX_END_AF, frac);
954 WRITE_REG(ISO7816x->TX_END_ADDR, addr);
969 return READ_REG(ISO7816x->TX_END_ADDR);
984 return READ_REG(ISO7816x->RX_END_ADDR);
999 return (uint32_t)(READ_BITS(ISO7816x->RX_END_ADDR, ISO7816_RX_END_ADDR_RX_END_AF));
1015 MODIFY_REG(ISO7816x->TX_END_ADDR, ISO7816_TX_END_ADDR_TX_END_ADDR, addr << ISO7816_TX_END_ADDR_TX_END_ADDR_POS);
1030 return (uint32_t)(READ_BITS(ISO7816x->TX_END_ADDR, ISO7816_TX_END_ADDR_TX_END_ADDR) >> ISO7816_TX_END_ADDR_TX_END_ADDR_POS);
1046 MODIFY_REG(ISO7816x->TX_END_ADDR, ISO7816_TX_END_ADDR_TX_END_AF, frac);
1061 return (uint32_t)(READ_BITS(ISO7816x->TX_END_ADDR, ISO7816_TX_END_ADDR_TX_END_AF));
1099 return (uint32_t)(READ_REG(ISO7816x->STAT) & ISO7816_INTR_ALL);
1118 return (READ_BITS(ISO7816x->STAT, ISO7816_STAT_IRQ_TEST) == (ISO7816_STAT_IRQ_TEST));
1137 return (READ_BITS(ISO7816x->STAT, ISO7816_STAT_IRQ_PRESENCE) == (ISO7816_STAT_IRQ_PRESENCE));
1156 return (READ_BITS(ISO7816x->STAT, ISO7816_STAT_IRQ_STAT_ERR) == (ISO7816_STAT_IRQ_STAT_ERR));
1175 return (READ_BITS(ISO7816x->STAT, ISO7816_STAT_IRQ_DMA_ERR) == (ISO7816_STAT_IRQ_DMA_ERR));
1194 return (READ_BITS(ISO7816x->STAT, ISO7816_STAT_IRQ_RETRY_ERR) == (ISO7816_STAT_IRQ_RETRY_ERR));
1213 return (READ_BITS(ISO7816x->STAT, ISO7816_STAT_IRQ_RX_ERR) == (ISO7816_STAT_IRQ_RX_ERR));
1232 return (READ_BITS(ISO7816x->STAT, ISO7816_STAT_IRQ_DONE) == (ISO7816_STAT_IRQ_DONE));
1257 WRITE_REG(ISO7816x->CTRL, ISO7816_INTR_ALL);
1276 WRITE_REG(ISO7816x->CTRL, ISO7816_CTRL_IRQ_TEST_CLR);
1295 WRITE_REG(ISO7816x->CTRL, ISO7816_CTRL_IRQ_PRESENCE_CLR);
1314 WRITE_REG(ISO7816x->CTRL, ISO7816_CTRL_IRQ_STAT_EC);
1333 WRITE_REG(ISO7816x->CTRL, ISO7816_CTRL_IRQ_DMA_EC);
1352 WRITE_REG(ISO7816x->CTRL, ISO7816_CTRL_IRQ_RETYR_EC);
1371 WRITE_REG(ISO7816x->CTRL, ISO7816_CTRL_IRQ_RX_EC);
1390 WRITE_REG(ISO7816x->CTRL, ISO7816_CTRL_IRQ_DONE_CLR);