gr55xx_ll_spi.h File Reference

Header file containing functions prototypes of SPI LL library. More...

#include "gr55xx.h"
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Go to the source code of this file.

Classes

struct  _ll_spim_init_t
 LL SPIM init structures definition. More...
 
struct  _ll_spis_init_t
 SPIS init structures definition. More...
 
struct  _ll_qspi_init_t
 QSPI init structures definition. More...
 

Macros

#define LL_SSI_SR_DCOL   SSI_STAT_DCOL
 Data collision error flag
More...
 
#define LL_SSI_SR_TXE   SSI_STAT_TXE
 Transmission error flag
More...
 
#define LL_SSI_SR_RFF   SSI_STAT_RFF
 Rx FIFO full flag
More...
 
#define LL_SSI_SR_RFNE   SSI_STAT_RFNE
 Rx FIFO not empty flag
More...
 
#define LL_SSI_SR_TFE   SSI_STAT_TFE
 Tx FIFO empty flag
More...
 
#define LL_SSI_SR_TFNF   SSI_STAT_TFNF
 Tx FIFO not full flag
More...
 
#define LL_SSI_SR_BUSY   SSI_STAT_BUSY
 Busy flag
More...
 
#define LL_SSI_IM_MST   SSI_INTMASK_MSTIM
 Multi-Master Contention Interrupt enable
More...
 
#define LL_SSI_IM_RXF   SSI_INTMASK_RXFIM
 Receive FIFO Full Interrupt enable
More...
 
#define LL_SSI_IM_RXO   SSI_INTMASK_RXOIM
 Receive FIFO Overflow Interrupt enable
More...
 
#define LL_SSI_IM_RXU   SSI_INTMASK_RXUIM
 Receive FIFO Underflow Interrupt enable
More...
 
#define LL_SSI_IM_TXO   SSI_INTMASK_TXOIM
 Transmit FIFO Overflow Interrupt enable
More...
 
#define LL_SSI_IM_TXE   SSI_INTMASK_TXEIM
 Transmit FIFO Empty Interrupt enable
More...
 
#define LL_SSI_IS_MST   SSI_INTSTAT_MSTIS
 Multi-Master Contention Interrupt flag
More...
 
#define LL_SSI_IS_RXF   SSI_INTSTAT_RXFIS
 Receive FIFO Full Interrupt flag
More...
 
#define LL_SSI_IS_RXO   SSI_INTSTAT_RXOIS
 Receive FIFO Overflow Interrupt flag
More...
 
#define LL_SSI_IS_RXU   SSI_INTSTAT_RXUIS
 Receive FIFO Underflow Interrupt flag
More...
 
#define LL_SSI_IS_TXO   SSI_INTSTAT_TXOIS
 Transmit FIFO Overflow Interrupt flag
More...
 
#define LL_SSI_IS_TXE   SSI_INTSTAT_TXEIS
 Transmit FIFO Empty Interrupt flag
More...
 
#define LL_SSI_RIS_MST   SSI_RAW_INTSTAT_MSTIR
 Multi-Master Contention RAW Interrupt flag. More...
 
#define LL_SSI_RIS_RXF   SSI_RAW_INTSTAT_RXFIR
 Receive FIFO Full RAW Interrupt flag
More...
 
#define LL_SSI_RIS_RXO   SSI_RAW_INTSTAT_RXOIR
 Receive FIFO Overflow RAW Interrupt flag
More...
 
#define LL_SSI_RIS_RXU   SSI_RAW_INTSTAT_RXUIR
 Receive FIFO Underflow RAW Interrupt flag. More...
 
#define LL_SSI_RIS_TXO   SSI_RAW_INTSTAT_TXOIR
 Transmit FIFO Overflow RAW Interrupt flag. More...
 
#define LL_SSI_RIS_TXE   SSI_RAW_INTSTAT_TXEIR
 Transmit FIFO Empty RAW Interrupt flag
More...
 
#define LL_SSI_FRF_SPI   0x00000000UL
 SPI frame format for transfer
More...
 
#define LL_SSI_FRF_DUALSPI   (1UL << SSI_CTRL0_SPIFRF_Pos)
 Dual-SPI frame format for transfer. More...
 
#define LL_SSI_FRF_QUADSPI   (2UL << SSI_CTRL0_SPIFRF_Pos)
 Quad-SPI frame format for transfer. More...
 
#define LL_SSI_DATASIZE_4BIT   (3UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 4 bits. More...
 
#define LL_SSI_DATASIZE_5BIT   (4UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 5 bits. More...
 
#define LL_SSI_DATASIZE_6BIT   (5UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 6 bits. More...
 
#define LL_SSI_DATASIZE_7BIT   (6UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 7 bits. More...
 
#define LL_SSI_DATASIZE_8BIT   (7UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 8 bits. More...
 
#define LL_SSI_DATASIZE_9BIT   (8UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 9 bits. More...
 
#define LL_SSI_DATASIZE_10BIT   (9UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 10 bits. More...
 
#define LL_SSI_DATASIZE_11BIT   (10UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 11 bits. More...
 
#define LL_SSI_DATASIZE_12BIT   (11UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 12 bits. More...
 
#define LL_SSI_DATASIZE_13BIT   (12UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 13 bits. More...
 
#define LL_SSI_DATASIZE_14BIT   (13UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 14 bits. More...
 
#define LL_SSI_DATASIZE_15BIT   (14UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 15 bits. More...
 
#define LL_SSI_DATASIZE_16BIT   (15UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 16 bits. More...
 
#define LL_SSI_DATASIZE_17BIT   (16UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 17 bits. More...
 
#define LL_SSI_DATASIZE_18BIT   (17UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 18 bits. More...
 
#define LL_SSI_DATASIZE_19BIT   (18UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 19 bits. More...
 
#define LL_SSI_DATASIZE_20BIT   (19UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 20 bits. More...
 
#define LL_SSI_DATASIZE_21BIT   (20UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 21 bits. More...
 
#define LL_SSI_DATASIZE_22BIT   (21UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 22 bits. More...
 
#define LL_SSI_DATASIZE_23BIT   (22UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 23 bits. More...
 
#define LL_SSI_DATASIZE_24BIT   (23UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 24 bits. More...
 
#define LL_SSI_DATASIZE_25BIT   (24UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 25 bits. More...
 
#define LL_SSI_DATASIZE_26BIT   (25UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 26 bits. More...
 
#define LL_SSI_DATASIZE_27BIT   (26UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 27 bits. More...
 
#define LL_SSI_DATASIZE_28BIT   (27UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 28 bits. More...
 
#define LL_SSI_DATASIZE_29BIT   (28UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 29 bits. More...
 
#define LL_SSI_DATASIZE_30BIT   (29UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 30 bits. More...
 
#define LL_SSI_DATASIZE_31BIT   (30UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 31 bits. More...
 
#define LL_SSI_DATASIZE_32BIT   (31UL << SSI_CTRL0_DFS32_Pos)
 Data length for SPI transfer: 32 bits. More...
 
#define LL_SSI_MW_CMDSIZE_1BIT   0x00000000UL
 CMD length for Microwire transfer: 1 bits. More...
 
#define LL_SSI_MW_CMDSIZE_2BIT   (1UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 2 bits. More...
 
#define LL_SSI_MW_CMDSIZE_3BIT   (2UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 3 bits. More...
 
#define LL_SSI_MW_CMDSIZE_4BIT   (3UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 4 bits. More...
 
#define LL_SSI_MW_CMDSIZE_5BIT   (4UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 5 bits. More...
 
#define LL_SSI_MW_CMDSIZE_6BIT   (5UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 6 bits. More...
 
#define LL_SSI_MW_CMDSIZE_7BIT   (6UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 7 bits. More...
 
#define LL_SSI_MW_CMDSIZE_8BIT   (7UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 8 bits. More...
 
#define LL_SSI_MW_CMDSIZE_9BIT   (8UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 9 bits. More...
 
#define LL_SSI_MW_CMDSIZE_10BIT   (9UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 10 bits. More...
 
#define LL_SSI_MW_CMDSIZE_11BIT   (10UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 11 bits. More...
 
#define LL_SSI_MW_CMDSIZE_12BIT   (11UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 12 bits. More...
 
#define LL_SSI_MW_CMDSIZE_13BIT   (12UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 13 bits. More...
 
#define LL_SSI_MW_CMDSIZE_14BIT   (13UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 14 bits. More...
 
#define LL_SSI_MW_CMDSIZE_15BIT   (14UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 15 bits. More...
 
#define LL_SSI_MW_CMDSIZE_16BIT   (15UL << SSI_CTRL0_CFS_Pos)
 CMD length for Microwire transfer: 16 bits. More...
 
#define LL_SSI_NORMAL_MODE   0x00000000UL
 Normal mode for SPI transfer
More...
 
#define LL_SSI_TEST_MODE   (1UL << SSI_CTRL0_SRL_Pos)
 Test mode for SPI transfer: Rx and Tx connected inside. More...
 
#define LL_SSI_SLAVE_OUTDIS   0x00000000UL
 Output enable for SPI transfer as slave
More...
 
#define LL_SSI_SLAVE_OUTEN   (1UL << SSI_CTRL0_SLVOE_Pos)
 Output disable for SPI transfer as slave
More...
 
#define LL_SSI_FULL_DUPLEX   0x00000000UL
 Full-Duplex mode. More...
 
#define LL_SSI_SIMPLEX_TX   (1UL << SSI_CTRL0_TMOD_Pos)
 Simplex Tx mode. More...
 
#define LL_SSI_SIMPLEX_RX   (2UL << SSI_CTRL0_TMOD_Pos)
 Simplex Rx mode. More...
 
#define LL_SSI_READ_EEPROM   (3UL << SSI_CTRL0_TMOD_Pos)
 Read EEPROM mode. More...
 
#define LL_SSI_SCPHA_1EDGE   0x00000000UL
 First clock transition is the first data capture edge
More...
 
#define LL_SSI_SCPHA_2EDGE   (1UL << SSI_CTRL0_SCPHA_Pos)
 Second clock transition is the first data capture edge. More...
 
#define LL_SSI_SCPOL_LOW   0x00000000UL
 Clock to 0 when idle. More...
 
#define LL_SSI_SCPOL_HIGH   (1UL << SSI_CTRL0_SCPOL_Pos)
 Clock to 1 when idle. More...
 
#define LL_SSI_PROTOCOL_MOTOROLA   0x00000000UL
 Motorola mode. More...
 
#define LL_SSI_PROTOCOL_TI   (1UL << SSI_CTRL0_FRF_Pos)
 TI mode
More...
 
#define LL_SSI_PROTOCOL_MICROWIRE   (2UL << SSI_CTRL0_FRF_Pos)
 Microwire mode
More...
 
#define LL_SSI_MICROWIRE_HANDSHAKE_DIS   0x00000000UL
 Enable Handshake for Microwire transfer
More...
 
#define LL_SSI_MICROWIRE_HANDSHAKE_EN   (1UL << SSI_MWC_MHS_Pos)
 Disable Handshake for Microwire transfer. More...
 
#define LL_SSI_MICROWIRE_RX   0x00000000UL
 Rx mode. More...
 
#define LL_SSI_MICROWIRE_TX   (1UL << SSI_MWC_MDD_Pos)
 Tx mode. More...
 
#define LL_SSI_MICROWIRE_NON_SEQUENTIAL   0x00000000UL
 Non-sequential for Microwire transfer
More...
 
#define LL_SSI_MICROWIRE_SEQUENTIAL   (1UL << SSI_MWC_MWMOD_Pos)
 Sequential for Microwire transfer
More...
 
#define LL_SSI_SLAVE1   SSI_SE_SLAVE1
 Enable slave1 select pin for SPI transfer
More...
 
#define LL_SSI_SLAVE0   SSI_SE_SLAVE0
 Enable slave0 select pin for SPI transfer
More...
 
#define LL_SSI_DMA_TX_DIS   0x00000000UL
 Disable the transmit FIFO DMA channel. More...
 
#define LL_SSI_DMA_TX_EN   SSI_DMAC_TDMAE
 Enable the transmit FIFO DMA channel
More...
 
#define LL_SSI_DMA_RX_DIS   0x00000000UL
 Disable the receive FIFO DMA channel. More...
 
#define LL_SSI_DMA_RX_EN   SSI_DMAC_RDMAE
 Enable the receive FIFO DMA channel
More...
 
#define LL_SSI_INSTSIZE_0BIT   0x00000000UL
 Instruction length for QSPI transfer: 0 bits. More...
 
#define LL_SSI_INSTSIZE_4BIT   (1UL << SSI_SCTRL0_INSTL_Pos)
 Instructoin length for QSPI transfer: 4 bits. More...
 
#define LL_SSI_INSTSIZE_8BIT   (2UL << SSI_SCTRL0_INSTL_Pos)
 Instructoin length for QSPI transfer: 8 bits. More...
 
#define LL_SSI_INSTSIZE_16BIT   (3UL << SSI_SCTRL0_INSTL_Pos)
 Instructoin length for QSPI transfer: 16 bits. More...
 
#define LL_SSI_ADDRSIZE_0BIT   0x00000000UL
 Address length for QSPI transfer: 0 bits. More...
 
#define LL_SSI_ADDRSIZE_4BIT   (1UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 4 bits. More...
 
#define LL_SSI_ADDRSIZE_8BIT   (2UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 8 bits. More...
 
#define LL_SSI_ADDRSIZE_12BIT   (3UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 12 bits. More...
 
#define LL_SSI_ADDRSIZE_16BIT   (4UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 16 bits. More...
 
#define LL_SSI_ADDRSIZE_20BIT   (5UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 20 bits. More...
 
#define LL_SSI_ADDRSIZE_24BIT   (6UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 24 bits. More...
 
#define LL_SSI_ADDRSIZE_28BIT   (7UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 28 bits. More...
 
#define LL_SSI_ADDRSIZE_32BIT   (8UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 32 bits. More...
 
#define LL_SSI_ADDRSIZE_36BIT   (9UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 36 bits. More...
 
#define LL_SSI_ADDRSIZE_40BIT   (10UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 40 bits. More...
 
#define LL_SSI_ADDRSIZE_44BIT   (11UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 44 bits. More...
 
#define LL_SSI_ADDRSIZE_48BIT   (12UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 48 bits. More...
 
#define LL_SSI_ADDRSIZE_52BIT   (13UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 52 bits. More...
 
#define LL_SSI_ADDRSIZE_56BIT   (14UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 56 bits. More...
 
#define LL_SSI_ADDRSIZE_60BIT   (15UL << SSI_SCTRL0_ADDRL_Pos)
 Address length for QSPI transfer: 60 bits. More...
 
#define LL_SSI_INST_ADDR_ALL_IN_SPI   0x00000000UL
 Instruction and address are sent in SPI mode. More...
 
#define LL_SSI_INST_IN_SPI_ADDR_IN_SPIFRF   (1UL << SSI_SCTRL0_TRANSTYPE_Pos)
 Instruction is in sent in SPI mode and address is sent in Daul/Quad SPI mode. More...
 
#define LL_SSI_INST_ADDR_ALL_IN_SPIFRF   (2UL << SSI_SCTRL0_TRANSTYPE_Pos)
 Instruction and address are sent in Daul/Quad SPI mode. More...
 
#define LL_SPIM_DEFAULT_CONFIG
 LL SPIM InitStrcut default configuartion. More...
 
#define LL_SPIS_DEFAULT_CONFIG
 LL SPIS InitStrcut default configuartion. More...
 
#define LL_QSPI_DEFAULT_CONFIG
 LL QSPI InitStrcut default configuartion. More...
 
#define LL_SPI_WriteReg(__instance__, __REG__, __VALUE__)   WRITE_REG(__instance__->__REG__, (__VALUE__))
 Write a value in SPI register. More...
 
#define LL_SPI_ReadReg(__instance__, __REG__)   READ_REG(__instance__->__REG__)
 Read a value in SPI register. More...
 

Typedefs

typedef struct _ll_spim_init_t ll_spim_init_t
 LL SPIM init structures definition. More...
 
typedef struct _ll_spis_init_t ll_spis_init_t
 SPIS init structures definition. More...
 
typedef struct _ll_qspi_init_t ll_qspi_init_t
 QSPI init structures definition. More...
 

Functions

__STATIC_INLINE void ll_spi_enable_ss_toggle (ssi_regs_t *SPIx)
 Enable slave select toggle. More...
 
__STATIC_INLINE void ll_spi_disable_ss_toggle (ssi_regs_t *SPIx)
 Disable slave select toggle. More...
 
__STATIC_INLINE uint32_t ll_spi_is_enabled_ss_toggle (ssi_regs_t *SPIx)
 Check if slave select toggle is enabled. More...
 
__STATIC_INLINE void ll_spi_set_frame_format (ssi_regs_t *SPIx, uint32_t frf)
 Set data frame format for transmitting/receiving the data. More...
 
__STATIC_INLINE uint32_t ll_spi_get_frame_format (ssi_regs_t *SPIx)
 Get data frame format for transmitting/receiving the data. More...
 
__STATIC_INLINE void ll_spi_set_data_size (ssi_regs_t *SPIx, uint32_t size)
 Set frame data size. More...
 
__STATIC_INLINE uint32_t ll_spi_get_data_size (ssi_regs_t *SPIx)
 Get frame data size. More...
 
__STATIC_INLINE void ll_spi_set_control_frame_size (ssi_regs_t *SPIx, uint32_t size)
 Set the length of the control word for the Microwire frame format. More...
 
__STATIC_INLINE uint32_t ll_spi_get_control_frame_size (ssi_regs_t *SPIx)
 Get the length of the control word for the Microwire frame format. More...
 
__STATIC_INLINE void ll_spi_enable_test_mode (ssi_regs_t *SPIx)
 Enable SPI test mode. More...
 
__STATIC_INLINE void ll_spi_disable_test_mode (ssi_regs_t *SPIx)
 Disable SPI test mode. More...
 
__STATIC_INLINE uint32_t ll_spi_is_enabled_test_mode (ssi_regs_t *SPIx)
 Check if SPI test mode is enabled. More...
 
__STATIC_INLINE void ll_spi_enable_slave_out (ssi_regs_t *SPIx)
 Enable slave output. More...
 
__STATIC_INLINE void ll_spi_disable_salve_out (ssi_regs_t *SPIx)
 Disable slave output. More...
 
__STATIC_INLINE uint32_t ll_spi_is_enabled_slave_out (ssi_regs_t *SPIx)
 Check if slave output is enabled. More...
 
__STATIC_INLINE void ll_spi_set_transfer_direction (ssi_regs_t *SPIx, uint32_t transfer_direction)
 Set transfer direction mode. More...
 
__STATIC_INLINE uint32_t ll_spi_get_transfer_direction (ssi_regs_t *SPIx)
 Get transfer direction mode. More...
 
__STATIC_INLINE void ll_spi_set_clock_polarity (ssi_regs_t *SPIx, uint32_t clock_polarity)
 Set clock polarity. More...
 
__STATIC_INLINE uint32_t ll_spi_get_clock_polarity (ssi_regs_t *SPIx)
 Get clock polarity. More...
 
__STATIC_INLINE void ll_spi_set_clock_phase (ssi_regs_t *SPIx, uint32_t clock_phase)
 Set clock phase. More...
 
__STATIC_INLINE uint32_t ll_spi_get_clock_phase (ssi_regs_t *SPIx)
 Get clock phase. More...
 
__STATIC_INLINE void ll_spi_set_standard (ssi_regs_t *SPIx, uint32_t standard)
 Set serial protocol used. More...
 
__STATIC_INLINE uint32_t ll_spi_get_standard (ssi_regs_t *SPIx)
 Get serial protocol used. More...
 
__STATIC_INLINE void ll_spi_set_receive_size (ssi_regs_t *SPIx, uint32_t size)
 Set the number of data frames to be continuously received. More...
 
__STATIC_INLINE uint32_t ll_spi_get_receive_size (ssi_regs_t *SPIx)
 Get the number of data frames to be continuously received. More...
 
__STATIC_INLINE void ll_spi_enable (ssi_regs_t *SPIx)
 Enable SPI peripheral. More...
 
__STATIC_INLINE void ll_spi_disable (ssi_regs_t *SPIx)
 Disable SPI peripheral. More...
 
__STATIC_INLINE uint32_t ll_spi_is_enabled (ssi_regs_t *SPIx)
 Check if SPI peripheral is enabled. More...
 
__STATIC_INLINE void ll_spi_enable_micro_handshake (ssi_regs_t *SPIx)
 Enable Handshake in Microwire mode. More...
 
__STATIC_INLINE void ll_spi_disable_micro_handshake (ssi_regs_t *SPIx)
 Disable Handshake in Microwire mode. More...
 
__STATIC_INLINE uint32_t ll_spi_is_enabled_micro_handshake (ssi_regs_t *SPIx)
 Check if Handshake in Microwire mode is enabled. More...
 
__STATIC_INLINE void ll_spi_set_micro_transfer_direction (ssi_regs_t *SPIx, uint32_t transfer_direction)
 Set transfer direction mode in Microwire mode. More...
 
__STATIC_INLINE uint32_t ll_spi_get_micro_transfer_direction (ssi_regs_t *SPIx)
 Get transfer direction mode in Microwire mode. More...
 
__STATIC_INLINE void ll_spi_set_micro_transfer_mode (ssi_regs_t *SPIx, uint32_t transfer_mode)
 Set transfer mode in Microwire mode. More...
 
__STATIC_INLINE uint32_t ll_spi_get_micro_transfer_mode (ssi_regs_t *SPIx)
 Get transfer mode in Microwire mode. More...
 
__STATIC_INLINE void ll_spi_enable_ss (ssi_regs_t *SPIx, uint32_t ss)
 Enable slave select. More...
 
__STATIC_INLINE void ll_spi_disable_ss (ssi_regs_t *SPIx, uint32_t ss)
 Disable slave select. More...
 
__STATIC_INLINE uint32_t ll_spi_is_enabled_ss (ssi_regs_t *SPIx, uint32_t ss)
 Check if slave select is enabled. More...
 
__STATIC_INLINE void ll_spi_set_baud_rate_prescaler (ssi_regs_t *SPIx, uint32_t baud_rate)
 Set baud rate prescaler. More...
 
__STATIC_INLINE uint32_t ll_spi_get_baud_rate_prescaler (ssi_regs_t *SPIx)
 Get baud rate prescaler. More...
 
__STATIC_INLINE void ll_spi_set_tx_fifo_threshold (ssi_regs_t *SPIx, uint32_t threshold)
 Set threshold of TXFIFO that triggers an TXE event. More...
 
__STATIC_INLINE uint32_t ll_spi_get_tx_fifo_threshold (ssi_regs_t *SPIx)
 Get threshold of TXFIFO that triggers an TXE event. More...
 
__STATIC_INLINE void ll_spi_set_rx_fifo_threshold (ssi_regs_t *SPIx, uint32_t threshold)
 Set threshold of RXFIFO that triggers an RXNE event. More...
 
__STATIC_INLINE uint32_t ll_spi_get_rx_fifo_threshold (ssi_regs_t *SPIx)
 Get threshold of RXFIFO that triggers an RXNE event. More...
 
__STATIC_INLINE uint32_t ll_spi_get_tx_fifo_level (ssi_regs_t *SPIx)
 Get FIFO Transmission Level. More...
 
__STATIC_INLINE uint32_t ll_spi_get_rx_fifo_level (ssi_regs_t *SPIx)
 Get FIFO reception Level. More...
 
__STATIC_INLINE uint32_t ll_spi_get_id_code (ssi_regs_t *SPIx)
 Get ID code. More...
 
__STATIC_INLINE uint32_t ll_spi_get_version (ssi_regs_t *SPIx)
 Get IP version. More...
 
__STATIC_INLINE void ll_spi_enable_it (ssi_regs_t *SPIx, uint32_t mask)
 Enable interrupt. More...
 
__STATIC_INLINE void ll_spi_disable_it (ssi_regs_t *SPIx, uint32_t mask)
 Disable interrupt. More...
 
__STATIC_INLINE uint32_t ll_spi_is_enabled_it (ssi_regs_t *SPIx, uint32_t mask)
 Check if interrupt is enabled. More...
 
__STATIC_INLINE uint32_t ll_spi_get_status (ssi_regs_t *SPIx)
 Get SPI status. More...
 
__STATIC_INLINE uint32_t ll_spi_is_active_flag (ssi_regs_t *SPIx, uint32_t flag)
 Check active flag. More...
 
__STATIC_INLINE uint32_t ll_spi_get_it_flag (ssi_regs_t *SPIx)
 Get SPI interrupt flags. More...
 
__STATIC_INLINE uint32_t ll_spi_is_it_flag (ssi_regs_t *SPIx, uint32_t flag)
 Check interrupt flag. More...
 
__STATIC_INLINE uint32_t ll_spi_get_raw_if_flag (ssi_regs_t *SPIx)
 Get SPI raw interrupt flags. More...
 
__STATIC_INLINE void ll_spi_clear_flag_txo (ssi_regs_t *SPIx)
 Clear transmit FIFO overflow error flag. More...
 
__STATIC_INLINE void ll_spi_clear_flag_rxo (ssi_regs_t *SPIx)
 Clear receive FIFO overflow error flag. More...
 
__STATIC_INLINE void ll_spi_clear_flag_rxu (ssi_regs_t *SPIx)
 Clear receive FIFO underflow error flag. More...
 
__STATIC_INLINE void ll_spi_clear_flag_mst (ssi_regs_t *SPIx)
 Clear multi-master error flag. More...
 
__STATIC_INLINE void ll_spi_clear_flag_all (ssi_regs_t *SPIx)
 Clear all error flag. More...
 
__STATIC_INLINE void ll_spi_enable_dma_req_tx (ssi_regs_t *SPIx)
 Enable DMA Tx. More...
 
__STATIC_INLINE void ll_spi_disable_dma_req_tx (ssi_regs_t *SPIx)
 Disable DMA Tx. More...
 
__STATIC_INLINE uint32_t ll_spi_is_enabled_dma_req_tx (ssi_regs_t *SPIx)
 Check if DMA Tx is enabled. More...
 
__STATIC_INLINE void ll_spi_enable_dma_req_rx (ssi_regs_t *SPIx)
 Enable DMA Rx. More...
 
__STATIC_INLINE void ll_spi_disable_dma_req_rx (ssi_regs_t *SPIx)
 Disable DMA Rx. More...
 
__STATIC_INLINE uint32_t ll_spi_is_enabled_dma_req_rx (ssi_regs_t *SPIx)
 Check if DMA Rx is enabled. More...
 
__STATIC_INLINE void ll_spi_set_dma_tx_fifo_threshold (ssi_regs_t *SPIx, uint32_t threshold)
 Set threshold of TXFIFO that triggers an DMA Tx request event. More...
 
__STATIC_INLINE uint32_t ll_spi_get_dma_tx_fifo_threshold (ssi_regs_t *SPIx)
 Get threshold of TXFIFO that triggers an DMA Tx request event. More...
 
__STATIC_INLINE void ll_spi_set_dma_rx_fifo_threshold (ssi_regs_t *SPIx, uint32_t threshold)
 Set threshold of RXFIFO that triggers an DMA Rx request event. More...
 
__STATIC_INLINE uint32_t ll_spi_get_dma_rx_fifo_threshold (ssi_regs_t *SPIx)
 Get threshold of RXFIFO that triggers an DMA Rx request event. More...
 
__STATIC_INLINE void ll_spi_transmit_data8 (ssi_regs_t *SPIx, uint8_t tx_data)
 Write 8-Bits in the data register. More...
 
__STATIC_INLINE void ll_spi_transmit_data16 (ssi_regs_t *SPIx, uint16_t tx_data)
 Write 16-Bits in the data register. More...
 
__STATIC_INLINE void ll_spi_transmit_data32 (ssi_regs_t *SPIx, uint32_t tx_data)
 Write 32-Bits in the data register. More...
 
__STATIC_INLINE uint8_t ll_spi_receive_data8 (ssi_regs_t *SPIx)
 Read 8-Bits in the data register. More...
 
__STATIC_INLINE uint16_t ll_spi_receive_data16 (ssi_regs_t *SPIx)
 Read 16-Bits in the data register. More...
 
__STATIC_INLINE uint32_t ll_spi_receive_data32 (ssi_regs_t *SPIx)
 Read 32-Bits in the data register. More...
 
__STATIC_INLINE void ll_spi_set_rx_sample_delay (ssi_regs_t *SPIx, uint32_t delay)
 Set Rx sample delay. More...
 
__STATIC_INLINE uint32_t ll_spi_get_rx_sample_delay (ssi_regs_t *SPIx)
 Get Rx sample delay. More...
 
__STATIC_INLINE void ll_spi_set_wait_cycles (ssi_regs_t *SPIx, uint32_t wait_cycles)
 Set number of wait cycles in Dual/Quad SPI mode. More...
 
__STATIC_INLINE uint32_t ll_spi_get_wait_cycles (ssi_regs_t *SPIx)
 Get number of wait cycles in Dual/Quad SPI mode. More...
 
__STATIC_INLINE void ll_spi_set_instruction_size (ssi_regs_t *SPIx, uint32_t size)
 Set Dual/Quad SPI mode instruction length in bits. More...
 
__STATIC_INLINE uint32_t ll_spi_get_instruction_size (ssi_regs_t *SPIx)
 Get Dual/Quad SPI mode instruction length in bits. More...
 
__STATIC_INLINE void ll_spi_set_address_size (ssi_regs_t *SPIx, uint32_t size)
 Set Dual/Quad SPI mode address length in bits. More...
 
__STATIC_INLINE uint32_t ll_spi_get_address_size (ssi_regs_t *SPIx)
 Get Dual/Quad SPI mode address length in bits. More...
 
__STATIC_INLINE void ll_spi_set_add_inst_transfer_format (ssi_regs_t *SPIx, uint32_t format)
 Set Dual/Quad SPI mode address and instruction transfer format. More...
 
__STATIC_INLINE uint32_t ll_spi_get_addr_inst_transfer_format (ssi_regs_t *SPIx)
 Get Dual/Quad SPI mode address and instruction transfer format. More...
 
error_status_t ll_spim_deinit (ssi_regs_t *SPIx)
 De-initialize SSI registers (Registers restored to their default values). More...
 
error_status_t ll_spim_init (ssi_regs_t *SPIx, ll_spim_init_t *p_spi_init)
 Initialize SPIM registers according to the specified parameters in p_spi_init. More...
 
void ll_spim_struct_init (ll_spim_init_t *p_spi_init)
 Set each field of a ll_spim_init_t type structure to default value. More...
 
error_status_t ll_spis_deinit (ssi_regs_t *SPIx)
 De-initialize SSI registers (Registers restored to their default values). More...
 
error_status_t ll_spis_init (ssi_regs_t *SPIx, ll_spis_init_t *p_spi_init)
 Initialize SSI registers according to the specified parameters in p_spi_init. More...
 
void ll_spis_struct_init (ll_spis_init_t *p_spi_init)
 Set each field of a ll_spis_init_t type structure to default value. More...
 
error_status_t ll_qspi_deinit (ssi_regs_t *SPIx)
 De-initialize SSI registers (Registers restored to their default values). More...
 
error_status_t ll_qspi_init (ssi_regs_t *SPIx, ll_qspi_init_t *p_spi_init)
 Initialize SSI registers according to the specified parameters in SPI_InitStruct. More...
 
void ll_qspi_struct_init (ll_qspi_init_t *p_spi_init)
 Set each field of a ll_qspi_init_t type structure to default value. More...
 

Detailed Description

Header file containing functions prototypes of SPI LL library.

Author
BLE Driver Team
Attention
Copyright (c) 2019 GOODIX

All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. Neither the name of GOODIX nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Definition in file gr55xx_ll_spi.h.