gr55xx_ll_dma.h File Reference

Header file containing functions prototypes of DMA LL library. More...

#include "gr55xx.h"
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Classes

struct  _ll_dma_init
 LL DMA init Structure definition. More...
 

Macros

#define LL_DMA_CHANNEL_0   ((uint32_t)0x00000000U)
 DMA Channel 0. More...
 
#define LL_DMA_CHANNEL_1   ((uint32_t)0x00000001U)
 DMA Channel 1. More...
 
#define LL_DMA_CHANNEL_2   ((uint32_t)0x00000002U)
 DMA Channel 2. More...
 
#define LL_DMA_CHANNEL_3   ((uint32_t)0x00000003U)
 DMA Channel 3. More...
 
#define LL_DMA_CHANNEL_4   ((uint32_t)0x00000004U)
 DMA Channel 4. More...
 
#define LL_DMA_CHANNEL_5   ((uint32_t)0x00000005U)
 DMA Channel 5. More...
 
#define LL_DMA_CHANNEL_6   ((uint32_t)0x00000006U)
 DMA Channel 6. More...
 
#define LL_DMA_CHANNEL_7   ((uint32_t)0x00000007U)
 DMA Channel 7. More...
 
#define LL_DMA_CHANNEL_ALL   ((uint32_t)0xFFFF0000U)
 DMA Channel all (used only for function ll_dma_deinit(). More...
 
#define LL_DMA_DIRECTION_MEMORY_TO_MEMORY   DMA_CTLL_TT_FC_M2M
 Memory to memory direction
More...
 
#define LL_DMA_DIRECTION_MEMORY_TO_PERIPH   DMA_CTLL_TT_FC_M2P
 Memory to peripheral direction. More...
 
#define LL_DMA_DIRECTION_PERIPH_TO_MEMORY   DMA_CTLL_TT_FC_P2M
 Peripheral to memory direction. More...
 
#define LL_DMA_DIRECTION_PERIPH_TO_PERIPH   DMA_CTLL_TT_FC_P2P
 Peripheral to Peripheral direction. More...
 
#define LL_DMA_MODE_SINGLE_BLOCK   ((uint32_t)0x00000000U)
 Single block. More...
 
#define LL_DMA_MODE_MULTI_BLOCK_SRC_RELOAD   DMA_CFGL_RELOAD_SRC
 Multi-block: src address reload, dst address contiguous. More...
 
#define LL_DMA_MODE_MULTI_BLOCK_DST_RELOAD   DMA_CFGL_RELOAD_DST
 Multi-block: src address contiguous, dst address reload. More...
 
#define LL_DMA_MODE_MULTI_BLOCK_ALL_RELOAD   (DMA_CFGL_RELOAD_SRC | DMA_CFGL_RELOAD_DST)
 Multi-block: src address reload, dst address reload. More...
 
#define LL_DMA_SRC_INCREMENT   DMA_CTLL_SINC_INC
 Source Address increment. More...
 
#define LL_DMA_SRC_DECREMENT   DMA_CTLL_SINC_DEC
 Source Address decrement. More...
 
#define LL_DMA_SRC_NO_CHANGE   DMA_CTLL_SINC_NO
 Source Address no change. More...
 
#define LL_DMA_DST_INCREMENT   DMA_CTLL_DINC_INC
 Destination Address increment. More...
 
#define LL_DMA_DST_DECREMENT   DMA_CTLL_DINC_DEC
 Destination Address decrement. More...
 
#define LL_DMA_DST_NO_CHANGE   DMA_CTLL_DINC_NO
 Destination Address no change. More...
 
#define LL_DMA_SRC_BURST_LENGTH_1   DMA_CTLL_SRC_MSIZE_1
 Source Burst length: 1 word. More...
 
#define LL_DMA_SRC_BURST_LENGTH_4   DMA_CTLL_SRC_MSIZE_4
 Source Burst length: 4 words. More...
 
#define LL_DMA_SRC_BURST_LENGTH_8   DMA_CTLL_SRC_MSIZE_8
 Source Burst length: 8 words. More...
 
#define LL_DMA_SRC_BURST_LENGTH_16   DMA_CTLL_SRC_MSIZE_16
 Source Burst length: 16 words. More...
 
#define LL_DMA_SRC_BURST_LENGTH_32   DMA_CTLL_SRC_MSIZE_32
 Source Burst length: 32 words. More...
 
#define LL_DMA_SRC_BURST_LENGTH_64   DMA_CTLL_SRC_MSIZE_64
 Source Burst length: 64 words. More...
 
#define LL_DMA_DST_BURST_LENGTH_1   DMA_CTLL_DST_MSIZE_1
 Destination Burst length: 1 word. More...
 
#define LL_DMA_DST_BURST_LENGTH_4   DMA_CTLL_DST_MSIZE_4
 Destination Burst length: 4 words. More...
 
#define LL_DMA_DST_BURST_LENGTH_8   DMA_CTLL_DST_MSIZE_8
 Destination Burst length: 8 words. More...
 
#define LL_DMA_DST_BURST_LENGTH_16   DMA_CTLL_DST_MSIZE_16
 Destination Burst length: 16 words. More...
 
#define LL_DMA_DST_BURST_LENGTH_32   DMA_CTLL_DST_MSIZE_32
 Destination Burst length: 32 words. More...
 
#define LL_DMA_DST_BURST_LENGTH_64   DMA_CTLL_DST_MSIZE_64
 Destination Burst length: 64 words. More...
 
#define LL_DMA_SDATAALIGN_BYTE   DMA_CTLL_SRC_TR_WIDTH_8
 Source data alignment : Byte
More...
 
#define LL_DMA_SDATAALIGN_HALFWORD   DMA_CTLL_SRC_TR_WIDTH_16
 Source data alignment : HalfWord. More...
 
#define LL_DMA_SDATAALIGN_WORD   DMA_CTLL_SRC_TR_WIDTH_32
 Source data alignment : Word
More...
 
#define LL_DMA_DDATAALIGN_BYTE   DMA_CTLL_DST_TR_WIDTH_8
 Destination data alignment : Byte
More...
 
#define LL_DMA_DDATAALIGN_HALFWORD   DMA_CTLL_DST_TR_WIDTH_16
 Destination data alignment : HalfWord. More...
 
#define LL_DMA_DDATAALIGN_WORD   DMA_CTLL_DST_TR_WIDTH_32
 Destination data alignment : Word
More...
 
#define LL_DMA_PRIORITY_0   DMA_CFGL_CH_PRIOR_0
 Priority level : 0. More...
 
#define LL_DMA_PRIORITY_1   DMA_CFGL_CH_PRIOR_1
 Priority level : 1. More...
 
#define LL_DMA_PRIORITY_2   DMA_CFGL_CH_PRIOR_2
 Priority level : 2. More...
 
#define LL_DMA_PRIORITY_3   DMA_CFGL_CH_PRIOR_3
 Priority level : 3. More...
 
#define LL_DMA_PRIORITY_4   DMA_CFGL_CH_PRIOR_4
 Priority level : 4. More...
 
#define LL_DMA_PRIORITY_5   DMA_CFGL_CH_PRIOR_5
 Priority level : 5. More...
 
#define LL_DMA_PRIORITY_6   DMA_CFGL_CH_PRIOR_6
 Priority level : 6. More...
 
#define LL_DMA_PRIORITY_7   DMA_CFGL_CH_PRIOR_7
 Priority level : 7. More...
 
#define LL_DMA_SHANDSHAKING_HW   ((uint32_t)0x00000000U)
 Source: hardware handshake. More...
 
#define LL_DMA_SHANDSHAKING_SW   DMA_CFGL_HS_SEL_SRC
 Source: software handshake. More...
 
#define LL_DMA_DHANDSHAKING_HW   ((uint32_t)0x00000000U)
 Destination: hardware handshake. More...
 
#define LL_DMA_DHANDSHAKING_SW   DMA_CFGL_HS_SEL_DST
 Destination: software handshake. More...
 
#define LL_DMA_PERIPH_SPIM_TX   ((uint32_t)0x00000000U)
 DMA Peripheral type is SPIM TX
More...
 
#define LL_DMA_PERIPH_SPIM_RX   ((uint32_t)0x00000001U)
 DMA Peripheral type is SPIM RX
More...
 
#define LL_DMA_PERIPH_SPIS_TX   ((uint32_t)0x00000002U)
 DMA Peripheral type is SPIS TX
More...
 
#define LL_DMA_PERIPH_SPIS_RX   ((uint32_t)0x00000003U)
 DMA Peripheral type is SPIS RX
More...
 
#define LL_DMA_PERIPH_QSPI0_TX   ((uint32_t)0x00000004U)
 DMA Peripheral type is QSPI0 TX
More...
 
#define LL_DMA_PERIPH_QSPI0_RX   ((uint32_t)0x00000005U)
 DMA Peripheral type is QSPI0 RX
More...
 
#define LL_DMA_PERIPH_I2C0_TX   ((uint32_t)0x00000006U)
 DMA Peripheral type is I2C0 TX
More...
 
#define LL_DMA_PERIPH_I2C0_RX   ((uint32_t)0x00000007U)
 DMA Peripheral type is I2C0 RX
More...
 
#define LL_DMA_PERIPH_I2C1_TX   ((uint32_t)0x00000008U)
 DMA Peripheral type is I2C1 TX
More...
 
#define LL_DMA_PERIPH_I2C1_RX   ((uint32_t)0x00000009U)
 DMA Peripheral type is I2C1 RX
More...
 
#define LL_DMA_PERIPH_I2S_S_TX   ((uint32_t)0x00000008U)
 DMA Peripheral type is I2S_S TX
More...
 
#define LL_DMA_PERIPH_I2S_S_RX   ((uint32_t)0x00000009U)
 DMA Peripheral type is I2S_S RX
More...
 
#define LL_DMA_PERIPH_UART0_TX   ((uint32_t)0x0000000AU)
 DMA Peripheral type is UART0 TX
More...
 
#define LL_DMA_PERIPH_UART0_RX   ((uint32_t)0x0000000BU)
 DMA Peripheral type is UART0 RX
More...
 
#define LL_DMA_PERIPH_QSPI1_TX   ((uint32_t)0x0000000CU)
 DMA peripheral type is QSPI1 TX
More...
 
#define LL_DMA_PERIPH_QSPI1_RX   ((uint32_t)0x0000000DU)
 DMA peripheral type is QSPI1 RX
More...
 
#define LL_DMA_PERIPH_I2S_M_TX   ((uint32_t)0x0000000CU)
 DMA Peripheral type is I2S_M TX
More...
 
#define LL_DMA_PERIPH_I2S_M_RX   ((uint32_t)0x0000000DU)
 DMA Peripheral type is I2S_M RX
More...
 
#define LL_DMA_PERIPH_SNSADC   ((uint32_t)0x0000000EU)
 DMA peripheral type is SNSADC
More...
 
#define LL_DMA_PERIPH_MEM   ((uint32_t)0x0000000FU)
 DMA peripheral type is Memory
More...
 
#define LL_DMA_WriteReg(__instance__, __REG__, __VALUE__)   WRITE_REG(__instance__.__REG__, (__VALUE__))
 Write a value in DMA register. More...
 
#define LL_DMA_ReadReg(__instance__, __REG__)   READ_REG(__instance__.__REG__)
 Read a value in DMA register. More...
 

Typedefs

typedef struct _ll_dma_init ll_dma_init_t
 LL DMA init Structure definition. More...
 

Functions

__STATIC_INLINE void ll_dma_enable (dma_regs_t *DMAx)
 Enable DMA Module. More...
 
__STATIC_INLINE void ll_dma_disable (dma_regs_t *DMAx)
 Disable DMA Module. More...
 
__STATIC_INLINE uint32_t ll_dma_is_enable (dma_regs_t *DMAx)
 Check if DMA Module is enabled or disabled. More...
 
__STATIC_INLINE void ll_dma_enable_channel (dma_regs_t *DMAx, uint32_t channel)
 Enable DMA channel. More...
 
__STATIC_INLINE void ll_dma_disable_channel (dma_regs_t *DMAx, uint32_t channel)
 Disable DMA channel. More...
 
__STATIC_INLINE uint32_t ll_dma_is_enabled_channel (dma_regs_t *DMAx, uint32_t channel)
 Check if DMA channel is enabled or disabled. More...
 
__STATIC_INLINE void ll_dma_suspend_channel (dma_regs_t *DMAx, uint32_t channel)
 Suspend a DMA channel transfer. More...
 
__STATIC_INLINE void ll_dma_resume_channel (dma_regs_t *DMAx, uint32_t channel)
 Resume a DMA channel. More...
 
__STATIC_INLINE uint32_t ll_dma_is_suspended (dma_regs_t *DMAx, uint32_t channel)
 Check if DMA channel is suspended or resumed. More...
 
__STATIC_INLINE uint32_t ll_dma_is_empty_fifo (dma_regs_t *DMAx, uint32_t channel)
 Check if DMA channel FIFO is empty. More...
 
__STATIC_INLINE void ll_dma_config_transfer (dma_regs_t *DMAx, uint32_t channel, uint32_t configuration)
 Configure all parameters link to DMA transfer. More...
 
__STATIC_INLINE void ll_dma_set_data_transfer_direction (dma_regs_t *DMAx, uint32_t channel, uint32_t direction)
 Set Data transfer direction (read from peripheral or from memory). More...
 
__STATIC_INLINE uint32_t ll_dma_get_data_transfer_direction (dma_regs_t *DMAx, uint32_t channel)
 Get Data transfer direction (read from peripheral or from memory). More...
 
__STATIC_INLINE void ll_dma_set_mode (dma_regs_t *DMAx, uint32_t channel, uint32_t mode)
 Set DMA mode Single block or Multi block. More...
 
__STATIC_INLINE uint32_t ll_dma_get_mode (dma_regs_t *DMAx, uint32_t channel)
 Get DMA mode circular or normal. More...
 
__STATIC_INLINE void ll_dma_set_source_increment_mode (dma_regs_t *DMAx, uint32_t channel, uint32_t src_increment_mode)
 Set Source increment mode. More...
 
__STATIC_INLINE uint32_t ll_dma_get_source_increment_mode (dma_regs_t *DMAx, uint32_t channel)
 Get Source increment mode. More...
 
__STATIC_INLINE void ll_dma_set_destination_increment_mode (dma_regs_t *DMAx, uint32_t channel, uint32_t dst_increment_mode)
 Set Destination increment mode. More...
 
__STATIC_INLINE uint32_t ll_dma_get_destination_increment_mode (dma_regs_t *DMAx, uint32_t channel)
 Get Destination increment mode. More...
 
__STATIC_INLINE void ll_dma_set_source_width (dma_regs_t *DMAx, uint32_t channel, uint32_t src_width)
 Set Source transfer width. More...
 
__STATIC_INLINE uint32_t ll_dma_get_source_width (dma_regs_t *DMAx, uint32_t channel)
 Get Source transfer width. More...
 
__STATIC_INLINE void ll_dma_set_destination_width (dma_regs_t *DMAx, uint32_t channel, uint32_t dst_width)
 Set Destination transfer width. More...
 
__STATIC_INLINE uint32_t ll_dma_get_destination_width (dma_regs_t *DMAx, uint32_t channel)
 Get Destination transfer width. More...
 
__STATIC_INLINE void ll_dma_set_source_burst_length (dma_regs_t *DMAx, uint32_t channel, uint32_t burst_length)
 Set Source Burst Transaction Length. More...
 
__STATIC_INLINE uint32_t ll_dma_get_source_burst_length (dma_regs_t *DMAx, uint32_t channel)
 Get Burst Transaction Length. More...
 
__STATIC_INLINE void ll_dma_set_destination_burst_length (dma_regs_t *DMAx, uint32_t channel, uint32_t burst_length)
 Set Destination Burst Transaction Length. More...
 
__STATIC_INLINE uint32_t ll_dma_get_destination_burst_length (dma_regs_t *DMAx, uint32_t channel)
 Get Destination Burst Transaction Length. More...
 
__STATIC_INLINE void ll_dma_set_channel_priority_level (dma_regs_t *DMAx, uint32_t channel, uint32_t priority)
 Set Channel priority level. More...
 
__STATIC_INLINE uint32_t ll_dma_get_channel_priority_level (dma_regs_t *DMAx, uint32_t channel)
 Get Channel priority level. More...
 
__STATIC_INLINE void ll_dma_set_block_size (dma_regs_t *DMAx, uint32_t channel, uint32_t block_size)
 Set the block size of a transfer. More...
 
__STATIC_INLINE uint32_t ll_dma_get_block_size (dma_regs_t *DMAx, uint32_t channel)
 Get the block size of a transfer. More...
 
__STATIC_INLINE void ll_dma_config_address (dma_regs_t *DMAx, uint32_t channel, uint32_t src_address, uint32_t dst_address, uint32_t direction)
 Configure the Source and Destination addresses. More...
 
__STATIC_INLINE void ll_dma_set_source_address (dma_regs_t *DMAx, uint32_t channel, uint32_t address)
 Set the Source address. More...
 
__STATIC_INLINE void ll_dma_set_destination_address (dma_regs_t *DMAx, uint32_t channel, uint32_t address)
 Set the Destination address. More...
 
__STATIC_INLINE uint32_t ll_dma_get_source_address (dma_regs_t *DMAx, uint32_t channel)
 Get Source address. More...
 
__STATIC_INLINE uint32_t ll_dma_get_destination_address (dma_regs_t *DMAx, uint32_t channel)
 Get Destination address. More...
 
__STATIC_INLINE void ll_dma_set_m2m_src_address (dma_regs_t *DMAx, uint32_t channel, uint32_t address)
 Set the Memory to Memory Source address. More...
 
__STATIC_INLINE void ll_dma_set_m2m_dst_address (dma_regs_t *DMAx, uint32_t channel, uint32_t address)
 Set the Memory to Memory Destination address. More...
 
__STATIC_INLINE uint32_t ll_dma_get_m2m_src_address (dma_regs_t *DMAx, uint32_t channel)
 Get the Memory to Memory Source address. More...
 
__STATIC_INLINE uint32_t ll_dma_get_m2m_dst_address (dma_regs_t *DMAx, uint32_t channel)
 Get the Memory to Memory Destination address. More...
 
__STATIC_INLINE void ll_dma_set_source_peripheral (dma_regs_t *DMAx, uint32_t channel, uint32_t peripheral)
 Set source peripheral for DMA instance on Channel x. More...
 
__STATIC_INLINE uint32_t ll_dma_get_source_peripheral (dma_regs_t *DMAx, uint32_t channel)
 Get source peripheral for DMA instance on Channel x. More...
 
__STATIC_INLINE void ll_dma_set_destination_peripheral (dma_regs_t *DMAx, uint32_t channel, uint32_t peripheral)
 Set destination peripheral for DMA instance on Channel x. More...
 
__STATIC_INLINE uint32_t ll_dma_get_destination_peripheral (dma_regs_t *DMAx, uint32_t channel)
 Get destination peripheral for DMA instance on Channel x. More...
 
__STATIC_INLINE void ll_dma_select_handshaking (dma_regs_t *DMAx, uint32_t channel, uint32_t src_handshaking, uint32_t dst_handshaking)
 Set source and destination source handshaking interface. More...
 
__STATIC_INLINE void ll_dma_req_src_single_transaction (dma_regs_t *DMAx, uint32_t channel)
 Source Single Transaction Request. More...
 
__STATIC_INLINE void ll_dma_req_src_burst_transaction (dma_regs_t *DMAx, uint32_t channel)
 Source Burst Transaction Request. More...
 
__STATIC_INLINE void ll_dma_req_src_last_single_transaction (dma_regs_t *DMAx, uint32_t channel)
 Source Last Single Transaction Request. More...
 
__STATIC_INLINE void ll_dma_req_src_last_burst_transaction (dma_regs_t *DMAx, uint32_t channel)
 Source Last Burst Transaction Request. More...
 
__STATIC_INLINE void ll_dma_req_dst_single_transaction (dma_regs_t *DMAx, uint32_t channel)
 Destination Single Transaction Request. More...
 
__STATIC_INLINE void ll_dma_req_dst_burst_transaction (dma_regs_t *DMAx, uint32_t channel)
 Destination Burst Transaction Request. More...
 
__STATIC_INLINE void ll_dma_req_dst_last_single_transaction (dma_regs_t *DMAx, uint32_t channel)
 Destination Last Single Transaction Request. More...
 
__STATIC_INLINE void ll_dma_req_dst_last_burst_transaction (dma_regs_t *DMAx, uint32_t channel)
 Destination Last Burst Transaction Request. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_gtfr (dma_regs_t *DMAx)
 Get DMA Module global transfer complete interrupt status. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_gblk (dma_regs_t *DMAx)
 Get DMA Module global block complete interrupt status. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_gsrct (dma_regs_t *DMAx)
 Get DMA Module global source transaction complete interrupt status. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_gdstt (dma_regs_t *DMAx)
 Get DMA Module global destination transaction complete interrupt status. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_gerr (dma_regs_t *DMAx)
 Get DMA Module global error interrupt status. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_rtfr (dma_regs_t *DMAx, uint32_t channel)
 Indicate the Raw Status of IntTfr Interrupt flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_rblk (dma_regs_t *DMAx, uint32_t channel)
 Indicate the Raw Status of IntBlock Interrupt flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_rsrct (dma_regs_t *DMAx, uint32_t channel)
 Indicate the Raw Status of IntSrcTran Interrupt flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_rdstt (dma_regs_t *DMAx, uint32_t channel)
 Indicate the Raw Status of IntDstTran Interrupt flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_rerr (dma_regs_t *DMAx, uint32_t channel)
 Indicate the Raw Status of IntErr Interrupt flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_tfr (dma_regs_t *DMAx, uint32_t channel)
 Indicate the status of DMA Channel transfer complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_tfr0 (dma_regs_t *DMAx)
 Indicate the status of Channel 0 transfer complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_tfr1 (dma_regs_t *DMAx)
 Indicate the status of Channel 1 transfer complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_tfr2 (dma_regs_t *DMAx)
 Indicate the status of Channel 2 transfer complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_tfr3 (dma_regs_t *DMAx)
 Indicate the status of Channel 3 transfer complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_tfr4 (dma_regs_t *DMAx)
 Indicate the status of Channel 4 transfer complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_tfr5 (dma_regs_t *DMAx)
 Indicate the status of Channel 5 transfer complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_tfr6 (dma_regs_t *DMAx)
 Indicate the status of Channel 6 transfer complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_tfr7 (dma_regs_t *DMAx)
 Indicate the status of Channel 7 transfer complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_blk (dma_regs_t *DMAx, uint32_t channel)
 Indicate the status of DMA Channel block complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_blk0 (dma_regs_t *DMAx)
 Indicate the status of Channel 0 block complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_blk1 (dma_regs_t *DMAx)
 Indicate the status of Channel 1 block complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_blk2 (dma_regs_t *DMAx)
 Indicate the status of Channel 2 block complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_blk3 (dma_regs_t *DMAx)
 Indicate the status of Channel 3 block complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_blk4 (dma_regs_t *DMAx)
 Indicate the status of Channel 4 block complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_blk5 (dma_regs_t *DMAx)
 Indicate the status of Channel 5 block complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_blk6 (dma_regs_t *DMAx)
 Indicate the status of Channel 6 block complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_blk7 (dma_regs_t *DMAx)
 Indicate the status of Channel 7 block complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_srct (dma_regs_t *DMAx, uint32_t channel)
 Indicate the status of DMA Channel source transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_srct0 (dma_regs_t *DMAx)
 Indicate the status of Channel 0 source transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_srct1 (dma_regs_t *DMAx)
 Indicate the status of Channel 1 source transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_srct2 (dma_regs_t *DMAx)
 Indicate the status of Channel 2 source transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_srct3 (dma_regs_t *DMAx)
 Indicate the status of Channel 3 source transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_srct4 (dma_regs_t *DMAx)
 Indicate the status of Channel 4 source transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_srct5 (dma_regs_t *DMAx)
 Indicate the status of Channel 5 source transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_srct6 (dma_regs_t *DMAx)
 Indicate the status of Channel 6 source transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_srct7 (dma_regs_t *DMAx)
 Indicate the status of Channel 7 source transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_dstt (dma_regs_t *DMAx, uint32_t channel)
 Indicate the status of DMA Channel destination transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_dstt0 (dma_regs_t *DMAx)
 Indicate the status of Channel 0 destination transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_dstt1 (dma_regs_t *DMAx)
 Indicate the status of Channel 1 destination transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_dstt2 (dma_regs_t *DMAx)
 Indicate the status of Channel 2 destination transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_dstt3 (dma_regs_t *DMAx)
 Indicate the status of Channel 3 destination transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_dstt4 (dma_regs_t *DMAx)
 Indicate the status of Channel 4 destination transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_dstt5 (dma_regs_t *DMAx)
 Indicate the status of Channel 5 destination transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_dstt6 (dma_regs_t *DMAx)
 Indicate the status of Channel 6 destination transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_dstt7 (dma_regs_t *DMAx)
 Indicate the status of Channel 7 destination transaction complete flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_err (dma_regs_t *DMAx, uint32_t channel)
 Indicate the status of DMA Channel error flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_err0 (dma_regs_t *DMAx)
 Indicate the status of Channel 0 error flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_err1 (dma_regs_t *DMAx)
 Indicate the status of Channel 1 error flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_err2 (dma_regs_t *DMAx)
 Indicate the status of Channel 2 error flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_err3 (dma_regs_t *DMAx)
 Indicate the status of Channel 3 error flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_err4 (dma_regs_t *DMAx)
 Indicate the status of Channel 4 error flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_err5 (dma_regs_t *DMAx)
 Indicate the status of Channel 5 error flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_err6 (dma_regs_t *DMAx)
 Indicate the status of Channel 6 error flag. More...
 
__STATIC_INLINE uint32_t ll_dma_is_active_flag_err7 (dma_regs_t *DMAx)
 Indicate the status of Channel 7 error flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_tfr (dma_regs_t *DMAx, uint32_t channel)
 Clear DMA Channel transfer complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_tfr0 (dma_regs_t *DMAx)
 Clear Channel 0 transfer complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_tfr1 (dma_regs_t *DMAx)
 Clear Channel 1 transfer complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_tfr2 (dma_regs_t *DMAx)
 Clear Channel 2 transfer complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_tfr3 (dma_regs_t *DMAx)
 Clear Channel 3 transfer complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_tfr4 (dma_regs_t *DMAx)
 Clear Channel 4 transfer complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_tfr5 (dma_regs_t *DMAx)
 Clear Channel 5 transfer complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_tfr6 (dma_regs_t *DMAx)
 Clear Channel 6 transfer complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_tfr7 (dma_regs_t *DMAx)
 Clear Channel 7 transfer complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_blk (dma_regs_t *DMAx, uint32_t channel)
 Clear DMA Channel block complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_blk0 (dma_regs_t *DMAx)
 Clear Channel 0 Block Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_blk1 (dma_regs_t *DMAx)
 Clear Channel 1 Block Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_blk2 (dma_regs_t *DMAx)
 Clear Channel 2 Block Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_blk3 (dma_regs_t *DMAx)
 Clear Channel 3 Block Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_blk4 (dma_regs_t *DMAx)
 Clear Channel 4 Block Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_blk5 (dma_regs_t *DMAx)
 Clear Channel 5 Block Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_blk6 (dma_regs_t *DMAx)
 Clear Channel 6 Block Cmplete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_blk7 (dma_regs_t *DMAx)
 Clear Channel 7 Block Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_srct (dma_regs_t *DMAx, uint32_t channel)
 Clear DMA Channel source transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_srct0 (dma_regs_t *DMAx)
 Clear Channel 0 source transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_srct1 (dma_regs_t *DMAx)
 Clear Channel 1 source transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_srct2 (dma_regs_t *DMAx)
 Clear Channel 2 source transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_srct3 (dma_regs_t *DMAx)
 Clear Channel 3 source transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_srct4 (dma_regs_t *DMAx)
 Clear Channel 4 source transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_srct5 (dma_regs_t *DMAx)
 Clear Channel 5 source transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_srct6 (dma_regs_t *DMAx)
 Clear Channel 6 source transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_srct7 (dma_regs_t *DMAx)
 Clear Channel 7 source transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_dstt (dma_regs_t *DMAx, uint32_t channel)
 Clear DMA Channel destination transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_dstt0 (dma_regs_t *DMAx)
 Clear Channel 0 destination transaction Complete status. More...
 
__STATIC_INLINE void ll_dma_clear_flag_dstt1 (dma_regs_t *DMAx)
 Clear Channel 1 destination transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_dstt2 (dma_regs_t *DMAx)
 Clear Channel 2 destination transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_dstt3 (dma_regs_t *DMAx)
 Clear Channel 3 destination transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_dstt4 (dma_regs_t *DMAx)
 Clear Channel 4 destination transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_dstt5 (dma_regs_t *DMAx)
 Clear Channel 5 destination transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_dstt6 (dma_regs_t *DMAx)
 Clear Channel 6 destination transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_dstt7 (dma_regs_t *DMAx)
 Clear Channel 7 destination transaction Complete flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_err (dma_regs_t *DMAx, uint32_t channel)
 Clear DMA Channel error flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_err0 (dma_regs_t *DMAx)
 Clear Channel 0 error flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_err1 (dma_regs_t *DMAx)
 Clear Channel 1 error flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_err2 (dma_regs_t *DMAx)
 Clear Channel 2 error flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_err3 (dma_regs_t *DMAx)
 Clear Channel 3 error flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_err4 (dma_regs_t *DMAx)
 Clear Channel 4 error flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_err5 (dma_regs_t *DMAx)
 Clear Channel 5 error flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_err6 (dma_regs_t *DMAx)
 Clear Channel 6 error flag. More...
 
__STATIC_INLINE void ll_dma_clear_flag_err7 (dma_regs_t *DMAx)
 Clear Channel 7 error flag. More...
 
__STATIC_INLINE void ll_dma_enable_it_tfr (dma_regs_t *DMAx, uint32_t channel)
 Enable Transfer Complete interrupt. More...
 
__STATIC_INLINE void ll_dma_enable_it_blk (dma_regs_t *DMAx, uint32_t channel)
 Enable Block Complete interrupt. More...
 
__STATIC_INLINE void ll_dma_enable_it_srct (dma_regs_t *DMAx, uint32_t channel)
 Enable source transaction Complete interrupt. More...
 
__STATIC_INLINE void ll_dma_enable_it_dstt (dma_regs_t *DMAx, uint32_t channel)
 Enable destination transaction Complete interrupt. More...
 
__STATIC_INLINE void ll_dma_enable_it_err (dma_regs_t *DMAx, uint32_t channel)
 Enable error interrupt. More...
 
__STATIC_INLINE void ll_dma_disable_it_tfr (dma_regs_t *DMAx, uint32_t channel)
 Disable Transfer Complete interrupt. More...
 
__STATIC_INLINE void ll_dma_disable_it_blk (dma_regs_t *DMAx, uint32_t channel)
 Disable Block Complete interrupt. More...
 
__STATIC_INLINE void ll_dma_disable_it_srct (dma_regs_t *DMAx, uint32_t channel)
 Disable source transaction Complete interrupt. More...
 
__STATIC_INLINE void ll_dma_disable_it_dstt (dma_regs_t *DMAx, uint32_t channel)
 Disable destination transaction Complete interrupt. More...
 
__STATIC_INLINE void ll_dma_disable_it_err (dma_regs_t *DMAx, uint32_t channel)
 Disable error interrupt. More...
 
__STATIC_INLINE uint32_t ll_dma_is_enable_it_tfr (dma_regs_t *DMAx, uint32_t channel)
 Check if DMA Transfer interrupt is enabled or disabled. More...
 
__STATIC_INLINE uint32_t ll_dma_is_enable_it_blk (dma_regs_t *DMAx, uint32_t channel)
 Check if DMA block interrupt is enabled or disabled. More...
 
__STATIC_INLINE uint32_t ll_dma_is_enable_it_srct (dma_regs_t *DMAx, uint32_t channel)
 Check if DMA source transaction interrupt is enabled or disabled. More...
 
__STATIC_INLINE uint32_t ll_dma_is_enable_it_dstt (dma_regs_t *DMAx, uint32_t channel)
 Check if DMA destination transaction interrupt is enabled or disabled. More...
 
__STATIC_INLINE uint32_t ll_dma_is_enable_it_err (dma_regs_t *DMAx, uint32_t channel)
 Check if DMA error interrupt is enabled or disabled. More...
 
__STATIC_INLINE void ll_dma_enable_it (dma_regs_t *DMAx, uint32_t channel)
 Enable DMA channel interrupt. More...
 
__STATIC_INLINE void ll_dma_disable_it (dma_regs_t *DMAx, uint32_t channel)
 Disable DMA channel interrupt. More...
 
error_status_t ll_dma_deinit (dma_regs_t *DMAx, uint32_t channel)
 De-initialize the DMA registers to their default reset values. More...
 
error_status_t ll_dma_init (dma_regs_t *DMAx, uint32_t channel, ll_dma_init_t *p_dma_init)
 Initialize the DMA registers according to the specified parameters in p_dma_init. More...
 
void ll_dma_struct_init (ll_dma_init_t *p_dma_init)
 Set each field of a ll_dma_init_t type structure to default value. More...
 

Detailed Description

Header file containing functions prototypes of DMA LL library.

Author
BLE Driver Team
Attention
Copyright (c) 2019 GOODIX

All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. Neither the name of GOODIX nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Definition in file gr55xx_ll_dma.h.