+ Collaboration diagram for FLAG_Management:

Functions

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_pwr_get_ext_wakeup_status (void)
 Get the External Wake Up Status. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_pwr_clear_ext_wakeup_status (uint32_t wakeup_pin)
 Clear the External Wake Up Status. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_pwr_clear_wakeup_event (uint32_t event)
 Clear the Event that triggered the DeepSleep WakeUp. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_pwr_is_active_flag_psc_cmd_busy (void)
 Indicate if the Power State Controller is in busy state. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_pwr_is_active_flag_comm_deep_sleep_stat (void)
 Indicate if the Communication Core is in Deep Sleep Mode. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_pwr_disable_cache_module (void)
 Disable cache function. More...
 

Detailed Description

Function Documentation

◆ ll_pwr_clear_ext_wakeup_status()

SECTION_RAM_CODE __STATIC_INLINE void ll_pwr_clear_ext_wakeup_status ( uint32_t  wakeup_pin)

Clear the External Wake Up Status.

\rst +-------------------—+--------------------------------—+ | Register | BitsName | +======================+===================================+ | SLP_EVENT | EXT_WKUP_STATUS | +-------------------—+--------------------------------—+ \endrst

Parameters
wakeup_pinThis parameter can be a combination of the following values:
Return values
None

Definition at line 1416 of file gr55xx_ll_pwr.h.

◆ ll_pwr_clear_wakeup_event()

SECTION_RAM_CODE __STATIC_INLINE void ll_pwr_clear_wakeup_event ( uint32_t  event)

Clear the Event that triggered the DeepSleep WakeUp.

\rst +-------------------—+--------------------------------—+ | Register | BitsName | +======================+===================================+ | SLP_EVENT | SMCOSCEN_EVENT | +-------------------—+--------------------------------—+ \endrst SLP_EVENT | TIMER_EVENT SLP_EVENT | EXT_WKUP_EVENT SLP_EVENT | WATCHDOG_EVENT

Parameters
eventThis parameter can be a combination of the following values:
Return values
None

Definition at line 1447 of file gr55xx_ll_pwr.h.

References LL_PWR_WKUP_EVENT_ALL.

◆ ll_pwr_disable_cache_module()

SECTION_RAM_CODE __STATIC_INLINE void ll_pwr_disable_cache_module ( void  )

Disable cache function.

Note
The cache should be closed before chip go to deepsleep.

\rst +-------------------—+--------------------------------—+ | Register | BitsName | +======================+===================================+ | CTRL0 | EN | +-------------------—+--------------------------------—+ \endrst

Return values
None

Definition at line 1505 of file gr55xx_ll_pwr.h.

◆ ll_pwr_get_ext_wakeup_status()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_pwr_get_ext_wakeup_status ( void  )

Get the External Wake Up Status.

Note
0 means not waked up and 1 means waked up.

\rst +-------------------—+--------------------------------—+ | Register | BitsName | +======================+===================================+ | SLP_EVENT | EXT_WKUP_STATUS | +-------------------—+--------------------------------—+ \endrst

Return values
Returnedvalue can be a combination of the following values:

Definition at line 1389 of file gr55xx_ll_pwr.h.

References LL_PWR_EXTWKUP_PIN_ALL.

◆ ll_pwr_is_active_flag_comm_deep_sleep_stat()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_pwr_is_active_flag_comm_deep_sleep_stat ( void  )

Indicate if the Communication Core is in Deep Sleep Mode.

Note
When Communication Core is in Deep Sleep Mode, only low_power_clk is running.

\rst +-------------------—+--------------------------------—+ | Register | BitsName | +======================+===================================+ | MSIO_PAD_CFG_1 | COMM_DEEPSLCNTL_DEEP_SLEEP_STAT | +-------------------—+--------------------------------—+ \endrst

Return values
Stateof bit (1 or 0).

Definition at line 1486 of file gr55xx_ll_pwr.h.

◆ ll_pwr_is_active_flag_psc_cmd_busy()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_pwr_is_active_flag_psc_cmd_busy ( void  )

Indicate if the Power State Controller is in busy state.

Note
This is bit set 1 when the PSC_CMD_REQ[0] is set to 1, and will remain 1 until the PSC_CMD_OPC has been transferred to the PSC.

\rst +-------------------—+--------------------------------—+ | Register | BitsName | +======================+===================================+ | PSC_CMD | MCU_PWR_BUSY | +-------------------—+--------------------------------—+ \endrst

Return values
Stateof bit (1 or 0).

Definition at line 1467 of file gr55xx_ll_pwr.h.