gr55xx_ll_adc.h
Go to the documentation of this file.
1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_adc.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of ADC LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_ADC ADC
47 * @brief ADC LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55XX_LL_ADC_H__
53 #define __GR55XX_LL_ADC_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx.h"
61
62 #if defined(AON)
63
64 /** @defgroup LL_ADC_STRUCTURES Structures
65 * @{
66 */
67
68 /* Exported types ------------------------------------------------------------*/
69 /** @defgroup LL_ADC_ES_INIT ADC Exported init structures
70 * @{
71 */
72
73 /**
74 * @brief LL ADC init Structure definition
75 */
76 typedef struct _ll_adc_init
77 {
78 uint32_t channel_p; /**< Specifies the input source to ADC channel P.
79 This parameter can be any value of @ref LL_ADC_EC_INPUT_SRC.
80
81 This parament can be modified afterwards using unitary function @ref ll_adc_set_channelp(). */
82
83 uint32_t channel_n; /**< Specifies the input source to ADC channel N.
84 This parameter can be any value of @ref LL_ADC_EC_INPUT_SRC.
85
86 This parament can be modified afterwards using unitary function @ref ll_adc_set_channeln(). */
87
88 uint32_t input_mode; /**< Specifies the operation mode for the ADC sample.
89 This parameter can be a value of @ref LL_ADC_EC_INPUT_MODE.
90
91 This parament can be modified afterwards using unitary function @ref ll_adc_set_input_mode(). */
92
93 uint32_t ref_source; /**< Specifies the source of the ADC reference.
94 This parameter can be a value of @ref LL_ADC_EC_REFERENCE_SRC.
95
96 This parament can be modified afterwards using unitary function @ref ll_adc_set_ref().*/
97
98 uint32_t ref_value; /*!< Specifies the value of the ADC buffered reference.
99 This parameter can be a value of @ref LL_ADC_EC_REFERENCE.
100
101 This parament can be modified afterwards using unitary function @ref ll_adc_set_ref_value().*/
102
103 uint32_t clock; /**< Specifies the clock of ADC.
104 This parameter can be a value of @ref LL_ADC_EC_CLK.
105
106 This parament can be modified afterwards using unitary function @ref ll_adc_set_clock().*/
107
108 } ll_adc_init_t;
109
110 /** @} */
111
112 /** @} */
113
114 /**
115 * @defgroup LL_ADC_MACRO Defines
116 * @{
117 */
118
119 /* Exported constants --------------------------------------------------------*/
120 /** @defgroup LL_ADC_Exported_Constants ADC Exported Constants
121 * @{
122 */
123
124 /** @defgroup LL_ADC_EC_CLK ADC CLOCK
125 * @{
126 */
127 #define LL_ADC_CLK_16 (0x00000000UL) /**< 16 MHz */
128 #define LL_ADC_CLK_8 (1UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 8 MHz */
129 #define LL_ADC_CLK_4 (2UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 4 MHz */
130 #define LL_ADC_CLK_2 (3UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 2 MHz */
131 #define LL_ADC_CLK_1P6 (4UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 1.6 MHz */
132 #define LL_ADC_CLK_1 (5UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 1 MHz */
133 /** @} */
134
135 /** @defgroup LL_ADC_EC_REFERENCE ADC Buffered Internal Reference Value
136 * @{
137 */
138 #define LL_ADC_REF_VALUE_0P8 (0x3UL << AON_SNSADC_CFG_REF_VALUE_Pos) /**< Reference = 0.85 V */
139 #define LL_ADC_REF_VALUE_1P2 (0x7UL << AON_SNSADC_CFG_REF_VALUE_Pos) /**< Reference = 1.28 V */
140 #define LL_ADC_REF_VALUE_1P6 (0xAUL << AON_SNSADC_CFG_REF_VALUE_Pos) /**< Reference = 1.60 V */
141 //#define LL_ADC_REF_VALUE_2P0 (0xFUL << AON_SNSADC_CFG_REF_VALUE_Pos) /**< Reference = 2.00 V */
142 /** @} */
143
144 /** @defgroup LL_ADC_EC_INPUT_MODE ADC Input Mode
145 * @{
146 */
147 #define LL_ADC_INPUT_SINGLE (1UL << AON_SNSADC_CFG_SINGLE_EN_Pos) /**< Single ended mode */
148 #define LL_ADC_INPUT_DIFFERENTIAL (0x00000000UL) /**< Differential mode */
149 /** @} */
150
151 /** @defgroup LL_ADC_EC_INPUT_SRC ADC Input Source
152 * @{
153 */
154 #define LL_ADC_INPUT_SRC_IO0 (0UL) /**< Select MSIO0 as input */
155 #define LL_ADC_INPUT_SRC_IO1 (1UL) /**< Select MSIO1 as input */
156 #define LL_ADC_INPUT_SRC_IO2 (2UL) /**< Select MSIO2 as input */
157 #define LL_ADC_INPUT_SRC_IO3 (3UL) /**< Select MSIO3 as input */
158 #define LL_ADC_INPUT_SRC_IO4 (4UL) /**< Select MSIO4 as input */
159 #define LL_ADC_INPUT_SRC_TMP (5UL) /**< Select temperature as input */
160 #define LL_ADC_INPUT_SRC_BAT (6UL) /**< Select Vbattery as input */
161 #define LL_ADC_INPUT_SRC_REF (7UL) /**< Select reference as input */
162
163 /** @} */
164
165 /** @defgroup LL_ADC_EC_REFERENCE_SRC ADC Reference Source
166 * @{
167 */
168 #define LL_ADC_REF_SRC_BUF_INT (0x00000000UL) /**< Select buffered internal reference as reference */
169 #define LL_ADC_REF_SRC_IO0 (3UL << AON_SNSADC_CFG_REF_SEL_Pos) /**< Select MSIO0 as reference */
170 #define LL_ADC_REF_SRC_IO1 (4UL << AON_SNSADC_CFG_REF_SEL_Pos) /**< Select MSIO1 as reference */
171 #define LL_ADC_REF_SRC_IO2 (5UL << AON_SNSADC_CFG_REF_SEL_Pos) /**< Select MSIO2 as reference */
172 #define LL_ADC_REF_SRC_IO3 (6UL << AON_SNSADC_CFG_REF_SEL_Pos) /**< Select MSIO3 as reference */
173 /** @} */
174
175 /** @} */
176
177 /* Exported macro ------------------------------------------------------------*/
178 /** @defgroup LL_ADC_Exported_Macros ADC Exported Macros
179 * @{
180 */
181
182 /** @defgroup LL_ADC_EM_WRITE_READ Common Write and read registers Macros
183 * @{
184 */
185
186 /**
187 * @brief Write a value in ADC register
188 * @param __instance__ ADC instance
189 * @param __REG__ Register to be written
190 * @param __VALUE__ Value to be written in the register
191 * @retval None
192 */
193 #define LL_ADC_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG((__instance__)->__REG__, (__VALUE__))
194
195 /**
196 * @brief Read a value in ADC register
197 * @param __instance__ ADC instance
198 * @param __REG__ Register to be read
199 * @retval Register value
200 */
201 #define LL_ADC_ReadReg(__instance__, __REG__) READ_REG((__instance__)->__REG__)
202
203 /** @} */
204
205 /** @} */
206
207 /* Private types -------------------------------------------------------------*/
208 /* Private variables ---------------------------------------------------------*/
209 /* Private constants ---------------------------------------------------------*/
210 /* Private macros ------------------------------------------------------------*/
211 /** @defgroup LL_ADC_Private_Macros ADC Private Macros
212 * @{
213 */
214
215 /** @defgroup LL_ADC_EC_DEFAULT_CONFIG InitStruct default configuartion
216 * @{
217 */
218
219 /**
220 * @brief LL ADC InitStrcut default configuartion
221 */
222 #define LL_ADC_DEFAULT_CONFIG \
223 { \
224 .channel_p = LL_ADC_INPUT_SRC_IO0, \
225 .channel_n = LL_ADC_INPUT_SRC_IO1, \
226 .input_mode = LL_ADC_INPUT_DIFFERENTIAL, \
227 .ref_source = LL_ADC_REF_SRC_BUF_INT, \
228 .ref_value = LL_ADC_REF_VALUE_1P5, \
229 .clock = LL_ADC_CLK_16 \
230 }
231 /** @} */
232
233 /** @} */
234
235 /** @} */
236
237 /* Exported functions --------------------------------------------------------*/
238 /** @defgroup LL_ADC_DRIVER_FUNCTIONS Functions
239 * @{
240 */
241
242 /** @defgroup LL_ADC_EF_Configuration Basic Configuration
243 * @{
244 */
245
246 /**
247 * @brief Enable ADC module.
248 *
249 * \rst
250 * +----------------------+-----------------------------+
251 * | Register | BitsName |
252 * +======================+=============================+
253 * | SNSADC_CFG | REG4 |
254 * +----------------------+-----------------------------+
255 * \endrst
256 *
257 * @retval None
258 */
259 __STATIC_INLINE void ll_adc_enable(void)
260 {
261 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_EN_Msk);
262 }
263
264 /**
265 * @brief Disable ADC module.
266 *
267 * \rst
268 * +----------------------+-----------------------------+
269 * | Register | BitsName |
270 * +======================+=============================+
271 * | SNSADC_CFG | REG4 |
272 * +----------------------+-----------------------------+
273 * \endrst
274 *
275 * @retval None
276 */
277 __STATIC_INLINE void ll_adc_disable(void)
278 {
279 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_EN_Msk);
280 }
281
282 /**
283 * @brief Check if ADC module is enabled.
284 *
285 * \rst
286 * +----------------------+-----------------------------+
287 * | Register | BitsName |
288 * +======================+=============================+
289 * | SNSADC_CFG | REG4 |
290 * +----------------------+-----------------------------+
291 * \endrst
292 *
293 * @retval State of bit (1 or 0).
294 */
295 __STATIC_INLINE uint32_t ll_adc_is_enabled(void)
296 {
297 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_EN_Msk) == (AON_SNSADC_CFG_EN_Msk));
298 }
299
300 /**
301 * @brief Enable ADC clock.
302 *
303 * \rst
304 * +----------------------+-----------------------------+
305 * | Register | BitsName |
306 * +======================+=============================+
307 * | MSIO_PAD_CFG_1 | ADC_CLK_EN |
308 * +----------------------+-----------------------------+
309 * \endrst
310 *
311 * @retval None
312 */
313 __STATIC_INLINE void ll_adc_enable_clock(void)
314 {
315 GLOBAL_EXCEPTION_DISABLE();
316 SET_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_EN);
317 GLOBAL_EXCEPTION_ENABLE();
318 }
319
320 /**
321 * @brief Disable ADC clock.
322 *
323 * \rst
324 * +----------------------+-----------------------------+
325 * | Register | BitsName |
326 * +======================+=============================+
327 * | MSIO_PAD_CFG_1 | ADC_CLK_EN |
328 * +----------------------+-----------------------------+
329 * \endrst
330 *
331 * @retval None
332 */
333 __STATIC_INLINE void ll_adc_disable_clock(void)
334 {
335 GLOBAL_EXCEPTION_DISABLE();
336 CLEAR_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_EN);
337 GLOBAL_EXCEPTION_ENABLE();
338 }
339
340 /**
341 * @brief Check if ADC clock is enabled.
342 *
343 * \rst
344 * +----------------------+-----------------------------+
345 * | Register | BitsName |
346 * +======================+=============================+
347 * | MSIO_PAD_CFG_1 | ADC_CLK_EN |
348 * +----------------------+-----------------------------+
349 * \endrst
350 *
351 * @retval State of bit (1 or 0).
352 */
353 __STATIC_INLINE uint32_t ll_adc_is_enabled_clock(void)
354 {
355 return (READ_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_EN) == (AON_MSIO_PAD_CFG_1_ADC_CLK_EN));
356 }
357
358 /**
359 * @brief Set ADC clock source.
360 *
361 * \rst
362 * +----------------------+-----------------------------+
363 * | Register | BitsName |
364 * +======================+=============================+
365 * | MSIO_PAD_CFG_1 | ADC_CLK_SEL |
366 * +----------------------+-----------------------------+
367 * \endrst
368 *
369 * @param clk This parameter can be one of the following values:
370 * @arg @ref LL_ADC_CLK_16
371 * @arg @ref LL_ADC_CLK_8
372 * @arg @ref LL_ADC_CLK_4
373 * @arg @ref LL_ADC_CLK_2
374 * @arg @ref LL_ADC_CLK_1P6
375 * @arg @ref LL_ADC_CLK_1
376 * @retval None
377 */
378 __STATIC_INLINE void ll_adc_set_clock(uint32_t clk)
379 {
380 GLOBAL_EXCEPTION_DISABLE();
381 MODIFY_REG(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_SEL, clk);
382 GLOBAL_EXCEPTION_ENABLE();
383 }
384
385 /**
386 * @brief Return source for ADC clock.
387 *
388 * \rst
389 * +----------------------+-----------------------------+
390 * | Register | BitsName |
391 * +======================+=============================+
392 * | MSIO_PAD_CFG_1 | ADC_CLK_SEL |
393 * +----------------------+-----------------------------+
394 * \endrst
395 *
396 * @retval Returned value can be one of the following values:
397 * @arg @ref LL_ADC_CLK_16
398 * @arg @ref LL_ADC_CLK_8
399 * @arg @ref LL_ADC_CLK_4
400 * @arg @ref LL_ADC_CLK_2
401 * @arg @ref LL_ADC_CLK_1P6
402 * @arg @ref LL_ADC_CLK_1
403 */
404 __STATIC_INLINE uint32_t ll_adc_get_clock(void)
405 {
406 return (uint32_t)(READ_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_SEL) >> AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos);
407 }
408
409 /**
410 * @brief Set ADC bias reference.
411 *
412 * \rst
413 * +----------------------+-----------------------------+
414 * | Register | BitsName |
415 * +======================+=============================+
416 * | SNSADC_CFG | REG1 |
417 * +----------------------+-----------------------------+
418 * \endrst
419 *
420 * @param value This parameter can be one of the following values:
421 * @arg @ref LL_ADC_REF_VALUE_0P8
422 * @arg @ref LL_ADC_REF_VALUE_1P2
423 * @arg @ref LL_ADC_REF_VALUE_1P6
424 * @retval None
425 */
426 __STATIC_INLINE void ll_adc_set_ref_value(uint32_t value)
427 {
428 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_VALUE_Msk, value);
429 }
430
431 /**
432 * @brief Return ADC bias reference.
433 *
434 * \rst
435 * +----------------------+-----------------------------+
436 * | Register | BitsName |
437 * +======================+=============================+
438 * | SNSADC_CFG | REG1 |
439 * +----------------------+-----------------------------+
440 * \endrst
441 *
442 * @retval Returned value can be one of the following values:
443 * @arg @ref LL_ADC_REF_VALUE_0P8
444 * @arg @ref LL_ADC_REF_VALUE_1P2
445 * @arg @ref LL_ADC_REF_VALUE_1P6
446 */
447 __STATIC_INLINE uint32_t ll_adc_get_ref_value(void)
448 {
449 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_VALUE_Msk) >> AON_SNSADC_CFG_REF_VALUE_Pos);
450 }
451
452 /**
453 * @brief Enable temperature sensor.
454 *
455 * \rst
456 * +----------------------+-----------------------------+
457 * | Register | BitsName |
458 * +======================+=============================+
459 * | SNSADC_CFG | REG2 |
460 * +----------------------+-----------------------------+
461 * \endrst
462 *
463 * @retval None
464 */
465 __STATIC_INLINE void ll_adc_enable_temp(void)
466 {
467 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_TEMP_EN_Msk);
468 }
469
470 /**
471 * @brief Disable temperature sensor.
472 *
473 * \rst
474 * +----------------------+-----------------------------+
475 * | Register | BitsName |
476 * +======================+=============================+
477 * | SNSADC_CFG | REG2 |
478 * +----------------------+-----------------------------+
479 * \endrst
480 *
481 * @retval None
482 */
483 __STATIC_INLINE void ll_adc_disable_temp(void)
484 {
485 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_TEMP_EN_Msk);
486 }
487
488 /**
489 * @brief Check if temperature sensor is enabled.
490 *
491 * \rst
492 * +----------------------+-----------------------------+
493 * | Register | BitsName |
494 * +======================+=============================+
495 * | SNSADC_CFG | REG2 |
496 * +----------------------+-----------------------------+
497 * \endrst
498 *
499 * @retval State of bit (1 or 0).
500 */
501 __STATIC_INLINE uint32_t ll_adc_is_enabled_temp(void)
502 {
503 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_TEMP_EN_Msk) == (AON_SNSADC_CFG_TEMP_EN_Msk));
504 }
505
506 /**
507 * @brief Enable Vbattery sensor.
508 *
509 * \rst
510 * +----------------------+-----------------------------+
511 * | Register | BitsName |
512 * +======================+=============================+
513 * | SNSADC_CFG | REG2 |
514 * +----------------------+-----------------------------+
515 * \endrst
516 *
517 * @retval None
518 */
519 __STATIC_INLINE void ll_adc_enable_vbat(void)
520 {
521 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_VBAT_EN_Msk);
522 }
523
524 /**
525 * @brief Disable Vbattery sensor.
526 *
527 * \rst
528 * +----------------------+-----------------------------+
529 * | Register | BitsName |
530 * +======================+=============================+
531 * | SNSADC_CFG | REG2 |
532 * +----------------------+-----------------------------+
533 * \endrst
534 *
535 * @retval None
536 */
537 __STATIC_INLINE void ll_adc_disable_vbat(void)
538 {
539 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_VBAT_EN_Msk);
540 }
541
542 /**
543 * @brief Check if Vbattery sensor is enabled.
544 *
545 * \rst
546 * +----------------------+-----------------------------+
547 * | Register | BitsName |
548 * +======================+=============================+
549 * | SNSADC_CFG | REG2 |
550 * +----------------------+-----------------------------+
551 * \endrst
552 *
553 * @retval State of bit (1 or 0).
554 */
555 __STATIC_INLINE uint32_t ll_adc_is_enabled_vbat(void)
556 {
557 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_VBAT_EN_Msk) == (AON_SNSADC_CFG_VBAT_EN_Msk));
558 }
559
560 /**
561 * @brief Set ADC input mode.
562 *
563 * \rst
564 * +----------------------+-----------------------------+
565 * | Register | BitsName |
566 * +======================+=============================+
567 * | SNSADC_CFG | REG2 |
568 * +----------------------+-----------------------------+
569 * \endrst
570 *
571 * @param mode This parameter can be one of the following values:
572 * @arg @ref LL_ADC_INPUT_SINGLE
573 * @arg @ref LL_ADC_INPUT_DIFFERENTIAL
574 * @retval None
575 */
576 __STATIC_INLINE void ll_adc_set_input_mode(uint32_t mode)
577 {
578 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_SINGLE_EN_Msk, mode);
579 }
580
581 /**
582 * @brief Return ADC input mode.
583 *
584 * \rst
585 * +----------------------+-----------------------------+
586 * | Register | BitsName |
587 * +======================+=============================+
588 * | SNSADC_CFG | REG2 |
589 * +----------------------+-----------------------------+
590 * \endrst
591 *
592 * @retval Returned value can be one of the following values:
593 * @arg @ref LL_ADC_INPUT_SINGLE
594 * @arg @ref LL_ADC_INPUT_DIFFERENTIAL
595 */
596 __STATIC_INLINE uint32_t ll_adc_get_input_mode(void)
597 {
598 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_SINGLE_EN_Msk) >> AON_SNSADC_CFG_SINGLE_EN_Pos);
599 }
600
601 /**
602 * @brief Enable offset calibration.
603 * @note Enable offset calibration, used to swap inputs of comparator for offset
604 * calibration.
605 *
606 * \rst
607 * +----------------------+-----------------------------+
608 * | Register | BitsName |
609 * +======================+=============================+
610 * | SNSADC_CFG | REG2 |
611 * +----------------------+-----------------------------+
612 * \endrst
613 *
614 * @retval None
615 */
616 __STATIC_INLINE void ll_adc_enable_ofs_cal(void)
617 {
618 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_OFS_CAL_EN_Msk);
619 }
620
621 /**
622 * @brief Disable offset calibration.
623 *
624 * \rst
625 * +----------------------+-----------------------------+
626 * | Register | BitsName |
627 * +======================+=============================+
628 * | SNSADC_CFG | REG2 |
629 * +----------------------+-----------------------------+
630 * \endrst
631 *
632 * @retval None
633 */
634 __STATIC_INLINE void ll_adc_disable_ofs_cal(void)
635 {
636 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_OFS_CAL_EN_Msk);
637 }
638
639 /**
640 * @brief Check if offset calibration is enabled.
641 *
642 * \rst
643 * +----------------------+-----------------------------+
644 * | Register | BitsName |
645 * +======================+=============================+
646 * | SNSADC_CFG | REG2 |
647 * +----------------------+-----------------------------+
648 * \endrst
649 *
650 * @retval State of bit (1 or 0).
651 */
652 __STATIC_INLINE uint32_t ll_adc_is_enabled_ofs_cal(void)
653 {
654 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_OFS_CAL_EN_Msk) == (AON_SNSADC_CFG_OFS_CAL_EN_Msk));
655 }
656
657 /**
658 * @brief Set dynamic rang of ADC.
659 * @note When higher input signal frequencies close to Nyquist rate, you should set 1.
660 *
661 * \rst
662 * +----------------------+-----------------------------+
663 * | Register | BitsName |
664 * +======================+=============================+
665 * | SNSADC_CFG | REG2 |
666 * +----------------------+-----------------------------+
667 * \endrst
668 *
669 * @param rang This parameter can be a value between: 1 ~ 7
670 * @retval None
671 */
672 __STATIC_INLINE void ll_adc_set_dynamic_rang(uint32_t rang)
673 {
674 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_DYMAMIC_Msk, (rang & 0x7) << AON_SNSADC_CFG_DYMAMIC_Pos);
675 }
676
677 /**
678 * @brief Return ADC dynamic rang.
679 *
680 * \rst
681 * +----------------------+-----------------------------+
682 * | Register | BitsName |
683 * +======================+=============================+
684 * | SNSADC_CFG | REG2 |
685 * +----------------------+-----------------------------+
686 * \endrst
687 *
688 * @retval Returned value can be a value between: 1 ~ 7
689 */
690 __STATIC_INLINE uint32_t ll_adc_get_dynamic_rang(void)
691 {
692 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_DYMAMIC_Msk) >> AON_SNSADC_CFG_DYMAMIC_Pos);
693 }
694
695 /**
696 * @brief Set source of ADC input channelP.
697 *
698 * \rst
699 * +----------------------+-----------------------------+
700 * | Register | BitsName |
701 * +======================+=============================+
702 * | SNSADC_CFG | REG3 |
703 * +----------------------+-----------------------------+
704 * \endrst
705 *
706 * @param source This parameter can be one of the following values:
707 * @arg @ref LL_ADC_INPUT_SRC_IO0
708 * @arg @ref LL_ADC_INPUT_SRC_IO1
709 * @arg @ref LL_ADC_INPUT_SRC_IO2
710 * @arg @ref LL_ADC_INPUT_SRC_IO3
711 * @arg @ref LL_ADC_INPUT_SRC_IO4
712 * @arg @ref LL_ADC_INPUT_SRC_TMP
713 * @arg @ref LL_ADC_INPUT_SRC_BAT
714 * @retval None
715 */
716 __STATIC_INLINE void ll_adc_set_channelp(uint32_t source)
717 {
718 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_P_Msk, source << AON_SNSADC_CFG_CHN_P_Pos);
719 }
720
721 /**
722 * @brief Return source of ADC input channelP.
723 *
724 * \rst
725 * +----------------------+-----------------------------+
726 * | Register | BitsName |
727 * +======================+=============================+
728 * | SNSADC_CFG | REG3 |
729 * +----------------------+-----------------------------+
730 * \endrst
731 *
732 * @retval Returned value can be one of the following values:
733 * @arg @ref LL_ADC_INPUT_SRC_IO0
734 * @arg @ref LL_ADC_INPUT_SRC_IO1
735 * @arg @ref LL_ADC_INPUT_SRC_IO2
736 * @arg @ref LL_ADC_INPUT_SRC_IO3
737 * @arg @ref LL_ADC_INPUT_SRC_IO4
738 * @arg @ref LL_ADC_INPUT_SRC_TMP
739 * @arg @ref LL_ADC_INPUT_SRC_BAT
740 */
741 __STATIC_INLINE uint32_t ll_adc_get_channelp(void)
742 {
743 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_P_Msk) >> AON_SNSADC_CFG_CHN_P_Pos);
744 }
745
746 /**
747 * @brief Set source of ADC input channelN.
748 *
749 * \rst
750 * +----------------------+-----------------------------+
751 * | Register | BitsName |
752 * +======================+=============================+
753 * | SNSADC_CFG | REG3 |
754 * +----------------------+-----------------------------+
755 * \endrst
756 *
757 * @param source This parameter can be one of the following values:
758 * @arg @ref LL_ADC_INPUT_SRC_IO0
759 * @arg @ref LL_ADC_INPUT_SRC_IO1
760 * @arg @ref LL_ADC_INPUT_SRC_IO2
761 * @arg @ref LL_ADC_INPUT_SRC_IO3
762 * @arg @ref LL_ADC_INPUT_SRC_IO4
763 * @arg @ref LL_ADC_INPUT_SRC_TMP
764 * @arg @ref LL_ADC_INPUT_SRC_BAT
765 * @retval None
766 */
767 __STATIC_INLINE void ll_adc_set_channeln(uint32_t source)
768 {
769 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_N_Msk, source << AON_SNSADC_CFG_CHN_N_Pos);
770 }
771
772 /**
773 * @brief Return source of ADC input channelN.
774 *
775 * \rst
776 * +----------------------+-----------------------------+
777 * | Register | BitsName |
778 * +======================+=============================+
779 * | SNSADC_CFG | REG3 |
780 * +----------------------+-----------------------------+
781 * \endrst
782 *
783 * @retval Returned value can be one of the following values:
784 * @arg @ref LL_ADC_INPUT_SRC_IO0
785 * @arg @ref LL_ADC_INPUT_SRC_IO1
786 * @arg @ref LL_ADC_INPUT_SRC_IO2
787 * @arg @ref LL_ADC_INPUT_SRC_IO3
788 * @arg @ref LL_ADC_INPUT_SRC_IO4
789 * @arg @ref LL_ADC_INPUT_SRC_TMP
790 * @arg @ref LL_ADC_INPUT_SRC_BAT
791 */
792 __STATIC_INLINE uint32_t ll_adc_get_channeln(void)
793 {
794 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_N_Msk) >> AON_SNSADC_CFG_CHN_N_Pos);
795 }
796
797 /**
798 * @brief Enable ADC MAS_RST.
799 *
800 * \rst
801 * +----------------------+-----------------------------+
802 * | Register | BitsName |
803 * +======================+=============================+
804 * | SNSADC_CFG | REG4 |
805 * +----------------------+-----------------------------+
806 * \endrst
807 *
808 * @retval None
809 */
810 __STATIC_INLINE void ll_adc_enable_mas_rst(void)
811 {
812 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_MAS_RST_Msk);
813 }
814
815 /**
816 * @brief Disable ADC MAS_RST.
817 *
818 * \rst
819 * +----------------------+-----------------------------+
820 * | Register | BitsName |
821 * +======================+=============================+
822 * | SNSADC_CFG | REG4 |
823 * +----------------------+-----------------------------+
824 * \endrst
825 *
826 * @retval None
827 */
828 __STATIC_INLINE void ll_adc_disable_mas_rst(void)
829 {
830 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_MAS_RST_Msk);
831 }
832
833 /**
834 * @brief Check if ADC MAS_RST is enabled.
835 *
836 * \rst
837 * +----------------------+-----------------------------+
838 * | Register | BitsName |
839 * +======================+=============================+
840 * | SNSADC_CFG | REG4 |
841 * +----------------------+-----------------------------+
842 * \endrst
843 *
844 * @retval State of bit (1 or 0).
845 */
846 __STATIC_INLINE uint32_t ll_adc_is_enabled_mas_rst(void)
847 {
848 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_MAS_RST_Msk) == (AON_SNSADC_CFG_MAS_RST_Msk));
849 }
850
851 /**
852 * @brief Set source of ADC reference.
853 *
854 * \rst
855 * +----------------------+-----------------------------+
856 * | Register | BitsName |
857 * +======================+=============================+
858 * | SNSADC_CFG | REG4 |
859 * +----------------------+-----------------------------+
860 * \endrst
861 *
862 * @param source This parameter can be one of the following values:
863 * @arg @ref LL_ADC_REF_SRC_BUF_INT
864 * @arg @ref LL_ADC_REF_SRC_IO0
865 * @arg @ref LL_ADC_REF_SRC_IO1
866 * @arg @ref LL_ADC_REF_SRC_IO2
867 * @arg @ref LL_ADC_REF_SRC_IO3
868 * @retval None
869 */
870 __STATIC_INLINE void ll_adc_set_ref(uint32_t source)
871 {
872 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_SEL_Msk, source);
873 }
874
875 /**
876 * @brief Return source of ADC reference.
877 *
878 * \rst
879 * +----------------------+-----------------------------+
880 * | Register | BitsName |
881 * +======================+=============================+
882 * | SNSADC_CFG | REG4 |
883 * +----------------------+-----------------------------+
884 * \endrst
885 *
886 * @retval Returned value can be one of the following values:
887 * @arg @ref LL_ADC_REF_SRC_BUF_INT
888 * @arg @ref LL_ADC_REF_SRC_IO0
889 * @arg @ref LL_ADC_REF_SRC_IO1
890 * @arg @ref LL_ADC_REF_SRC_IO2
891 * @arg @ref LL_ADC_REF_SRC_IO3
892 */
893 __STATIC_INLINE uint32_t ll_adc_get_ref(void)
894 {
895 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_SEL_Msk) >> AON_SNSADC_CFG_REF_SEL_Pos);
896 }
897
898 /**
899 * @brief Set current of ADC reference circuit.
900 * @note When samples at 100kbps, you should set 0.
901 * When samples at 1mbps, you should set 7.
902 *
903 * \rst
904 * +----------------------+-----------------------------+
905 * | Register | BitsName |
906 * +======================+=============================+
907 * | SNSADC_CFG | REG4 |
908 * +----------------------+-----------------------------+
909 * \endrst
910 *
911 * @param source This parameter can be a value between: 0 ~ 7
912 * @retval None
913 */
914 __STATIC_INLINE void ll_adc_set_ref_current(uint32_t source)
915 {
916 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_HP_Msk, (source & 0x7) << AON_SNSADC_CFG_REF_HP_Pos);
917 }
918
919 /**
920 * @brief Return current of ADC reference circuit.
921 *
922 * \rst
923 * +----------------------+-----------------------------+
924 * | Register | BitsName |
925 * +======================+=============================+
926 * | SNSADC_CFG | REG4 |
927 * +----------------------+-----------------------------+
928 * \endrst
929 *
930 * @retval Returned value can be a value between: 0 ~ 7
931 */
932 __STATIC_INLINE uint32_t ll_adc_get_ref_current(void)
933 {
934 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_HP_Msk) >> AON_SNSADC_CFG_REF_HP_Pos);
935 }
936
937 /** @} */
938
939 /** @defgroup LL_ADC_EF_FIFO_Access FIFO Access
940 * @{
941 */
942
943 /**
944 * @brief Return samples value of ADC by reading FIFO.
945 * @note There are two value in the register, both of them is 16bits.
946 *
947 * \rst
948 * +----------------------+-----------------------------+
949 * | Register | BitsName |
950 * +======================+=============================+
951 * | SENSE_ADC_FIFO | SENSE_ADC_FIFO |
952 * +----------------------+-----------------------------+
953 * \endrst
954 *
955 * @retval Smaples value of input
956 */
957 __STATIC_INLINE uint32_t ll_adc_read_fifo(void)
958 {
959 return (uint32_t)(READ_REG(MCU_SUB->SENSE_ADC_FIFO));
960 }
961
962 /**
963 * @brief Set threshold of ADC FIFO.
964 *
965 * \rst
966 * +----------------------+-----------------------------+
967 * | Register | BitsName |
968 * +======================+=============================+
969 * | SENSE_FF_THRESH | SENSE_FF_THRESH |
970 * +----------------------+-----------------------------+
971 * \endrst
972 *
973 * @param thresh This parameter can be a value between: 0 ~ 64
974 * @retval None
975 */
976 __STATIC_INLINE void ll_adc_set_thresh(uint32_t thresh)
977 {
978 MODIFY_REG(MCU_SUB->SENSE_FF_THRESH, MCU_SUB_SNSADC_FF_THRESH, (thresh & 0x3F) << MCU_SUB_SNSADC_FF_THRESH_Pos);
979 }
980
981 /**
982 * @brief Return threshold of ADC FIFO.
983 *
984 * \rst
985 * +----------------------+-----------------------------+
986 * | Register | BitsName |
987 * +======================+=============================+
988 * | SENSE_FF_THRESH | SENSE_FF_THRESH |
989 * +----------------------+-----------------------------+
990 * \endrst
991 *
992 * @retval Returned value can be a value between: 0 ~ 64
993 */
994 __STATIC_INLINE uint32_t ll_adc_get_thresh(void)
995 {
996 return (uint32_t)(READ_BITS(MCU_SUB->SENSE_FF_THRESH, MCU_SUB_SNSADC_FF_THRESH) >> MCU_SUB_SNSADC_FF_THRESH_Pos);
997 }
998
999 /**
1000 * @brief Check if ADC FIFO is not empty.
1001 *
1002 * \rst
1003 * +----------------------+-----------------------------+
1004 * | Register | BitsName |
1005 * +======================+=============================+
1006 * | SENSE_ADC_STAT | VAL |
1007 * +----------------------+-----------------------------+
1008 * \endrst
1009 *
1010 * @retval State of bit (1 or 0).
1011 */
1012 __STATIC_INLINE uint32_t ll_adc_is_fifo_notempty(void)
1013 {
1014 return (uint32_t)(READ_BITS(MCU_SUB->SENSE_ADC_STAT, MCU_SUB_SNSADC_STAT_VAL) == MCU_SUB_SNSADC_STAT_VAL);
1015 }
1016
1017 /**
1018 * @brief Return count of ADC FIFO.
1019 *
1020 * \rst
1021 * +----------------------+-----------------------------+
1022 * | Register | BitsName |
1023 * +======================+=============================+
1024 * | SENSE_ADC_STAT | FF_COUNT |
1025 * +----------------------+-----------------------------+
1026 * \endrst
1027 *
1028 * @retval Returned value can be a value between: 0 ~ 64
1029 */
1030 __STATIC_INLINE uint32_t ll_adc_get_fifo_count(void)
1031 {
1032 return (uint32_t)(READ_BITS(MCU_SUB->SENSE_ADC_STAT, MCU_SUB_SNSADC_STAT_FF_COUNT) >> MCU_SUB_SNSADC_STAT_FF_COUNT_Pos);
1033 }
1034
1035 /** @} */
1036
1037 /** @defgroup LL_ADC_EF_Init Initialization and de-initialization functions
1038 * @{
1039 */
1040
1041 /**
1042 * @brief De-initialize ADC registers (Registers restored to their default values).
1043 * @retval An error_status_t enumeration value:
1044 * - SUCCESS: ADC registers are de-initialized
1045 * - ERROR: ADC registers are not de-initialized
1046 */
1047 error_status_t ll_adc_deinit(void);
1048
1049 /**
1050 * @brief Initialize ADC registers according to the specified.
1051 * parameters in p_adc_init.
1052 * @param p_adc_init Pointer to a ll_adc_init_t structure that contains the configuration
1053 * information for the specified ADC peripheral.
1054 * @retval An error_status_t enumeration value:
1055 * - SUCCESS: ADC registers are initialized according to p_adc_init content
1056 * - ERROR: Problem occurred during ADC Registers initialization
1057 */
1058 error_status_t ll_adc_init(ll_adc_init_t *p_adc_init);
1059
1060 /**
1061 * @brief Set each field of a @ref ll_adc_init_t type structure to default value.
1062 * @param p_adc_init Pointer to a @ref ll_adc_init_t structure
1063 * whose fields will be set to default values.
1064 * @retval None
1065 */
1066 void ll_adc_struct_init(ll_adc_init_t *p_adc_init);
1067
1068 /** @} */
1069
1070 /** @} */
1071
1072 #endif /* AON */
1073
1074 #ifdef __cplusplus
1075 }
1076 #endif
1077
1078 #endif /* __GR55XX_LL_ADC_H__ */
1079
1080 /** @} */
1081
1082 /** @} */
1083
1084 /** @} */
ll_adc_enable_mas_rst
__STATIC_INLINE void ll_adc_enable_mas_rst(void)
Enable ADC MAS_RST.
Definition: gr55xx_ll_adc.h:810
ll_adc_enable
__STATIC_INLINE void ll_adc_enable(void)
Enable ADC module.
Definition: gr55xx_ll_adc.h:259
ll_adc_deinit
error_status_t ll_adc_deinit(void)
De-initialize ADC registers (Registers restored to their default values).
ll_adc_is_enabled_vbat
__STATIC_INLINE uint32_t ll_adc_is_enabled_vbat(void)
Check if Vbattery sensor is enabled.
Definition: gr55xx_ll_adc.h:555
ll_adc_is_enabled_temp
__STATIC_INLINE uint32_t ll_adc_is_enabled_temp(void)
Check if temperature sensor is enabled.
Definition: gr55xx_ll_adc.h:501
ll_adc_disable_vbat
__STATIC_INLINE void ll_adc_disable_vbat(void)
Disable Vbattery sensor.
Definition: gr55xx_ll_adc.h:537
_ll_adc_init::channel_p
uint32_t channel_p
Specifies the input source to ADC channel P.
Definition: gr55xx_ll_adc.h:78
ll_adc_get_fifo_count
__STATIC_INLINE uint32_t ll_adc_get_fifo_count(void)
Return count of ADC FIFO.
Definition: gr55xx_ll_adc.h:1030
ll_adc_enable_clock
__STATIC_INLINE void ll_adc_enable_clock(void)
Enable ADC clock.
Definition: gr55xx_ll_adc.h:313
ll_adc_get_clock
__STATIC_INLINE uint32_t ll_adc_get_clock(void)
Return source for ADC clock.
Definition: gr55xx_ll_adc.h:404
ll_adc_get_thresh
__STATIC_INLINE uint32_t ll_adc_get_thresh(void)
Return threshold of ADC FIFO.
Definition: gr55xx_ll_adc.h:994
ll_adc_set_thresh
__STATIC_INLINE void ll_adc_set_thresh(uint32_t thresh)
Set threshold of ADC FIFO.
Definition: gr55xx_ll_adc.h:976
ll_adc_is_enabled_ofs_cal
__STATIC_INLINE uint32_t ll_adc_is_enabled_ofs_cal(void)
Check if offset calibration is enabled.
Definition: gr55xx_ll_adc.h:652
ll_adc_get_ref_value
__STATIC_INLINE uint32_t ll_adc_get_ref_value(void)
Return ADC bias reference.
Definition: gr55xx_ll_adc.h:447
ll_adc_get_channelp
__STATIC_INLINE uint32_t ll_adc_get_channelp(void)
Return source of ADC input channelP.
Definition: gr55xx_ll_adc.h:741
ll_adc_is_enabled
__STATIC_INLINE uint32_t ll_adc_is_enabled(void)
Check if ADC module is enabled.
Definition: gr55xx_ll_adc.h:295
ll_adc_is_enabled_clock
__STATIC_INLINE uint32_t ll_adc_is_enabled_clock(void)
Check if ADC clock is enabled.
Definition: gr55xx_ll_adc.h:353
ll_adc_get_input_mode
__STATIC_INLINE uint32_t ll_adc_get_input_mode(void)
Return ADC input mode.
Definition: gr55xx_ll_adc.h:596
_ll_adc_init
LL ADC init Structure definition.
Definition: gr55xx_ll_adc.h:77
ll_adc_set_ref_value
__STATIC_INLINE void ll_adc_set_ref_value(uint32_t value)
Set ADC bias reference.
Definition: gr55xx_ll_adc.h:426
ll_adc_init_t
struct _ll_adc_init ll_adc_init_t
LL ADC init Structure definition.
ll_adc_set_clock
__STATIC_INLINE void ll_adc_set_clock(uint32_t clk)
Set ADC clock source.
Definition: gr55xx_ll_adc.h:378
ll_adc_get_ref_current
__STATIC_INLINE uint32_t ll_adc_get_ref_current(void)
Return current of ADC reference circuit.
Definition: gr55xx_ll_adc.h:932
_ll_adc_init::ref_value
uint32_t ref_value
Definition: gr55xx_ll_adc.h:98
ll_adc_enable_ofs_cal
__STATIC_INLINE void ll_adc_enable_ofs_cal(void)
Enable offset calibration.
Definition: gr55xx_ll_adc.h:616
_ll_adc_init::channel_n
uint32_t channel_n
Specifies the input source to ADC channel N.
Definition: gr55xx_ll_adc.h:83
ll_adc_set_input_mode
__STATIC_INLINE void ll_adc_set_input_mode(uint32_t mode)
Set ADC input mode.
Definition: gr55xx_ll_adc.h:576
ll_adc_enable_vbat
__STATIC_INLINE void ll_adc_enable_vbat(void)
Enable Vbattery sensor.
Definition: gr55xx_ll_adc.h:519
ll_adc_set_channeln
__STATIC_INLINE void ll_adc_set_channeln(uint32_t source)
Set source of ADC input channelN.
Definition: gr55xx_ll_adc.h:767
ll_adc_get_ref
__STATIC_INLINE uint32_t ll_adc_get_ref(void)
Return source of ADC reference.
Definition: gr55xx_ll_adc.h:893
_ll_adc_init::input_mode
uint32_t input_mode
Specifies the operation mode for the ADC sample.
Definition: gr55xx_ll_adc.h:88
ll_adc_set_channelp
__STATIC_INLINE void ll_adc_set_channelp(uint32_t source)
Set source of ADC input channelP.
Definition: gr55xx_ll_adc.h:716
ll_adc_disable_temp
__STATIC_INLINE void ll_adc_disable_temp(void)
Disable temperature sensor.
Definition: gr55xx_ll_adc.h:483
ll_adc_disable
__STATIC_INLINE void ll_adc_disable(void)
Disable ADC module.
Definition: gr55xx_ll_adc.h:277
ll_adc_init
error_status_t ll_adc_init(ll_adc_init_t *p_adc_init)
Initialize ADC registers according to the specified.
_ll_adc_init::ref_source
uint32_t ref_source
Specifies the source of the ADC reference.
Definition: gr55xx_ll_adc.h:93
ll_adc_get_channeln
__STATIC_INLINE uint32_t ll_adc_get_channeln(void)
Return source of ADC input channelN.
Definition: gr55xx_ll_adc.h:792
ll_adc_set_ref
__STATIC_INLINE void ll_adc_set_ref(uint32_t source)
Set source of ADC reference.
Definition: gr55xx_ll_adc.h:870
ll_adc_is_enabled_mas_rst
__STATIC_INLINE uint32_t ll_adc_is_enabled_mas_rst(void)
Check if ADC MAS_RST is enabled.
Definition: gr55xx_ll_adc.h:846
ll_adc_struct_init
void ll_adc_struct_init(ll_adc_init_t *p_adc_init)
Set each field of a ll_adc_init_t type structure to default value.
ll_adc_disable_ofs_cal
__STATIC_INLINE void ll_adc_disable_ofs_cal(void)
Disable offset calibration.
Definition: gr55xx_ll_adc.h:634
ll_adc_enable_temp
__STATIC_INLINE void ll_adc_enable_temp(void)
Enable temperature sensor.
Definition: gr55xx_ll_adc.h:465
ll_adc_disable_mas_rst
__STATIC_INLINE void ll_adc_disable_mas_rst(void)
Disable ADC MAS_RST.
Definition: gr55xx_ll_adc.h:828
ll_adc_set_dynamic_rang
__STATIC_INLINE void ll_adc_set_dynamic_rang(uint32_t rang)
Set dynamic rang of ADC.
Definition: gr55xx_ll_adc.h:672
ll_adc_disable_clock
__STATIC_INLINE void ll_adc_disable_clock(void)
Disable ADC clock.
Definition: gr55xx_ll_adc.h:333
_ll_adc_init::clock
uint32_t clock
Specifies the clock of ADC.
Definition: gr55xx_ll_adc.h:103
ll_adc_is_fifo_notempty
__STATIC_INLINE uint32_t ll_adc_is_fifo_notempty(void)
Check if ADC FIFO is not empty.
Definition: gr55xx_ll_adc.h:1012
ll_adc_set_ref_current
__STATIC_INLINE void ll_adc_set_ref_current(uint32_t source)
Set current of ADC reference circuit.
Definition: gr55xx_ll_adc.h:914
ll_adc_read_fifo
__STATIC_INLINE uint32_t ll_adc_read_fifo(void)
Return samples value of ADC by reading FIFO.
Definition: gr55xx_ll_adc.h:957
ll_adc_get_dynamic_rang
__STATIC_INLINE uint32_t ll_adc_get_dynamic_rang(void)
Return ADC dynamic rang.
Definition: gr55xx_ll_adc.h:690