gr55xx_hal_xqspi.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_hal_xqspi.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of XQSPI HAL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup HAL_DRIVER HAL Driver
43 * @{
44 */
45
46 /** @defgroup HAL_XQSPI XQSPI
47 * @brief XQSPI HAL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55xx_HAL_XQSPI_H__
53 #define __GR55xx_HAL_XQSPI_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx_ll_xqspi.h"
61 #include "gr55xx_hal_def.h"
62
63 /* Exported types ------------------------------------------------------------*/
64 /** @addtogroup HAL_XQSPI_ENUMERATIONS Enumerations
65 * @{
66 */
67
68 /** @defgroup HAL_XQSPI_state HAL XQSPI state
69 * @{
70 */
71
72 /**
73 * @brief HAL XQSPI State Enumerations definition
74 */
75 typedef enum
76 {
77 HAL_XQSPI_STATE_RESET = 0x00, /**< Peripheral not initialized */
78 HAL_XQSPI_STATE_READY = 0x01, /**< Peripheral initialized and ready for use */
79 HAL_XQSPI_STATE_BUSY = 0x02, /**< Peripheral in indirect mode and busy */
80 HAL_XQSPI_STATE_BUSY_INDIRECT_TX = 0x12, /**< Peripheral in indirect mode with transmission ongoing */
81 HAL_XQSPI_STATE_BUSY_INDIRECT_RX = 0x22, /**< Peripheral in indirect mode with reception ongoing */
82 HAL_XQSPI_STATE_ABORT = 0x08, /**< Peripheral with abort request ongoing */
83 HAL_XQSPI_STATE_ERROR = 0x04 /**< Peripheral in error */
84
85 } hal_xqspi_state_t;
86
87 /** @} */
88
89 /** @} */
90
91 /** @addtogroup HAL_XQSPI_STRUCTURES Structures
92 * @{
93 */
94
95 /** @defgroup XQSPI_Configuration XQSPI Configuration
96 * @{
97 */
98
99 /**
100 * @brief XQSPI init Structure definition
101 */
102 typedef struct _xqspi_init_t
103 {
104 uint32_t work_mode; /**< Specifies the work mode for XQSPI.
105 This parameter can be a value of @ref XQSPI_Work_Mode */
106
107 uint32_t cache_mode; /**< Specifies the cache mode for XIP mode.
108 This parameter can be a value of @ref XQSPI_Cache_Mode */
109
110 uint32_t read_cmd; /**< Specifies the read command for transmit in XIP mode.
111 This parameter can be a value of @ref XQSPI_Read_CMD */
112
113 uint32_t baud_rate; /**< Specifies the serial clock speed for transmit in both XIP and QSPI mode.
114 This parameter can be a value of @ref XQSPI_Baud_Rate */
115
116 uint32_t clock_mode; /**< Specifies the Clock Mode. It indicates the level that clock takes between commands.
117 This parameter can be a value of @ref XQSPI_Clock_Mode */
118
119 } xqspi_init_t;
120 /** @} */
121
122 /** @defgroup XQSPI_handle XQSPI handle
123 * @{
124 */
125
126 /**
127 * @brief XQSPI handle Structure definition
128 */
129 typedef struct _xqspi_handle_t
130 {
131 xqspi_regs_t *p_instance; /**< XQSPI registers base address */
132
133 xqspi_init_t init; /**< XQSPI communication parameters */
134
135 uint8_t *p_tx_buffer; /**< Pointer to XQSPI Tx transfer Buffer */
136
137 __IO uint32_t tx_xfer_size; /**< XQSPI Tx Transfer size */
138
139 __IO uint32_t tx_xfer_count; /**< XQSPI Tx Transfer Counter */
140
141 uint8_t *p_rx_buffer; /**< Pointer to XQSPI Rx transfer Buffer */
142
143 __IO uint32_t rx_xfer_size; /**< XQSPI Rx Transfer size */
144
145 __IO uint32_t rx_xfer_count; /**< XQSPI Rx Transfer Counter */
146
147 __IO hal_lock_t lock; /**< Locking object */
148
149 __IO hal_xqspi_state_t state; /**< XQSPI communication state */
150
151 __IO uint32_t error_code; /**< XQSPI Error code */
152
153 uint32_t retry; /**< Retry for the XQSPI flag access */
154
155 } xqspi_handle_t;
156 /** @} */
157
158 /** @defgroup XQSPI_Command XQSPI command
159 * @{
160 */
161
162 /**
163 * @brief XQSPI command Structure definition
164 */
165 typedef struct _xqspi_command_t
166 {
167 uint32_t inst; /**< Specifies the Instruction to be sent.
168 This parameter can be a value (8-bit) between 0x00 and 0xFF */
169
170 uint32_t addr; /**< Specifies the Address to be sent (Size from 1 to 4 bytes according to AddressSize).
171 This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF */
172
173 uint32_t inst_size; /**< Specifies the Instruction Size.
174 This parameter can be a value of @ref XQSPI_Instruction_Size */
175
176 uint32_t addr_size; /**< Specifies the Address Size.
177 This parameter can be a value of @ref XQSPI_Address_Size */
178
179 uint32_t dummy_cycles; /**< Specifies the Number of Dummy Cycles.
180 This parameter can be a number between 0 and 31 */
181
182 uint32_t inst_addr_mode; /**< Specifies the Instruction and Address Mode.
183 This parameter can be a value of @ref XQSPI_Inst_Addr_Mode */
184
185 uint32_t data_mode; /**< Specifies the Data Mode (used for dummy cycles and data phases).
186 This parameter can be a value of @ref XQSPI_Data_Mode */
187
188 uint32_t length; /**< Specifies the number of data to transfer. (This is the number of bytes).
189 This parameter can be any value between 0 and 0xFFFFFFFF (0 means undefined length
190 until end of memory) */
191
192 } xqspi_command_t;
193 /** @} */
194
195 /** @} */
196
197 /** @addtogroup HAL_XQSPI_CALLBACK_STRUCTURES Callback Structures
198 * @{
199 */
200
201 /** @defgroup HAL_XQSPI_Callback Callback
202 * @{
203 */
204
205 /**
206 * @brief HAL_XQSPI Callback function definition
207 */
208
209 typedef struct _hal_xqspi_callback
210 {
211 void (*xqspi_msp_init)(xqspi_handle_t *p_xqspi); /**< XQSPI init MSP callback */
212 void (*xqspi_msp_deinit)(xqspi_handle_t *p_xqspi); /**< XQSPI de-init MSP callback */
213 } hal_xqspi_callback_t;
214
215 /** @} */
216
217 /** @} */
218
219 /**
220 * @defgroup HAL_XQSPI_MACRO Defines
221 * @{
222 */
223
224 /* Exported constants --------------------------------------------------------*/
225 /** @defgroup XQSPI_Exported_Constants XQSPI Exported Constants
226 * @{
227 */
228
229 /** @defgroup XQSPI_Error_Code XQSPI Error Code
230 * @{
231 */
232 #define HAL_XQSPI_ERROR_NONE ((uint32_t)0x00000000) /**< No error */
233 #define HAL_XQSPI_ERROR_TIMEOUT ((uint32_t)0x00000001) /**< Timeout error */
234 #define HAL_XQSPI_ERROR_TRANSFER ((uint32_t)0x00000002) /**< Transfer error */
235 #define HAL_XQSPI_ERROR_INVALID_PARAM ((uint32_t)0x00000008) /**< Invalid parameter error */
236 /** @} */
237
238 /** @defgroup XQSPI_Work_Mode XQSPI Work Mode
239 * @{
240 */
241 #define XQSPI_WORK_MODE_QSPI LL_XQSPI_MODE_QSPI /**< Work in QSPI mode */
242 #define XQSPI_WORK_MODE_XIP LL_XQSPI_MODE_XIP /**< Work in XIP mode */
243 /** @} */
244
245 /** @defgroup XQSPI_Cache_Mode XQSPI Cache Mode in XIP mode
246 * @{
247 */
248 #define XQSPI_CACHE_MODE_DIS LL_XQSPI_CACHE_DIS /**< Cache off in XIP mode */
249 #define XQSPI_CACHE_MODE_EN LL_XQSPI_CACHE_EN /**< Cache on in XIP mode */
250 /** @} */
251
252 /** @defgroup XQSPI_Read_CMD XQSPI Read Command in XIP mode
253 * @{
254 */
255 #define XQSPI_READ_CMD_READ LL_XQSPI_XIP_CMD_READ /**< Read mode */
256 #define XQSPI_READ_CMD_FAST_READ LL_XQSPI_XIP_CMD_FAST_READ /**< Fast Read mode */
257 #define XQSPI_READ_CMD_DUAL_OUT_READ LL_XQSPI_XIP_CMD_DUAL_OUT_READ /**< Dual-Out Fast Read mode */
258 #define XQSPI_READ_CMD_DUAL_IO_READ LL_XQSPI_XIP_CMD_DUAL_IO_READ /**< Dual-IO Fast Read mode */
259 #define XQSPI_READ_CMD_QUAD_OUT_READ LL_XQSPI_XIP_CMD_QUAD_OUT_READ /**< Quad-Out Fast Read mode */
260 #define XQSPI_READ_CMD_QUAD_IO_READ LL_XQSPI_XIP_CMD_QUAD_IO_READ /**< Quad-IO Fast Read mode */
261 /** @} */
262
263 /** @defgroup XQSPI_Clock_Mode XQSPI Clock Mode
264 * @{
265 */
266 #define XQSPI_CLOCK_MODE_0 ((LL_XQSPI_SCPOL_LOW << 1) | LL_XQSPI_SCPHA_1EDGE) /**< Inactive state of CLK is low,
267 CLK toggles at the start of first data bit */
268 #define XQSPI_CLOCK_MODE_1 ((LL_XQSPI_SCPOL_LOW << 1) | LL_XQSPI_SCPHA_2EDGE) /**< Inactive state of CLK is low,
269 CLK toggles in the middle of first data bit */
270 #define XQSPI_CLOCK_MODE_2 ((LL_XQSPI_SCPOL_HIGH << 1) | LL_XQSPI_SCPHA_1EDGE) /**< Inactive state of CLK is high,
271 CLK toggles at the start of first data bit */
272 #define XQSPI_CLOCK_MODE_3 ((LL_XQSPI_SCPOL_HIGH << 1) | LL_XQSPI_SCPHA_2EDGE) /**< Inactive state of CLK is high,
273 CLK toggles in the middle of first data bit */
274 /** @} */
275
276 /** @defgroup XQSPI_Baud_Rate XQSPI Clock Speed
277 * @{
278 */
279 #define XQSPI_BAUD_RATE_64M LL_XQSPI_BAUD_RATE_64M /**< Serial clock speed is 64 MHz */
280 #define XQSPI_BAUD_RATE_48M LL_XQSPI_BAUD_RATE_48M /**< Serial clock speed is 48 MHz */
281 #define XQSPI_BAUD_RATE_32M LL_XQSPI_BAUD_RATE_32M /**< Serial clock speed is 32 MHz */
282 #define XQSPI_BAUD_RATE_24M LL_XQSPI_BAUD_RATE_24M /**< Serial clock speed is 24 MHz */
283 #define XQSPI_BAUD_RATE_16M LL_XQSPI_BAUD_RATE_16M /**< Serial clock speed is 16 MHz */
284 /** @} */
285
286 /** @defgroup XQSPI_Data_Mode XQSPI Data Mode, only in QSPI mode
287 * @{
288 */
289 #define XQSPI_DATA_MODE_SPI LL_XQSPI_QSPI_FRF_SPI /**< Standard SPI Frame Format */
290 #define XQSPI_DATA_MODE_DUALSPI LL_XQSPI_QSPI_FRF_DUALSPI /**< Dual-SPI Frame Format */
291 #define XQSPI_DATA_MODE_QUADSPI LL_XQSPI_QSPI_FRF_QUADSPI /**< Quad-SPI Frame Format */
292 /** @} */
293
294 /** @defgroup XQSPI_FIFO_Threshold XQSPI FIFO Threshold, FIFO depth is 64*4bytes, only in QSPI mode
295 * @{
296 */
297 #define XQSPI_FIFO_THRESHOLD_1_8 LL_XQSPI_QSPI_FIFO_WATERMARK_1_8 /**< FIFO depth/8 */
298 #define XQSPI_FIFO_THRESHOLD_1_4 LL_XQSPI_QSPI_FIFO_WATERMARK_1_4 /**< FIFO depth/4 */
299 #define XQSPI_FIFO_THRESHOLD_1_2 LL_XQSPI_QSPI_FIFO_WATERMARK_1_2 /**< FIFO depth/2 */
300 #define XQSPI_FIFO_THRESHOLD_3_4 LL_XQSPI_QSPI_FIFO_WATERMARK_3_4 /**< FIFO depth*3/4 */
301 #define XQSPI_FIFO_DEPTH LL_XQSPI_QSPI_FIFO_DEPTH /**< FIFO full depth */
302 /** @} */
303
304 /** @defgroup XQSPI_Instruction_Size XQSPI Instruction Size, only in QSPI mode
305 * @{
306 */
307 #define XQSPI_INSTSIZE_00_BITS (0) /**< 0-bit (No Instruction) */
308 #define XQSPI_INSTSIZE_08_BITS (1) /**< 8-bit Instruction */
309 #define XQSPI_INSTSIZE_16_BITS (2) /**< 16-bit Instruction */
310 /** @} */
311
312 /** @defgroup XQSPI_Address_Size XQSPI Address Size, only in QSPI mode
313 * @{
314 */
315 #define XQSPI_ADDRSIZE_00_BITS (0) /**< 0-bit (No Address) */
316 #define XQSPI_ADDRSIZE_08_BITS (1) /**< 8-bit Address */
317 #define XQSPI_ADDRSIZE_16_BITS (2) /**< 16-bit Address */
318 #define XQSPI_ADDRSIZE_24_BITS (3) /**< 24-bit Address */
319 #define XQSPI_ADDRSIZE_32_BITS (4) /**< 32-bit Address */
320 /** @} */
321
322 /** @defgroup XQSPI_Inst_Addr_Mode XQSPI Instruction and Address Mode, only in QSPI mode
323 * @{
324 */
325 #define XQSPI_INST_ADDR_ALL_IN_SPI (0) /**< Instruction and address are sent in SPI mode */
326 #define XQSPI_INST_IN_SPI_ADDR_IN_SPIFRF (1) /**< Instruction is sent in SPI mode, and address is sent in Daul/Quad SPI mode */
327 #define XQSPI_INST_ADDR_ALL_IN_SPIFRF (2) /**< Instruction and address are sent in Daul/Quad SPI mode */
328 /** @} */
329
330 /** @defgroup XQSPI_Flags XQSPI Flags, only in QSPI mode
331 * @{
332 */
333 #define XQSPI_FLAG_RFF LL_XQSPI_QSPI_STAT_RFF /**< Rx FIFO full flag */
334 #define XQSPI_FLAG_RFTF LL_XQSPI_QSPI_STAT_RFTF /**< Rx FIFO threshold flag */
335 #define XQSPI_FLAG_RFE LL_XQSPI_QSPI_STAT_RFE /**< Rx FIFO empty flag */
336 #define XQSPI_FLAG_TFF LL_XQSPI_QSPI_STAT_TFF /**< Tx FIFO full flag */
337 #define XQSPI_FLAG_TFTF LL_XQSPI_QSPI_STAT_TFTF /**< Tx FIFO threshold flag */
338 #define XQSPI_FLAG_TFE LL_XQSPI_QSPI_STAT_TFE /**< Tx FIFO empty flag */
339 #define XQSPI_FLAG_BUSY LL_XQSPI_QSPI_STAT_BUSY /**< Busy flag */
340 /** @} */
341
342 /** @defgroup XQSPI_Ctrl_Present Control Present Status, only in XIP mode
343 * @{
344 */
345 #define XQSPI_DISABLE_PRESENT LL_XQSPI_DISABLE_PRESENT /**< Disable Present */
346 #define XQSPI_ENABLE_PRESENT LL_XQSPI_ENABLE_PRESENT /**< Enable Present */
347 /** @} */
348
349 /**
350 * @brief XQSPI_Retry_definition XQSPI Retry definition
351 */
352 #define HAL_XQSPI_RETRY_DEFAULT_VALUE ((uint32_t)1000) /**< 1000 times */
353
354 /** @} */
355
356 /* Exported macro ------------------------------------------------------------*/
357 /** @defgroup XQSPI_Exported_Macros XQSPI Exported Macros
358 * @{
359 */
360
361 /** @brief Reset XQSPI handle states.
362 * @param __HANDLE__ XQSPI handle.
363 * @retval None
364 */
365 #define __HAL_XQSPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->state = HAL_XQSPI_STATE_RESET)
366
367 /** @brief Enable the specified QSPI peripheral in XQSPI.
368 * @param __HANDLE__ specifies the XQSPI Handle.
369 * @retval None
370 */
371 #define __HAL_XQSPI_ENABLE_QSPI(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->QSPI.SPIEN, SSI_SSIEN_EN)
372
373 /** @brief Disable the specified QSPI peripheral in XQSPI.
374 * @param __HANDLE__ specifies the XQSPI Handle.
375 * @retval None
376 */
377 #define __HAL_XQSPI_DISABLE_QSPI(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->QSPI.SPIEN, SSI_SSIEN_EN)
378
379 /** @brief Enable the specified XIP peripheral in XQSPI.
380 * @param __HANDLE__ specifies the XQSPI Handle.
381 * @retval None
382 */
383 #define __HAL_XQSPI_ENABLE_XIP(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->XIP.CTRL3, SSI_SSIEN_EN);\
384 while(!ll_xqspi_get_xip_flag(__HANDLE__->p_instance))
385
386 /** @brief Disable the specified XIP peripheral in XQSPI.
387 * @param __HANDLE__ specifies the XQSPI Handle.
388 * @retval None
389 */
390 #define __HAL_XQSPI_DISABLE_XIP(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->XIP.CTRL3, SSI_SSIEN_EN);\
391 while(ll_xqspi_get_xip_flag(__HANDLE__->p_instance))
392
393 /** @brief Enable the specified CACHE peripheral in XQSPI.
394 * @param __HANDLE__ specifies the XQSPI Handle.
395 * @retval None
396 */
397 #define __HAL_XQSPI_ENABLE_CACHE(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->CACHE.CTRL0, XQSPI_CACHE_CTRL0_DIS)
398
399 /** @brief Disable the specified CACHE peripheral in XQSPI.
400 * @param __HANDLE__ specifies the XQSPI Handle.
401 * @retval None
402 */
403 #define __HAL_XQSPI_DISABLE_CACHE(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->CACHE.CTRL0, XQSPI_CACHE_CTRL0_DIS)
404
405 /** @brief Check whether the specified XQSPI flag is set or not.
406 * @param __HANDLE__ specifies the XQSPI Handle.
407 * @param __FLAG__ specifies the flag to check.
408 * This parameter can be one of the following values:
409 * @arg @ref XQSPI_FLAG_RFF Rx FIFO full flag
410 * @arg @ref XQSPI_FLAG_RFTF Rx FIFO threshold flag
411 * @arg @ref XQSPI_FLAG_RFE Rx FIFO empty flag
412 * @arg @ref XQSPI_FLAG_TFF Tx FIFO full flag
413 * @arg @ref XQSPI_FLAG_TFTF Tx FIFO threshold flag
414 * @arg @ref XQSPI_FLAG_TFE Tx FIFO empty flag
415 * @arg @ref XQSPI_FLAG_BUSY Busy flag
416 * @retval The new state of __FLAG__ (TRUE or FALSE).
417 */
418 #define __HAL_XQSPI_GET_FLAG(__HANDLE__, __FLAG__) ((READ_BITS((__HANDLE__)->p_instance->QSPI.STAT, (__FLAG__)) != 0) ? SET : RESET)
419
420 /** @} */
421
422 /* Private macros ------------------------------------------------------------*/
423 /** @defgroup XQSPI_Private_Macro XQSPI Private Macros
424 * @{
425 */
426
427 /** @brief Check if XQSPI Work Mode is valid.
428 * @param __MODE__ XQSPI Work Mode.
429 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
430 */
431 #define IS_XQSPI_WORK_MODE(__MODE__) (((__MODE__) == XQSPI_WORK_MODE_QSPI) || \
432 ((__MODE__) == XQSPI_WORK_MODE_XIP))
433
434 /** @brief Check if XQSPI Cache Mode is valid.
435 * @param __MODE__ XQSPI Cache Mode.
436 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
437 */
438 #define IS_XQSPI_CACHE_MODE(__MODE__) (((__MODE__) == XQSPI_CACHE_MODE_DIS) || \
439 ((__MODE__) == XQSPI_CACHE_MODE_EN))
440
441 /** @brief Check if XQSPI Read CMD is valid.
442 * @param __CMD__ XQSPI Cache Mode.
443 * @retval SET (__CMD__ is valid) or RESET (__CMD__ is invalid)
444 */
445 #define IS_XQSPI_READ_CMD(__CMD__) (((__CMD__) == XQSPI_READ_CMD_READ ) || \
446 ((__CMD__) == XQSPI_READ_CMD_FAST_READ ) || \
447 ((__CMD__) == XQSPI_READ_CMD_DUAL_OUT_READ) || \
448 ((__CMD__) == XQSPI_READ_CMD_DUAL_IO_READ ) || \
449 ((__CMD__) == XQSPI_READ_CMD_QUAD_OUT_READ) || \
450 ((__CMD__) == XQSPI_READ_CMD_QUAD_IO_READ ))
451
452 /** @brief Check if XQSPI Clock Baud Rate is valid.
453 * @param __BAUD__ XQSPI Clock Baud Rate.
454 * @retval SET (__BAUD__ is valid) or RESET (__BAUD__ is invalid)
455 */
456 #define IS_XQSPI_BAUD_RATE(__BAUD__) (((__BAUD__) == XQSPI_BAUD_RATE_64M) || \
457 ((__BAUD__) == XQSPI_BAUD_RATE_48M) || \
458 ((__BAUD__) == XQSPI_BAUD_RATE_32M) || \
459 ((__BAUD__) == XQSPI_BAUD_RATE_24M) || \
460 ((__BAUD__) == XQSPI_BAUD_RATE_16M))
461
462 /** @brief Check if XQSPI Clock Mode is valid.
463 * @param __CLKMODE__ XQSPI Clock Mode.
464 * @retval SET (__CLKMODE__ is valid) or RESET (__CLKMODE__ is invalid)
465 */
466 #define IS_XQSPI_CLOCK_MODE(__CLKMODE__) (((__CLKMODE__) == XQSPI_CLOCK_MODE_0) || \
467 ((__CLKMODE__) == XQSPI_CLOCK_MODE_1) || \
468 ((__CLKMODE__) == XQSPI_CLOCK_MODE_2) || \
469 ((__CLKMODE__) == XQSPI_CLOCK_MODE_3))
470
471 /** @brief Check if XQSPI FIFO Threshold is valid.
472 * @param __THR__ XQSPI FIFO Threshold.
473 * @retval SET (__THR__ is valid) or RESET (__THR__ is invalid)
474 */
475 #define IS_XQSPI_FIFO_THRESHOLD(__THR__) (((__THR__) == XQSPI_FIFO_THRESHOLD_1_8) || \
476 ((__THR__) == XQSPI_FIFO_THRESHOLD_1_4) || \
477 ((__THR__) == XQSPI_FIFO_THRESHOLD_1_2) || \
478 ((__THR__) == XQSPI_FIFO_THRESHOLD_3_4))
479
480 /** @brief Check if XQSPI Instruction Size is valid.
481 * @param __INST_SIZE__ XQSPI Instruction Size.
482 * @retval SET (__INST_SIZE__ is valid) or RESET (__INST_SIZE__ is invalid)
483 */
484 #define IS_XQSPI_INSTRUCTION_SIZE(__INST_SIZE__) (((__INST_SIZE__) == XQSPI_INSTSIZE_00_BITS) || \
485 ((__INST_SIZE__) == XQSPI_INSTSIZE_08_BITS) || \
486 ((__INST_SIZE__) == XQSPI_INSTSIZE_16_BITS))
487
488 /** @brief Check if XQSPI Address Size is valid.
489 * @param __ADDR_SIZE__ XQSPI Address Size .
490 * @retval SET (__ADDR_SIZE__ is valid) or RESET (__ADDR_SIZE__ is invalid)
491 */
492 #define IS_XQSPI_ADDRESS_SIZE(__ADDR_SIZE__) (((__ADDR_SIZE__) == XQSPI_ADDRSIZE_00_BITS) || \
493 ((__ADDR_SIZE__) == XQSPI_ADDRSIZE_08_BITS) || \
494 ((__ADDR_SIZE__) == XQSPI_ADDRSIZE_16_BITS) || \
495 ((__ADDR_SIZE__) == XQSPI_ADDRSIZE_24_BITS) || \
496 ((__ADDR_SIZE__) == XQSPI_ADDRSIZE_32_BITS))
497
498 /** @brief Check if XQSPI Instruction and Address Mode is valid.
499 * @param __MODE__ XQSPI Instruction and Address Mode.
500 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
501 */
502 #define IS_XQSPI_INSTADDR_MODE(__MODE__) (((__MODE__) == XQSPI_INST_ADDR_ALL_IN_SPI) || \
503 ((__MODE__) == XQSPI_INST_IN_SPI_ADDR_IN_SPIFRF) || \
504 ((__MODE__) == XQSPI_INST_ADDR_ALL_IN_SPIFRF))
505
506 /** @brief Check if XQSPI Data Mode is valid.
507 * @param __MODE__ XQSPI Data Mode.
508 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
509 */
510 #define IS_XQSPI_DATA_MODE(__MODE__) (((__MODE__) == XQSPI_DATA_MODE_SPI) || \
511 ((__MODE__) == XQSPI_DATA_MODE_DUALSPI) || \
512 ((__MODE__) == XQSPI_DATA_MODE_QUADSPI))
513
514 /** @} */
515
516 /** @} */
517
518
519 /* Exported functions --------------------------------------------------------*/
520 /** @addtogroup HAL_XQSPI_DRIVER_FUNCTIONS Functions
521 * @{
522 */
523
524 /** @defgroup XQSPI_Exported_Functions_Group1 Initialization and de-initialization functions
525 * @brief Initialization and de-initialization functions
526 *
527 @verbatim
528 ===============================================================================
529 ##### Initialization and de-initialization functions #####
530 ===============================================================================
531 [..] This subsection provides a set of functions allowing to initialize and
532 de-initialize the XQSPIx peripheral:
533
534 (+) User must implement hal_xqspi_msp_init() function in which he configures
535 all related peripherals resources (GPIO, DMA, IT and NVIC ).
536
537 (+) Call the function hal_xqspi_init() to configure the selected device with
538 the selected configuration:
539 (++) work_mode
540 (++) cache_mode
541 (++) read_cmd
542 (++) baud_rate
543 (++) clock_mode
544
545 (+) Call the function hal_xqspi_deinit() to restore the default configuration
546 of the selected XQSPIx peripheral.
547
548 @endverbatim
549 * @{
550 */
551
552 /**
553 ****************************************************************************************
554 * @brief Initialize the XQSPI according to the specified parameters
555 * in the xqspi_init_t and initialize the associated handle.
556 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
557 * @retval ::HAL_OK: Operation is OK.
558 * @retval ::HAL_ERROR: Parameter error or operation not supported.
559 * @retval ::HAL_BUSY: Driver is busy.
560 * @retval ::HAL_TIMEOUT: Timeout occurred.
561 ****************************************************************************************
562 */
563 hal_status_t hal_xqspi_init(xqspi_handle_t *p_xqspi);
564
565 /**
566 ****************************************************************************************
567 * @brief De-initialize the XQSPI peripheral.
568 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
569 * @retval ::HAL_OK: Operation is OK.
570 * @retval ::HAL_ERROR: Parameter error or operation not supported.
571 * @retval ::HAL_BUSY: Driver is busy.
572 * @retval ::HAL_TIMEOUT: Timeout occurred.
573 ****************************************************************************************
574 */
575 hal_status_t hal_xqspi_deinit(xqspi_handle_t *p_xqspi);
576
577 /**
578 ****************************************************************************************
579 * @brief Initialize the XQSPI MSP.
580 * @note This function should not be modified. When the callback is needed,
581 the hal_xqspi_msp_deinit can be implemented in the user file.
582 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
583 ****************************************************************************************
584 */
585 void hal_xqspi_msp_init(xqspi_handle_t *p_xqspi);
586
587 /**
588 ****************************************************************************************
589 * @brief De-initialize the XQSPI MSP.
590 * @note This function should not be modified. When the callback is needed,
591 the hal_xqspi_msp_deinit can be implemented in the user file.
592 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
593 ****************************************************************************************
594 */
595 void hal_xqspi_msp_deinit(xqspi_handle_t *p_xqspi);
596
597 /** @} */
598
599 /** @defgroup XQSPI_Exported_Functions_Group2 IO operation functions
600 * @brief Data transfers functions
601 *
602 @verbatim
603 ==============================================================================
604 ##### IO operation functions #####
605 ===============================================================================
606 [..]
607 This subsection provides a set of functions allowing to manage the XQSPI
608 data transfers.
609
610 [..] The XQSPI supports master and slave mode:
611
612 (#) There are one modes of transfer:
613 (++) Blocking mode: The communication is performed in polling mode.
614 The HAL status of all data processing is returned by the same function
615 after finishing transfer.
616
617 (#) APIs provided for only one transfer mode (Blocking mode)
618 exist for 1Line/2Line/4Line (simplex) modes.
619
620 @endverbatim
621 * @{
622 */
623
624 /**
625 ****************************************************************************************
626 * @brief Transmit an amount of data with specified instruction and address in blocking mode.
627 * @note This function is used only in Indirect Write Mode.
628 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
629 * @param[in] p_cmd: Pointer to a xqspi_command_t structure that contains the instruction and address for data transfer.
630 * @param[in] p_data: Pointer to data buffer
631 * @param[in] retry: Repeat times
632 * @retval ::HAL_OK: Operation is OK.
633 * @retval ::HAL_ERROR: Parameter error or operation not supported.
634 * @retval ::HAL_BUSY: Driver is busy.
635 * @retval ::HAL_TIMEOUT: Timeout occurred.
636 ****************************************************************************************
637 */
638 hal_status_t hal_xqspi_command_transmit(xqspi_handle_t *p_xqspi, xqspi_command_t *p_cmd, uint8_t *p_data, uint32_t retry);
639
640 /**
641 ****************************************************************************************
642 * @brief Receive an amount of data with specified instruction and address in blocking mode.
643 * @note This function is used only in Indirect Write Mode.
644 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
645 * @param[in] p_cmd: Pointer to a xqspi_command_t structure that contains the instruction and address for data transfer.
646 * @param[out] p_data: Pointer to data buffer
647 * @param[in] retry: Repeat times
648 * @retval ::HAL_OK: Operation is OK.
649 * @retval ::HAL_ERROR: Parameter error or operation not supported.
650 * @retval ::HAL_BUSY: Driver is busy.
651 * @retval ::HAL_TIMEOUT: Timeout occurred.
652 ****************************************************************************************
653 */
654 hal_status_t hal_xqspi_command_receive(xqspi_handle_t *p_xqspi, xqspi_command_t *p_cmd, uint8_t *p_data, uint32_t retry);
655
656 #if defined RTL_SIM
657 hal_status_t hal_xqspi_command_receive_rtl(xqspi_handle_t *p_xqspi, xqspi_command_t *p_cmd, uint8_t *p_data, uint32_t retry);
658 #endif
659
660
661 /**
662 ****************************************************************************************
663 * @brief Transmit an amount of data in blocking mode.
664 * @note This function is used only in Indirect Write Mode, only in standard SPI mode.
665 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
666 * @param[in] p_data: Pointer to data buffer
667 * @param[in] length: Amount of data to be sent in bytes
668 * @param[in] retry: Repeat times
669 * @retval ::HAL_OK: Operation is OK.
670 * @retval ::HAL_ERROR: Parameter error or operation not supported.
671 * @retval ::HAL_BUSY: Driver is busy.
672 * @retval ::HAL_TIMEOUT: Timeout occurred.
673 ****************************************************************************************
674 */
675 hal_status_t hal_xqspi_transmit(xqspi_handle_t *p_xqspi, uint8_t *p_data, uint32_t length, uint32_t retry);
676
677 /**
678 ****************************************************************************************
679 * @brief Receive an amount of data in blocking mode.
680 * @note This function is used only in Indirect Read Mode, only in standard SPI mode.
681 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
682 * @param[out] p_data: Pointer to data buffer
683 * @param[in] length: Amount of data to be received in bytes
684 * @param[in] retry: Repeat times
685 * @retval ::HAL_OK: Operation is OK.
686 * @retval ::HAL_ERROR: Parameter error or operation not supported.
687 * @retval ::HAL_BUSY: Driver is busy.
688 * @retval ::HAL_TIMEOUT: Timeout occurred.
689 ****************************************************************************************
690 */
691 hal_status_t hal_xqspi_receive(xqspi_handle_t *p_xqspi, uint8_t *p_data, uint32_t length, uint32_t retry);
692
693 /** @} */
694
695 /** @defgroup XQSPI_Exported_Functions_Group3 Peripheral State and Errors functions
696 * @brief XQSPI control functions
697 *
698 @verbatim
699 ===============================================================================
700 ##### Peripheral State and Errors functions #####
701 ===============================================================================
702 [..]
703 This subsection provides a set of functions allowing to control the XQSPI.
704 (+) hal_xqspi_get_state()API can be helpful to check in run-time the state of the XQSPI peripheral.
705 (+) hal_xqspi_get_error() check in run-time Errors occurring during communication.
706 (+) hal_xqspi_set_retry() set the repeat times during internal process.
707 (+) hal_xqspi_set_tx_fifo_threshold() set the TX FIFO Threshold.
708 (+) hal_xqspi_set_rx_fifo_threshold() set the RX FIFO Threshold.
709 (+) hal_xqspi_get_tx_fifo_threshold() get the TX FIFO Threshold.
710 (+) hal_xqspi_get_rx_fifo_threshold() get the RX FIFO Threshold.
711 @endverbatim
712 * @{
713 */
714
715 /**
716 ****************************************************************************************
717 * @brief Return the XQSPI handle state.
718 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
719 * @retval ::HAL_XQSPI_STATE_RESET: Peripheral not initialized.
720 * @retval ::HAL_XQSPI_STATE_READY: Peripheral initialized and ready for use.
721 * @retval ::HAL_XQSPI_STATE_BUSY: Peripheral in indirect mode and busy.
722 * @retval ::HAL_XQSPI_STATE_BUSY_INDIRECT_TX: Peripheral in indirect mode with transmission ongoing.
723 * @retval ::HAL_XQSPI_STATE_BUSY_INDIRECT_RX: Peripheral in indirect mode with reception ongoing.
724 * @retval ::HAL_XQSPI_STATE_ABORT: Peripheral with abort request ongoing.
725 * @retval ::HAL_XQSPI_STATE_ERROR: Peripheral in error.
726 ****************************************************************************************
727 */
728 hal_xqspi_state_t hal_xqspi_get_state(xqspi_handle_t *p_xqspi);
729
730 /**
731 ****************************************************************************************
732 * @brief Return the XQSPI error code.
733 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
734 * @return XQSPI error code in bitmap format
735 ****************************************************************************************
736 */
737 uint32_t hal_xqspi_get_error(xqspi_handle_t *p_xqspi);
738
739 /**
740 ****************************************************************************************
741 * @brief Set the XQSPI internal process repeat times value.
742 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
743 * @param[in] retry: Internal process repeat times value.
744 ****************************************************************************************
745 */
746 void hal_xqspi_set_retry(xqspi_handle_t *p_xqspi, uint32_t retry);
747
748 /**
749 ****************************************************************************************
750 * @brief Set the TXFIFO threshold.
751 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
752 * @param[in] threshold: TX FIFO threshold can be one of the following values:
753 * @arg @ref XQSPI_FIFO_THRESHOLD_1_8 threshold is 8 bytes
754 * @arg @ref XQSPI_FIFO_THRESHOLD_1_4 threshold is 16 bytes
755 * @arg @ref XQSPI_FIFO_THRESHOLD_1_2 threshold is 32 bytes
756 * @arg @ref XQSPI_FIFO_THRESHOLD_3_4 threshold is 48 bytes
757 * @retval ::HAL_OK: Operation is OK.
758 * @retval ::HAL_ERROR: Parameter error or operation not supported.
759 * @retval ::HAL_BUSY: Driver is busy.
760 * @retval ::HAL_TIMEOUT: Timeout occurred.
761 ****************************************************************************************
762 */
763 hal_status_t hal_xqspi_set_tx_fifo_threshold(xqspi_handle_t *p_xqspi, uint32_t threshold);
764
765 /**
766 ****************************************************************************************
767 * @brief Set the RXFIFO threshold.
768 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
769 * @param[in] threshold: RX FIFO threshold can be one of the following values:
770 * @arg @ref XQSPI_FIFO_THRESHOLD_1_8 threshold is 8 bytes
771 * @arg @ref XQSPI_FIFO_THRESHOLD_1_4 threshold is 16 bytes
772 * @arg @ref XQSPI_FIFO_THRESHOLD_1_2 threshold is 32 bytes
773 * @arg @ref XQSPI_FIFO_THRESHOLD_3_4 threshold is 48 bytes
774 * @retval ::HAL_OK: Operation is OK.
775 * @retval ::HAL_ERROR: Parameter error or operation not supported.
776 * @retval ::HAL_BUSY: Driver is busy.
777 * @retval ::HAL_TIMEOUT: Timeout occurred.
778 ****************************************************************************************
779 */
780 hal_status_t hal_xqspi_set_rx_fifo_threshold(xqspi_handle_t *p_xqspi, uint32_t threshold);
781
782 /**
783 ****************************************************************************************
784 * @brief Get the TXFIFO threshold.
785 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
786 * @return TX FIFO threshold
787 ****************************************************************************************
788 */
789 uint32_t hal_xqspi_get_tx_fifo_threshold(xqspi_handle_t *p_xqspi);
790
791 /**
792 ****************************************************************************************
793 * @brief Get the RXFIFO threshold.
794 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
795 * @return RX FIFO threshold
796 ****************************************************************************************
797 */
798 uint32_t hal_xqspi_get_rx_fifo_threshold(xqspi_handle_t *p_xqspi);
799
800 /**
801 ****************************************************************************************
802 * @brief Turn on/off present module, only in XIP mode.
803 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the configuration information for the specified XQSPI module.
804 * @param[in] status: Presen status can be one of the following values:
805 * @arg @ref XQSPI_DISABLE_PRESENT Disable Present
806 * @arg @ref XQSPI_ENABLE_PRESENT Enable Present
807
808 ****************************************************************************************
809 */
810 void hal_xqspi_set_xip_present_status(xqspi_handle_t *p_xqspi, uint32_t status);
811
812 /** @} */
813
814 /** @} */
815
816 #ifdef __cplusplus
817 }
818 #endif
819
820 #endif /* __GR55xx_HAL_XQSPI_H__ */
821
822 /** @} */
823
824 /** @} */
825
826 /** @} */
_xqspi_handle_t::tx_xfer_count
__IO uint32_t tx_xfer_count
XQSPI Tx Transfer Counter
Definition: gr55xx_hal_xqspi.h:139
_hal_xqspi_callback::xqspi_msp_init
void(* xqspi_msp_init)(xqspi_handle_t *p_xqspi)
XQSPI init MSP callback
Definition: gr55xx_hal_xqspi.h:211
hal_xqspi_msp_init
void hal_xqspi_msp_init(xqspi_handle_t *p_xqspi)
Initialize the XQSPI MSP.
_xqspi_init_t::cache_mode
uint32_t cache_mode
Specifies the cache mode for XIP mode.
Definition: gr55xx_hal_xqspi.h:107
hal_lock_t
hal_lock_t
HAL Lock structures definition.
Definition: gr55xx_hal_def.h:81
hal_xqspi_deinit
hal_status_t hal_xqspi_deinit(xqspi_handle_t *p_xqspi)
De-initialize the XQSPI peripheral.
_xqspi_command_t::inst_size
uint32_t inst_size
Specifies the Instruction Size.
Definition: gr55xx_hal_xqspi.h:173
HAL_XQSPI_STATE_BUSY_INDIRECT_TX
@ HAL_XQSPI_STATE_BUSY_INDIRECT_TX
Peripheral in indirect mode with transmission ongoing.
Definition: gr55xx_hal_xqspi.h:80
_xqspi_command_t::inst_addr_mode
uint32_t inst_addr_mode
Specifies the Instruction and Address Mode.
Definition: gr55xx_hal_xqspi.h:182
_xqspi_command_t::addr_size
uint32_t addr_size
Specifies the Address Size.
Definition: gr55xx_hal_xqspi.h:176
hal_xqspi_get_rx_fifo_threshold
uint32_t hal_xqspi_get_rx_fifo_threshold(xqspi_handle_t *p_xqspi)
Get the RXFIFO threshold.
HAL_XQSPI_STATE_RESET
@ HAL_XQSPI_STATE_RESET
Peripheral not initialized
Definition: gr55xx_hal_xqspi.h:77
hal_xqspi_receive
hal_status_t hal_xqspi_receive(xqspi_handle_t *p_xqspi, uint8_t *p_data, uint32_t length, uint32_t retry)
Receive an amount of data in blocking mode.
hal_xqspi_get_state
hal_xqspi_state_t hal_xqspi_get_state(xqspi_handle_t *p_xqspi)
Return the XQSPI handle state.
hal_xqspi_get_error
uint32_t hal_xqspi_get_error(xqspi_handle_t *p_xqspi)
Return the XQSPI error code.
_xqspi_command_t
XQSPI command Structure definition.
Definition: gr55xx_hal_xqspi.h:166
hal_xqspi_state_t
hal_xqspi_state_t
HAL XQSPI State Enumerations definition.
Definition: gr55xx_hal_xqspi.h:76
_xqspi_init_t::work_mode
uint32_t work_mode
Specifies the work mode for XQSPI.
Definition: gr55xx_hal_xqspi.h:104
_xqspi_command_t::addr
uint32_t addr
Specifies the Address to be sent (Size from 1 to 4 bytes according to AddressSize).
Definition: gr55xx_hal_xqspi.h:170
_xqspi_handle_t::retry
uint32_t retry
Retry for the XQSPI flag access
Definition: gr55xx_hal_xqspi.h:153
HAL_XQSPI_STATE_READY
@ HAL_XQSPI_STATE_READY
Peripheral initialized and ready for use
Definition: gr55xx_hal_xqspi.h:78
_xqspi_init_t::clock_mode
uint32_t clock_mode
Specifies the Clock Mode.
Definition: gr55xx_hal_xqspi.h:116
_xqspi_handle_t::p_rx_buffer
uint8_t * p_rx_buffer
Pointer to XQSPI Rx transfer Buffer.
Definition: gr55xx_hal_xqspi.h:141
HAL_XQSPI_STATE_BUSY
@ HAL_XQSPI_STATE_BUSY
Peripheral in indirect mode and busy
Definition: gr55xx_hal_xqspi.h:79
_xqspi_init_t::baud_rate
uint32_t baud_rate
Specifies the serial clock speed for transmit in both XIP and QSPI mode.
Definition: gr55xx_hal_xqspi.h:113
_xqspi_handle_t::init
xqspi_init_t init
XQSPI communication parameters
Definition: gr55xx_hal_xqspi.h:133
_xqspi_handle_t::rx_xfer_count
__IO uint32_t rx_xfer_count
XQSPI Rx Transfer Counter
Definition: gr55xx_hal_xqspi.h:145
hal_xqspi_set_xip_present_status
void hal_xqspi_set_xip_present_status(xqspi_handle_t *p_xqspi, uint32_t status)
Turn on/off present module, only in XIP mode.
_hal_xqspi_callback
HAL_XQSPI Callback function definition.
Definition: gr55xx_hal_xqspi.h:210
_xqspi_init_t::read_cmd
uint32_t read_cmd
Specifies the read command for transmit in XIP mode.
Definition: gr55xx_hal_xqspi.h:110
xqspi_handle_t
struct _xqspi_handle_t xqspi_handle_t
XQSPI handle Structure definition.
hal_xqspi_set_retry
void hal_xqspi_set_retry(xqspi_handle_t *p_xqspi, uint32_t retry)
Set the XQSPI internal process repeat times value.
xqspi_command_t
struct _xqspi_command_t xqspi_command_t
XQSPI command Structure definition.
_xqspi_handle_t
XQSPI handle Structure definition.
Definition: gr55xx_hal_xqspi.h:130
hal_xqspi_set_rx_fifo_threshold
hal_status_t hal_xqspi_set_rx_fifo_threshold(xqspi_handle_t *p_xqspi, uint32_t threshold)
Set the RXFIFO threshold.
_xqspi_handle_t::p_instance
xqspi_regs_t * p_instance
XQSPI registers base address
Definition: gr55xx_hal_xqspi.h:131
hal_xqspi_transmit
hal_status_t hal_xqspi_transmit(xqspi_handle_t *p_xqspi, uint8_t *p_data, uint32_t length, uint32_t retry)
Transmit an amount of data in blocking mode.
HAL_XQSPI_STATE_ABORT
@ HAL_XQSPI_STATE_ABORT
Peripheral with abort request ongoing
Definition: gr55xx_hal_xqspi.h:82
_xqspi_command_t::length
uint32_t length
Specifies the number of data to transfer.
Definition: gr55xx_hal_xqspi.h:188
hal_xqspi_msp_deinit
void hal_xqspi_msp_deinit(xqspi_handle_t *p_xqspi)
De-initialize the XQSPI MSP.
hal_xqspi_command_transmit
hal_status_t hal_xqspi_command_transmit(xqspi_handle_t *p_xqspi, xqspi_command_t *p_cmd, uint8_t *p_data, uint32_t retry)
Transmit an amount of data with specified instruction and address in blocking mode.
_xqspi_init_t
XQSPI init Structure definition.
Definition: gr55xx_hal_xqspi.h:103
_xqspi_handle_t::p_tx_buffer
uint8_t * p_tx_buffer
Pointer to XQSPI Tx transfer Buffer.
Definition: gr55xx_hal_xqspi.h:135
hal_status_t
hal_status_t
HAL Status structures definition.
Definition: gr55xx_hal_def.h:70
_xqspi_handle_t::rx_xfer_size
__IO uint32_t rx_xfer_size
XQSPI Rx Transfer size
Definition: gr55xx_hal_xqspi.h:143
_xqspi_command_t::data_mode
uint32_t data_mode
Specifies the Data Mode (used for dummy cycles and data phases).
Definition: gr55xx_hal_xqspi.h:185
HAL_XQSPI_STATE_BUSY_INDIRECT_RX
@ HAL_XQSPI_STATE_BUSY_INDIRECT_RX
Peripheral in indirect mode with reception ongoing
Definition: gr55xx_hal_xqspi.h:81
hal_xqspi_init
hal_status_t hal_xqspi_init(xqspi_handle_t *p_xqspi)
Initialize the XQSPI according to the specified parameters in the xqspi_init_t and initialize the ass...
hal_xqspi_get_tx_fifo_threshold
uint32_t hal_xqspi_get_tx_fifo_threshold(xqspi_handle_t *p_xqspi)
Get the TXFIFO threshold.
gr55xx_ll_xqspi.h
Header file containing functions prototypes of XQSPI LL library.
_xqspi_handle_t::lock
__IO hal_lock_t lock
Locking object
Definition: gr55xx_hal_xqspi.h:147
HAL_XQSPI_STATE_ERROR
@ HAL_XQSPI_STATE_ERROR
Peripheral in error
Definition: gr55xx_hal_xqspi.h:83
hal_xqspi_callback_t
struct _hal_xqspi_callback hal_xqspi_callback_t
HAL_XQSPI Callback function definition.
_xqspi_handle_t::state
__IO hal_xqspi_state_t state
XQSPI communication state
Definition: gr55xx_hal_xqspi.h:149
_xqspi_handle_t::error_code
__IO uint32_t error_code
XQSPI Error code
Definition: gr55xx_hal_xqspi.h:151
hal_xqspi_command_receive
hal_status_t hal_xqspi_command_receive(xqspi_handle_t *p_xqspi, xqspi_command_t *p_cmd, uint8_t *p_data, uint32_t retry)
Receive an amount of data with specified instruction and address in blocking mode.
_xqspi_command_t::inst
uint32_t inst
Specifies the Instruction to be sent.
Definition: gr55xx_hal_xqspi.h:167
xqspi_init_t
struct _xqspi_init_t xqspi_init_t
XQSPI init Structure definition.
gr55xx_hal_def.h
This file contains HAL common definitions, enumeration, macros and structures definitions.
_xqspi_handle_t::tx_xfer_size
__IO uint32_t tx_xfer_size
XQSPI Tx Transfer size
Definition: gr55xx_hal_xqspi.h:137
_xqspi_command_t::dummy_cycles
uint32_t dummy_cycles
Specifies the Number of Dummy Cycles.
Definition: gr55xx_hal_xqspi.h:179
hal_xqspi_set_tx_fifo_threshold
hal_status_t hal_xqspi_set_tx_fifo_threshold(xqspi_handle_t *p_xqspi, uint32_t threshold)
Set the TXFIFO threshold.
_hal_xqspi_callback::xqspi_msp_deinit
void(* xqspi_msp_deinit)(xqspi_handle_t *p_xqspi)
XQSPI de-init MSP callback
Definition: gr55xx_hal_xqspi.h:212