gr55xx_ll_hmac.h
Go to the documentation of this file.
1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_hmac.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of HMAC LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_HMAC HMAC
47 * @brief HMAC LL module driver.
48 * @{
49 */
50 /* Define to prevent recursive inclusion -------------------------------------*/
51 #ifndef __GR55XX_LL_HMAC_H__
52 #define __GR55XX_LL_HMAC_H__
53
54 #ifdef __cplusplus
55 extern "C" {
56 #endif
57
58 /* Includes ------------------------------------------------------------------*/
59 #include "gr55xx.h"
60
61 #if defined (HMAC)
62
63 /** @defgroup HMAC_LL_STRUCTURES Structures
64 * @{
65 */
66
67 /* Exported types ------------------------------------------------------------*/
68 /** @defgroup HMAC_LL_ES_INIT HMAC Exported Init structures
69 * @{
70 */
71
72 /**
73 * @brief LL HMAC Init Structure definition
74 */
75 typedef struct _ll_hmac_init_t
76 {
77 uint32_t *p_key; /**< Key */
78
79 uint32_t *p_hash; /**< HASH value */
80
81 } ll_hmac_init_t;
82
83 /** @} */
84
85 /** @} */
86
87 /**
88 * @defgroup HMAC_LL_MACRO Defines
89 * @{
90 */
91
92 /* Exported constants --------------------------------------------------------*/
93 /** @defgroup HMAC_LL_Exported_Constants HMAC Exported Constants
94 * @{
95 */
96
97 /** @defgroup HMAC_LL_EC_GET_FLAG Get Flags Defines
98 * @brief Flags definitions which can be used with LL_HMAC_ReadReg function
99 * @{
100 */
101 #define LL_HMAC_FLAG_DATAREADY_SHA HMAC_STATUS_DATAREADY_SHA /**< HMAC data ready(SHA mode) */
102 #define LL_HMAC_FLAG_DATAREADY_HMAC HMAC_STATUS_DATAREADY_HMAC /**< HMAC data ready(HAMC mode) */
103 #define LL_HMAC_FLAG_DMA_MESSAGEDONE HMAC_STATUS_MESSAGEDONE_DMA /**< HMAC dma message done */
104 #define LL_HMAC_FLAG_DMA_DONE HMAC_STATUS_TRANSDONE_DMA /**< HMAC dma transfer done */
105 #define LL_HMAC_FLAG_DMA_ERR HMAC_STATUS_TRANSERR_DMA /**< HMAC dma transfer error */
106 #define LL_HMAC_FLAG_KEY_VALID HMAC_STATUS_KEYVALID /**< HMAC has fetched key */
107 /** @} */
108
109 /** @defgroup HMAC_LL_EC_HASH_MODE Hash Mode
110 * @{
111 */
112 #define LL_HMAC_HASH_STANDARD 0x00000000U /**< Standard Mode */
113 #define LL_HMAC_HASH_USER (1UL << HMAC_CONFIG_ENABLE_USERHASH) /**< User Mode */
114 /** @} */
115
116 /** @defgroup HMAC_LL_EC_CALCULATE_TYPE Calculate Type
117 * @{
118 */
119 #define LL_HMAC_CALCULATETYPE_HMAC 0x00000000U /**< HMAC mode */
120 #define LL_HMAC_CALCULATETYPE_SHA (1UL << HMAC_CONFIG_CALCTYPE_Pos) /**< SHA moe */
121 /** @} */
122
123 /** @defgroup HMAC_LL_EC_KEY_TYPE Key Type
124 * @{
125 */
126 #define LL_HMAC_KEYTYPE_MCU 0x00000000U /**< MCU */
127 #define LL_HMAC_KEYTYPE_AHB (1UL << HMAC_CONFIG_KEYTYPE_Pos) /**< AHB master */
128 #define LL_HMAC_KEYTYPE_KRAM (2UL << HMAC_CONFIG_KEYTYPE_Pos) /**< Key Port */
129 /** @} */
130
131 /** @defgroup HMAC_LL_EC_TRANSFER_SIZE Transfer Size
132 * @{
133 */
134 #define LL_HMAC_DMA_TRANSIZE_MIN (1) /**< Min size = 1 block */
135 #define LL_HMAC_DMA_TRANSIZE_MAX (512) /**< Min size = 512 blocks */
136 /** @} */
137
138 /** @} */
139
140 /* Exported macro ------------------------------------------------------------*/
141 /** @defgroup HMAC_LL_Exported_Macros HMAC Exported Macros
142 * @{
143 */
144
145 /** @defgroup HMAC_LL_EM_WRITE_READ Common Write and read registers Macros
146 * @{
147 */
148
149 /**
150 * @brief Write a value in HMAC register
151 * @param __INSTANCE__ HMAC Instance
152 * @param __REG__ Register to be written
153 * @param __VALUE__ Value to be written in the register
154 * @retval None
155 */
156 #define LL_HMAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
157
158 /**
159 * @brief Read a value in HMAC register
160 * @param __INSTANCE__ HMAC Instance
161 * @param __REG__ Register to be read
162 * @retval Register value
163 */
164 #define LL_HMAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
165
166 /** @} */
167
168 /** @} */
169
170 /** @} */
171
172 /* Exported functions --------------------------------------------------------*/
173 /** @defgroup HMAC_LL_DRIVER_FUNCTIONS Functions
174 * @{
175 */
176
177 /** @defgroup HMAC_LL_EF_Configuration Configuration functions
178 * @{
179 */
180
181 /**
182 * @brief Enable HMAC.
183
184 * \rst
185 * +----------------------+-----------------------------------+
186 * | Register | BitsName |
187 * +======================+===================================+
188 * | CTRL | ENABLE |
189 * +----------------------+-----------------------------------+
190 * \endrst
191
192 * @param HMACx HMAC instance
193 * @retval None
194 */
195 __STATIC_INLINE void ll_hmac_enable(hmac_regs_t *HMACx)
196 {
197 SET_BITS(HMACx->CTRL, HMAC_CTRL_ENABLE);
198 }
199
200 /**
201 * @brief Disable HMAC.
202
203 * \rst
204 * +----------------------+-----------------------------------+
205 * | Register | BitsName |
206 * +======================+===================================+
207 * | CTRL | ENABLE |
208 * +----------------------+-----------------------------------+
209 * \endrst
210
211 * @param HMACx HMAC instance
212 * @retval None
213 */
214 __STATIC_INLINE void ll_hmac_disable(hmac_regs_t *HMACx)
215 {
216 CLEAR_BITS(HMACx->CTRL, HMAC_CTRL_ENABLE);
217 }
218
219 /**
220 * @brief Indicate whether the HMAC is enabled.
221
222 * \rst
223 * +----------------------+-----------------------------------+
224 * | Register | BitsName |
225 * +======================+===================================+
226 * | CTRL | ENABLE |
227 * +----------------------+-----------------------------------+
228 * \endrst
229
230 * @param HMACx HMAC instance
231 * @retval State of bit (1 or 0).
232 */
233 __STATIC_INLINE uint32_t ll_hmac_is_enabled(hmac_regs_t *HMACx)
234 {
235 return (READ_BITS(HMACx->CTRL, HMAC_CTRL_ENABLE) == (HMAC_CTRL_ENABLE));
236 }
237
238 /**
239 * @brief Enable HMAC DMA mode.
240
241 * \rst
242 * +----------------------+-----------------------------------+
243 * | Register | BitsName |
244 * +======================+===================================+
245 * | CTRL | START_DMA |
246 * +----------------------+-----------------------------------+
247 * \endrst
248
249 * @param HMACx HMAC instance
250 * @retval None
251 */
252 __STATIC_INLINE void ll_hmac_enable_dma_start(hmac_regs_t *HMACx)
253 {
254 SET_BITS(HMACx->CTRL, HMAC_CTRL_START_DMA);
255 }
256
257 /**
258 * @brief Disable HMAC DMA mode.
259
260 * \rst
261 * +----------------------+-----------------------------------+
262 * | Register | BitsName |
263 * +======================+===================================+
264 * | CTRL | START_DMA |
265 * +----------------------+-----------------------------------+
266 * \endrst
267
268 * @param HMACx HMAC instance
269 * @retval None
270 */
271 __STATIC_INLINE void ll_hmac_disable_dma_start(hmac_regs_t *HMACx)
272 {
273 CLEAR_BITS(HMACx->CTRL, HMAC_CTRL_START_DMA);
274 }
275
276 /**
277 * @brief Indicate whether the HMAC DMA mode is enabled.
278
279 * \rst
280 * +----------------------+-----------------------------------+
281 * | Register | BitsName |
282 * +======================+===================================+
283 * | CTRL | START_DMA |
284 * +----------------------+-----------------------------------+
285 * \endrst
286
287 * @param HMACx HMAC instance
288 * @retval State of bit (1 or 0).
289 */
290 __STATIC_INLINE uint32_t ll_hmac_is_enabled_dma_start(hmac_regs_t *HMACx)
291 {
292 return (READ_BITS(HMACx->CTRL, HMAC_CTRL_START_DMA) == (HMAC_CTRL_START_DMA));
293 }
294
295 /**
296 * @brief Enable fetch key through AHB/key port.
297
298 * \rst
299 * +----------------------+-----------------------------------+
300 * | Register | BitsName |
301 * +======================+===================================+
302 * | CTRL | ENABLE_RKEY |
303 * +----------------------+-----------------------------------+
304 * \endrst
305
306 * @param HMACx HMAC instance
307 * @retval None
308 */
309 __STATIC_INLINE void ll_hmac_enable_read_key(hmac_regs_t *HMACx)
310 {
311 SET_BITS(HMACx->CTRL, HMAC_CTRL_ENABLE_RKEY);
312 }
313
314 /**
315 * @brief Enable last block transfer in MCU/DMA mode.
316
317 * \rst
318 * +----------------------+-----------------------------------+
319 * | Register | BitsName |
320 * +======================+===================================+
321 * | CTRL | LASTTRANSFER |
322 * +----------------------+-----------------------------------+
323 * \endrst
324
325 * @param HMACx HMAC instance
326 * @retval None
327 */
328 __STATIC_INLINE void ll_hmac_enable_last_transfer(hmac_regs_t *HMACx)
329 {
330 SET_BITS(HMACx->CTRL, HMAC_CTRL_LASTTRANSFER);
331 }
332
333 /**
334 * @brief Enable user HASH.
335
336 * \rst
337 * +----------------------+-----------------------------------+
338 * | Register | BitsName |
339 * +======================+===================================+
340 * | CONFIG | ENABLE_USERHASH |
341 * +----------------------+-----------------------------------+
342 * \endrst
343
344 * @param HMACx HMAC instance
345 * @retval None
346 */
347 __STATIC_INLINE void ll_hmac_enable_user_hash(hmac_regs_t *HMACx)
348 {
349 SET_BITS(HMACx->CONFIG, HMAC_CONFIG_ENABLE_USERHASH);
350 }
351
352 /**
353 * @brief Disable user HASH.
354
355 * \rst
356 * +----------------------+-----------------------------------+
357 * | Register | BitsName |
358 * +======================+===================================+
359 * | CONFIG | ENABLE_USERHASH |
360 * +----------------------+-----------------------------------+
361 * \endrst
362
363 * @param HMACx HMAC instance
364 * @retval None
365 */
366 __STATIC_INLINE void ll_hmac_disable_user_hash(hmac_regs_t *HMACx)
367 {
368 CLEAR_BITS(HMACx->CONFIG, HMAC_CONFIG_ENABLE_USERHASH);
369 }
370
371 /**
372 * @brief Indicate whether the user HASH is enabled.
373
374 * \rst
375 * +----------------------+-----------------------------------+
376 * | Register | BitsName |
377 * +======================+===================================+
378 * | CONFIG | ENABLE_USERHASH |
379 * +----------------------+-----------------------------------+
380 * \endrst
381
382 * @param HMACx HMAC instance
383 * @retval State of bit (1 or 0).
384 */
385 __STATIC_INLINE uint32_t ll_hmac_is_enabled_user_hash(hmac_regs_t *HMACx)
386 {
387 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_ENABLE_USERHASH) == (HMAC_CONFIG_ENABLE_USERHASH));
388 }
389
390 /**
391 * @brief Enable HMAC in little endian.
392
393 * \rst
394 * +----------------------+-----------------------------------+
395 * | Register | BitsName |
396 * +======================+===================================+
397 * | CONFIG | ENDIAN |
398 * +----------------------+-----------------------------------+
399 * \endrst
400
401 * @param HMACx HMAC instance
402 * @retval None
403 */
404 __STATIC_INLINE void ll_hmac_enable_little_endian(hmac_regs_t *HMACx)
405 {
406 SET_BITS(HMACx->CONFIG, HMAC_CONFIG_ENDIAN);
407 }
408
409 /**
410 * @brief Disable HMAC in little endian.
411
412 * \rst
413 * +----------------------+-----------------------------------+
414 * | Register | BitsName |
415 * +======================+===================================+
416 * | CONFIG | ENDIAN |
417 * +----------------------+-----------------------------------+
418 * \endrst
419
420 * @param HMACx HMAC instance
421 * @retval None
422 */
423 __STATIC_INLINE void ll_hmac_disable_little_endian(hmac_regs_t *HMACx)
424 {
425 CLEAR_BITS(HMACx->CONFIG, HMAC_CONFIG_ENDIAN);
426 }
427
428 /**
429 * @brief Indicate whether the HMAC is in little endian.
430
431 * \rst
432 * +----------------------+-----------------------------------+
433 * | Register | BitsName |
434 * +======================+===================================+
435 * | CONFIG | ENDIAN |
436 * +----------------------+-----------------------------------+
437 * \endrst
438
439 * @param HMACx HMAC instance
440 * @retval State of bit (1 or 0).
441 */
442 __STATIC_INLINE uint32_t ll_hmac_is_enabled_little_endian(hmac_regs_t *HMACx)
443 {
444 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_ENDIAN) == (HMAC_CONFIG_ENDIAN));
445 }
446
447 /**
448 * @brief Set ways to obtain HMAC key.
449
450 * \rst
451 * +----------------------+-----------------------------------+
452 * | Register | BitsName |
453 * +======================+===================================+
454 * | CONFIG | KEYTYPE |
455 * +----------------------+-----------------------------------+
456 * \endrst
457
458 * @param HMACx HMAC instance
459 * @param type This parameter can be one of the following values:
460 * @arg @ref LL_HMAC_KEYTYPE_MCU
461 * @arg @ref LL_HMAC_KEYTYPE_AHB
462 * @arg @ref LL_HMAC_KEYTYPE_KRAM
463 * @retval None
464 */
465 __STATIC_INLINE void ll_hmac_set_key_type(hmac_regs_t *HMACx, uint32_t type)
466 {
467 MODIFY_REG(HMACx->CONFIG, HMAC_CONFIG_KEYTYPE, type);
468 }
469
470 /**
471 * @brief Get ways to obtain HMAC key.
472
473 * \rst
474 * +----------------------+-----------------------------------+
475 * | Register | BitsName |
476 * +======================+===================================+
477 * | CONFIG | KEYTYPE |
478 * +----------------------+-----------------------------------+
479 * \endrst
480
481 * @param HMACx HMAC instance
482 * @retval Returned value can be one of the following values:
483 * @arg @ref LL_HMAC_KEYTYPE_MCU
484 * @arg @ref LL_HMAC_KEYTYPE_AHB
485 * @arg @ref LL_HMAC_KEYTYPE_KRAM
486 */
487 __STATIC_INLINE uint32_t ll_hmac_get_key_type(hmac_regs_t *HMACx)
488 {
489 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_KEYTYPE));
490 }
491
492 /**
493 * @brief Enable SHA mode.
494
495 * \rst
496 * +----------------------+-----------------------------------+
497 * | Register | BitsName |
498 * +======================+===================================+
499 * | CONFIG | CALCTYPE |
500 * +----------------------+-----------------------------------+
501 * \endrst
502
503 * @param HMACx HMAC instance
504 * @retval None
505 */
506 __STATIC_INLINE void ll_hmac_enable_sha(hmac_regs_t *HMACx)
507 {
508 SET_BITS(HMACx->CONFIG, HMAC_CONFIG_CALCTYPE);
509 }
510
511 /**
512 * @brief Disable SHA mode.
513
514 * \rst
515 * +----------------------+-----------------------------------+
516 * | Register | BitsName |
517 * +======================+===================================+
518 * | CONFIG | CALCTYPE |
519 * +----------------------+-----------------------------------+
520 * \endrst
521
522 * @param HMACx HMAC instance
523 * @retval None
524 */
525 __STATIC_INLINE void ll_hmac_disable_sha(hmac_regs_t *HMACx)
526 {
527 CLEAR_BITS(HMACx->CONFIG, HMAC_CONFIG_CALCTYPE);
528 }
529
530 /**
531 * @brief Indicate whether the SHA mode is enabled.
532
533 * \rst
534 * +----------------------+-----------------------------------+
535 * | Register | BitsName |
536 * +======================+===================================+
537 * | CONFIG | CALCTYPE |
538 * +----------------------+-----------------------------------+
539 * \endrst
540
541 * @param HMACx HMAC instance
542 * @retval State of bit (1 or 0).
543 */
544 __STATIC_INLINE uint32_t ll_hmac_is_enabled_sha(hmac_regs_t *HMACx)
545 {
546 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_CALCTYPE) == (HMAC_CONFIG_CALCTYPE));
547 }
548
549 /**
550 * @brief Enable private mode.
551
552 * \rst
553 * +----------------------+-----------------------------------+
554 * | Register | BitsName |
555 * +======================+===================================+
556 * | CONFIG | PRIVATE |
557 * +----------------------+-----------------------------------+
558 * \endrst
559
560 * @param HMACx HMAC instance
561 * @retval None
562 */
563 __STATIC_INLINE void ll_hmac_enable_private(hmac_regs_t *HMACx)
564 {
565 SET_BITS(HMACx->CONFIG, HMAC_CONFIG_PRIVATE);
566 }
567
568 /**
569 * @brief Disable private mode.
570
571 * \rst
572 * +----------------------+-----------------------------------+
573 * | Register | BitsName |
574 * +======================+===================================+
575 * | CONFIG | PRIVATE |
576 * +----------------------+-----------------------------------+
577 * \endrst
578
579 * @param HMACx HMAC instance
580 * @retval None
581 */
582 __STATIC_INLINE void ll_hmac_disable_private(hmac_regs_t *HMACx)
583 {
584 CLEAR_BITS(HMACx->CONFIG, HMAC_CONFIG_PRIVATE);
585 }
586
587 /**
588 * @brief Indicate whether the private mode is enabled.
589
590 * \rst
591 * +----------------------+-----------------------------------+
592 * | Register | BitsName |
593 * +======================+===================================+
594 * | CONFIG | PRIVATE |
595 * +----------------------+-----------------------------------+
596 * \endrst
597
598 * @param HMACx HMAC instance
599 * @retval State of bit (1 or 0).
600 */
601 __STATIC_INLINE uint32_t ll_hmac_is_enabled_private(hmac_regs_t *HMACx)
602 {
603 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_PRIVATE) == (HMAC_CONFIG_PRIVATE));
604 }
605
606 /** @} */
607
608 /** @defgroup HMAC_LL_EF_IT_Management IT_Management
609 * @{
610 */
611
612 /**
613 * @brief Enable the done interrupt for HMAC.
614
615 * \rst
616 * +----------------------+-----------------------------------+
617 * | Register | BitsName |
618 * +======================+===================================+
619 * | INTERRUPT | ENABLE |
620 * +----------------------+-----------------------------------+
621 * \endrst
622
623 * @param HMACx HMAC instance
624 * @retval None
625 */
626 __STATIC_INLINE void ll_hmac_enable_it_done(hmac_regs_t *HMACx)
627 {
628 SET_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_ENABLE);
629 }
630
631 /**
632 * @brief Disable the done interrupt for HMAC.
633
634 * \rst
635 * +----------------------+-----------------------------------+
636 * | Register | BitsName |
637 * +======================+===================================+
638 * | INTERRUPT | ENABLE |
639 * +----------------------+-----------------------------------+
640 * \endrst
641
642 * @param HMACx HMAC instance
643 * @retval None
644 */
645 __STATIC_INLINE void ll_hmac_disable_it_done(hmac_regs_t *HMACx)
646 {
647 CLEAR_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_ENABLE);
648 }
649
650 /**
651 * @brief Indicate whether Done Interrupt is enabled.
652
653 * \rst
654 * +----------------------+-----------------------------------+
655 * | Register | BitsName |
656 * +======================+===================================+
657 * | INTERRUPT | ENABLE |
658 * +----------------------+-----------------------------------+
659 * \endrst
660
661 * @param HMACx HMAC instance
662 * @retval State of bit (1 or 0).
663 */
664 __STATIC_INLINE uint32_t ll_hmac_is_enabled_it_done(hmac_regs_t *HMACx)
665 {
666 return (READ_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_ENABLE) == (HMAC_INTERRUPT_ENABLE));
667 }
668
669 /** @} */
670
671 /** @defgroup HMAC_LL_EF_IT_Management IT_Management
672 * @{
673 */
674
675 /**
676 * @brief Indicate whether SHA Ready flag is set.
677
678 * \rst
679 * +----------------------+-----------------------------------+
680 * | Register | BitsName |
681 * +======================+===================================+
682 * | STATUS | DATAREADY_SHA |
683 * +----------------------+-----------------------------------+
684 * \endrst
685
686 * @param HMACx HMAC instance
687 * @retval State of bit (1 or 0).
688 */
689 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_sha_ready(hmac_regs_t *HMACx)
690 {
691 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_DATAREADY_SHA) == HMAC_STATUS_DATAREADY_SHA);
692 }
693
694 /**
695 * @brief Indicate whether HMAC Ready flag is set.
696
697 * \rst
698 * +----------------------+-----------------------------------+
699 * | Register | BitsName |
700 * +======================+===================================+
701 * | STATUS | DATAREADY_HMAC |
702 * +----------------------+-----------------------------------+
703 * \endrst
704
705 * @param HMACx HMAC instance
706 * @retval State of bit (1 or 0).
707 */
708 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_hmac_ready(hmac_regs_t *HMACx)
709 {
710 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_DATAREADY_HMAC) == HMAC_STATUS_DATAREADY_HMAC);
711 }
712
713 /**
714 * @brief Indicate whether DMA Transmit Message Done flag is set.
715
716 * \rst
717 * +----------------------+-----------------------------------+
718 * | Register | BitsName |
719 * +======================+===================================+
720 * | STATUS | MESSAGEDONE_DMA |
721 * +----------------------+-----------------------------------+
722 * \endrst
723
724 * @param HMACx HMAC instance
725 * @retval State of bit (1 or 0).
726 */
727 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_message_done(hmac_regs_t *HMACx)
728 {
729 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_MESSAGEDONE_DMA) == HMAC_STATUS_MESSAGEDONE_DMA);
730 }
731
732 /**
733 * @brief Indicate whether DMA Transfer Done flag is set.
734
735 * \rst
736 * +----------------------+-----------------------------------+
737 * | Register | BitsName |
738 * +======================+===================================+
739 * | STATUS | TRANSDONE_DMA |
740 * +----------------------+-----------------------------------+
741 * \endrst
742
743 * @param HMACx HMAC instance
744 * @retval State of bit (1 or 0).
745 */
746 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_done(hmac_regs_t *HMACx)
747 {
748 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_TRANSDONE_DMA) == HMAC_STATUS_TRANSDONE_DMA);
749 }
750
751 /**
752 * @brief Indicate whether DMA Transfer Error flag is set.
753
754 * \rst
755 * +----------------------+-----------------------------------+
756 * | Register | BitsName |
757 * +======================+===================================+
758 * | STATUS | TRANSERR_DMA |
759 * +----------------------+-----------------------------------+
760 * \endrst
761
762 * @param HMACx HMAC instance
763 * @retval State of bit (1 or 0).
764 */
765 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_error(hmac_regs_t *HMACx)
766 {
767 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_TRANSERR_DMA) == HMAC_STATUS_TRANSERR_DMA);
768 }
769
770 /**
771 * @brief Indicate whether Key Valid flag is set.
772
773 * \rst
774 * +----------------------+-----------------------------------+
775 * | Register | BitsName |
776 * +======================+===================================+
777 * | STATUS | KEYVALID |
778 * +----------------------+-----------------------------------+
779 * \endrst
780
781 * @param HMACx HMAC instance
782 * @retval State of bit (1 or 0).
783 */
784 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_key_valid(hmac_regs_t *HMACx)
785 {
786 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_KEYVALID) == HMAC_STATUS_KEYVALID);
787 }
788
789 /**
790 * @brief Indicate whether Done interrupt flag is set.
791
792 * \rst
793 * +----------------------+-----------------------------------+
794 * | Register | BitsName |
795 * +======================+===================================+
796 * | INTERRUPT | DONE |
797 * +----------------------+-----------------------------------+
798 * \endrst
799
800 * @param HMACx HMAC instance
801 * @retval State of bit (1 or 0).
802 */
803 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_it_done(hmac_regs_t *HMACx)
804 {
805 return (READ_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_DONE) == HMAC_INTERRUPT_DONE);
806 }
807
808 /**
809 * @brief Clear Done interrupt flag.
810
811 * \rst
812 * +----------------------+-----------------------------------+
813 * | Register | BitsName |
814 * +======================+===================================+
815 * | INTERRUPT | DONE |
816 * +----------------------+-----------------------------------+
817 * \endrst
818
819 * @param HMACx HMAC instance
820 * @retval None
821 */
822 __STATIC_INLINE void ll_hmac_clear_flag_it_done(hmac_regs_t *HMACx)
823 {
824 CLEAR_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_DONE);
825 }
826
827 /** @} */
828
829 /** @defgroup HMAC_LL_EF_DMA_Management DMA_Management
830 * @{
831 */
832
833 /**
834 * @brief Set HMAC transfer blocks in DMA mode.
835
836 * \rst
837 * +----------------------+-----------------------------------+
838 * | Register | BitsName |
839 * +======================+===================================+
840 * | TRANSIZE | TRANSIZE |
841 * +----------------------+-----------------------------------+
842 * \endrst
843
844 * @param HMACx HMAC instance
845 * @param block This parameter can be one of the following values: 1 ~ 512
846 * @retval None
847 */
848 __STATIC_INLINE void ll_hmac_set_dma_transfer_block(hmac_regs_t *HMACx, uint32_t block)
849 {
850 MODIFY_REG(HMACx->TRAN_SIZE, HMAC_TRANSIZE, (block << 6) - 1);
851 }
852
853 /**
854 * @brief Get HMAC transfer blocks in DMA mode.
855
856 * \rst
857 * +----------------------+-----------------------------------+
858 * | Register | BitsName |
859 * +======================+===================================+
860 * | TRANSIZE | TRANSIZE |
861 * +----------------------+-----------------------------------+
862 * \endrst
863
864 * @param HMACx HMAC instance
865 * @retval Return value is between: 1 ~ 512
866 */
867 __STATIC_INLINE uint32_t ll_hmac_get_dma_transfer_block(hmac_regs_t *HMACx)
868 {
869 return ((READ_BITS(HMACx->TRAN_SIZE, HMAC_TRANSIZE) + 1) >> 6);
870 }
871
872 /**
873 * @brief Set HMAC read address of RAM in DMA mode.
874
875 * \rst
876 * +----------------------+-----------------------------------+
877 * | Register | BitsName |
878 * +======================+===================================+
879 * | RSTART_ADDR | RSTART_ADDR |
880 * +----------------------+-----------------------------------+
881 * \endrst
882
883 * @param HMACx HMAC instance
884 * @param address This parameter can be one of the address in RAM
885 * @retval None
886 */
887 __STATIC_INLINE void ll_hmac_set_dma_read_address(hmac_regs_t *HMACx, uint32_t address)
888 {
889 WRITE_REG(HMACx->RSTART_ADDR, address);
890 }
891
892 /**
893 * @brief Get HMAC read address of RAM in DMA mode.
894
895 * \rst
896 * +----------------------+-----------------------------------+
897 * | Register | BitsName |
898 * +======================+===================================+
899 * | RSTART_ADDR | RSTART_ADDR |
900 * +----------------------+-----------------------------------+
901 * \endrst
902
903 * @param HMACx HMAC instance
904 * @retval Return value is the address in RAM
905 */
906 __STATIC_INLINE uint32_t ll_hmac_get_dma_read_address(hmac_regs_t *HMACx)
907 {
908 return (READ_REG(HMACx->RSTART_ADDR));
909 }
910
911 /**
912 * @brief Set HMAC write address of RAM in DMA mode.
913
914 * \rst
915 * +----------------------+-----------------------------------+
916 * | Register | BitsName |
917 * +======================+===================================+
918 * | WSTART_ADDR | WSTART_ADDR |
919 * +----------------------+-----------------------------------+
920 * \endrst
921
922 * @param HMACx HMAC instance
923 * @param address This parameter can be one of the address in RAM
924 * @retval None
925 */
926 __STATIC_INLINE void ll_hmac_set_dma_write_address(hmac_regs_t *HMACx, uint32_t address)
927 {
928 WRITE_REG(HMACx->WSTART_ADDR, address);
929 }
930
931 /**
932 * @brief Get HMAC write address of RAM in DMA mode.
933
934 * \rst
935 * +----------------------+-----------------------------------+
936 * | Register | BitsName |
937 * +======================+===================================+
938 * | WSTART_ADDR | WSTART_ADDR |
939 * +----------------------+-----------------------------------+
940 * \endrst
941
942 * @param HMACx HMAC instance
943 * @retval Return value is the address in RAM
944 */
945 __STATIC_INLINE uint32_t ll_hmac_get_dma_write_address(hmac_regs_t *HMACx)
946 {
947 return (READ_REG(HMACx->WSTART_ADDR));
948 }
949
950 /** @} */
951
952 /** @defgroup HMAC_LL_EF_Data_Management Data_Management
953 * @{
954 */
955
956 /**
957 * @brief Set user HASH[255:224].
958
959 * \rst
960 * +----------------------+-----------------------------------+
961 * | Register | BitsName |
962 * +======================+===================================+
963 * | USER_HASH[0] | USER_HASH |
964 * +----------------------+-----------------------------------+
965 * \endrst
966
967 * @param HMACx HMAC instance
968 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
969 * @retval None
970 */
971 __STATIC_INLINE void ll_hmac_set_user_hash_255_224(hmac_regs_t *HMACx, uint32_t hash)
972 {
973 WRITE_REG(HMACx->USER_HASH[0], hash);
974 }
975
976 /**
977 * @brief Set user HASH[223:192].
978
979 * \rst
980 * +----------------------+-----------------------------------+
981 * | Register | BitsName |
982 * +======================+===================================+
983 * | USER_HASH[1] | USER_HASH |
984 * +----------------------+-----------------------------------+
985 * \endrst
986
987 * @param HMACx HMAC instance
988 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
989 * @retval None
990 */
991 __STATIC_INLINE void ll_hmac_set_user_hash_223_192(hmac_regs_t *HMACx, uint32_t hash)
992 {
993 WRITE_REG(HMACx->USER_HASH[1], hash);
994 }
995
996 /**
997 * @brief Set user HASH[191:160].
998
999 * \rst
1000 * +----------------------+-----------------------------------+
1001 * | Register | BitsName |
1002 * +======================+===================================+
1003 * | USER_HASH[2] | USER_HASH |
1004 * +----------------------+-----------------------------------+
1005 * \endrst
1006
1007 * @param HMACx HMAC instance
1008 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1009 * @retval None
1010 */
1011 __STATIC_INLINE void ll_hmac_set_user_hash_191_160(hmac_regs_t *HMACx, uint32_t hash)
1012 {
1013 WRITE_REG(HMACx->USER_HASH[2], hash);
1014 }
1015
1016 /**
1017 * @brief Set user HASH[159:128].
1018
1019 * \rst
1020 * +----------------------+-----------------------------------+
1021 * | Register | BitsName |
1022 * +======================+===================================+
1023 * | USER_HASH[3] | USER_HASH |
1024 * +----------------------+-----------------------------------+
1025 * \endrst
1026
1027 * @param HMACx HMAC instance
1028 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1029 * @retval None
1030 */
1031 __STATIC_INLINE void ll_hmac_set_user_hash_159_128(hmac_regs_t *HMACx, uint32_t hash)
1032 {
1033 WRITE_REG(HMACx->USER_HASH[3], hash);
1034 }
1035
1036 /**
1037 * @brief Set user HASH[127:96].
1038
1039 * \rst
1040 * +----------------------+-----------------------------------+
1041 * | Register | BitsName |
1042 * +======================+===================================+
1043 * | USER_HASH[4] | USER_HASH |
1044 * +----------------------+-----------------------------------+
1045 * \endrst
1046
1047 * @param HMACx HMAC instance
1048 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1049 * @retval None
1050 */
1051 __STATIC_INLINE void ll_hmac_set_user_hash_127_96(hmac_regs_t *HMACx, uint32_t hash)
1052 {
1053 WRITE_REG(HMACx->USER_HASH[4], hash);
1054 }
1055
1056 /**
1057 * @brief Set user HASH[95:64].
1058
1059 * \rst
1060 * +----------------------+-----------------------------------+
1061 * | Register | BitsName |
1062 * +======================+===================================+
1063 * | USER_HASH[5] | USER_HASH |
1064 * +----------------------+-----------------------------------+
1065 * \endrst
1066
1067 * @param HMACx HMAC instance
1068 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1069 * @retval None
1070 */
1071 __STATIC_INLINE void ll_hmac_set_user_hash_95_64(hmac_regs_t *HMACx, uint32_t hash)
1072 {
1073 WRITE_REG(HMACx->USER_HASH[5], hash);
1074 }
1075
1076 /**
1077 * @brief Set user HASH[63:32].
1078
1079 * \rst
1080 * +----------------------+-----------------------------------+
1081 * | Register | BitsName |
1082 * +======================+===================================+
1083 * | USER_HASH[6] | USER_HASH |
1084 * +----------------------+-----------------------------------+
1085 * \endrst
1086
1087 * @param HMACx HMAC instance
1088 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1089 * @retval None
1090 */
1091 __STATIC_INLINE void ll_hmac_set_user_hash_63_32(hmac_regs_t *HMACx, uint32_t hash)
1092 {
1093 WRITE_REG(HMACx->USER_HASH[6], hash);
1094 }
1095
1096 /**
1097 * @brief Set user HASH[31:0].
1098
1099 * \rst
1100 * +----------------------+-----------------------------------+
1101 * | Register | BitsName |
1102 * +======================+===================================+
1103 * | USER_HASH[7] | USER_HASH |
1104 * +----------------------+-----------------------------------+
1105 * \endrst
1106
1107 * @param HMACx HMAC instance
1108 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1109 * @retval None
1110 */
1111 __STATIC_INLINE void ll_hmac_set_user_hash_31_0(hmac_regs_t *HMACx, uint32_t hash)
1112 {
1113 WRITE_REG(HMACx->USER_HASH[7], hash);
1114 }
1115
1116 /**
1117 * @brief Get abstract from HMAC.
1118
1119 * \rst
1120 * +----------------------+-----------------------------------+
1121 * | Register | BitsName |
1122 * +======================+===================================+
1123 * | FIFO_OUT | FIFO_OUT |
1124 * +----------------------+-----------------------------------+
1125 * \endrst
1126
1127 * @param HMACx HMAC instance
1128 * @retval Abstract
1129 */
1130 __STATIC_INLINE uint32_t ll_hmac_get_data(hmac_regs_t *HMACx)
1131 {
1132 return (READ_REG(HMACx->FIFO_OUT));
1133 }
1134
1135 /**
1136 * @brief Send data to calculate.
1137
1138 * \rst
1139 * +----------------------+-----------------------------------+
1140 * | Register | BitsName |
1141 * +======================+===================================+
1142 * | FIFO_MESSAGE | FIFO_MESSAGE |
1143 * +----------------------+-----------------------------------+
1144 * \endrst
1145
1146 * @param HMACx HMAC instance
1147 * @param data This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1148 * @retval None
1149 */
1150 __STATIC_INLINE void ll_hmac_set_data(hmac_regs_t *HMACx, uint32_t data)
1151 {
1152 WRITE_REG(HMACx->MESSAGE_FIFO, data);
1153 }
1154
1155 /**
1156 * @brief Set HMAC key0.
1157
1158 * \rst
1159 * +----------------------+-----------------------------------+
1160 * | Register | BitsName |
1161 * +======================+===================================+
1162 * | KEY[0] | KEY |
1163 * +----------------------+-----------------------------------+
1164 * \endrst
1165
1166 * @param HMACx HMAC instance
1167 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1168 * @retval None
1169 */
1170 __STATIC_INLINE void ll_hmac_set_key0(hmac_regs_t *HMACx, uint32_t key)
1171 {
1172 WRITE_REG(HMACx->KEY[0], key);
1173 }
1174
1175 /**
1176 * @brief Set HMAC key1.
1177
1178 * \rst
1179 * +----------------------+-----------------------------------+
1180 * | Register | BitsName |
1181 * +======================+===================================+
1182 * | KEY[1] | KEY |
1183 * +----------------------+-----------------------------------+
1184 * \endrst
1185
1186 * @param HMACx HMAC instance
1187 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1188 * @retval None
1189 */
1190 __STATIC_INLINE void ll_hmac_set_key1(hmac_regs_t *HMACx, uint32_t key)
1191 {
1192 WRITE_REG(HMACx->KEY[1], key);
1193 }
1194
1195 /**
1196 * @brief Set HMAC key2.
1197
1198 * \rst
1199 * +----------------------+-----------------------------------+
1200 * | Register | BitsName |
1201 * +======================+===================================+
1202 * | KEY[2] | KEY |
1203 * +----------------------+-----------------------------------+
1204 * \endrst
1205
1206 * @param HMACx HMAC instance
1207 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1208 * @retval None
1209 */
1210 __STATIC_INLINE void ll_hmac_set_key2(hmac_regs_t *HMACx, uint32_t key)
1211 {
1212 WRITE_REG(HMACx->KEY[2], key);
1213 }
1214
1215 /**
1216 * @brief Set HMAC key3.
1217
1218 * \rst
1219 * +----------------------+-----------------------------------+
1220 * | Register | BitsName |
1221 * +======================+===================================+
1222 * | KEY[3] | KEY |
1223 * +----------------------+-----------------------------------+
1224 * \endrst
1225
1226 * @param HMACx HMAC instance
1227 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1228 * @retval None
1229 */
1230 __STATIC_INLINE void ll_hmac_set_key3(hmac_regs_t *HMACx, uint32_t key)
1231 {
1232 WRITE_REG(HMACx->KEY[3], key);
1233 }
1234
1235 /**
1236 * @brief Set HMAC key4.
1237
1238 * \rst
1239 * +----------------------+-----------------------------------+
1240 * | Register | BitsName |
1241 * +======================+===================================+
1242 * | KEY[4] | KEY |
1243 * +----------------------+-----------------------------------+
1244 * \endrst
1245
1246 * @param HMACx HMAC instance
1247 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1248 * @retval None
1249 */
1250 __STATIC_INLINE void ll_hmac_set_key4(hmac_regs_t *HMACx, uint32_t key)
1251 {
1252 WRITE_REG(HMACx->KEY[4], key);
1253 }
1254
1255 /**
1256 * @brief Set HMAC key5.
1257
1258 * \rst
1259 * +----------------------+-----------------------------------+
1260 * | Register | BitsName |
1261 * +======================+===================================+
1262 * | KEY[5] | KEY |
1263 * +----------------------+-----------------------------------+
1264 * \endrst
1265
1266 * @param HMACx HMAC instance
1267 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1268 * @retval None
1269 */
1270 __STATIC_INLINE void ll_hmac_set_key5(hmac_regs_t *HMACx, uint32_t key)
1271 {
1272 WRITE_REG(HMACx->KEY[5], key);
1273 }
1274
1275 /**
1276 * @brief Set HMAC key6.
1277
1278 * \rst
1279 * +----------------------+-----------------------------------+
1280 * | Register | BitsName |
1281 * +======================+===================================+
1282 * | KEY[6] | KEY |
1283 * +----------------------+-----------------------------------+
1284 * \endrst
1285
1286 * @param HMACx HMAC instance
1287 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1288 * @retval None
1289 */
1290 __STATIC_INLINE void ll_hmac_set_key6(hmac_regs_t *HMACx, uint32_t key)
1291 {
1292 WRITE_REG(HMACx->KEY[6], key);
1293 }
1294
1295 /**
1296 * @brief Set HMAC key7.
1297
1298 * \rst
1299 * +----------------------+-----------------------------------+
1300 * | Register | BitsName |
1301 * +======================+===================================+
1302 * | KEY[7] | KEY |
1303 * +----------------------+-----------------------------------+
1304 * \endrst
1305
1306 * @param HMACx HMAC instance
1307 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1308 * @retval None
1309 */
1310 __STATIC_INLINE void ll_hmac_set_key7(hmac_regs_t *HMACx, uint32_t key)
1311 {
1312 WRITE_REG(HMACx->KEY[7], key);
1313 }
1314
1315 /**
1316 * @brief Set HMAC key address in memory.
1317
1318 * \rst
1319 * +----------------------+-----------------------------------+
1320 * | Register | BitsName |
1321 * +======================+===================================+
1322 * | KEY_ADDR | KEY_ADDR |
1323 * +----------------------+-----------------------------------+
1324 * \endrst
1325
1326 * @param HMACx HMAC instance
1327 * @param address This parameter can be one of the address in RAM
1328 * @retval None
1329 */
1330 __STATIC_INLINE void ll_hmac_set_key_address(hmac_regs_t *HMACx, uint32_t address)
1331 {
1332 WRITE_REG(HMACx->KEY_ADDR, address);
1333 }
1334
1335 /**
1336 * @brief Get HMAC key address in memory.
1337
1338 * \rst
1339 * +----------------------+-----------------------------------+
1340 * | Register | BitsName |
1341 * +======================+===================================+
1342 * | KEY_ADDR | KEY_ADDR |
1343 * +----------------------+-----------------------------------+
1344 * \endrst
1345
1346 * @param HMACx HMAC instance
1347 * @retval Return value is the address in RAM
1348 */
1349 __STATIC_INLINE uint32_t ll_hmac_get_key_address(hmac_regs_t *HMACx)
1350 {
1351 return (READ_REG(HMACx->KEY_ADDR));
1352 }
1353
1354 /**
1355 * @brief Set HMAC fetch key port mask.
1356
1357 * \rst
1358 * +----------------------+-----------------------------------+
1359 * | Register | BitsName |
1360 * +======================+===================================+
1361 * | KPORT_MASK | KPORT_MASK |
1362 * +----------------------+-----------------------------------+
1363 * \endrst
1364
1365 * @param HMACx HMAC instance
1366 * @param mask This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1367 * @retval None
1368 */
1369 __STATIC_INLINE void ll_hmac_set_key_port_mask(hmac_regs_t *HMACx, uint32_t mask)
1370 {
1371 WRITE_REG(HMACx->KPORT_MASK, mask);
1372 }
1373
1374 /** @} */
1375
1376 /** @defgroup HMAC_LL_EF_Init Initialization and de-initialization functions
1377 * @{
1378 */
1379
1380 /**
1381 * @brief De-initialize HMAC registers (Registers restored to their default values).
1382 * @param HMACx HMAC Instance
1383 * @retval An error_status_t enumeration value:
1384 * - SUCCESS: HMAC registers are de-initialized
1385 * - ERROR: HMAC registers are not de-initialized
1386 */
1387 error_status_t ll_hmac_deinit(hmac_regs_t *HMACx);
1388
1389 /**
1390 * @brief Initialize HMAC registers according to the specified
1391 * parameters in p_hmac_init.
1392 * @param HMACx HMAC Instance
1393 * @param p_hmac_init Pointer to a ll_hmac_init_t structure that contains the configuration
1394 * information for the specified HMAC peripheral.
1395 * @retval An error_status_t enumeration value:
1396 * - SUCCESS: HMAC registers are initialized according to p_hmac_init content
1397 * - ERROR: Problem occurred during HMAC Registers initialization
1398 */
1399 error_status_t ll_hmac_init(hmac_regs_t *HMACx, ll_hmac_init_t *p_hmac_init);
1400
1401 /**
1402 * @brief Set each field of a @ref ll_hmac_init_t type structure to default value.
1403 * @param p_hmac_init Pointer to a @ref ll_hmac_init_t structure
1404 * whose fields will be set to default values.
1405 * @retval None
1406 */
1407 void ll_hmac_struct_init(ll_hmac_init_t *p_hmac_init);
1408
1409 /** @} */
1410
1411 /** @} */
1412
1413 #endif /* HMAC */
1414
1415 #ifdef __cplusplus
1416 }
1417 #endif
1418
1419 #endif /* __GR55XX_LL_HMAC_H__ */
1420
1421 /** @} */
1422
1423 /** @} */
1424
1425 /** @} */
ll_hmac_set_data
__STATIC_INLINE void ll_hmac_set_data(hmac_regs_t *HMACx, uint32_t data)
Send data to calculate.
Definition: gr55xx_ll_hmac.h:1150
ll_hmac_set_key_type
__STATIC_INLINE void ll_hmac_set_key_type(hmac_regs_t *HMACx, uint32_t type)
Set ways to obtain HMAC key.
Definition: gr55xx_ll_hmac.h:465
ll_hmac_is_enabled_private
__STATIC_INLINE uint32_t ll_hmac_is_enabled_private(hmac_regs_t *HMACx)
Indicate whether the private mode is enabled.
Definition: gr55xx_ll_hmac.h:601
ll_hmac_enable_read_key
__STATIC_INLINE void ll_hmac_enable_read_key(hmac_regs_t *HMACx)
Enable fetch key through AHB/key port.
Definition: gr55xx_ll_hmac.h:309
ll_hmac_init_t
struct _ll_hmac_init_t ll_hmac_init_t
LL HMAC Init Structure definition.
ll_hmac_set_key_port_mask
__STATIC_INLINE void ll_hmac_set_key_port_mask(hmac_regs_t *HMACx, uint32_t mask)
Set HMAC fetch key port mask.
Definition: gr55xx_ll_hmac.h:1369
ll_hmac_is_action_flag_sha_ready
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_sha_ready(hmac_regs_t *HMACx)
Indicate whether SHA Ready flag is set.
Definition: gr55xx_ll_hmac.h:689
ll_hmac_is_enabled
__STATIC_INLINE uint32_t ll_hmac_is_enabled(hmac_regs_t *HMACx)
Indicate whether the HMAC is enabled.
Definition: gr55xx_ll_hmac.h:233
ll_hmac_set_user_hash_223_192
__STATIC_INLINE void ll_hmac_set_user_hash_223_192(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[223:192].
Definition: gr55xx_ll_hmac.h:991
ll_hmac_clear_flag_it_done
__STATIC_INLINE void ll_hmac_clear_flag_it_done(hmac_regs_t *HMACx)
Clear Done interrupt flag.
Definition: gr55xx_ll_hmac.h:822
ll_hmac_disable_dma_start
__STATIC_INLINE void ll_hmac_disable_dma_start(hmac_regs_t *HMACx)
Disable HMAC DMA mode.
Definition: gr55xx_ll_hmac.h:271
ll_hmac_is_enabled_it_done
__STATIC_INLINE uint32_t ll_hmac_is_enabled_it_done(hmac_regs_t *HMACx)
Indicate whether Done Interrupt is enabled.
Definition: gr55xx_ll_hmac.h:664
ll_hmac_set_key7
__STATIC_INLINE void ll_hmac_set_key7(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key7.
Definition: gr55xx_ll_hmac.h:1310
ll_hmac_disable_sha
__STATIC_INLINE void ll_hmac_disable_sha(hmac_regs_t *HMACx)
Disable SHA mode.
Definition: gr55xx_ll_hmac.h:525
ll_hmac_set_key_address
__STATIC_INLINE void ll_hmac_set_key_address(hmac_regs_t *HMACx, uint32_t address)
Set HMAC key address in memory.
Definition: gr55xx_ll_hmac.h:1330
ll_hmac_is_action_flag_key_valid
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_key_valid(hmac_regs_t *HMACx)
Indicate whether Key Valid flag is set.
Definition: gr55xx_ll_hmac.h:784
ll_hmac_get_dma_write_address
__STATIC_INLINE uint32_t ll_hmac_get_dma_write_address(hmac_regs_t *HMACx)
Get HMAC write address of RAM in DMA mode.
Definition: gr55xx_ll_hmac.h:945
ll_hmac_set_key4
__STATIC_INLINE void ll_hmac_set_key4(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key4.
Definition: gr55xx_ll_hmac.h:1250
ll_hmac_enable
__STATIC_INLINE void ll_hmac_enable(hmac_regs_t *HMACx)
Enable HMAC.
Definition: gr55xx_ll_hmac.h:195
ll_hmac_is_enabled_little_endian
__STATIC_INLINE uint32_t ll_hmac_is_enabled_little_endian(hmac_regs_t *HMACx)
Indicate whether the HMAC is in little endian.
Definition: gr55xx_ll_hmac.h:442
ll_hmac_set_key1
__STATIC_INLINE void ll_hmac_set_key1(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key1.
Definition: gr55xx_ll_hmac.h:1190
ll_hmac_enable_user_hash
__STATIC_INLINE void ll_hmac_enable_user_hash(hmac_regs_t *HMACx)
Enable user HASH.
Definition: gr55xx_ll_hmac.h:347
ll_hmac_is_enabled_sha
__STATIC_INLINE uint32_t ll_hmac_is_enabled_sha(hmac_regs_t *HMACx)
Indicate whether the SHA mode is enabled.
Definition: gr55xx_ll_hmac.h:544
ll_hmac_enable_last_transfer
__STATIC_INLINE void ll_hmac_enable_last_transfer(hmac_regs_t *HMACx)
Enable last block transfer in MCU/DMA mode.
Definition: gr55xx_ll_hmac.h:328
ll_hmac_enable_little_endian
__STATIC_INLINE void ll_hmac_enable_little_endian(hmac_regs_t *HMACx)
Enable HMAC in little endian.
Definition: gr55xx_ll_hmac.h:404
ll_hmac_init
error_status_t ll_hmac_init(hmac_regs_t *HMACx, ll_hmac_init_t *p_hmac_init)
Initialize HMAC registers according to the specified parameters in p_hmac_init.
ll_hmac_set_dma_transfer_block
__STATIC_INLINE void ll_hmac_set_dma_transfer_block(hmac_regs_t *HMACx, uint32_t block)
Set HMAC transfer blocks in DMA mode.
Definition: gr55xx_ll_hmac.h:848
ll_hmac_set_user_hash_63_32
__STATIC_INLINE void ll_hmac_set_user_hash_63_32(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[63:32].
Definition: gr55xx_ll_hmac.h:1091
ll_hmac_is_enabled_dma_start
__STATIC_INLINE uint32_t ll_hmac_is_enabled_dma_start(hmac_regs_t *HMACx)
Indicate whether the HMAC DMA mode is enabled.
Definition: gr55xx_ll_hmac.h:290
ll_hmac_get_key_type
__STATIC_INLINE uint32_t ll_hmac_get_key_type(hmac_regs_t *HMACx)
Get ways to obtain HMAC key.
Definition: gr55xx_ll_hmac.h:487
ll_hmac_set_user_hash_31_0
__STATIC_INLINE void ll_hmac_set_user_hash_31_0(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[31:0].
Definition: gr55xx_ll_hmac.h:1111
ll_hmac_disable_little_endian
__STATIC_INLINE void ll_hmac_disable_little_endian(hmac_regs_t *HMACx)
Disable HMAC in little endian.
Definition: gr55xx_ll_hmac.h:423
ll_hmac_is_action_flag_hmac_ready
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_hmac_ready(hmac_regs_t *HMACx)
Indicate whether HMAC Ready flag is set.
Definition: gr55xx_ll_hmac.h:708
ll_hmac_get_key_address
__STATIC_INLINE uint32_t ll_hmac_get_key_address(hmac_regs_t *HMACx)
Get HMAC key address in memory.
Definition: gr55xx_ll_hmac.h:1349
ll_hmac_is_action_flag_dma_message_done
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_message_done(hmac_regs_t *HMACx)
Indicate whether DMA Transmit Message Done flag is set.
Definition: gr55xx_ll_hmac.h:727
ll_hmac_is_action_flag_dma_error
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_error(hmac_regs_t *HMACx)
Indicate whether DMA Transfer Error flag is set.
Definition: gr55xx_ll_hmac.h:765
ll_hmac_set_key2
__STATIC_INLINE void ll_hmac_set_key2(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key2.
Definition: gr55xx_ll_hmac.h:1210
ll_hmac_enable_private
__STATIC_INLINE void ll_hmac_enable_private(hmac_regs_t *HMACx)
Enable private mode.
Definition: gr55xx_ll_hmac.h:563
ll_hmac_set_key3
__STATIC_INLINE void ll_hmac_set_key3(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key3.
Definition: gr55xx_ll_hmac.h:1230
ll_hmac_set_key5
__STATIC_INLINE void ll_hmac_set_key5(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key5.
Definition: gr55xx_ll_hmac.h:1270
ll_hmac_set_user_hash_191_160
__STATIC_INLINE void ll_hmac_set_user_hash_191_160(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[191:160].
Definition: gr55xx_ll_hmac.h:1011
ll_hmac_is_enabled_user_hash
__STATIC_INLINE uint32_t ll_hmac_is_enabled_user_hash(hmac_regs_t *HMACx)
Indicate whether the user HASH is enabled.
Definition: gr55xx_ll_hmac.h:385
ll_hmac_struct_init
void ll_hmac_struct_init(ll_hmac_init_t *p_hmac_init)
Set each field of a ll_hmac_init_t type structure to default value.
ll_hmac_disable
__STATIC_INLINE void ll_hmac_disable(hmac_regs_t *HMACx)
Disable HMAC.
Definition: gr55xx_ll_hmac.h:214
ll_hmac_disable_user_hash
__STATIC_INLINE void ll_hmac_disable_user_hash(hmac_regs_t *HMACx)
Disable user HASH.
Definition: gr55xx_ll_hmac.h:366
ll_hmac_is_action_flag_dma_done
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_done(hmac_regs_t *HMACx)
Indicate whether DMA Transfer Done flag is set.
Definition: gr55xx_ll_hmac.h:746
ll_hmac_is_action_flag_it_done
__STATIC_INLINE uint32_t ll_hmac_is_action_flag_it_done(hmac_regs_t *HMACx)
Indicate whether Done interrupt flag is set.
Definition: gr55xx_ll_hmac.h:803
_ll_hmac_init_t::p_key
uint32_t * p_key
Key
Definition: gr55xx_ll_hmac.h:77
ll_hmac_enable_sha
__STATIC_INLINE void ll_hmac_enable_sha(hmac_regs_t *HMACx)
Enable SHA mode.
Definition: gr55xx_ll_hmac.h:506
ll_hmac_set_key6
__STATIC_INLINE void ll_hmac_set_key6(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key6.
Definition: gr55xx_ll_hmac.h:1290
_ll_hmac_init_t::p_hash
uint32_t * p_hash
HASH value
Definition: gr55xx_ll_hmac.h:79
ll_hmac_deinit
error_status_t ll_hmac_deinit(hmac_regs_t *HMACx)
De-initialize HMAC registers (Registers restored to their default values).
ll_hmac_enable_it_done
__STATIC_INLINE void ll_hmac_enable_it_done(hmac_regs_t *HMACx)
Enable the done interrupt for HMAC.
Definition: gr55xx_ll_hmac.h:626
ll_hmac_get_data
__STATIC_INLINE uint32_t ll_hmac_get_data(hmac_regs_t *HMACx)
Get abstract from HMAC.
Definition: gr55xx_ll_hmac.h:1130
ll_hmac_set_user_hash_255_224
__STATIC_INLINE void ll_hmac_set_user_hash_255_224(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[255:224].
Definition: gr55xx_ll_hmac.h:971
ll_hmac_set_dma_write_address
__STATIC_INLINE void ll_hmac_set_dma_write_address(hmac_regs_t *HMACx, uint32_t address)
Set HMAC write address of RAM in DMA mode.
Definition: gr55xx_ll_hmac.h:926
_ll_hmac_init_t
LL HMAC Init Structure definition.
Definition: gr55xx_ll_hmac.h:76
ll_hmac_set_user_hash_95_64
__STATIC_INLINE void ll_hmac_set_user_hash_95_64(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[95:64].
Definition: gr55xx_ll_hmac.h:1071
ll_hmac_disable_private
__STATIC_INLINE void ll_hmac_disable_private(hmac_regs_t *HMACx)
Disable private mode.
Definition: gr55xx_ll_hmac.h:582
ll_hmac_set_user_hash_127_96
__STATIC_INLINE void ll_hmac_set_user_hash_127_96(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[127:96].
Definition: gr55xx_ll_hmac.h:1051
ll_hmac_set_user_hash_159_128
__STATIC_INLINE void ll_hmac_set_user_hash_159_128(hmac_regs_t *HMACx, uint32_t hash)
Set user HASH[159:128].
Definition: gr55xx_ll_hmac.h:1031
ll_hmac_set_key0
__STATIC_INLINE void ll_hmac_set_key0(hmac_regs_t *HMACx, uint32_t key)
Set HMAC key0.
Definition: gr55xx_ll_hmac.h:1170
ll_hmac_disable_it_done
__STATIC_INLINE void ll_hmac_disable_it_done(hmac_regs_t *HMACx)
Disable the done interrupt for HMAC.
Definition: gr55xx_ll_hmac.h:645
ll_hmac_set_dma_read_address
__STATIC_INLINE void ll_hmac_set_dma_read_address(hmac_regs_t *HMACx, uint32_t address)
Set HMAC read address of RAM in DMA mode.
Definition: gr55xx_ll_hmac.h:887
ll_hmac_enable_dma_start
__STATIC_INLINE void ll_hmac_enable_dma_start(hmac_regs_t *HMACx)
Enable HMAC DMA mode.
Definition: gr55xx_ll_hmac.h:252
ll_hmac_get_dma_transfer_block
__STATIC_INLINE uint32_t ll_hmac_get_dma_transfer_block(hmac_regs_t *HMACx)
Get HMAC transfer blocks in DMA mode.
Definition: gr55xx_ll_hmac.h:867
ll_hmac_get_dma_read_address
__STATIC_INLINE uint32_t ll_hmac_get_dma_read_address(hmac_regs_t *HMACx)
Get HMAC read address of RAM in DMA mode.
Definition: gr55xx_ll_hmac.h:906