Macros
QSPI Clock Mode
Peripheral Driver » HAL Driver » QSPI » Defines » QSPI Exported Constants
Collaboration diagram for QSPI Clock Mode:

## Macros
#define | QSPI_CLOCK_MODE_0 (LL_SSI_SCPOL_LOW | LL_SSI_SCPHA_1EDGE)
| Inactive state of CLK is low; CLK toggles at the start of the first data bit More...
#define | QSPI_CLOCK_MODE_1 (LL_SSI_SCPOL_LOW | LL_SSI_SCPHA_2EDGE)
| Inactive state of CLK is low; CLK toggles in the middle of the first data bit More...
#define | QSPI_CLOCK_MODE_2 (LL_SSI_SCPOL_HIGH | LL_SSI_SCPHA_1EDGE)
| Inactive state of CLK is high; CLK toggles at the start of the first data bit More...
#define | QSPI_CLOCK_MODE_3 (LL_SSI_SCPOL_HIGH | LL_SSI_SCPHA_2EDGE)
| Inactive state of CLK is high; CLK toggles in the middle of the first data bit More...

## Detailed Description

## Macro Definition Documentation

## ◆ QSPI_CLOCK_MODE_0

#define QSPI_CLOCK_MODE_0 (LL_SSI_SCPOL_LOW | LL_SSI_SCPHA_1EDGE)

Inactive state of CLK is low; CLK toggles at the start of the first data bit

Definition at line 251 of file gr55xx_hal_qspi.h.

## ◆ QSPI_CLOCK_MODE_1

#define QSPI_CLOCK_MODE_1 (LL_SSI_SCPOL_LOW | LL_SSI_SCPHA_2EDGE)

Inactive state of CLK is low; CLK toggles in the middle of the first data bit

Definition at line 253 of file gr55xx_hal_qspi.h.

## ◆ QSPI_CLOCK_MODE_2

#define QSPI_CLOCK_MODE_2 (LL_SSI_SCPOL_HIGH | LL_SSI_SCPHA_1EDGE)

Inactive state of CLK is high; CLK toggles at the start of the first data bit

Definition at line 255 of file gr55xx_hal_qspi.h.

## ◆ QSPI_CLOCK_MODE_3

#define QSPI_CLOCK_MODE_3 (LL_SSI_SCPOL_HIGH | LL_SSI_SCPHA_2EDGE)

Inactive state of CLK is high; CLK toggles in the middle of the first data bit

Definition at line 257 of file gr55xx_hal_qspi.h.