Macros
Force Clock OFF
Peripheral Driver » LL Driver » CGC » Defines » CGC Exported Constants
Collaboration diagram for Force Clock OFF:

## Macros
#define | LL_CGC_FRC_UART0_HCLK MCU_SUB_FORCE_UART0_HCLK
| Hclk for uart0 More...
#define | LL_CGC_FRC_UART1_HCLK MCU_SUB_FORCE_UART1_HCLK
| Hclk for uart1 More...
#define | LL_CGC_FRC_I2C0_HCLK MCU_SUB_FORCE_I2C0_HCLK
| Hclk for i2c0 More...
#define | LL_CGC_FRC_I2C1_HCLK MCU_SUB_FORCE_I2C1_HCLK
| Hclk for i2c1 More...
#define | LL_CGC_FRC_SPIM_HCLK MCU_SUB_FORCE_SPIM_HCLK
| Hclk for spim More...
#define | LL_CGC_FRC_SPIS_HCLK MCU_SUB_FORCE_SPIS_HCLK
| Hclk for spis More...
#define | LL_CGC_FRC_QSPI0_HCLK MCU_SUB_FORCE_QSPI0_HCLK
| Hclk for qspi0 More...
#define | LL_CGC_FRC_QSPI1_HCLK MCU_SUB_FORCE_QSPI1_HCLK
| Hclk for qspi1 More...
#define | LL_CGC_FRC_I2S_HCLK MCU_SUB_FORCE_I2S_HCLK
| Hclk for i2s More...
#define | LL_CGC_FRC_SECU_DIV4_PCLK MCU_SUB_FORCE_SECU_DIV4_PCLK
| Div4 clk for security blocks. More...
#define | LL_CGC_FRC_XQSPI_DIV4_PCLK MCU_SUB_FORCE_XQSPI_DIV4_PCLK
| Div4 clk for xf qspi More...
#define | LL_CGC_FRC_SERIALS_HCLK2 ((uint32_t)0x0001FF00U)
| Hclk for serial blocks More...
#define | LL_CGC_FRC_ALL_HCLK2 ((uint32_t)0x0A01FF00U)
| All clock group 2 More...

## Detailed Description

## Macro Definition Documentation

## ◆ LL_CGC_FRC_ALL_HCLK2

#define LL_CGC_FRC_ALL_HCLK2 ((uint32_t)0x0A01FF00U)

All clock group 2

Definition at line 195 of file gr55xx_ll_cgc.h.

## ◆ LL_CGC_FRC_I2C0_HCLK

#define LL_CGC_FRC_I2C0_HCLK MCU_SUB_FORCE_I2C0_HCLK

Hclk for i2c0

Definition at line 184 of file gr55xx_ll_cgc.h.

## ◆ LL_CGC_FRC_I2C1_HCLK

#define LL_CGC_FRC_I2C1_HCLK MCU_SUB_FORCE_I2C1_HCLK

Hclk for i2c1

Definition at line 185 of file gr55xx_ll_cgc.h.

## ◆ LL_CGC_FRC_I2S_HCLK

#define LL_CGC_FRC_I2S_HCLK MCU_SUB_FORCE_I2S_HCLK

Hclk for i2s

Definition at line 190 of file gr55xx_ll_cgc.h.

## ◆ LL_CGC_FRC_QSPI0_HCLK

#define LL_CGC_FRC_QSPI0_HCLK MCU_SUB_FORCE_QSPI0_HCLK

Hclk for qspi0

Definition at line 188 of file gr55xx_ll_cgc.h.

## ◆ LL_CGC_FRC_QSPI1_HCLK

#define LL_CGC_FRC_QSPI1_HCLK MCU_SUB_FORCE_QSPI1_HCLK

Hclk for qspi1

Definition at line 189 of file gr55xx_ll_cgc.h.

## ◆ LL_CGC_FRC_SECU_DIV4_PCLK

#define LL_CGC_FRC_SECU_DIV4_PCLK MCU_SUB_FORCE_SECU_DIV4_PCLK

Div4 clk for security blocks.

Definition at line 191 of file gr55xx_ll_cgc.h.

## ◆ LL_CGC_FRC_SERIALS_HCLK2

#define LL_CGC_FRC_SERIALS_HCLK2 ((uint32_t)0x0001FF00U)

Hclk for serial blocks

Definition at line 194 of file gr55xx_ll_cgc.h.

## ◆ LL_CGC_FRC_SPIM_HCLK

#define LL_CGC_FRC_SPIM_HCLK MCU_SUB_FORCE_SPIM_HCLK

Hclk for spim

Definition at line 186 of file gr55xx_ll_cgc.h.

## ◆ LL_CGC_FRC_SPIS_HCLK

#define LL_CGC_FRC_SPIS_HCLK MCU_SUB_FORCE_SPIS_HCLK

Hclk for spis

Definition at line 187 of file gr55xx_ll_cgc.h.

## ◆ LL_CGC_FRC_UART0_HCLK

#define LL_CGC_FRC_UART0_HCLK MCU_SUB_FORCE_UART0_HCLK

Hclk for uart0

Definition at line 182 of file gr55xx_ll_cgc.h.

## ◆ LL_CGC_FRC_UART1_HCLK

#define LL_CGC_FRC_UART1_HCLK MCU_SUB_FORCE_UART1_HCLK

Hclk for uart1

Definition at line 183 of file gr55xx_ll_cgc.h.

## ◆ LL_CGC_FRC_XQSPI_DIV4_PCLK

#define LL_CGC_FRC_XQSPI_DIV4_PCLK MCU_SUB_FORCE_XQSPI_DIV4_PCLK

Div4 clk for xf qspi

Definition at line 192 of file gr55xx_ll_cgc.h.