gr55xx_ll_pkc.h
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1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_pkc.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of PKC LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_PKC PKC
47 * @brief PKC LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55XX_LL_PKC_H__
53 #define __GR55XX_LL_PKC_H__
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* Includes ------------------------------------------------------------------*/
60 #include "gr55xx.h"
61
62 #if defined (PKC)
63
64 /** @addtogroup PKC_LL_MACRO
65 * @{
66 */
67
68 /* Private macros ------------------------------------------------------------*/
69 /** @defgroup PKC_LL_Private_Macro PKC Private Macros
70 * @{
71 */
72 #define ECC_U32_LENGTH (8) /**< ECC Array Length */
73 #define RSA_U32_LENGTH (64) /**< RSA Array Length */
74
75 /** @} */
76
77 /** @} */
78
79 /** @defgroup PKC_LL_STRUCTURES Structures
80 * @{
81 */
82
83 /* Exported types ------------------------------------------------------------*/
84 /** @defgroup PKC_LL_ES_INIT PKC Exported Init structures
85 * @{
86 */
87
88 /**
89 * @brief LL PKC ECC Point Structure definition
90 */
91 typedef struct _ll_ecc_point
92 {
93 uint32_t X[ECC_U32_LENGTH]; /**< Specifies the point in x-axis */
94
95 uint32_t Y[ECC_U32_LENGTH]; /**< Specifies the point in y-axis */
96
97 } ll_ecc_point_t;
98
99 /**
100 * @brief LL PKC ECC P-256 Elliptic Curve Init Structure definition
101 */
102 typedef struct _ll_ecc_curve_init
103 {
104 uint32_t A[ECC_U32_LENGTH]; /**< Operand A array */
105 uint32_t B[ECC_U32_LENGTH]; /**< Operand B array */
106
107 uint32_t P[ECC_U32_LENGTH]; /**< Prime number P array */
108 uint32_t PRSquare[ECC_U32_LENGTH]; /**< R^2 mod P, where R = 2^256 */
109 uint32_t ConstP; /**< Montgomery multiplication constant in prime field P, ConstP = 1 */
110
111 uint32_t N[ECC_U32_LENGTH]; /**< Prime number N array */
112 uint32_t NRSquare[ECC_U32_LENGTH]; /**< R^2 mod N, where R = 2^256 */
113 uint32_t ConstN; /**< Montgomery multiplication constant in prime field N, ConstN = 0xee00bc4f */
114
115 uint32_t H; /**< H */
116
117 ll_ecc_point_t G; /**< ECC Point G */
118
119 } ll_ecc_curve_init_t;
120
121 /**
122 * @brief LL PKC Init Structure definition
123 */
124 typedef struct _ll_pkc_init
125 {
126 ll_ecc_curve_init_t *p_ecc_curve; /**< Specifies the pointer to elliptic curve description */
127
128 uint32_t data_bits; /**< Specifies the Data size: 256 ~ 2048bits */
129
130 } ll_pkc_init_t;
131
132 /** @} */
133
134 /** @} */
135
136 /**
137 * @defgroup PKC_LL_MACRO Defines
138 * @{
139 */
140
141 /* Exported constants --------------------------------------------------------*/
142 /** @defgroup PKC_LL_Exported_Constants PKC Exported Constants
143 * @{
144 */
145
146 /** @defgroup PKC_LL_EC_GET_FLAG Get Flags Defines
147 * @brief Flags defines which can be used with LL_PKC_ReadReg function
148 * @{
149 */
150 #define LL_PKC_WORKSTAT_BUSY PKC_WORKSTAT_BUSY /**< Busy flag */
151 /** @} */
152
153 /** @defgroup PKC_LL_EC_IT IT Defines
154 * @brief Interrupt defines which can be used with LL_PKC_ReadReg and LL_PKC_WriteReg functions
155 * @{
156 */
157 #define LL_PKC_INTEN_DONE PKC_INTEN_DONE /**< Operation Done Interrupt source */
158 #define LL_PKC_INTEN_ERR PKC_INTEN_ERR /**< Operation Error Interrupt source */
159 #define LL_PKC_INTEN_BAOVF PKC_INTEN_BAOVF /**< Big Integer Result Overflow Interrupt source */
160 /** @} */
161
162 /** @defgroup PKC_LL_EC_BITS_LENGTH Bits Length
163 * @{
164 */
165 #define LL_PKC_BITS_LENGTH_MIN (256U) /**< Bits length min value */
166 #define LL_PKC_BITS_LENGTH_MAX (2048U) /**< Bits length max value */
167 #define LL_PKC_BIGMULTI_BITS_LENGTH_MAX (1024U) /**< Big number multiplication bits Length max value */
168 /** @} */
169
170 /** @defgroup PKC_LL_EC_OPERATION_MODE Operation Mode
171 * @{
172 */
173 #define LL_PKC_operation_mode_MULTIPLY (0x00000000U) /**< Multiplication operation mode */
174 #define LL_PKC_operation_mode_INVERTION (1UL << PKC_SW_CTRL_OPMODE_Pos) /**< Inversion operation mode */
175 #define LL_PKC_operation_mode_ADD (2UL << PKC_SW_CTRL_OPMODE_Pos) /**< Addition operation mode */
176 #define LL_PKC_operation_mode_SUB (3UL << PKC_SW_CTRL_OPMODE_Pos) /**< Subtraction operation mode */
177 #define LL_PKC_operation_mode_COMPARE (4UL << PKC_SW_CTRL_OPMODE_Pos) /**< Comparison operation mode */
178 #define LL_PKC_operation_mode_LEFTSHIFT (5UL << PKC_SW_CTRL_OPMODE_Pos) /**< Left Shift operation mode */
179 #define LL_PKC_operation_mode_BIGINTEGERMULTIPLY (6UL << PKC_SW_CTRL_OPMODE_Pos) /**< Big Number Multiplication operation mode */
180 #define LL_PKC_operation_mode_BIGINTEGERADD (7UL << PKC_SW_CTRL_OPMODE_Pos) /**< Big Number Addition operation mode */
181 /** @} */
182
183 /** @defgroup PKC_LL_EC_DEFAULT_CONFIG InitStrcut default configuartion
184 * @{
185 */
186
187 /**
188 * @brief LL PKC ECC Curve default configuretion.
189 */
190 #define LL_ECC_CURVE_DEFAULT_CONFIG LL_ECC_CURVE_SECP256R1_CONFIG
191
192 /**
193 * @brief LL PKC ECC Curve SECP256R1 configuretion.
194 */
195 #define LL_ECC_CURVE_SECP256R1_CONFIG \
196 { \
197 .A = {0xFFFFFFFC, 0x00000004, 0x00000000, 0x00000000, 0x00000003, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFC}, \
198 .B = {0xDC30061D, 0x04874834, 0xE5A220AB, 0xF7212ED6, 0xACF005CD, 0x78843090, 0xD89CDF62, 0x29C4BDDF}, \
199 .P = {0xFFFFFFFF, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF}, \
200 .PRSquare = {0x00000004, 0xFFFFFFFD, 0xFFFFFFFF, 0xFFFFFFFE, 0xFFFFFFFB, 0xFFFFFFFF, 0x00000000, 0x00000003}, \
201 .ConstP = 1, \
202 .N = {0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0xBCE6FAAD, 0xA7179E84, 0xF3B9CAC2, 0xFC632551}, \
203 .NRSquare = {0x66E12D94, 0xF3D95620, 0x2845B239, 0x2B6BEC59, 0x4699799C, 0x49BD6FA6, 0x83244C95, 0xBE79EEA2}, \
204 .ConstN = 0xEE00BC4F, \
205 .H = 1, \
206 .G.X = {0x6B17D1F2, 0xE12C4247, 0xF8BCE6E5, 0x63A440F2, 0x77037D81, 0x2DEB33A0, 0xF4A13945, 0xD898C296}, \
207 .G.Y = {0x4FE342E2, 0xFE1A7F9B, 0x8EE7EB4A, 0x7C0F9E16, 0x2BCE3357, 0x6B315ECE, 0xCBB64068, 0x37BF51F5}, \
208 }
209
210 /**
211 * @brief LL PKC ECC Curve SECP256K1 configuretion.
212 */
213 #define LL_ECC_CURVE_SECP256K1_CONFIG \
214 { \
215 .A = {0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
216 .B = {0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000007, 0x00001AB7}, \
217 .P = {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFE, 0xFFFFFC2F}, \
218 .PRSquare = {0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x000007A2, 0x000E90A1}, \
219 .ConstP = 0XD2253531, \
220 .N = {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFE, 0xBAAEDCE6, 0xAF48A03B, 0xBFD25E8C, 0xD0364141}, \
221 .NRSquare = {0x9D671CD5, 0x81C69BC5, 0xE697F5E4, 0x5BCD07C6, 0x741496C2, 0x0E7CF878, 0x896CF214, 0x67D7D140}, \
222 .ConstN = 0X5588B13F, \
223 .H = 1, \
224 .G.X = {0x79BE667E, 0xF9DCBBAC, 0x55A06295, 0xCE870B07, 0x029BFCDB, 0x2DCE28D9, 0x59F2815B, 0x16F81798}, \
225 .G.Y = {0x483ADA77, 0x26A3C465, 0x5DA4FBFC, 0x0E1108A8, 0xFD17B448, 0xA6855419, 0x9C47D08F, 0xFB10D4B8}, \
226 }
227
228 /** @} */
229
230 /** @} */
231
232 /* Exported macro ------------------------------------------------------------*/
233 /** @defgroup PKC_LL_Exported_Macros PKC Exported Macros
234 * @{
235 */
236
237 /** @defgroup PKC_LL_EM_WRITE_READ Common Write and read registers Macros
238 * @{
239 */
240
241 /**
242 * @brief Write a value in PKC register
243 * @param __INSTANCE__ PKC Instance
244 * @param __REG__ Register to be written
245 * @param __VALUE__ Value to be written in the register
246 * @retval None
247 */
248 #define LL_PKC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
249
250 /**
251 * @brief Read a value in PKC register
252 * @param __INSTANCE__ PKC Instance
253 * @param __REG__ Register to be read
254 * @retval Register value
255 */
256 #define LL_PKC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
257
258 /** @} */
259
260 /** @} */
261
262 /** @} */
263
264 /* Exported functions --------------------------------------------------------*/
265 /** @defgroup PKC_LL_DRIVER_FUNCTIONS Functions
266 * @{
267 */
268
269 /** @defgroup PKC_LL_EF_Configuration Configuration functions
270 * @{
271 */
272
273 /**
274 * @brief Enable pkc.
275 *
276 * \rst
277 * +----------------------+-----------------------------------+
278 * | Register | BitsName |
279 * +======================+===================================+
280 * | CTRL | EN |
281 * +----------------------+-----------------------------------+
282 * \endrst
283 *
284 * @param PKCx PKC instance
285 * @retval None
286 */
287 __STATIC_INLINE void ll_pkc_enable(pkc_regs_t *PKCx)
288 {
289 SET_BITS(PKCx->CTRL, PKC_CTRL_EN);
290 }
291
292 /**
293 * @brief Disable pkc.
294 *
295 * \rst
296 * +----------------------+-----------------------------------+
297 * | Register | BitsName |
298 * +======================+===================================+
299 * | CTRL | EN |
300 * +----------------------+-----------------------------------+
301 * \endrst
302 *
303 * @param PKCx PKC instance
304 * @retval None
305 */
306 __STATIC_INLINE void ll_pkc_disable(pkc_regs_t *PKCx)
307 {
308 CLEAR_BITS(PKCx->CTRL, PKC_CTRL_EN);
309 }
310
311 /**
312 * @brief Indicate whether the pkc is enabled.
313 *
314 * \rst
315 * +----------------------+-----------------------------------+
316 * | Register | BitsName |
317 * +======================+===================================+
318 * | CTRL | EN |
319 * +----------------------+-----------------------------------+
320 * \endrst
321 *
322 * @param PKCx PKC instance
323 * @retval State of bit (1 or 0).
324 */
325 __STATIC_INLINE uint32_t ll_pkc_is_enabled(pkc_regs_t *PKCx)
326 {
327 return (READ_BITS(PKCx->CTRL, PKC_CTRL_EN) == (PKC_CTRL_EN));
328 }
329
330 /**
331 * @brief Enable pkc start in hardware mode.
332 *
333 * \rst
334 * +----------------------+-----------------------------------+
335 * | Register | BitsName |
336 * +======================+===================================+
337 * | CTRL | START |
338 * +----------------------+-----------------------------------+
339 * \endrst
340 *
341 * @param PKCx PKC instance
342 * @retval None
343 */
344 __STATIC_INLINE void ll_pkc_enable_hardware_start(pkc_regs_t *PKCx)
345 {
346 SET_BITS(PKCx->CTRL, PKC_CTRL_START);
347 }
348
349 /**
350 * @brief Disable pkc start in hardware mode.
351 *
352 * \rst
353 * +----------------------+-----------------------------------+
354 * | Register | BitsName |
355 * +======================+===================================+
356 * | CTRL | START |
357 * +----------------------+-----------------------------------+
358 * \endrst
359 *
360 * @param PKCx PKC instance
361 * @retval None
362 */
363 __STATIC_INLINE void ll_pkc_disable_hardware_start(pkc_regs_t *PKCx)
364 {
365 CLEAR_BITS(PKCx->CTRL, PKC_CTRL_START);
366 }
367
368 /**
369 * @brief Indicate whether the pkc start in hardware mode is enabled.
370 *
371 * \rst
372 * +----------------------+-----------------------------------+
373 * | Register | BitsName |
374 * +======================+===================================+
375 * | CTRL | START |
376 * +----------------------+-----------------------------------+
377 * \endrst
378 *
379 * @param PKCx PKC instance
380 * @retval State of bit (1 or 0).
381 */
382 __STATIC_INLINE uint32_t ll_pkc_is_enabled_hardware_start(pkc_regs_t *PKCx)
383 {
384 return (READ_BITS(PKCx->CTRL, PKC_CTRL_START) == (PKC_CTRL_START));
385 }
386
387 /**
388 * @brief Enable pkc software mode.
389 *
390 * \rst
391 * +----------------------+-----------------------------------+
392 * | Register | BitsName |
393 * +======================+===================================+
394 * | CTRL | SWCTRL |
395 * +----------------------+-----------------------------------+
396 * \endrst
397 *
398 * @param PKCx PKC instance
399 * @retval None
400 */
401 __STATIC_INLINE void ll_pkc_enable_software(pkc_regs_t *PKCx)
402 {
403 SET_BITS(PKCx->CTRL, PKC_CTRL_SWCTRL);
404 }
405
406 /**
407 * @brief Disable pkc software mode.
408 *
409 * \rst
410 * +----------------------+-----------------------------------+
411 * | Register | BitsName |
412 * +======================+===================================+
413 * | CTRL | SWCTRL |
414 * +----------------------+-----------------------------------+
415 * \endrst
416 *
417 * @param PKCx PKC instance
418 * @retval None
419 */
420 __STATIC_INLINE void ll_pkc_disable_software(pkc_regs_t *PKCx)
421 {
422 CLEAR_BITS(PKCx->CTRL, PKC_CTRL_SWCTRL);
423 }
424
425 /**
426 * @brief Indicate whether the pkc software mode is enabled.
427 *
428 * \rst
429 * +----------------------+-----------------------------------+
430 * | Register | BitsName |
431 * +======================+===================================+
432 * | CTRL | SWCTRL |
433 * +----------------------+-----------------------------------+
434 * \endrst
435 *
436 * @param PKCx PKC instance
437 * @retval State of bit (1 or 0).
438 */
439 __STATIC_INLINE uint32_t ll_pkc_is_enabled_software(pkc_regs_t *PKCx)
440 {
441 return (READ_BITS(PKCx->CTRL, PKC_CTRL_SWCTRL) == (PKC_CTRL_SWCTRL));
442 }
443
444 /**
445 * @brief Enable pkc reset.
446 *
447 * \rst
448 * +----------------------+-----------------------------------+
449 * | Register | BitsName |
450 * +======================+===================================+
451 * | CTRL | SWRST |
452 * +----------------------+-----------------------------------+
453 * \endrst
454 *
455 * @param PKCx PKC instance
456 * @retval None
457 */
458 __STATIC_INLINE void ll_pkc_enable_reset(pkc_regs_t *PKCx)
459 {
460 SET_BITS(PKCx->CTRL, PKC_CTRL_SWRST);
461 }
462
463 /**
464 * @brief Disable pkc reset.
465 *
466 * \rst
467 * +----------------------+-----------------------------------+
468 * | Register | BitsName |
469 * +======================+===================================+
470 * | CTRL | SWRST |
471 * +----------------------+-----------------------------------+
472 * \endrst
473 *
474 * @param PKCx PKC instance
475 * @retval None
476 */
477 __STATIC_INLINE void ll_pkc_disable_reset(pkc_regs_t *PKCx)
478 {
479 CLEAR_BITS(PKCx->CTRL, PKC_CTRL_SWRST);
480 }
481
482 /**
483 * @brief Indicate whether the pkc reset is enabled.
484 *
485 * \rst
486 * +----------------------+-----------------------------------+
487 * | Register | BitsName |
488 * +======================+===================================+
489 * | CTRL | SWRST |
490 * +----------------------+-----------------------------------+
491 * \endrst
492 *
493 * @param PKCx PKC instance
494 * @retval State of bit (1 or 0).
495 */
496 __STATIC_INLINE uint32_t ll_pkc_is_enabled_reset(pkc_regs_t *PKCx)
497 {
498 return (READ_BITS(PKCx->CTRL, PKC_CTRL_SWRST) == (PKC_CTRL_SWRST));
499 }
500
501 /**
502 * @brief Set PKC parameter k pointer in pkc sram.
503 *
504 * \rst
505 * +----------------------+-----------------------------------+
506 * | Register | BitsName |
507 * +======================+===================================+
508 * | CONFIG0 | KPTR |
509 * +----------------------+-----------------------------------+
510 * \endrst
511 *
512 * @param PKCx PKC instance
513 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
514 * @retval None
515 */
516 __STATIC_INLINE void ll_pkc_set_k_pointer(pkc_regs_t *PKCx, uint32_t pointer)
517 {
518 MODIFY_REG(PKCx->CONFIG0, PKC_CONFIG0_KPTR, pointer << PKC_CONFIG0_KPTR_Pos);
519 }
520
521 /**
522 * @brief Get PKC parameter k pointer in pkc sram.
523 *
524 * \rst
525 * +----------------------+-----------------------------------+
526 * | Register | BitsName |
527 * +======================+===================================+
528 * | CONFIG0 | KPTR |
529 * +----------------------+-----------------------------------+
530 * \endrst
531 *
532 * @param PKCx PKC instance
533 * @retval Return value is between: 0 ~ 0x200
534 */
535 __STATIC_INLINE uint32_t ll_pkc_get_k_pointer(pkc_regs_t *PKCx)
536 {
537 return (READ_BITS(PKCx->CONFIG0, PKC_CONFIG0_KPTR) >> PKC_CONFIG0_KPTR_Pos);
538 }
539
540 /**
541 * @brief Set PKC parameter r pointer in pkc sram.
542 *
543 * \rst
544 * +----------------------+-----------------------------------+
545 * | Register | BitsName |
546 * +======================+===================================+
547 * | CONFIG0 | RPTR |
548 * +----------------------+-----------------------------------+
549 * \endrst
550 *
551 * @param PKCx PKC instance
552 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
553 * @retval None
554 */
555 __STATIC_INLINE void ll_pkc_set_r_pointer(pkc_regs_t *PKCx, uint32_t pointer)
556 {
557 MODIFY_REG(PKCx->CONFIG0, PKC_CONFIG0_RPTR, pointer << PKC_CONFIG0_RPTR_Pos);
558 }
559
560 /**
561 * @brief Get PKC parameter r pointer in pkc sram.
562 *
563 * \rst
564 * +----------------------+-----------------------------------+
565 * | Register | BitsName |
566 * +======================+===================================+
567 * | CONFIG0 | RPTR |
568 * +----------------------+-----------------------------------+
569 * \endrst
570 *
571 * @param PKCx PKC instance
572 * @retval Return value is between: 0 ~ 0x200
573 */
574 __STATIC_INLINE uint32_t ll_pkc_get_r_pointer(pkc_regs_t *PKCx)
575 {
576 return (READ_BITS(PKCx->CONFIG0, PKC_CONFIG0_RPTR) >> PKC_CONFIG0_RPTR_Pos);
577 }
578
579 /**
580 * @brief Set PKC parameter p pointer in pkc sram.
581 *
582 * \rst
583 * +----------------------+-----------------------------------+
584 * | Register | BitsName |
585 * +======================+===================================+
586 * | CONFIG1 | PPTR |
587 * +----------------------+-----------------------------------+
588 * \endrst
589 *
590 * @param PKCx PKC instance
591 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
592 * @retval None
593 */
594 __STATIC_INLINE void ll_pkc_set_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
595 {
596 MODIFY_REG(PKCx->CONFIG1, PKC_CONFIG1_PPTR, pointer << PKC_CONFIG1_PPTR_Pos);
597 }
598
599 /**
600 * @brief Get PKC parameter p pointer in pkc sram.
601 *
602 * \rst
603 * +----------------------+-----------------------------------+
604 * | Register | BitsName |
605 * +======================+===================================+
606 * | CONFIG1 | PPTR |
607 * +----------------------+-----------------------------------+
608 * \endrst
609 *
610 * @param PKCx PKC instance
611 * @retval Return value is between: 0 ~ 0x200
612 */
613 __STATIC_INLINE uint32_t ll_pkc_get_p_pointer(pkc_regs_t *PKCx)
614 {
615 return (READ_BITS(PKCx->CONFIG1, PKC_CONFIG1_PPTR) >> PKC_CONFIG1_PPTR_Pos);
616 }
617
618 /**
619 * @brief Set PKC parameter R^2 pointer in pkc sram.
620 *
621 * \rst
622 * +----------------------+-----------------------------------+
623 * | Register | BitsName |
624 * +======================+===================================+
625 * | CONFIG1 | RSQPTR |
626 * +----------------------+-----------------------------------+
627 * \endrst
628 *
629 * @param PKCx PKC instance
630 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
631 * @retval None
632 */
633 __STATIC_INLINE void ll_pkc_set_rsq_pointer(pkc_regs_t *PKCx, uint32_t pointer)
634 {
635 MODIFY_REG(PKCx->CONFIG1, PKC_CONFIG1_RSQPTR, pointer << PKC_CONFIG1_RSQPTR_Pos);
636 }
637
638 /**
639 * @brief Get PKC parameter R^2 pointer in pkc sram.
640 *
641 * \rst
642 * +----------------------+-----------------------------------+
643 * | Register | BitsName |
644 * +======================+===================================+
645 * | CONFIG1 | RSQPTR |
646 * +----------------------+-----------------------------------+
647 * \endrst
648 *
649 * @param PKCx PKC instance
650 * @retval Return value is between: 0 ~ 0x200
651 */
652 __STATIC_INLINE uint32_t ll_pkc_get_rsq_pointer(pkc_regs_t *PKCx)
653 {
654 return (READ_BITS(PKCx->CONFIG1, PKC_CONFIG1_RSQPTR) >> PKC_CONFIG1_RSQPTR_Pos);
655 }
656
657 /**
658 * @brief Set PKC parameter Gx pointer in pkc sram.
659 *
660 * \rst
661 * +----------------------+-----------------------------------+
662 * | Register | BitsName |
663 * +======================+===================================+
664 * | CONFIG2 | GXPTR |
665 * +----------------------+-----------------------------------+
666 * \endrst
667 *
668 * @param PKCx PKC instance
669 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
670 * @retval None
671 */
672 __STATIC_INLINE void ll_pkc_set_gx_pointer(pkc_regs_t *PKCx, uint32_t pointer)
673 {
674 MODIFY_REG(PKCx->CONFIG2, PKC_CONFIG2_GXPTR, pointer << PKC_CONFIG2_GXPTR_Pos);
675 }
676
677 /**
678 * @brief Get PKC parameter Gx pointer in pkc sram.
679 *
680 * \rst
681 * +----------------------+-----------------------------------+
682 * | Register | BitsName |
683 * +======================+===================================+
684 * | CONFIG2 | GXPTR |
685 * +----------------------+-----------------------------------+
686 * \endrst
687 *
688 * @param PKCx PKC instance
689 * @retval Return value is between: 0 ~ 0x200
690 */
691 __STATIC_INLINE uint32_t ll_pkc_get_gx_pointer(pkc_regs_t *PKCx)
692 {
693 return (READ_BITS(PKCx->CONFIG2, PKC_CONFIG2_GXPTR) >> PKC_CONFIG2_GXPTR_Pos);
694 }
695
696 /**
697 * @brief Set PKC parameter Gy pointer in pkc sram.
698 *
699 * \rst
700 * +----------------------+-----------------------------------+
701 * | Register | BitsName |
702 * +======================+===================================+
703 * | CONFIG2 | GYPTR |
704 * +----------------------+-----------------------------------+
705 * \endrst
706 *
707 * @param PKCx PKC instance
708 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
709 * @retval None
710 */
711 __STATIC_INLINE void ll_pkc_set_gy_pointer(pkc_regs_t *PKCx, uint32_t pointer)
712 {
713 MODIFY_REG(PKCx->CONFIG2, PKC_CONFIG2_GYPTR, pointer << PKC_CONFIG2_GYPTR_Pos);
714 }
715
716 /**
717 * @brief Get PKC parameter Gy pointer in pkc sram.
718 *
719 * \rst
720 * +----------------------+-----------------------------------+
721 * | Register | BitsName |
722 * +======================+===================================+
723 * | CONFIG2 | GYPTR |
724 * +----------------------+-----------------------------------+
725 * \endrst
726 *
727 * @param PKCx PKC instance
728 * @retval Return value is between: 0 ~ 0x200
729 */
730 __STATIC_INLINE uint32_t ll_pkc_get_gy_pointer(pkc_regs_t *PKCx)
731 {
732 return (READ_BITS(PKCx->CONFIG2, PKC_CONFIG2_GYPTR) >> PKC_CONFIG2_GYPTR_Pos);
733 }
734
735 /**
736 * @brief Set PKC parameter Gz pointer in pkc sram.
737 *
738 * \rst
739 * +----------------------+-----------------------------------+
740 * | Register | BitsName |
741 * +======================+===================================+
742 * | CONFIG3 | GZPTR |
743 * +----------------------+-----------------------------------+
744 * \endrst
745 *
746 * @param PKCx PKC instance
747 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
748 * @retval None
749 */
750 __STATIC_INLINE void ll_pkc_set_gz_pointer(pkc_regs_t *PKCx, uint32_t pointer)
751 {
752 MODIFY_REG(PKCx->CONFIG3, PKC_CONFIG3_GZPTR, pointer << PKC_CONFIG3_GZPTR_Pos);
753 }
754
755 /**
756 * @brief Get PKC parameter Gz pointer in pkc sram.
757 *
758 * \rst
759 * +----------------------+-----------------------------------+
760 * | Register | BitsName |
761 * +======================+===================================+
762 * | CONFIG3 | GZPTR |
763 * +----------------------+-----------------------------------+
764 * \endrst
765 *
766 * @param PKCx PKC instance
767 * @retval Return value is between: 0 ~ 0x200
768 */
769 __STATIC_INLINE uint32_t ll_pkc_get_gz_pointer(pkc_regs_t *PKCx)
770 {
771 return (READ_BITS(PKCx->CONFIG3, PKC_CONFIG3_GZPTR) >> PKC_CONFIG3_GZPTR_Pos);
772 }
773
774 /**
775 * @brief Set PKC parameter R0x pointer in pkc sram.
776 *
777 * \rst
778 * +----------------------+-----------------------------------+
779 * | Register | BitsName |
780 * +======================+===================================+
781 * | CONFIG3 | R0XPTR |
782 * +----------------------+-----------------------------------+
783 * \endrst
784 *
785 * @param PKCx PKC instance
786 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
787 * @retval None
788 */
789 __STATIC_INLINE void ll_pkc_set_r0x_pointer(pkc_regs_t *PKCx, uint32_t pointer)
790 {
791 MODIFY_REG(PKCx->CONFIG3, PKC_CONFIG3_R0XPTR, pointer << PKC_CONFIG3_R0XPTR_Pos);
792 }
793
794 /**
795 * @brief Get PKC parameter R0x pointer in pkc sram.
796 *
797 * \rst
798 * +----------------------+-----------------------------------+
799 * | Register | BitsName |
800 * +======================+===================================+
801 * | CONFIG3 | R0XPTR |
802 * +----------------------+-----------------------------------+
803 * \endrst
804 *
805 * @param PKCx PKC instance
806 * @retval Return value is between: 0 ~ 0x200
807 */
808 __STATIC_INLINE uint32_t ll_pkc_get_r0x_pointer(pkc_regs_t *PKCx)
809 {
810 return (READ_BITS(PKCx->CONFIG3, PKC_CONFIG3_R0XPTR) >> PKC_CONFIG3_R0XPTR_Pos);
811 }
812
813 /**
814 * @brief Set PKC parameter R0y pointer in pkc sram.
815 *
816 * \rst
817 * +----------------------+-----------------------------------+
818 * | Register | BitsName |
819 * +======================+===================================+
820 * | CONFIG4 | R0YPTR |
821 * +----------------------+-----------------------------------+
822 * \endrst
823 *
824 * @param PKCx PKC instance
825 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
826 * @retval None
827 */
828 __STATIC_INLINE void ll_pkc_set_r0y_pointer(pkc_regs_t *PKCx, uint32_t pointer)
829 {
830 MODIFY_REG(PKCx->CONFIG4, PKC_CONFIG4_R0YPTR, pointer << PKC_CONFIG4_R0YPTR_Pos);
831 }
832
833 /**
834 * @brief Get PKC parameter R0y pointer in pkc sram.
835 *
836 * \rst
837 * +----------------------+-----------------------------------+
838 * | Register | BitsName |
839 * +======================+===================================+
840 * | CONFIG4 | R0YPTR |
841 * +----------------------+-----------------------------------+
842 * \endrst
843 *
844 * @param PKCx PKC instance
845 * @retval Return value is between: 0 ~ 0x200
846 */
847 __STATIC_INLINE uint32_t ll_pkc_get_r0y_pointer(pkc_regs_t *PKCx)
848 {
849 return (READ_BITS(PKCx->CONFIG4, PKC_CONFIG4_R0YPTR) >> PKC_CONFIG4_R0YPTR_Pos);
850 }
851
852 /**
853 * @brief Set PKC parameter R0z pointer in pkc sram.
854 *
855 * \rst
856 * +----------------------+-----------------------------------+
857 * | Register | BitsName |
858 * +======================+===================================+
859 * | CONFIG4 | R0ZPTR |
860 * +----------------------+-----------------------------------+
861 * \endrst
862 *
863 * @param PKCx PKC instance
864 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
865 * @retval None
866 */
867 __STATIC_INLINE void ll_pkc_set_r0z_pointer(pkc_regs_t *PKCx, uint32_t pointer)
868 {
869 MODIFY_REG(PKCx->CONFIG4, PKC_CONFIG4_R0ZPTR, pointer << PKC_CONFIG4_R0ZPTR_Pos);
870 }
871
872 /**
873 * @brief Get PKC parameter R0z pointer in pkc sram.
874 *
875 * \rst
876 * +----------------------+-----------------------------------+
877 * | Register | BitsName |
878 * +======================+===================================+
879 * | CONFIG4 | R0ZPTR |
880 * +----------------------+-----------------------------------+
881 * \endrst
882 *
883 * @param PKCx PKC instance
884 * @retval Return value is between: 0 ~ 0x200
885 */
886 __STATIC_INLINE uint32_t ll_pkc_get_r0z_pointer(pkc_regs_t *PKCx)
887 {
888 return (READ_BITS(PKCx->CONFIG4, PKC_CONFIG4_R0ZPTR) >> PKC_CONFIG4_R0ZPTR_Pos);
889 }
890
891 /**
892 * @brief Set PKC parameter R1x pointer in pkc sram.
893 *
894 * \rst
895 * +----------------------+-----------------------------------+
896 * | Register | BitsName |
897 * +======================+===================================+
898 * | CONFIG5 | R1XPTR |
899 * +----------------------+-----------------------------------+
900 * \endrst
901 *
902 * @param PKCx PKC instance
903 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
904 * @retval None
905 */
906 __STATIC_INLINE void ll_pkc_set_r1x_pointer(pkc_regs_t *PKCx, uint32_t pointer)
907 {
908 MODIFY_REG(PKCx->CONFIG5, PKC_CONFIG5_R1XPTR, pointer << PKC_CONFIG5_R1XPTR_Pos);
909 }
910
911 /**
912 * @brief Get PKC parameter R1x pointer in pkc sram.
913 *
914 * \rst
915 * +----------------------+-----------------------------------+
916 * | Register | BitsName |
917 * +======================+===================================+
918 * | CONFIG5 | R1XPTR |
919 * +----------------------+-----------------------------------+
920 * \endrst
921 *
922 * @param PKCx PKC instance
923 * @retval Return value is between: 0 ~ 0x200
924 */
925 __STATIC_INLINE uint32_t ll_pkc_get_r1x_pointer(pkc_regs_t *PKCx)
926 {
927 return (READ_BITS(PKCx->CONFIG5, PKC_CONFIG5_R1XPTR) >> PKC_CONFIG5_R1XPTR_Pos);
928 }
929
930 /**
931 * @brief Set PKC parameter R1y pointer in pkc sram.
932 *
933 * \rst
934 * +----------------------+-----------------------------------+
935 * | Register | BitsName |
936 * +======================+===================================+
937 * | CONFIG5 | R1YPTR |
938 * +----------------------+-----------------------------------+
939 * \endrst
940 *
941 * @param PKCx PKC instance
942 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
943 * @retval None
944 */
945 __STATIC_INLINE void ll_pkc_set_r1y_pointer(pkc_regs_t *PKCx, uint32_t pointer)
946 {
947 MODIFY_REG(PKCx->CONFIG5, PKC_CONFIG5_R1YPTR, pointer << PKC_CONFIG5_R1YPTR_Pos);
948 }
949
950 /**
951 * @brief Get PKC parameter R1y pointer in pkc sram.
952 *
953 * \rst
954 * +----------------------+-----------------------------------+
955 * | Register | BitsName |
956 * +======================+===================================+
957 * | CONFIG5 | R1YPTR |
958 * +----------------------+-----------------------------------+
959 * \endrst
960 *
961 * @param PKCx PKC instance
962 * @retval Return value is between: 0 ~ 0x200
963 */
964 __STATIC_INLINE uint32_t ll_pkc_get_r1y_pointer(pkc_regs_t *PKCx)
965 {
966 return (READ_BITS(PKCx->CONFIG5, PKC_CONFIG5_R1YPTR) >> PKC_CONFIG5_R1YPTR_Pos);
967 }
968
969 /**
970 * @brief Set PKC parameter R1z pointer in pkc sram.
971 *
972 * \rst
973 * +----------------------+-----------------------------------+
974 * | Register | BitsName |
975 * +======================+===================================+
976 * | CONFIG6 | R1ZPTR |
977 * +----------------------+-----------------------------------+
978 * \endrst
979 *
980 * @param PKCx PKC instance
981 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
982 * @retval None
983 */
984 __STATIC_INLINE void ll_pkc_set_r1z_pointer(pkc_regs_t *PKCx, uint32_t pointer)
985 {
986 MODIFY_REG(PKCx->CONFIG6, PKC_CONFIG6_R1ZPTR, pointer << PKC_CONFIG6_R1ZPTR_Pos);
987 }
988
989 /**
990 * @brief Get PKC parameter R1z pointer in pkc sram.
991 *
992 * \rst
993 * +----------------------+-----------------------------------+
994 * | Register | BitsName |
995 * +======================+===================================+
996 * | CONFIG6 | R1ZPTR |
997 * +----------------------+-----------------------------------+
998 * \endrst
999 *
1000 * @param PKCx PKC instance
1001 * @retval Return value is between: 0 ~ 0x200
1002 */
1003 __STATIC_INLINE uint32_t ll_pkc_get_r1z_pointer(pkc_regs_t *PKCx)
1004 {
1005 return (READ_BITS(PKCx->CONFIG6, PKC_CONFIG6_R1ZPTR) >> PKC_CONFIG6_R1ZPTR_Pos);
1006 }
1007
1008 /**
1009 * @brief Set PKC parameter Tmp1 pointer in pkc sram.
1010 *
1011 * \rst
1012 * +----------------------+-----------------------------------+
1013 * | Register | BitsName |
1014 * +======================+===================================+
1015 * | CONFIG6 | TMP1PTR |
1016 * +----------------------+-----------------------------------+
1017 * \endrst
1018 *
1019 * @param PKCx PKC instance
1020 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1021 * @retval None
1022 */
1023 __STATIC_INLINE void ll_pkc_set_tmp1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1024 {
1025 MODIFY_REG(PKCx->CONFIG6, PKC_CONFIG6_TMP1PTR, pointer << PKC_CONFIG6_TMP1PTR_Pos);
1026 }
1027
1028 /**
1029 * @brief Get PKC parameter Tmp1 pointer in pkc sram.
1030 *
1031 * \rst
1032 * +----------------------+-----------------------------------+
1033 * | Register | BitsName |
1034 * +======================+===================================+
1035 * | CONFIG6 | TMP1PTR |
1036 * +----------------------+-----------------------------------+
1037 * \endrst
1038 *
1039 * @param PKCx PKC instance
1040 * @retval Return value is between: 0 ~ 0x200
1041 */
1042 __STATIC_INLINE uint32_t ll_pkc_get_tmp1_pointer(pkc_regs_t *PKCx)
1043 {
1044 return (READ_BITS(PKCx->CONFIG6, PKC_CONFIG6_TMP1PTR) >> PKC_CONFIG6_TMP1PTR_Pos);
1045 }
1046
1047 /**
1048 * @brief Set PKC parameter Tmp2 pointer in pkc sram.
1049 *
1050 * \rst
1051 * +----------------------+-----------------------------------+
1052 * | Register | BitsName |
1053 * +======================+===================================+
1054 * | CONFIG7 | TMP2PTR |
1055 * +----------------------+-----------------------------------+
1056 * \endrst
1057 *
1058 * @param PKCx PKC instance
1059 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1060 * @retval None
1061 */
1062 __STATIC_INLINE void ll_pkc_set_tmp2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1063 {
1064 MODIFY_REG(PKCx->CONFIG7, PKC_CONFIG7_TMP2PTR, pointer << PKC_CONFIG7_TMP2PTR_Pos);
1065 }
1066
1067 /**
1068 * @brief Get PKC parameter Tmp2 pointer in pkc sram.
1069 *
1070 * \rst
1071 * +----------------------+-----------------------------------+
1072 * | Register | BitsName |
1073 * +======================+===================================+
1074 * | CONFIG7 | TMP2PTR |
1075 * +----------------------+-----------------------------------+
1076 * \endrst
1077 *
1078 * @param PKCx PKC instance
1079 * @retval Return value is between: 0 ~ 0x200
1080 */
1081 __STATIC_INLINE uint32_t ll_pkc_get_tmp2_pointer(pkc_regs_t *PKCx)
1082 {
1083 return (READ_BITS(PKCx->CONFIG7, PKC_CONFIG7_TMP2PTR) >> PKC_CONFIG7_TMP2PTR_Pos);
1084 }
1085
1086 /**
1087 * @brief Set PKC parameter Tmp3 pointer in pkc sram.
1088 *
1089 * \rst
1090 * +----------------------+-----------------------------------+
1091 * | Register | BitsName |
1092 * +======================+===================================+
1093 * | CONFIG7 | TMP3PTR |
1094 * +----------------------+-----------------------------------+
1095 * \endrst
1096 *
1097 * @param PKCx PKC instance
1098 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1099 * @retval None
1100 */
1101 __STATIC_INLINE void ll_pkc_set_tmp3_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1102 {
1103 MODIFY_REG(PKCx->CONFIG7, PKC_CONFIG7_TMP3PTR, pointer << PKC_CONFIG7_TMP3PTR_Pos);
1104 }
1105
1106 /**
1107 * @brief Get PKC parameter Tmp3 pointer in pkc sram.
1108 *
1109 * \rst
1110 * +----------------------+-----------------------------------+
1111 * | Register | BitsName |
1112 * +======================+===================================+
1113 * | CONFIG7 | TMP3PTR |
1114 * +----------------------+-----------------------------------+
1115 * \endrst
1116 *
1117 * @param PKCx PKC instance
1118 * @retval Return value is between: 0 ~ 0x200
1119 */
1120 __STATIC_INLINE uint32_t ll_pkc_get_tmp3_pointer(pkc_regs_t *PKCx)
1121 {
1122 return (READ_BITS(PKCx->CONFIG7, PKC_CONFIG7_TMP3PTR) >> PKC_CONFIG7_TMP3PTR_Pos);
1123 }
1124
1125 /**
1126 * @brief Set PKC parameter Tmp4 pointer in pkc sram.
1127 *
1128 * \rst
1129 * +----------------------+-----------------------------------+
1130 * | Register | BitsName |
1131 * +======================+===================================+
1132 * | CONFIG8 | TMP4PTR |
1133 * +----------------------+-----------------------------------+
1134 * \endrst
1135 *
1136 * @param PKCx PKC instance
1137 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1138 * @retval None
1139 */
1140 __STATIC_INLINE void ll_pkc_set_tmp4_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1141 {
1142 MODIFY_REG(PKCx->CONFIG8, PKC_CONFIG8_TMP4PTR, pointer << PKC_CONFIG8_TMP4PTR_Pos);
1143 }
1144
1145 /**
1146 * @brief Get PKC parameter Tmp4 pointer in pkc sram.
1147 *
1148 * \rst
1149 * +----------------------+-----------------------------------+
1150 * | Register | BitsName |
1151 * +======================+===================================+
1152 * | CONFIG8 | TMP4PTR |
1153 * +----------------------+-----------------------------------+
1154 * \endrst
1155 *
1156 * @param PKCx PKC instance
1157 * @retval Return value is between: 0 ~ 0x200
1158 */
1159 __STATIC_INLINE uint32_t ll_pkc_get_tmp4_pointer(pkc_regs_t *PKCx)
1160 {
1161 return (READ_BITS(PKCx->CONFIG8, PKC_CONFIG8_TMP4PTR) >> PKC_CONFIG8_TMP4PTR_Pos);
1162 }
1163
1164 /**
1165 * @brief Set PKC parameter Tmp5 pointer in pkc sram.
1166 *
1167 * \rst
1168 * +----------------------+-----------------------------------+
1169 * | Register | BitsName |
1170 * +======================+===================================+
1171 * | CONFIG8 | TMP5PTR |
1172 * +----------------------+-----------------------------------+
1173 * \endrst
1174 *
1175 * @param PKCx PKC instance
1176 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1177 * @retval None
1178 */
1179 __STATIC_INLINE void ll_pkc_set_tmp5_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1180 {
1181 MODIFY_REG(PKCx->CONFIG8, PKC_CONFIG8_TMP5PTR, pointer << PKC_CONFIG8_TMP5PTR_Pos);
1182 }
1183
1184 /**
1185 * @brief Get PKC parameter Tmp5 pointer in pkc sram.
1186 *
1187 * \rst
1188 * +----------------------+-----------------------------------+
1189 * | Register | BitsName |
1190 * +======================+===================================+
1191 * | CONFIG8 | TMP5PTR |
1192 * +----------------------+-----------------------------------+
1193 * \endrst
1194 *
1195 * @param PKCx PKC instance
1196 * @retval Return value is between: 0 ~ 0x200
1197 */
1198 __STATIC_INLINE uint32_t ll_pkc_get_tmp5_pointer(pkc_regs_t *PKCx)
1199 {
1200 return (READ_BITS(PKCx->CONFIG8, PKC_CONFIG8_TMP5PTR) >> PKC_CONFIG8_TMP5PTR_Pos);
1201 }
1202
1203 /**
1204 * @brief Set PKC parameter Tmp6 pointer in pkc sram.
1205 *
1206 * \rst
1207 * +----------------------+-----------------------------------+
1208 * | Register | BitsName |
1209 * +======================+===================================+
1210 * | CONFIG9 | TMP6PTR |
1211 * +----------------------+-----------------------------------+
1212 * \endrst
1213 *
1214 * @param PKCx PKC instance
1215 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1216 * @retval None
1217 */
1218 __STATIC_INLINE void ll_pkc_set_tmp6_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1219 {
1220 MODIFY_REG(PKCx->CONFIG9, PKC_CONFIG9_TMP6PTR, pointer << PKC_CONFIG9_TMP6PTR_Pos);
1221 }
1222
1223 /**
1224 * @brief Get PKC parameter Tmp6 pointer in pkc sram.
1225 *
1226 * \rst
1227 * +----------------------+-----------------------------------+
1228 * | Register | BitsName |
1229 * +======================+===================================+
1230 * | CONFIG9 | TMP6PTR |
1231 * +----------------------+-----------------------------------+
1232 * \endrst
1233 *
1234 * @param PKCx PKC instance
1235 * @retval Return value is between: 0 ~ 0x200
1236 */
1237 __STATIC_INLINE uint32_t ll_pkc_get_tmp6_pointer(pkc_regs_t *PKCx)
1238 {
1239 return (READ_BITS(PKCx->CONFIG9, PKC_CONFIG9_TMP6PTR) >> PKC_CONFIG9_TMP6PTR_Pos);
1240 }
1241
1242 /**
1243 * @brief Set PKC parameter Constant1 pointer in pkc sram.
1244 *
1245 * \rst
1246 * +----------------------+-----------------------------------+
1247 * | Register | BitsName |
1248 * +======================+===================================+
1249 * | CONFIG9 | CONST1PTR |
1250 * +----------------------+-----------------------------------+
1251 * \endrst
1252 *
1253 * @param PKCx PKC instance
1254 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1255 * @retval None
1256 */
1257 __STATIC_INLINE void ll_pkc_set_constant1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1258 {
1259 MODIFY_REG(PKCx->CONFIG9, PKC_CONFIG9_CONST1PTR, pointer << PKC_CONFIG9_CONST1PTR_Pos);
1260 }
1261
1262 /**
1263 * @brief Get PKC parameter Constant1 pointer in pkc sram.
1264 *
1265 * \rst
1266 * +----------------------+-----------------------------------+
1267 * | Register | BitsName |
1268 * +======================+===================================+
1269 * | CONFIG9 | CONST1PTR |
1270 * +----------------------+-----------------------------------+
1271 * \endrst
1272 *
1273 * @param PKCx PKC instance
1274 * @retval Return value is between: 0 ~ 0x200
1275 */
1276 __STATIC_INLINE uint32_t ll_pkc_get_constant1_pointer(pkc_regs_t *PKCx)
1277 {
1278 return (READ_BITS(PKCx->CONFIG9, PKC_CONFIG9_CONST1PTR) >> PKC_CONFIG9_CONST1PTR_Pos);
1279 }
1280
1281 /**
1282 * @brief Set PKC parameter X1 pointer in pkc sram.
1283 *
1284 * \rst
1285 * +----------------------+-----------------------------------+
1286 * | Register | BitsName |
1287 * +======================+===================================+
1288 * | CONFIG10 | X1PTR |
1289 * +----------------------+-----------------------------------+
1290 * \endrst
1291 *
1292 * @param PKCx PKC instance
1293 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1294 * @retval None
1295 */
1296 __STATIC_INLINE void ll_pkc_set_x1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1297 {
1298 MODIFY_REG(PKCx->CONFIG10, PKC_CONFIG10_X1PTR, pointer << PKC_CONFIG10_X1PTR_Pos);
1299 }
1300
1301 /**
1302 * @brief Get PKC parameter X1 pointer in pkc sram.
1303 *
1304 * \rst
1305 * +----------------------+-----------------------------------+
1306 * | Register | BitsName |
1307 * +======================+===================================+
1308 * | CONFIG10 | X1PTR |
1309 * +----------------------+-----------------------------------+
1310 * \endrst
1311 *
1312 * @param PKCx PKC instance
1313 * @retval Return value is between: 0 ~ 0x200
1314 */
1315 __STATIC_INLINE uint32_t ll_pkc_get_x1_pointer(pkc_regs_t *PKCx)
1316 {
1317 return (READ_BITS(PKCx->CONFIG10, PKC_CONFIG10_X1PTR) >> PKC_CONFIG10_X1PTR_Pos);
1318 }
1319
1320 /**
1321 * @brief Set PKC parameter X2 pointer in pkc sram.
1322 *
1323 * \rst
1324 * +----------------------+-----------------------------------+
1325 * | Register | BitsName |
1326 * +======================+===================================+
1327 * | CONFIG10 | X2PTR |
1328 * +----------------------+-----------------------------------+
1329 * \endrst
1330 *
1331 * @param PKCx PKC instance
1332 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1333 * @retval None
1334 */
1335 __STATIC_INLINE void ll_pkc_set_x2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1336 {
1337 MODIFY_REG(PKCx->CONFIG10, PKC_CONFIG10_X2PTR, pointer << PKC_CONFIG10_X2PTR_Pos);
1338 }
1339
1340 /**
1341 * @brief Get PKC parameter X2 pointer in pkc sram.
1342 *
1343 * \rst
1344 * +----------------------+-----------------------------------+
1345 * | Register | BitsName |
1346 * +======================+===================================+
1347 * | CONFIG10 | X2PTR |
1348 * +----------------------+-----------------------------------+
1349 * \endrst
1350 *
1351 * @param PKCx PKC instance
1352 * @retval Return value is between: 0 ~ 0x200
1353 */
1354 __STATIC_INLINE uint32_t ll_pkc_get_x2_pointer(pkc_regs_t *PKCx)
1355 {
1356 return (READ_BITS(PKCx->CONFIG10, PKC_CONFIG10_X2PTR) >> PKC_CONFIG10_X2PTR_Pos);
1357 }
1358
1359 /**
1360 * @brief Set PKC parameter MITmp pointer in pkc sram.
1361 *
1362 * \rst
1363 * +----------------------+-----------------------------------+
1364 * | Register | BitsName |
1365 * +======================+===================================+
1366 * | CONFIG11 | MITMPPTR |
1367 * +----------------------+-----------------------------------+
1368 * \endrst
1369 *
1370 * @param PKCx PKC instance
1371 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1372 * @retval None
1373 */
1374 __STATIC_INLINE void ll_pkc_set_mitmp_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1375 {
1376 MODIFY_REG(PKCx->CONFIG11, PKC_CONFIG11_MITMPPTR, pointer << PKC_CONFIG11_MITMPPTR_Pos);
1377 }
1378
1379 /**
1380 * @brief Get PKC parameter MITmp pointer in pkc sram.
1381 *
1382 * \rst
1383 * +----------------------+-----------------------------------+
1384 * | Register | BitsName |
1385 * +======================+===================================+
1386 * | CONFIG11 | MITMPPTR |
1387 * +----------------------+-----------------------------------+
1388 * \endrst
1389 *
1390 * @param PKCx PKC instance
1391 * @retval Return value is between: 0 ~ 0x200
1392 */
1393 __STATIC_INLINE uint32_t ll_pkc_get_mitmp_pointer(pkc_regs_t *PKCx)
1394 {
1395 return (READ_BITS(PKCx->CONFIG11, PKC_CONFIG11_MITMPPTR) >> PKC_CONFIG11_MITMPPTR_Pos);
1396 }
1397
1398 /**
1399 * @brief Set PKC parameter TmpK pointer in pkc sram.
1400 *
1401 * \rst
1402 * +----------------------+-----------------------------------+
1403 * | Register | BitsName |
1404 * +======================+===================================+
1405 * | CONFIG11 | TMPKPTR |
1406 * +----------------------+-----------------------------------+
1407 * \endrst
1408 *
1409 * @param PKCx PKC instance
1410 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1411 * @retval None
1412 */
1413 __STATIC_INLINE void ll_pkc_set_tmpk_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1414 {
1415 MODIFY_REG(PKCx->CONFIG11, PKC_CONFIG11_TMPKPTR, pointer << PKC_CONFIG11_TMPKPTR_Pos);
1416 }
1417
1418 /**
1419 * @brief Get PKC parameter TmpK pointer in pkc sram.
1420 *
1421 * \rst
1422 * +----------------------+-----------------------------------+
1423 * | Register | BitsName |
1424 * +======================+===================================+
1425 * | CONFIG11 | TMPKPTR |
1426 * +----------------------+-----------------------------------+
1427 * \endrst
1428 *
1429 * @param PKCx PKC instance
1430 * @retval Return value is between: 0 ~ 0x200
1431 */
1432 __STATIC_INLINE uint32_t ll_pkc_get_tmpk_pointer(pkc_regs_t *PKCx)
1433 {
1434 return (READ_BITS(PKCx->CONFIG11, PKC_CONFIG11_TMPKPTR) >> PKC_CONFIG11_TMPKPTR_Pos);
1435 }
1436
1437 /**
1438 * @brief Set ECC parameter A pointer in pkc sram.
1439 *
1440 * \rst
1441 * +----------------------+-----------------------------------+
1442 * | Register | BitsName |
1443 * +======================+===================================+
1444 * | CONFIG12 | APTR |
1445 * +----------------------+-----------------------------------+
1446 * \endrst
1447 *
1448 * @param PKCx PKC instance
1449 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1450 * @retval None
1451 */
1452 __STATIC_INLINE void ll_pkc_set_ecc_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1453 {
1454 MODIFY_REG(PKCx->CONFIG12, PKC_CONFIG12_APTR, pointer << PKC_CONFIG12_APTR_Pos);
1455 }
1456
1457 /**
1458 * @brief Get ECC parameter A pointer in pkc sram.
1459 *
1460 * \rst
1461 * +----------------------+-----------------------------------+
1462 * | Register | BitsName |
1463 * +======================+===================================+
1464 * | CONFIG12 | APTR |
1465 * +----------------------+-----------------------------------+
1466 * \endrst
1467 *
1468 * @param PKCx PKC instance
1469 * @retval Return value is between: 0 ~ 0x200
1470 */
1471 __STATIC_INLINE uint32_t ll_pkc_get_ecc_a_pointer(pkc_regs_t *PKCx)
1472 {
1473 return (READ_BITS(PKCx->CONFIG12, PKC_CONFIG12_APTR) >> PKC_CONFIG12_APTR_Pos);
1474 }
1475
1476 /**
1477 * @brief Set ECC parameter B pointer in pkc sram.
1478 *
1479 * \rst
1480 * +----------------------+-----------------------------------+
1481 * | Register | BitsName |
1482 * +======================+===================================+
1483 * | CONFIG12 | BPTR |
1484 * +----------------------+-----------------------------------+
1485 * \endrst
1486 *
1487 * @param PKCx PKC instance
1488 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1489 * @retval None
1490 */
1491 __STATIC_INLINE void ll_pkc_set_ecc_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1492 {
1493 MODIFY_REG(PKCx->CONFIG12, PKC_CONFIG12_BPTR, pointer << PKC_CONFIG12_BPTR_Pos);
1494 }
1495
1496 /**
1497 * @brief Get ECC parameter B pointer in pkc sram.
1498 *
1499 * \rst
1500 * +----------------------+-----------------------------------+
1501 * | Register | BitsName |
1502 * +======================+===================================+
1503 * | CONFIG12 | BPTR |
1504 * +----------------------+-----------------------------------+
1505 * \endrst
1506 *
1507 * @param PKCx PKC instance
1508 * @retval Return value is between: 0 ~ 0x200
1509 */
1510 __STATIC_INLINE uint32_t ll_pkc_get_ecc_b_pointer(pkc_regs_t *PKCx)
1511 {
1512 return (READ_BITS(PKCx->CONFIG12, PKC_CONFIG12_BPTR) >> PKC_CONFIG12_BPTR_Pos);
1513 }
1514
1515 /**
1516 * @brief Set constant value for montgomery multiply in pkc sram.
1517 *
1518 * \rst
1519 * +----------------------+-----------------------------------+
1520 * | Register | BitsName |
1521 * +======================+===================================+
1522 * | CONFIG13 | CONSTP |
1523 * +----------------------+-----------------------------------+
1524 * \endrst
1525 *
1526 * @param PKCx PKC instance
1527 * @param ConstP This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1528 * @retval None
1529 */
1530 __STATIC_INLINE void ll_pkc_set_constp(pkc_regs_t *PKCx, uint32_t ConstP)
1531 {
1532 WRITE_REG(PKCx->CONFIG13, ConstP);
1533 }
1534
1535 /**
1536 * @brief Get constant value for montgomery multiply in pkc sram.
1537 *
1538 * \rst
1539 * +----------------------+-----------------------------------+
1540 * | Register | BitsName |
1541 * +======================+===================================+
1542 * | CONFIG13 | CONSTP |
1543 * +----------------------+-----------------------------------+
1544 * \endrst
1545 *
1546 * @param PKCx PKC instance
1547 * @retval Return value is between: 0 ~ 0x200
1548 */
1549 __STATIC_INLINE uint32_t ll_pkc_get_constp(pkc_regs_t *PKCx)
1550 {
1551 return (READ_REG(PKCx->CONFIG13));
1552 }
1553
1554 /**
1555 * @brief Enable pkc start in software mode.
1556 *
1557 * \rst
1558 * +----------------------+-----------------------------------+
1559 * | Register | BitsName |
1560 * +======================+===================================+
1561 * | SW_CTRL | OPSTART |
1562 * +----------------------+-----------------------------------+
1563 * \endrst
1564 *
1565 * @param PKCx PKC instance
1566 * @retval None
1567 */
1568 __STATIC_INLINE void ll_pkc_enable_software_start(pkc_regs_t *PKCx)
1569 {
1570 SET_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_OPSTART);
1571 }
1572
1573 /**
1574 * @brief Disable pkc start in software mode.
1575 *
1576 * \rst
1577 * +----------------------+-----------------------------------+
1578 * | Register | BitsName |
1579 * +======================+===================================+
1580 * | SW_CTRL | OPSTART |
1581 * +----------------------+-----------------------------------+
1582 * \endrst
1583 *
1584 * @param PKCx PKC instance
1585 * @retval None
1586 */
1587 __STATIC_INLINE void ll_pkc_disable_software_start(pkc_regs_t *PKCx)
1588 {
1589 CLEAR_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_OPSTART);
1590 }
1591
1592 /**
1593 * @brief Indicate whether the pkc start in software mode is enabled.
1594 *
1595 * \rst
1596 * +----------------------+-----------------------------------+
1597 * | Register | BitsName |
1598 * +======================+===================================+
1599 * | SW_CTRL | OPSTART |
1600 * +----------------------+-----------------------------------+
1601 * \endrst
1602 *
1603 * @param PKCx PKC instance
1604 * @retval State of bit (1 or 0).
1605 */
1606 __STATIC_INLINE uint32_t ll_pkc_is_enabled_software_start(pkc_regs_t *PKCx)
1607 {
1608 return (READ_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_OPSTART) == (PKC_SW_CTRL_OPSTART));
1609 }
1610
1611 /**
1612 * @brief Set operation mode in software mode.
1613 *
1614 * \rst
1615 * +----------------------+-----------------------------------+
1616 * | Register | BitsName |
1617 * +======================+===================================+
1618 * | SW_CTRL | OPMODE |
1619 * +----------------------+-----------------------------------+
1620 * \endrst
1621 *
1622 * @param PKCx PKC instance
1623 * @param operation_mode This parameter can be one of the following values:
1624 * @arg @ref LL_PKC_operation_mode_MULTIPLY
1625 * @arg @ref LL_PKC_operation_mode_INVERTION
1626 * @arg @ref LL_PKC_operation_mode_ADD
1627 * @arg @ref LL_PKC_operation_mode_SUB
1628 * @arg @ref LL_PKC_operation_mode_COMPARE
1629 * @arg @ref LL_PKC_operation_mode_LEFTSHIFT
1630 * @arg @ref LL_PKC_operation_mode_BIGINTEGERMULTIPLY
1631 * @arg @ref LL_PKC_operation_mode_BIGINTEGERADD
1632 * @retval None
1633 */
1634 __STATIC_INLINE void ll_pkc_set_operation_mode(pkc_regs_t *PKCx, uint32_t operation_mode)
1635 {
1636 MODIFY_REG(PKCx->SW_CTRL, PKC_SW_CTRL_OPMODE, operation_mode);
1637 }
1638
1639 /**
1640 * @brief Get operation mode in software mode.
1641 *
1642 * \rst
1643 * +----------------------+-----------------------------------+
1644 * | Register | BitsName |
1645 * +======================+===================================+
1646 * | SW_CTRL | OPMODE |
1647 * +----------------------+-----------------------------------+
1648 * \endrst
1649 *
1650 * @param PKCx PKC instance
1651 * @retval Return value can be one of the following values:
1652 * @arg @ref LL_PKC_operation_mode_MULTIPLY
1653 * @arg @ref LL_PKC_operation_mode_INVERTION
1654 * @arg @ref LL_PKC_operation_mode_ADD
1655 * @arg @ref LL_PKC_operation_mode_SUB
1656 * @arg @ref LL_PKC_operation_mode_COMPARE
1657 * @arg @ref LL_PKC_operation_mode_LEFTSHIFT
1658 * @arg @ref LL_PKC_operation_mode_BIGINTEGERMULTIPLY
1659 * @arg @ref LL_PKC_operation_mode_BIGINTEGERADD
1660 */
1661 __STATIC_INLINE uint32_t ll_pkc_get_operation_mode(pkc_regs_t *PKCx)
1662 {
1663 return (READ_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_OPMODE));
1664 }
1665
1666 /**
1667 * @brief Enable Dummy Multi in software mode.
1668 *
1669 * \rst
1670 * +----------------------+-----------------------------------+
1671 * | Register | BitsName |
1672 * +======================+===================================+
1673 * | SW_CTRL | STARTDM |
1674 * +----------------------+-----------------------------------+
1675 * \endrst
1676 *
1677 * @param PKCx PKC instance
1678 * @retval None
1679 */
1680 __STATIC_INLINE void ll_pkc_enable_dummy_multi(pkc_regs_t *PKCx)
1681 {
1682 SET_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_STARTDM);
1683 }
1684
1685 /**
1686 * @brief Disable Dummy Multi in software mode.
1687 *
1688 * \rst
1689 * +----------------------+-----------------------------------+
1690 * | Register | BitsName |
1691 * +======================+===================================+
1692 * | SW_CTRL | STARTDM |
1693 * +----------------------+-----------------------------------+
1694 * \endrst
1695 *
1696 * @param PKCx PKC instance
1697 * @retval None
1698 */
1699 __STATIC_INLINE void ll_pkc_disable_dummy_multi(pkc_regs_t *PKCx)
1700 {
1701 CLEAR_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_STARTDM);
1702 }
1703
1704 /**
1705 * @brief Indicate whether the Dummy Multi in software mode is enabled.
1706 *
1707 * \rst
1708 * +----------------------+-----------------------------------+
1709 * | Register | BitsName |
1710 * +======================+===================================+
1711 * | SW_CTRL | STARTDM |
1712 * +----------------------+-----------------------------------+
1713 * \endrst
1714 *
1715 * @param PKCx PKC instance
1716 * @retval State of bit (1 or 0).
1717 */
1718 __STATIC_INLINE uint32_t ll_pkc_is_enabled_dummy_multi(pkc_regs_t *PKCx)
1719 {
1720 return (READ_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_STARTDM) == (PKC_SW_CTRL_STARTDM));
1721 }
1722
1723 /**
1724 * @brief Enable Random Clock Gating in software mode.
1725 *
1726 * \rst
1727 * +----------------------+-----------------------------------+
1728 * | Register | BitsName |
1729 * +======================+===================================+
1730 * | SW_CTRL | RANDEN |
1731 * +----------------------+-----------------------------------+
1732 * \endrst
1733 *
1734 * @param PKCx PKC instance
1735 * @retval None
1736 */
1737 __STATIC_INLINE void ll_pkc_enable_random_clock_gating(pkc_regs_t *PKCx)
1738 {
1739 SET_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_RANDEN);
1740 }
1741
1742 /**
1743 * @brief Disable Random Clock Gating in software mode.
1744 *
1745 * \rst
1746 * +----------------------+-----------------------------------+
1747 * | Register | BitsName |
1748 * +======================+===================================+
1749 * | SW_CTRL | RANDEN |
1750 * +----------------------+-----------------------------------+
1751 * \endrst
1752 *
1753 * @param PKCx PKC instance
1754 * @retval None
1755 */
1756 __STATIC_INLINE void ll_pkc_disable_random_clock_gating(pkc_regs_t *PKCx)
1757 {
1758 CLEAR_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_RANDEN);
1759 }
1760
1761 /**
1762 * @brief Indicate whether the Random Clock Gating in software mode is enabled.
1763 *
1764 * \rst
1765 * +----------------------+-----------------------------------+
1766 * | Register | BitsName |
1767 * +======================+===================================+
1768 * | SW_CTRL | RANDEN |
1769 * +----------------------+-----------------------------------+
1770 * \endrst
1771 *
1772 * @param PKCx PKC instance
1773 * @retval State of bit (1 or 0).
1774 */
1775 __STATIC_INLINE uint32_t ll_pkc_is_enabled_random_clock_gating(pkc_regs_t *PKCx)
1776 {
1777 return (READ_BITS(PKCx->SW_CTRL, PKC_SW_CTRL_RANDEN) == (PKC_SW_CTRL_RANDEN));
1778 }
1779
1780 /**
1781 * @brief Set modular multiplication parameter A pointer in pkc sram.
1782 *
1783 * \rst
1784 * +----------------------+-----------------------------------+
1785 * | Register | BitsName |
1786 * +======================+===================================+
1787 * | SW_CONFIG0 | MMAPTR |
1788 * +----------------------+-----------------------------------+
1789 * \endrst
1790 *
1791 * @param PKCx PKC instance
1792 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1793 * @retval None
1794 */
1795 __STATIC_INLINE void ll_pkc_set_mm_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1796 {
1797 MODIFY_REG(PKCx->SW_CONFIG0, PKC_SW_CONFIG0_MMAPTR, pointer << PKC_SW_CONFIG0_MMAPTR_Pos);
1798 }
1799
1800 /**
1801 * @brief Get modular multiplication parameter A pointer in pkc sram.
1802 *
1803 * \rst
1804 * +----------------------+-----------------------------------+
1805 * | Register | BitsName |
1806 * +======================+===================================+
1807 * | SW_CONFIG0 | MMAPTR |
1808 * +----------------------+-----------------------------------+
1809 * \endrst
1810 *
1811 * @param PKCx PKC instance
1812 * @retval Return value is between: 0 ~ 0x200
1813 */
1814 __STATIC_INLINE uint32_t ll_pkc_get_mm_a_pointer(pkc_regs_t *PKCx)
1815 {
1816 return (READ_BITS(PKCx->SW_CONFIG0, PKC_SW_CONFIG0_MMAPTR) >> PKC_SW_CONFIG0_MMAPTR_Pos);
1817 }
1818
1819 /**
1820 * @brief Set modular multiplication parameter B pointer in pkc sram.
1821 *
1822 * \rst
1823 * +----------------------+-----------------------------------+
1824 * | Register | BitsName |
1825 * +======================+===================================+
1826 * | SW_CONFIG0 | MMBPTR |
1827 * +----------------------+-----------------------------------+
1828 * \endrst
1829 *
1830 * @param PKCx PKC instance
1831 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1832 * @retval None
1833 */
1834 __STATIC_INLINE void ll_pkc_set_mm_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1835 {
1836 MODIFY_REG(PKCx->SW_CONFIG0, PKC_SW_CONFIG0_MMBPTR, pointer << PKC_SW_CONFIG0_MMBPTR_Pos);
1837 }
1838
1839 /**
1840 * @brief Get modular multiplication parameter B pointer in pkc sram.
1841 *
1842 * \rst
1843 * +----------------------+-----------------------------------+
1844 * | Register | BitsName |
1845 * +======================+===================================+
1846 * | SW_CONFIG0 | MMBPTR |
1847 * +----------------------+-----------------------------------+
1848 * \endrst
1849 *
1850 * @param PKCx PKC instance
1851 * @retval Return value is between: 0 ~ 0x200
1852 */
1853 __STATIC_INLINE uint32_t ll_pkc_get_mm_b_pointer(pkc_regs_t *PKCx)
1854 {
1855 return (READ_BITS(PKCx->SW_CONFIG0, PKC_SW_CONFIG0_MMBPTR) >> PKC_SW_CONFIG0_MMBPTR_Pos);
1856 }
1857
1858 /**
1859 * @brief Set modular multiplication parameter P pointer in pkc sram.
1860 *
1861 * \rst
1862 * +----------------------+-----------------------------------+
1863 * | Register | BitsName |
1864 * +======================+===================================+
1865 * | SW_CONFIG1 | MMPPTR |
1866 * +----------------------+-----------------------------------+
1867 * \endrst
1868 *
1869 * @param PKCx PKC instance
1870 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1871 * @retval None
1872 */
1873 __STATIC_INLINE void ll_pkc_set_mm_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1874 {
1875 MODIFY_REG(PKCx->SW_CONFIG1, PKC_SW_CONFIG1_MMPPTR, pointer << PKC_SW_CONFIG1_MMPPTR_Pos);
1876 }
1877
1878 /**
1879 * @brief Get modular multiplication parameter P pointer in pkc sram.
1880 *
1881 * \rst
1882 * +----------------------+-----------------------------------+
1883 * | Register | BitsName |
1884 * +======================+===================================+
1885 * | SW_CONFIG1 | MMPPTR |
1886 * +----------------------+-----------------------------------+
1887 * \endrst
1888 *
1889 * @param PKCx PKC instance
1890 * @retval Return value is between: 0 ~ 0x200
1891 */
1892 __STATIC_INLINE uint32_t ll_pkc_get_mm_p_pointer(pkc_regs_t *PKCx)
1893 {
1894 return (READ_BITS(PKCx->SW_CONFIG1, PKC_SW_CONFIG1_MMPPTR) >> PKC_SW_CONFIG1_MMPPTR_Pos);
1895 }
1896
1897 /**
1898 * @brief Set modular multiplication parameter C pointer in pkc sram.
1899 *
1900 * \rst
1901 * +----------------------+-----------------------------------+
1902 * | Register | BitsName |
1903 * +======================+===================================+
1904 * | SW_CONFIG1 | MMCPTR |
1905 * +----------------------+-----------------------------------+
1906 * \endrst
1907 *
1908 * @param PKCx PKC instance
1909 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1910 * @retval None
1911 */
1912 __STATIC_INLINE void ll_pkc_set_mm_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1913 {
1914 MODIFY_REG(PKCx->SW_CONFIG1, PKC_SW_CONFIG1_MMCPTR, pointer << PKC_SW_CONFIG1_MMCPTR_Pos);
1915 }
1916
1917 /**
1918 * @brief Get modular multiplication parameter C pointer in pkc sram.
1919 *
1920 * \rst
1921 * +----------------------+-----------------------------------+
1922 * | Register | BitsName |
1923 * +======================+===================================+
1924 * | SW_CONFIG1 | MMCPTR |
1925 * +----------------------+-----------------------------------+
1926 * \endrst
1927 *
1928 * @param PKCx PKC instance
1929 * @retval Return value is between: 0 ~ 0x200
1930 */
1931 __STATIC_INLINE uint32_t ll_pkc_get_mm_c_pointer(pkc_regs_t *PKCx)
1932 {
1933 return (READ_BITS(PKCx->SW_CONFIG1, PKC_SW_CONFIG1_MMCPTR) >> PKC_SW_CONFIG1_MMCPTR_Pos);
1934 }
1935
1936 /**
1937 * @brief Set modular add/sub parameter A pointer in pkc sram.
1938 *
1939 * \rst
1940 * +----------------------+-----------------------------------+
1941 * | Register | BitsName |
1942 * +======================+===================================+
1943 * | SW_CONFIG2 | MASAPTR |
1944 * +----------------------+-----------------------------------+
1945 * \endrst
1946 *
1947 * @param PKCx PKC instance
1948 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1949 * @retval None
1950 */
1951 __STATIC_INLINE void ll_pkc_set_mas_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1952 {
1953 MODIFY_REG(PKCx->SW_CONFIG2, PKC_SW_CONFIG2_MASAPTR, pointer << PKC_SW_CONFIG2_MASAPTR_Pos);
1954 }
1955
1956 /**
1957 * @brief Get modular add/sub parameter A pointer in pkc sram.
1958 *
1959 * \rst
1960 * +----------------------+-----------------------------------+
1961 * | Register | BitsName |
1962 * +======================+===================================+
1963 * | SW_CONFIG2 | MASAPTR |
1964 * +----------------------+-----------------------------------+
1965 * \endrst
1966 *
1967 * @param PKCx PKC instance
1968 * @retval Return value is between: 0 ~ 0x200
1969 */
1970 __STATIC_INLINE uint32_t ll_pkc_get_mas_a_pointer(pkc_regs_t *PKCx)
1971 {
1972 return (READ_BITS(PKCx->SW_CONFIG2, PKC_SW_CONFIG2_MASAPTR) >> PKC_SW_CONFIG2_MASAPTR_Pos);
1973 }
1974
1975 /**
1976 * @brief Set modular add/sub parameter B pointer in pkc sram.
1977 *
1978 * \rst
1979 * +----------------------+-----------------------------------+
1980 * | Register | BitsName |
1981 * +======================+===================================+
1982 * | SW_CONFIG2 | MASBPTR |
1983 * +----------------------+-----------------------------------+
1984 * \endrst
1985 *
1986 * @param PKCx PKC instance
1987 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
1988 * @retval None
1989 */
1990 __STATIC_INLINE void ll_pkc_set_mas_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
1991 {
1992 MODIFY_REG(PKCx->SW_CONFIG2, PKC_SW_CONFIG2_MASBPTR, pointer << PKC_SW_CONFIG2_MASBPTR_Pos);
1993 }
1994
1995 /**
1996 * @brief Get modular add/sub parameter B pointer in pkc sram.
1997 *
1998 * \rst
1999 * +----------------------+-----------------------------------+
2000 * | Register | BitsName |
2001 * +======================+===================================+
2002 * | SW_CONFIG2 | MASBPTR |
2003 * +----------------------+-----------------------------------+
2004 * \endrst
2005 *
2006 * @param PKCx PKC instance
2007 * @retval Return value is between: 0 ~ 0x200
2008 */
2009 __STATIC_INLINE uint32_t ll_pkc_get_mas_b_pointer(pkc_regs_t *PKCx)
2010 {
2011 return (READ_BITS(PKCx->SW_CONFIG2, PKC_SW_CONFIG2_MASBPTR) >> PKC_SW_CONFIG2_MASBPTR_Pos);
2012 }
2013
2014 /**
2015 * @brief Set modular add/sub parameter P pointer in pkc sram.
2016 *
2017 * \rst
2018 * +----------------------+-----------------------------------+
2019 * | Register | BitsName |
2020 * +======================+===================================+
2021 * | SW_CONFIG3 | MASPPTR |
2022 * +----------------------+-----------------------------------+
2023 * \endrst
2024 *
2025 * @param PKCx PKC instance
2026 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
2027 * @retval None
2028 */
2029 __STATIC_INLINE void ll_pkc_set_mas_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2030 {
2031 MODIFY_REG(PKCx->SW_CONFIG3, PKC_SW_CONFIG3_MASPPTR, pointer << PKC_SW_CONFIG3_MASPPTR_Pos);
2032 }
2033
2034 /**
2035 * @brief Get modular add/sub parameter P pointer in pkc sram.
2036 *
2037 * \rst
2038 * +----------------------+-----------------------------------+
2039 * | Register | BitsName |
2040 * +======================+===================================+
2041 * | SW_CONFIG3 | MASPPTR |
2042 * +----------------------+-----------------------------------+
2043 * \endrst
2044 *
2045 * @param PKCx PKC instance
2046 * @retval Return value is between: 0 ~ 0x200
2047 */
2048 __STATIC_INLINE uint32_t ll_pkc_get_mas_p_pointer(pkc_regs_t *PKCx)
2049 {
2050 return (READ_BITS(PKCx->SW_CONFIG3, PKC_SW_CONFIG3_MASPPTR) >> PKC_SW_CONFIG3_MASPPTR_Pos);
2051 }
2052
2053 /**
2054 * @brief Set modular add/sub parameter C pointer in pkc sram.
2055 *
2056 * \rst
2057 * +----------------------+-----------------------------------+
2058 * | Register | BitsName |
2059 * +======================+===================================+
2060 * | SW_CONFIG3 | MASCPTR |
2061 * +----------------------+-----------------------------------+
2062 * \endrst
2063 *
2064 * @param PKCx PKC instance
2065 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
2066 * @retval None
2067 */
2068 __STATIC_INLINE void ll_pkc_set_mas_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2069 {
2070 MODIFY_REG(PKCx->SW_CONFIG3, PKC_SW_CONFIG3_MASCPTR, pointer << PKC_SW_CONFIG3_MASCPTR_Pos);
2071 }
2072
2073 /**
2074 * @brief Get modular add/sub parameter C pointer in pkc sram.
2075 *
2076 * \rst
2077 * +----------------------+-----------------------------------+
2078 * | Register | BitsName |
2079 * +======================+===================================+
2080 * | SW_CONFIG3 | MASCPTR |
2081 * +----------------------+-----------------------------------+
2082 * \endrst
2083 *
2084 * @param PKCx PKC instance
2085 * @retval Return value is between: 0 ~ 0x200
2086 */
2087 __STATIC_INLINE uint32_t ll_pkc_get_mas_c_pointer(pkc_regs_t *PKCx)
2088 {
2089 return (READ_BITS(PKCx->SW_CONFIG3, PKC_SW_CONFIG3_MASCPTR) >> PKC_SW_CONFIG3_MASCPTR_Pos);
2090 }
2091
2092 /**
2093 * @brief Set modular invertion parameter U pointer in pkc sram.
2094 *
2095 * \rst
2096 * +----------------------+-----------------------------------+
2097 * | Register | BitsName |
2098 * +======================+===================================+
2099 * | SW_CONFIG4 | MIUPTR |
2100 * +----------------------+-----------------------------------+
2101 * \endrst
2102 *
2103 * @param PKCx PKC instance
2104 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
2105 * @retval None
2106 */
2107 __STATIC_INLINE void ll_pkc_set_mi_u_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2108 {
2109 MODIFY_REG(PKCx->SW_CONFIG4, PKC_SW_CONFIG4_MIUPTR, pointer << PKC_SW_CONFIG4_MIUPTR_Pos);
2110 }
2111
2112 /**
2113 * @brief Get modular invertion parameter U pointer in pkc sram.
2114 *
2115 * \rst
2116 * +----------------------+-----------------------------------+
2117 * | Register | BitsName |
2118 * +======================+===================================+
2119 * | SW_CONFIG4 | MIUPTR |
2120 * +----------------------+-----------------------------------+
2121 * \endrst
2122 *
2123 * @param PKCx PKC instance
2124 * @retval Return value is between: 0 ~ 0x200
2125 */
2126 __STATIC_INLINE uint32_t ll_pkc_get_mi_u_pointer(pkc_regs_t *PKCx)
2127 {
2128 return (READ_BITS(PKCx->SW_CONFIG4, PKC_SW_CONFIG4_MIUPTR) >> PKC_SW_CONFIG4_MIUPTR_Pos);
2129 }
2130
2131 /**
2132 * @brief Set modular invertion parameter V pointer in pkc sram.
2133 *
2134 * \rst
2135 * +----------------------+-----------------------------------+
2136 * | Register | BitsName |
2137 * +======================+===================================+
2138 * | SW_CONFIG4 | MIVPTR |
2139 * +----------------------+-----------------------------------+
2140 * \endrst
2141 *
2142 * @param PKCx PKC instance
2143 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
2144 * @retval None
2145 */
2146 __STATIC_INLINE void ll_pkc_set_mi_v_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2147 {
2148 MODIFY_REG(PKCx->SW_CONFIG4, PKC_SW_CONFIG4_MIVPTR, pointer << PKC_SW_CONFIG4_MIVPTR_Pos);
2149 }
2150
2151 /**
2152 * @brief Get modular invertion parameter V pointer in pkc sram.
2153 *
2154 * \rst
2155 * +----------------------+-----------------------------------+
2156 * | Register | BitsName |
2157 * +======================+===================================+
2158 * | SW_CONFIG4 | MIVPTR |
2159 * +----------------------+-----------------------------------+
2160 * \endrst
2161 *
2162 * @param PKCx PKC instance
2163 * @retval Return value is between: 0 ~ 0x200
2164 */
2165 __STATIC_INLINE uint32_t ll_pkc_get_mi_v_pointer(pkc_regs_t *PKCx)
2166 {
2167 return (READ_BITS(PKCx->SW_CONFIG4, PKC_SW_CONFIG4_MIVPTR) >> PKC_SW_CONFIG4_MIVPTR_Pos);
2168 }
2169
2170 /**
2171 * @brief Set modular invertion parameter X1 pointer in pkc sram.
2172 *
2173 * \rst
2174 * +----------------------+-----------------------------------+
2175 * | Register | BitsName |
2176 * +======================+===================================+
2177 * | SW_CONFIG5 | MIX1PTR |
2178 * +----------------------+-----------------------------------+
2179 * \endrst
2180 *
2181 * @param PKCx PKC instance
2182 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
2183 * @retval None
2184 */
2185 __STATIC_INLINE void ll_pkc_set_mi_x1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2186 {
2187 MODIFY_REG(PKCx->SW_CONFIG5, PKC_SW_CONFIG5_MIX1PTR, pointer << PKC_SW_CONFIG5_MIX1PTR_Pos);
2188 }
2189
2190 /**
2191 * @brief Get modular invertion parameter X1 pointer in pkc sram.
2192 *
2193 * \rst
2194 * +----------------------+-----------------------------------+
2195 * | Register | BitsName |
2196 * +======================+===================================+
2197 * | SW_CONFIG5 | MIX1PTR |
2198 * +----------------------+-----------------------------------+
2199 * \endrst
2200 *
2201 * @param PKCx PKC instance
2202 * @retval Return value is between: 0 ~ 0x200
2203 */
2204 __STATIC_INLINE uint32_t ll_pkc_get_mi_x1_pointer(pkc_regs_t *PKCx)
2205 {
2206 return (READ_BITS(PKCx->SW_CONFIG5, PKC_SW_CONFIG5_MIX1PTR) >> PKC_SW_CONFIG5_MIX1PTR_Pos);
2207 }
2208
2209 /**
2210 * @brief Set modular invertion parameter X1 pointer in pkc sram.
2211 *
2212 * \rst
2213 * +----------------------+-----------------------------------+
2214 * | Register | BitsName |
2215 * +======================+===================================+
2216 * | SW_CONFIG5 | MIX2PTR |
2217 * +----------------------+-----------------------------------+
2218 * \endrst
2219 *
2220 * @param PKCx PKC instance
2221 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
2222 * @retval None
2223 */
2224 __STATIC_INLINE void ll_pkc_set_mi_x2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2225 {
2226 MODIFY_REG(PKCx->SW_CONFIG5, PKC_SW_CONFIG5_MIX2PTR, pointer << PKC_SW_CONFIG5_MIX2PTR_Pos);
2227 }
2228
2229 /**
2230 * @brief Get modular invertion parameter X1 pointer in pkc sram.
2231 *
2232 * \rst
2233 * +----------------------+-----------------------------------+
2234 * | Register | BitsName |
2235 * +======================+===================================+
2236 * | SW_CONFIG5 | MIX2PTR |
2237 * +----------------------+-----------------------------------+
2238 * \endrst
2239 *
2240 * @param PKCx PKC instance
2241 * @retval Return value is between: 0 ~ 0x200
2242 */
2243 __STATIC_INLINE uint32_t ll_pkc_get_mi_x2_pointer(pkc_regs_t *PKCx)
2244 {
2245 return (READ_BITS(PKCx->SW_CONFIG5, PKC_SW_CONFIG5_MIX2PTR) >> PKC_SW_CONFIG5_MIX2PTR_Pos);
2246 }
2247
2248 /**
2249 * @brief Set modular invertion parameter Tmp pointer in pkc sram.
2250 *
2251 * \rst
2252 * +----------------------+-----------------------------------+
2253 * | Register | BitsName |
2254 * +======================+===================================+
2255 * | SW_CONFIG6 | MITMPPTR |
2256 * +----------------------+-----------------------------------+
2257 * \endrst
2258 *
2259 * @param PKCx PKC instance
2260 * @param pointer This parameter is the offset in pkc sram, and the value can between: 0 ~ 0x200
2261 * @retval None
2262 */
2263 __STATIC_INLINE void ll_pkc_set_swmi_tmp_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2264 {
2265 MODIFY_REG(PKCx->SW_CONFIG6, PKC_SW_CONFIG6_MITMPPTR, pointer << PKC_SW_CONFIG6_MITMPPTR_Pos);
2266 }
2267
2268 /**
2269 * @brief Get modular invertion parameter Tmp pointer in pkc sram.
2270 *
2271 * \rst
2272 * +----------------------+-----------------------------------+
2273 * | Register | BitsName |
2274 * +======================+===================================+
2275 * | SW_CONFIG6 | MITMPPTR |
2276 * +----------------------+-----------------------------------+
2277 * \endrst
2278 *
2279 * @param PKCx PKC instance
2280 * @retval Return value is between: 0 ~ 0x200
2281 */
2282 __STATIC_INLINE uint32_t ll_pkc_get_swmi_tmp_pointer(pkc_regs_t *PKCx)
2283 {
2284 return (READ_BITS(PKCx->SW_CONFIG6, PKC_SW_CONFIG6_MITMPPTR) >> PKC_SW_CONFIG6_MITMPPTR_Pos);
2285 }
2286
2287 /**
2288 * @brief Set operation word length-bits.
2289 *
2290 * \rst
2291 * +----------------------+-----------------------------------+
2292 * | Register | BitsName |
2293 * +======================+===================================+
2294 * | SW_CONFIG7 | WORDLEN |
2295 * +----------------------+-----------------------------------+
2296 * \endrst
2297 *
2298 * @param PKCx PKC instance
2299 * @param WordLength This parameter can be one of the following values: 256 ~ 2048
2300 * @retval None
2301 */
2302 __STATIC_INLINE void ll_pkc_set_operation_word_length(pkc_regs_t *PKCx, uint32_t WordLength)
2303 {
2304 MODIFY_REG(PKCx->SW_CONFIG7, PKC_SW_CONFIG7_WORDLEN, (WordLength >> 5) - 1);
2305 }
2306
2307 /**
2308 * @brief Get operation word length-bits.
2309 *
2310 * \rst
2311 * +----------------------+-----------------------------------+
2312 * | Register | BitsName |
2313 * +======================+===================================+
2314 * | SW_CONFIG7 | WORDLEN |
2315 * +----------------------+-----------------------------------+
2316 * \endrst
2317 *
2318 * @param PKCx PKC instance
2319 * @retval Return value is between: 256 ~ 2048
2320 */
2321 __STATIC_INLINE uint32_t ll_pkc_get_operation_word_length(pkc_regs_t *PKCx)
2322 {
2323 return ((READ_BITS(PKCx->SW_CONFIG7, PKC_SW_CONFIG7_WORDLEN) + 1) << 5);
2324 }
2325
2326 /**
2327 * @brief Get K output in invertion operation.
2328 *
2329 * \rst
2330 * +----------------------+-----------------------------------+
2331 * | Register | BitsName |
2332 * +======================+===================================+
2333 * | SW_CONFIG8 | MIKOUT |
2334 * +----------------------+-----------------------------------+
2335 * \endrst
2336 *
2337 * @param PKCx PKC instance
2338 * @retval Return value is between: 0 ~ 0x1FFF
2339 */
2340 __STATIC_INLINE uint32_t ll_pkc_get_mik_output(pkc_regs_t *PKCx)
2341 {
2342 return (READ_REG(PKCx->SW_CONFIG8) & PKC_SW_CONFIG8_MIKOUT_Msk);
2343 }
2344
2345 /**
2346 * @brief Set dummy multiply seed.
2347 *
2348 * \rst
2349 * +----------------------+-----------------------------------+
2350 * | Register | BitsName |
2351 * +======================+===================================+
2352 * | SW_CONFIG9 | DMRNGSEED |
2353 * +----------------------+-----------------------------------+
2354 * \endrst
2355 *
2356 * @param PKCx PKC instance
2357 * @param seed This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
2358 * @retval None
2359 */
2360 __STATIC_INLINE void ll_pkc_set_dummy_multiply_seed(pkc_regs_t *PKCx, uint32_t seed)
2361 {
2362 WRITE_REG(PKCx->SW_CONFIG9, seed);
2363 }
2364
2365 /**
2366 * @brief Get dummy multiply seed.
2367 *
2368 * \rst
2369 * +----------------------+-----------------------------------+
2370 * | Register | BitsName |
2371 * +======================+===================================+
2372 * | SW_CONFIG9 | DMRNGSEED |
2373 * +----------------------+-----------------------------------+
2374 * \endrst
2375 *
2376 * @param PKCx PKC instance
2377 * @retval Return value is between: 0 ~ 0xFFFFFFFF
2378 */
2379 __STATIC_INLINE uint32_t ll_pkc_get_dummy_multiply_seed(pkc_regs_t *PKCx)
2380 {
2381 return (READ_REG(PKCx->SW_CONFIG9));
2382 }
2383
2384 /**
2385 * @brief Set big integer operand A pointer in pkc sram.
2386 *
2387 * \rst
2388 * +----------------------+-----------------------------------+
2389 * | Register | BitsName |
2390 * +======================+===================================+
2391 * | SW_CONFIG10 | BMAPTR |
2392 * +----------------------+-----------------------------------+
2393 * \endrst
2394 *
2395 * @param PKCx PKC instance
2396 * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2397 * @retval None
2398 */
2399 __STATIC_INLINE void ll_pkc_set_bm_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2400 {
2401 MODIFY_REG(PKCx->SW_CONFIG10, PKC_SW_CONFIG10_BMAPTR, pointer << PKC_SW_CONFIG10_BMAPTR_Pos);
2402 }
2403
2404 /**
2405 * @brief Get big integer operand A pointer in pkc sram.
2406 *
2407 * \rst
2408 * +----------------------+-----------------------------------+
2409 * | Register | BitsName |
2410 * +======================+===================================+
2411 * | SW_CONFIG10 | BMAPTR |
2412 * +----------------------+-----------------------------------+
2413 * \endrst
2414 *
2415 * @param PKCx PKC instance
2416 * @retval Return value is between: 0 ~ 0x1FF
2417 */
2418 __STATIC_INLINE uint32_t ll_pkc_get_bm_a_pointer(pkc_regs_t *PKCx)
2419 {
2420 return (READ_BITS(PKCx->SW_CONFIG10, PKC_SW_CONFIG10_BMAPTR) >> PKC_SW_CONFIG10_BMAPTR_Pos);
2421 }
2422
2423 /**
2424 * @brief Set big integer operand B pointer in pkc sram.
2425 *
2426 * \rst
2427 * +----------------------+-----------------------------------+
2428 * | Register | BitsName |
2429 * +======================+===================================+
2430 * | SW_CONFIG10 | BMBPTR |
2431 * +----------------------+-----------------------------------+
2432 * \endrst
2433 *
2434 * @param PKCx PKC instance
2435 * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2436 * @retval None
2437 */
2438 __STATIC_INLINE void ll_pkc_set_bm_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2439 {
2440 MODIFY_REG(PKCx->SW_CONFIG10, PKC_SW_CONFIG10_BMBPTR, pointer << PKC_SW_CONFIG10_BMBPTR_Pos);
2441 }
2442
2443 /**
2444 * @brief Get big integer operand B pointer in pkc sram.
2445 *
2446 * \rst
2447 * +----------------------+-----------------------------------+
2448 * | Register | BitsName |
2449 * +======================+===================================+
2450 * | SW_CONFIG10 | BMBPTR |
2451 * +----------------------+-----------------------------------+
2452 * \endrst
2453 *
2454 * @param PKCx PKC instance
2455 * @retval Return value is between: 0 ~ 0x1FF
2456 */
2457 __STATIC_INLINE uint32_t ll_pkc_get_bm_b_pointer(pkc_regs_t *PKCx)
2458 {
2459 return (READ_BITS(PKCx->SW_CONFIG10, PKC_SW_CONFIG10_BMBPTR) >> PKC_SW_CONFIG10_BMBPTR_Pos);
2460 }
2461
2462 /**
2463 * @brief Set big integer result C pointer in pkc sram.
2464 *
2465 * \rst
2466 * +----------------------+-----------------------------------+
2467 * | Register | BitsName |
2468 * +======================+===================================+
2469 * | SW_CONFIG11 | BMCPTR |
2470 * +----------------------+-----------------------------------+
2471 * \endrst
2472 *
2473 * @param PKCx PKC instance
2474 * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2475 * @retval None
2476 */
2477 __STATIC_INLINE void ll_pkc_set_bm_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2478 {
2479 MODIFY_REG(PKCx->SW_CONFIG11, PKC_SW_CONFIG11_BMCPTR, pointer << PKC_SW_CONFIG11_BMCPTR_Pos);
2480 }
2481
2482 /**
2483 * @brief Get big integer result C pointer in pkc sram.
2484 *
2485 * \rst
2486 * +----------------------+-----------------------------------+
2487 * | Register | BitsName |
2488 * +======================+===================================+
2489 * | SW_CONFIG11 | BMCPTR |
2490 * +----------------------+-----------------------------------+
2491 * \endrst
2492 *
2493 * @param PKCx PKC instance
2494 * @retval Return value is between: 0 ~ 0x1FF
2495 */
2496 __STATIC_INLINE uint32_t ll_pkc_get_bm_c_pointer(pkc_regs_t *PKCx)
2497 {
2498 return (READ_BITS(PKCx->SW_CONFIG11, PKC_SW_CONFIG11_BMCPTR) >> PKC_SW_CONFIG11_BMCPTR_Pos);
2499 }
2500
2501 /**
2502 * @brief Set big integer operand A pointer in pkc sram.
2503 *
2504 * \rst
2505 * +----------------------+-----------------------------------+
2506 * | Register | BitsName |
2507 * +======================+===================================+
2508 * | SW_CONFIG11 | BAAPTR |
2509 * +----------------------+-----------------------------------+
2510 * \endrst
2511 *
2512 * @param PKCx PKC instance
2513 * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2514 * @retval None
2515 */
2516 __STATIC_INLINE void ll_pkc_set_ba_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2517 {
2518 MODIFY_REG(PKCx->SW_CONFIG11, PKC_SW_CONFIG11_BAAPTR, pointer << PKC_SW_CONFIG11_BAAPTR_Pos);
2519 }
2520
2521 /**
2522 * @brief Get big integer operand A pointer in pkc sram.
2523 *
2524 * \rst
2525 * +----------------------+-----------------------------------+
2526 * | Register | BitsName |
2527 * +======================+===================================+
2528 * | SW_CONFIG11 | BAAPTR |
2529 * +----------------------+-----------------------------------+
2530 * \endrst
2531 *
2532 * @param PKCx PKC instance
2533 * @retval Return value is between: 0 ~ 0x1FF
2534 */
2535 __STATIC_INLINE uint32_t ll_pkc_get_ba_a_pointer(pkc_regs_t *PKCx)
2536 {
2537 return (READ_BITS(PKCx->SW_CONFIG11, PKC_SW_CONFIG11_BAAPTR) >> PKC_SW_CONFIG11_BAAPTR_Pos);
2538 }
2539
2540 /**
2541 * @brief Set big integer operand B pointer in pkc sram.
2542 *
2543 * \rst
2544 * +----------------------+-----------------------------------+
2545 * | Register | BitsName |
2546 * +======================+===================================+
2547 * | SW_CONFIG12 | BABPTR |
2548 * +----------------------+-----------------------------------+
2549 * \endrst
2550 *
2551 * @param PKCx PKC instance
2552 * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2553 * @retval None
2554 */
2555 __STATIC_INLINE void ll_pkc_set_ba_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2556 {
2557 MODIFY_REG(PKCx->SW_CONFIG12, PKC_SW_CONFIG12_BABPTR, pointer << PKC_SW_CONFIG12_BABPTR_Pos);
2558 }
2559
2560 /**
2561 * @brief Get big integer operand B pointer in pkc sram.
2562 *
2563 * \rst
2564 * +----------------------+-----------------------------------+
2565 * | Register | BitsName |
2566 * +======================+===================================+
2567 * | SW_CONFIG12 | BABPTR |
2568 * +----------------------+-----------------------------------+
2569 * \endrst
2570 *
2571 * @param PKCx PKC instance
2572 * @retval Return value is between: 0 ~ 0x1FF
2573 */
2574 __STATIC_INLINE uint32_t ll_pkc_get_ba_b_pointer(pkc_regs_t *PKCx)
2575 {
2576 return (READ_BITS(PKCx->SW_CONFIG12, PKC_SW_CONFIG12_BABPTR) >> PKC_SW_CONFIG12_BABPTR_Pos);
2577 }
2578
2579 /**
2580 * @brief Set big integer result C pointer in pkc sram.
2581 *
2582 * \rst
2583 * +----------------------+-----------------------------------+
2584 * | Register | BitsName |
2585 * +======================+===================================+
2586 * | SW_CONFIG12 | BACPTR |
2587 * +----------------------+-----------------------------------+
2588 * \endrst
2589 *
2590 * @param PKCx PKC instance
2591 * @param pointer This parameter can be one of the following values: 0 ~ 0x1FF
2592 * @retval None
2593 */
2594 __STATIC_INLINE void ll_pkc_set_ba_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
2595 {
2596 MODIFY_REG(PKCx->SW_CONFIG12, PKC_SW_CONFIG12_BACPTR, pointer << PKC_SW_CONFIG12_BACPTR_Pos);
2597 }
2598
2599 /**
2600 * @brief Get big integer result C pointer in pkc sram.
2601 *
2602 * \rst
2603 * +----------------------+-----------------------------------+
2604 * | Register | BitsName |
2605 * +======================+===================================+
2606 * | SW_CONFIG12 | BACPTR |
2607 * +----------------------+-----------------------------------+
2608 * \endrst
2609 *
2610 * @param PKCx PKC instance
2611 * @retval Return value is between: 0 ~ 0x1FF
2612 */
2613 __STATIC_INLINE uint32_t ll_pkc_get_ba_c_pointer(pkc_regs_t *PKCx)
2614 {
2615 return (READ_BITS(PKCx->SW_CONFIG12, PKC_SW_CONFIG12_BACPTR) >> PKC_SW_CONFIG12_BACPTR_Pos);
2616 }
2617
2618 /**
2619 * @brief Set random clock gating seed.
2620 *
2621 * \rst
2622 * +----------------------+-----------------------------------+
2623 * | Register | BitsName |
2624 * +======================+===================================+
2625 * | SW_CONFIG13 | RANDSEED |
2626 * +----------------------+-----------------------------------+
2627 * \endrst
2628 *
2629 * @param PKCx PKC instance
2630 * @param seed This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
2631 * @retval None
2632 */
2633 __STATIC_INLINE void ll_pkc_set_random_clock_gating_seed(pkc_regs_t *PKCx, uint32_t seed)
2634 {
2635 WRITE_REG(PKCx->SW_CONFIG13, seed);
2636 }
2637
2638 /**
2639 * @brief Get random clock gating seed.
2640 *
2641 * \rst
2642 * +----------------------+-----------------------------------+
2643 * | Register | BitsName |
2644 * +======================+===================================+
2645 * | SW_CONFIG13 | RANDSEED |
2646 * +----------------------+-----------------------------------+
2647 * \endrst
2648 *
2649 * @param PKCx PKC instance
2650 * @retval Return value is between: 0 ~ 0xFFFFFFFF
2651 */
2652 __STATIC_INLINE uint32_t ll_pkc_get_random_clock_gating_seed(pkc_regs_t *PKCx)
2653 {
2654 return (READ_REG(PKCx->SW_CONFIG13));
2655 }
2656
2657 /** @} */
2658
2659 /** @defgroup PKC_LL_EF_IT_Management IT_Management
2660 * @{
2661 */
2662
2663 /**
2664 * @brief Enable the operation done interrupt.
2665 *
2666 * \rst
2667 * +----------------------+-----------------------------------+
2668 * | Register | BitsName |
2669 * +======================+===================================+
2670 * | INTEN | DONE |
2671 * +----------------------+-----------------------------------+
2672 * \endrst
2673 *
2674 * @param PKCx PKC instance
2675 * @retval none.
2676 */
2677 __STATIC_INLINE void ll_pkc_enable_it_done(pkc_regs_t *PKCx)
2678 {
2679 SET_BITS(PKCx->INTEN, PKC_INTEN_DONE);
2680 }
2681
2682 /**
2683 * @brief Enable the operation error interrupt.
2684 *
2685 * \rst
2686 * +----------------------+-----------------------------------+
2687 * | Register | BitsName |
2688 * +======================+===================================+
2689 * | INTEN | ERR |
2690 * +----------------------+-----------------------------------+
2691 * \endrst
2692 *
2693 * @param PKCx PKC instance
2694 * @retval none.
2695 */
2696 __STATIC_INLINE void ll_pkc_enable_it_err(pkc_regs_t *PKCx)
2697 {
2698 SET_BITS(PKCx->INTEN, PKC_INTEN_ERR);
2699 }
2700
2701 /**
2702 * @brief Enable the big integer overflow interrupt.
2703 *
2704 * \rst
2705 * +----------------------+-----------------------------------+
2706 * | Register | BitsName |
2707 * +======================+===================================+
2708 * | INTEN | BAOVF |
2709 * +----------------------+-----------------------------------+
2710 * \endrst
2711 *
2712 * @param PKCx PKC instance
2713 * @retval none.
2714 */
2715 __STATIC_INLINE void ll_pkc_enable_it_big_add_overflow(pkc_regs_t *PKCx)
2716 {
2717 SET_BITS(PKCx->INTEN, PKC_INTEN_BAOVF);
2718 }
2719
2720 /**
2721 * @brief Disable the operation done interrupt.
2722 *
2723 * \rst
2724 * +----------------------+-----------------------------------+
2725 * | Register | BitsName |
2726 * +======================+===================================+
2727 * | INTEN | DONE |
2728 * +----------------------+-----------------------------------+
2729 * \endrst
2730 *
2731 * @param PKCx PKC instance
2732 * @retval none.
2733 */
2734 __STATIC_INLINE void ll_pkc_disable_it_done(pkc_regs_t *PKCx)
2735 {
2736 CLEAR_BITS(PKCx->INTEN, PKC_INTEN_DONE);
2737 }
2738
2739 /**
2740 * @brief Disable the operation error interrupt.
2741 *
2742 * \rst
2743 * +----------------------+-----------------------------------+
2744 * | Register | BitsName |
2745 * +======================+===================================+
2746 * | INTEN | ERR |
2747 * +----------------------+-----------------------------------+
2748 * \endrst
2749 *
2750 * @param PKCx PKC instance
2751 * @retval none.
2752 */
2753 __STATIC_INLINE void ll_pkc_disable_it_err(pkc_regs_t *PKCx)
2754 {
2755 CLEAR_BITS(PKCx->INTEN, PKC_INTEN_ERR);
2756 }
2757
2758 /**
2759 * @brief Disable the big integer overflow interrupt.
2760 *
2761 * \rst
2762 * +----------------------+-----------------------------------+
2763 * | Register | BitsName |
2764 * +======================+===================================+
2765 * | INTEN | BAOVF |
2766 * +----------------------+-----------------------------------+
2767 * \endrst
2768 *
2769 * @param PKCx PKC instance
2770 * @retval none.
2771 */
2772 __STATIC_INLINE void ll_pkc_disable_it_big_add_overflow(pkc_regs_t *PKCx)
2773 {
2774 CLEAR_BITS(PKCx->INTEN, PKC_INTEN_BAOVF);
2775 }
2776
2777 /**
2778 * @brief Indicate whether the operation done interrupt is enable.
2779 *
2780 * \rst
2781 * +----------------------+-----------------------------------+
2782 * | Register | BitsName |
2783 * +======================+===================================+
2784 * | INTEN | DONE |
2785 * +----------------------+-----------------------------------+
2786 * \endrst
2787 *
2788 * @param PKCx PKC instance
2789 * @retval State of bit (1 or 0).
2790 */
2791 __STATIC_INLINE uint32_t ll_pkc_is_enable_it_done(pkc_regs_t *PKCx)
2792 {
2793 return (READ_BITS(PKCx->INTEN, PKC_INTEN_DONE) == PKC_INTEN_DONE);
2794 }
2795
2796 /**
2797 * @brief Indicate whether the operation error interrupt is enable.
2798 *
2799 * \rst
2800 * +----------------------+-----------------------------------+
2801 * | Register | BitsName |
2802 * +======================+===================================+
2803 * | INTEN | ERR |
2804 * +----------------------+-----------------------------------+
2805 * \endrst
2806 *
2807 * @param PKCx PKC instance
2808 * @retval State of bit (1 or 0).
2809 */
2810 __STATIC_INLINE uint32_t ll_pkc_is_enable_it_err(pkc_regs_t *PKCx)
2811 {
2812 return (READ_BITS(PKCx->INTEN, PKC_INTEN_ERR) == PKC_INTEN_ERR);
2813 }
2814
2815 /**
2816 * @brief Indicate whether the big integer overflow interrupt is enable.
2817 *
2818 * \rst
2819 * +----------------------+-----------------------------------+
2820 * | Register | BitsName |
2821 * +======================+===================================+
2822 * | INTEN | BAOVF |
2823 * +----------------------+-----------------------------------+
2824 * \endrst
2825 *
2826 * @param PKCx PKC instance
2827 * @retval State of bit (1 or 0).
2828 */
2829 __STATIC_INLINE uint32_t ll_pkc_is_enable_it_big_add_overflow(pkc_regs_t *PKCx)
2830 {
2831 return (READ_BITS(PKCx->INTEN, PKC_INTEN_BAOVF) == PKC_INTEN_BAOVF);
2832 }
2833
2834 /** @} */
2835
2836 /** @defgroup PKC_LL_EF_FLAG_Management FLAG_Management
2837 * @{
2838 */
2839
2840 /**
2841 * @brief Indicate whether the operation done interrupt is pending.
2842 *
2843 * \rst
2844 * +----------------------+-----------------------------------+
2845 * | Register | BitsName |
2846 * +======================+===================================+
2847 * | INTSTAT | DONE |
2848 * +----------------------+-----------------------------------+
2849 * \endrst
2850 *
2851 * @param PKCx PKC instance
2852 * @retval State of bit (1 or 0).
2853 */
2854 __STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_done(pkc_regs_t *PKCx)
2855 {
2856 return (READ_BITS(PKCx->INTSTAT, PKC_INTSTAT_DONE) == PKC_INTSTAT_DONE);
2857 }
2858
2859 /**
2860 * @brief Indicate whether the operation error interrupt is pending.
2861 *
2862 * \rst
2863 * +----------------------+-----------------------------------+
2864 * | Register | BitsName |
2865 * +======================+===================================+
2866 * | INTSTAT | ERR |
2867 * +----------------------+-----------------------------------+
2868 * \endrst
2869 *
2870 * @param PKCx PKC instance
2871 * @retval State of bit (1 or 0).
2872 */
2873 __STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_err(pkc_regs_t *PKCx)
2874 {
2875 return (READ_BITS(PKCx->INTSTAT, PKC_INTSTAT_ERR) == PKC_INTSTAT_ERR);
2876 }
2877
2878 /**
2879 * @brief Indicate whether the big integer overflow interrupt is pending.
2880 *
2881 * \rst
2882 * +----------------------+-----------------------------------+
2883 * | Register | BitsName |
2884 * +======================+===================================+
2885 * | INTSTAT | BAOVF |
2886 * +----------------------+-----------------------------------+
2887 * \endrst
2888 *
2889 * @param PKCx PKC instance
2890 * @retval State of bit (1 or 0).
2891 */
2892 __STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_big_add_overflow(pkc_regs_t *PKCx)
2893 {
2894 return (READ_BITS(PKCx->INTSTAT, PKC_INTSTAT_BAOVF) == PKC_INTSTAT_BAOVF);
2895 }
2896
2897 /**
2898 * @brief Clear the operation done interrupt flag.
2899 *
2900 * \rst
2901 * +----------------------+-----------------------------------+
2902 * | Register | BitsName |
2903 * +======================+===================================+
2904 * | INTSTAT | DONE |
2905 * +----------------------+-----------------------------------+
2906 * \endrst
2907 *
2908 * @param PKCx PKC instance
2909 * @retval none.
2910 */
2911 __STATIC_INLINE void ll_pkc_clear_flag_it_done(pkc_regs_t *PKCx)
2912 {
2913 SET_BITS(PKCx->INTSTAT, PKC_INTSTAT_DONE);
2914 }
2915
2916 /**
2917 * @brief Clear the operation error interrupt flag.
2918 *
2919 * \rst
2920 * +----------------------+-----------------------------------+
2921 * | Register | BitsName |
2922 * +======================+===================================+
2923 * | INTSTAT | ERR |
2924 * +----------------------+-----------------------------------+
2925 * \endrst
2926 *
2927 * @param PKCx PKC instance
2928 * @retval none.
2929 */
2930 __STATIC_INLINE void ll_pkc_clear_flag_it_err(pkc_regs_t *PKCx)
2931 {
2932 SET_BITS(PKCx->INTSTAT, PKC_INTSTAT_ERR);
2933 }
2934
2935 /**
2936 * @brief Clear the big integer overflow interrupt flag.
2937 *
2938 * \rst
2939 * +----------------------+-----------------------------------+
2940 * | Register | BitsName |
2941 * +======================+===================================+
2942 * | INTSTAT | BAOVF |
2943 * +----------------------+-----------------------------------+
2944 * \endrst
2945 *
2946 * @param PKCx PKC instance
2947 * @retval none.
2948 */
2949 __STATIC_INLINE void ll_pkc_clear_flag_it_big_add_overflow(pkc_regs_t *PKCx)
2950 {
2951 SET_BITS(PKCx->INTSTAT, PKC_INTSTAT_BAOVF);
2952 }
2953
2954 /**
2955 * @brief Indicate whether the busy flag is set.
2956 *
2957 * \rst
2958 * +----------------------+-----------------------------------+
2959 * | Register | BitsName |
2960 * +======================+===================================+
2961 * | WORKSTAT | BUSY |
2962 * +----------------------+-----------------------------------+
2963 * \endrst
2964 *
2965 * @param PKCx PKC instance
2966 * @retval State of bit (1 or 0).
2967 */
2968 __STATIC_INLINE uint32_t ll_pkc_is_action_flag_busy(pkc_regs_t *PKCx)
2969 {
2970 return (READ_BITS(PKCx->WORKSTAT, PKC_WORKSTAT_BUSY) == PKC_WORKSTAT_BUSY);
2971 }
2972
2973 /** @} */
2974
2975 /** @defgroup PKC_LL_EF_Init Initialization and de-initialization functions
2976 * @{
2977 */
2978
2979 /**
2980 * @brief De-initialize PKC registers (Registers restored to their default values).
2981 * @param PKCx PKC Instance
2982 * @retval An error_status_t enumeration value:
2983 * - SUCCESS: PKC registers are de-initialized
2984 * - ERROR: PKC registers are not de-initialized
2985 */
2986 error_status_t ll_pkc_deinit(pkc_regs_t *PKCx);
2987
2988 /**
2989 * @brief Initialize PKC registers according to the specified
2990 * parameters in p_pkc_init.
2991 * @param PKCx PKC Instance
2992 * @param p_pkc_init pointer to a ll_pkc_init_t structure that contains the configuration
2993 * information for the specified PKC peripheral.
2994 * @retval An error_status_t enumeration value:
2995 * - SUCCESS: PKC registers are initialized according to p_pkc_init content
2996 * - ERROR: Problem occurred during PKC Registers initialization
2997 */
2998 error_status_t ll_pkc_init(pkc_regs_t *PKCx, ll_pkc_init_t *p_pkc_init);
2999
3000 /**
3001 * @brief Set each field of a @ref ll_pkc_init_t type structure to default value.
3002 * @param p_pkc_init pointer to a @ref ll_pkc_init_t structure
3003 * whose fields will be set to default values.
3004 * @retval None
3005 */
3006 void ll_pkc_struct_init(ll_pkc_init_t *p_pkc_init);
3007
3008 /** @} */
3009
3010 /** @} */
3011
3012 #endif /* PKC */
3013
3014 #ifdef __cplusplus
3015 }
3016 #endif
3017
3018 #endif /* __GR55XX_LL_PKC_H__ */
3019
3020 /** @} */
3021
3022 /** @} */
3023
3024 /** @} */
ll_pkc_is_enabled_hardware_start
__STATIC_INLINE uint32_t ll_pkc_is_enabled_hardware_start(pkc_regs_t *PKCx)
Indicate whether the pkc start in hardware mode is enabled.
Definition: gr55xx_ll_pkc.h:382
ll_pkc_enable_it_err
__STATIC_INLINE void ll_pkc_enable_it_err(pkc_regs_t *PKCx)
Enable the operation error interrupt.
Definition: gr55xx_ll_pkc.h:2696
ll_pkc_get_bm_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_bm_a_pointer(pkc_regs_t *PKCx)
Get big integer operand A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2418
ll_pkc_get_tmp6_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp6_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp6 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1237
ll_pkc_set_k_pointer
__STATIC_INLINE void ll_pkc_set_k_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter k pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:516
ll_pkc_get_tmp1_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp1_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1042
ll_pkc_set_tmpk_pointer
__STATIC_INLINE void ll_pkc_set_tmpk_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter TmpK pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1413
ll_pkc_get_gy_pointer
__STATIC_INLINE uint32_t ll_pkc_get_gy_pointer(pkc_regs_t *PKCx)
Get PKC parameter Gy pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:730
ll_pkc_disable_software
__STATIC_INLINE void ll_pkc_disable_software(pkc_regs_t *PKCx)
Disable pkc software mode.
Definition: gr55xx_ll_pkc.h:420
ll_pkc_get_tmpk_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmpk_pointer(pkc_regs_t *PKCx)
Get PKC parameter TmpK pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1432
ll_pkc_get_random_clock_gating_seed
__STATIC_INLINE uint32_t ll_pkc_get_random_clock_gating_seed(pkc_regs_t *PKCx)
Get random clock gating seed.
Definition: gr55xx_ll_pkc.h:2652
ll_pkc_is_enabled
__STATIC_INLINE uint32_t ll_pkc_is_enabled(pkc_regs_t *PKCx)
Indicate whether the pkc is enabled.
Definition: gr55xx_ll_pkc.h:325
ll_pkc_get_p_pointer
__STATIC_INLINE uint32_t ll_pkc_get_p_pointer(pkc_regs_t *PKCx)
Get PKC parameter p pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:613
ll_pkc_get_gx_pointer
__STATIC_INLINE uint32_t ll_pkc_get_gx_pointer(pkc_regs_t *PKCx)
Get PKC parameter Gx pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:691
ll_pkc_clear_flag_it_done
__STATIC_INLINE void ll_pkc_clear_flag_it_done(pkc_regs_t *PKCx)
Clear the operation done interrupt flag.
Definition: gr55xx_ll_pkc.h:2911
ll_pkc_set_mm_a_pointer
__STATIC_INLINE void ll_pkc_set_mm_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular multiplication parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1795
ll_pkc_init
error_status_t ll_pkc_init(pkc_regs_t *PKCx, ll_pkc_init_t *p_pkc_init)
Initialize PKC registers according to the specified parameters in p_pkc_init.
ll_pkc_set_mi_x1_pointer
__STATIC_INLINE void ll_pkc_set_mi_x1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2185
ll_pkc_set_operation_word_length
__STATIC_INLINE void ll_pkc_set_operation_word_length(pkc_regs_t *PKCx, uint32_t WordLength)
Set operation word length-bits.
Definition: gr55xx_ll_pkc.h:2302
ll_pkc_get_r0z_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r0z_pointer(pkc_regs_t *PKCx)
Get PKC parameter R0z pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:886
ll_pkc_get_mitmp_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mitmp_pointer(pkc_regs_t *PKCx)
Get PKC parameter MITmp pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1393
ll_pkc_set_mitmp_pointer
__STATIC_INLINE void ll_pkc_set_mitmp_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter MITmp pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1374
ll_pkc_get_mm_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mm_a_pointer(pkc_regs_t *PKCx)
Get modular multiplication parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1814
ll_pkc_set_gx_pointer
__STATIC_INLINE void ll_pkc_set_gx_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Gx pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:672
ll_pkc_get_constp
__STATIC_INLINE uint32_t ll_pkc_get_constp(pkc_regs_t *PKCx)
Get constant value for montgomery multiply in pkc sram.
Definition: gr55xx_ll_pkc.h:1549
ll_pkc_set_r_pointer
__STATIC_INLINE void ll_pkc_set_r_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter r pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:555
ll_ecc_curve_init_t
struct _ll_ecc_curve_init ll_ecc_curve_init_t
LL PKC ECC P-256 Elliptic Curve Init Structure definition.
ll_pkc_get_rsq_pointer
__STATIC_INLINE uint32_t ll_pkc_get_rsq_pointer(pkc_regs_t *PKCx)
Get PKC parameter R^2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:652
ll_pkc_enable_dummy_multi
__STATIC_INLINE void ll_pkc_enable_dummy_multi(pkc_regs_t *PKCx)
Enable Dummy Multi in software mode.
Definition: gr55xx_ll_pkc.h:1680
ll_pkc_is_enabled_reset
__STATIC_INLINE uint32_t ll_pkc_is_enabled_reset(pkc_regs_t *PKCx)
Indicate whether the pkc reset is enabled.
Definition: gr55xx_ll_pkc.h:496
ll_pkc_disable_random_clock_gating
__STATIC_INLINE void ll_pkc_disable_random_clock_gating(pkc_regs_t *PKCx)
Disable Random Clock Gating in software mode.
Definition: gr55xx_ll_pkc.h:1756
ll_pkc_set_mm_b_pointer
__STATIC_INLINE void ll_pkc_set_mm_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular multiplication parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1834
ll_pkc_set_mas_p_pointer
__STATIC_INLINE void ll_pkc_set_mas_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular add/sub parameter P pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2029
ll_pkc_get_r1z_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r1z_pointer(pkc_regs_t *PKCx)
Get PKC parameter R1z pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1003
ll_pkc_get_tmp2_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp2_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1081
ll_pkc_get_mi_x2_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mi_x2_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2243
ll_pkc_set_r1z_pointer
__STATIC_INLINE void ll_pkc_set_r1z_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R1z pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:984
ll_pkc_get_ba_c_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ba_c_pointer(pkc_regs_t *PKCx)
Get big integer result C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2613
_ll_pkc_init::p_ecc_curve
ll_ecc_curve_init_t * p_ecc_curve
Specifies the pointer to elliptic curve description.
Definition: gr55xx_ll_pkc.h:126
_ll_ecc_curve_init::A
uint32_t A[ECC_U32_LENGTH]
Operand A array.
Definition: gr55xx_ll_pkc.h:104
ll_pkc_set_bm_a_pointer
__STATIC_INLINE void ll_pkc_set_bm_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer operand A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2399
ll_pkc_is_enable_it_big_add_overflow
__STATIC_INLINE uint32_t ll_pkc_is_enable_it_big_add_overflow(pkc_regs_t *PKCx)
Indicate whether the big integer overflow interrupt is enable.
Definition: gr55xx_ll_pkc.h:2829
ll_pkc_get_mas_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mas_b_pointer(pkc_regs_t *PKCx)
Get modular add/sub parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2009
ll_pkc_disable_it_big_add_overflow
__STATIC_INLINE void ll_pkc_disable_it_big_add_overflow(pkc_regs_t *PKCx)
Disable the big integer overflow interrupt.
Definition: gr55xx_ll_pkc.h:2772
ll_pkc_set_x1_pointer
__STATIC_INLINE void ll_pkc_set_x1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1296
ll_pkc_enable_software_start
__STATIC_INLINE void ll_pkc_enable_software_start(pkc_regs_t *PKCx)
Enable pkc start in software mode.
Definition: gr55xx_ll_pkc.h:1568
ll_pkc_set_mm_c_pointer
__STATIC_INLINE void ll_pkc_set_mm_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular multiplication parameter C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1912
_ll_pkc_init::data_bits
uint32_t data_bits
Specifies the Data size: 256 ~ 2048bits
Definition: gr55xx_ll_pkc.h:128
ll_pkc_set_ecc_b_pointer
__STATIC_INLINE void ll_pkc_set_ecc_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set ECC parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1491
ll_pkc_set_mas_c_pointer
__STATIC_INLINE void ll_pkc_set_mas_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular add/sub parameter C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2068
ll_pkc_get_r1y_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r1y_pointer(pkc_regs_t *PKCx)
Get PKC parameter R1y pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:964
ll_pkc_get_r0y_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r0y_pointer(pkc_regs_t *PKCx)
Get PKC parameter R0y pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:847
ll_pkc_set_mi_v_pointer
__STATIC_INLINE void ll_pkc_set_mi_v_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter V pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2146
ll_pkc_get_bm_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_bm_b_pointer(pkc_regs_t *PKCx)
Get big integer operand B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2457
_ll_ecc_curve_init
LL PKC ECC P-256 Elliptic Curve Init Structure definition.
Definition: gr55xx_ll_pkc.h:103
_ll_pkc_init
LL PKC Init Structure definition.
Definition: gr55xx_ll_pkc.h:125
ll_pkc_set_x2_pointer
__STATIC_INLINE void ll_pkc_set_x2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter X2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1335
ll_pkc_is_action_flag_busy
__STATIC_INLINE uint32_t ll_pkc_is_action_flag_busy(pkc_regs_t *PKCx)
Indicate whether the busy flag is set.
Definition: gr55xx_ll_pkc.h:2968
ll_pkc_get_gz_pointer
__STATIC_INLINE uint32_t ll_pkc_get_gz_pointer(pkc_regs_t *PKCx)
Get PKC parameter Gz pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:769
ll_pkc_set_r1y_pointer
__STATIC_INLINE void ll_pkc_set_r1y_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R1y pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:945
ll_pkc_set_random_clock_gating_seed
__STATIC_INLINE void ll_pkc_set_random_clock_gating_seed(pkc_regs_t *PKCx, uint32_t seed)
Set random clock gating seed.
Definition: gr55xx_ll_pkc.h:2633
_ll_ecc_curve_init::PRSquare
uint32_t PRSquare[ECC_U32_LENGTH]
R^2 mod P, where R = 2^256.
Definition: gr55xx_ll_pkc.h:108
ll_pkc_disable_it_done
__STATIC_INLINE void ll_pkc_disable_it_done(pkc_regs_t *PKCx)
Disable the operation done interrupt.
Definition: gr55xx_ll_pkc.h:2734
ll_pkc_set_swmi_tmp_pointer
__STATIC_INLINE void ll_pkc_set_swmi_tmp_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter Tmp pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2263
ll_pkc_get_mas_c_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mas_c_pointer(pkc_regs_t *PKCx)
Get modular add/sub parameter C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2087
ll_pkc_get_operation_word_length
__STATIC_INLINE uint32_t ll_pkc_get_operation_word_length(pkc_regs_t *PKCx)
Get operation word length-bits.
Definition: gr55xx_ll_pkc.h:2321
ll_pkc_get_mm_c_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mm_c_pointer(pkc_regs_t *PKCx)
Get modular multiplication parameter C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1931
ll_pkc_get_mas_p_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mas_p_pointer(pkc_regs_t *PKCx)
Get modular add/sub parameter P pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2048
ll_pkc_is_action_flag_it_big_add_overflow
__STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_big_add_overflow(pkc_regs_t *PKCx)
Indicate whether the big integer overflow interrupt is pending.
Definition: gr55xx_ll_pkc.h:2892
_ll_ecc_curve_init::H
uint32_t H
H.
Definition: gr55xx_ll_pkc.h:115
ll_pkc_set_r1x_pointer
__STATIC_INLINE void ll_pkc_set_r1x_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R1x pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:906
ll_pkc_set_tmp1_pointer
__STATIC_INLINE void ll_pkc_set_tmp1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1023
ll_pkc_set_tmp4_pointer
__STATIC_INLINE void ll_pkc_set_tmp4_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp4 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1140
ll_pkc_set_tmp2_pointer
__STATIC_INLINE void ll_pkc_set_tmp2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1062
ll_pkc_set_constant1_pointer
__STATIC_INLINE void ll_pkc_set_constant1_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Constant1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1257
ll_pkc_get_ecc_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ecc_b_pointer(pkc_regs_t *PKCx)
Get ECC parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1510
_ll_ecc_curve_init::ConstP
uint32_t ConstP
Montgomery multiplication constant in prime field P, ConstP = 1.
Definition: gr55xx_ll_pkc.h:109
ll_pkc_set_mm_p_pointer
__STATIC_INLINE void ll_pkc_set_mm_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular multiplication parameter P pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1873
ll_pkc_get_mm_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mm_b_pointer(pkc_regs_t *PKCx)
Get modular multiplication parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1853
ll_pkc_get_r_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r_pointer(pkc_regs_t *PKCx)
Get PKC parameter r pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:574
ll_pkc_get_tmp4_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp4_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp4 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1159
ll_pkc_disable_reset
__STATIC_INLINE void ll_pkc_disable_reset(pkc_regs_t *PKCx)
Disable pkc reset.
Definition: gr55xx_ll_pkc.h:477
ll_pkc_set_mi_x2_pointer
__STATIC_INLINE void ll_pkc_set_mi_x2_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2224
ll_pkc_enable
__STATIC_INLINE void ll_pkc_enable(pkc_regs_t *PKCx)
Enable pkc.
Definition: gr55xx_ll_pkc.h:287
ll_pkc_get_operation_mode
__STATIC_INLINE uint32_t ll_pkc_get_operation_mode(pkc_regs_t *PKCx)
Get operation mode in software mode.
Definition: gr55xx_ll_pkc.h:1661
_ll_ecc_curve_init::P
uint32_t P[ECC_U32_LENGTH]
Prime number P array.
Definition: gr55xx_ll_pkc.h:107
ll_pkc_get_ba_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ba_a_pointer(pkc_regs_t *PKCx)
Get big integer operand A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2535
ll_pkc_is_action_flag_it_done
__STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_done(pkc_regs_t *PKCx)
Indicate whether the operation done interrupt is pending.
Definition: gr55xx_ll_pkc.h:2854
ll_pkc_clear_flag_it_err
__STATIC_INLINE void ll_pkc_clear_flag_it_err(pkc_regs_t *PKCx)
Clear the operation error interrupt flag.
Definition: gr55xx_ll_pkc.h:2930
_ll_ecc_point
LL PKC ECC Point Structure definition.
Definition: gr55xx_ll_pkc.h:92
ll_pkc_get_bm_c_pointer
__STATIC_INLINE uint32_t ll_pkc_get_bm_c_pointer(pkc_regs_t *PKCx)
Get big integer result C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2496
_ll_ecc_curve_init::NRSquare
uint32_t NRSquare[ECC_U32_LENGTH]
R^2 mod N, where R = 2^256.
Definition: gr55xx_ll_pkc.h:112
ll_pkc_set_tmp5_pointer
__STATIC_INLINE void ll_pkc_set_tmp5_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp5 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1179
ll_pkc_set_dummy_multiply_seed
__STATIC_INLINE void ll_pkc_set_dummy_multiply_seed(pkc_regs_t *PKCx, uint32_t seed)
Set dummy multiply seed.
Definition: gr55xx_ll_pkc.h:2360
ECC_U32_LENGTH
#define ECC_U32_LENGTH
ECC Array Length.
Definition: gr55xx_ll_pkc.h:72
ll_pkc_set_ba_c_pointer
__STATIC_INLINE void ll_pkc_set_ba_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer result C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2594
ll_pkc_get_mi_x1_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mi_x1_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2204
ll_pkc_set_bm_c_pointer
__STATIC_INLINE void ll_pkc_set_bm_c_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer result C pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2477
ll_pkc_set_r0x_pointer
__STATIC_INLINE void ll_pkc_set_r0x_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R0x pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:789
ll_pkc_is_enabled_dummy_multi
__STATIC_INLINE uint32_t ll_pkc_is_enabled_dummy_multi(pkc_regs_t *PKCx)
Indicate whether the Dummy Multi in software mode is enabled.
Definition: gr55xx_ll_pkc.h:1718
ll_pkc_disable
__STATIC_INLINE void ll_pkc_disable(pkc_regs_t *PKCx)
Disable pkc.
Definition: gr55xx_ll_pkc.h:306
ll_pkc_get_r1x_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r1x_pointer(pkc_regs_t *PKCx)
Get PKC parameter R1x pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:925
ll_pkc_get_tmp5_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp5_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp5 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1198
ll_pkc_get_x2_pointer
__STATIC_INLINE uint32_t ll_pkc_get_x2_pointer(pkc_regs_t *PKCx)
Get PKC parameter X2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1354
ll_pkc_get_mi_v_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mi_v_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter V pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2165
ll_pkc_struct_init
void ll_pkc_struct_init(ll_pkc_init_t *p_pkc_init)
Set each field of a ll_pkc_init_t type structure to default value.
ll_pkc_disable_software_start
__STATIC_INLINE void ll_pkc_disable_software_start(pkc_regs_t *PKCx)
Disable pkc start in software mode.
Definition: gr55xx_ll_pkc.h:1587
ll_pkc_disable_it_err
__STATIC_INLINE void ll_pkc_disable_it_err(pkc_regs_t *PKCx)
Disable the operation error interrupt.
Definition: gr55xx_ll_pkc.h:2753
ll_pkc_set_r0z_pointer
__STATIC_INLINE void ll_pkc_set_r0z_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R0z pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:867
ll_pkc_get_k_pointer
__STATIC_INLINE uint32_t ll_pkc_get_k_pointer(pkc_regs_t *PKCx)
Get PKC parameter k pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:535
ll_pkc_enable_it_done
__STATIC_INLINE void ll_pkc_enable_it_done(pkc_regs_t *PKCx)
Enable the operation done interrupt.
Definition: gr55xx_ll_pkc.h:2677
ll_pkc_is_enable_it_err
__STATIC_INLINE uint32_t ll_pkc_is_enable_it_err(pkc_regs_t *PKCx)
Indicate whether the operation error interrupt is enable.
Definition: gr55xx_ll_pkc.h:2810
_ll_ecc_curve_init::G
ll_ecc_point_t G
ECC Point G.
Definition: gr55xx_ll_pkc.h:117
ll_pkc_is_enabled_random_clock_gating
__STATIC_INLINE uint32_t ll_pkc_is_enabled_random_clock_gating(pkc_regs_t *PKCx)
Indicate whether the Random Clock Gating in software mode is enabled.
Definition: gr55xx_ll_pkc.h:1775
ll_pkc_set_rsq_pointer
__STATIC_INLINE void ll_pkc_set_rsq_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R^2 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:633
ll_pkc_get_mi_u_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mi_u_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter U pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2126
ll_pkc_set_tmp3_pointer
__STATIC_INLINE void ll_pkc_set_tmp3_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp3 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1101
ll_pkc_set_mas_a_pointer
__STATIC_INLINE void ll_pkc_set_mas_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular add/sub parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1951
_ll_ecc_point::Y
uint32_t Y[ECC_U32_LENGTH]
Specifies the point in y-axis.
Definition: gr55xx_ll_pkc.h:95
ll_pkc_get_r0x_pointer
__STATIC_INLINE uint32_t ll_pkc_get_r0x_pointer(pkc_regs_t *PKCx)
Get PKC parameter R0x pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:808
ll_pkc_get_mik_output
__STATIC_INLINE uint32_t ll_pkc_get_mik_output(pkc_regs_t *PKCx)
Get K output in invertion operation.
Definition: gr55xx_ll_pkc.h:2340
ll_pkc_set_r0y_pointer
__STATIC_INLINE void ll_pkc_set_r0y_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter R0y pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:828
ll_pkc_is_enable_it_done
__STATIC_INLINE uint32_t ll_pkc_is_enable_it_done(pkc_regs_t *PKCx)
Indicate whether the operation done interrupt is enable.
Definition: gr55xx_ll_pkc.h:2791
ll_pkc_get_constant1_pointer
__STATIC_INLINE uint32_t ll_pkc_get_constant1_pointer(pkc_regs_t *PKCx)
Get PKC parameter Constant1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1276
ll_pkc_get_ecc_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ecc_a_pointer(pkc_regs_t *PKCx)
Get ECC parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1471
ll_pkc_set_tmp6_pointer
__STATIC_INLINE void ll_pkc_set_tmp6_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Tmp6 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1218
ll_pkc_enable_hardware_start
__STATIC_INLINE void ll_pkc_enable_hardware_start(pkc_regs_t *PKCx)
Enable pkc start in hardware mode.
Definition: gr55xx_ll_pkc.h:344
ll_pkc_get_mm_p_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mm_p_pointer(pkc_regs_t *PKCx)
Get modular multiplication parameter P pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1892
ll_pkc_enable_reset
__STATIC_INLINE void ll_pkc_enable_reset(pkc_regs_t *PKCx)
Enable pkc reset.
Definition: gr55xx_ll_pkc.h:458
ll_pkc_is_enabled_software_start
__STATIC_INLINE uint32_t ll_pkc_is_enabled_software_start(pkc_regs_t *PKCx)
Indicate whether the pkc start in software mode is enabled.
Definition: gr55xx_ll_pkc.h:1606
ll_pkc_is_enabled_software
__STATIC_INLINE uint32_t ll_pkc_is_enabled_software(pkc_regs_t *PKCx)
Indicate whether the pkc software mode is enabled.
Definition: gr55xx_ll_pkc.h:439
ll_pkc_disable_dummy_multi
__STATIC_INLINE void ll_pkc_disable_dummy_multi(pkc_regs_t *PKCx)
Disable Dummy Multi in software mode.
Definition: gr55xx_ll_pkc.h:1699
ll_pkc_set_p_pointer
__STATIC_INLINE void ll_pkc_set_p_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter p pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:594
ll_pkc_set_gz_pointer
__STATIC_INLINE void ll_pkc_set_gz_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Gz pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:750
ll_pkc_is_action_flag_it_err
__STATIC_INLINE uint32_t ll_pkc_is_action_flag_it_err(pkc_regs_t *PKCx)
Indicate whether the operation error interrupt is pending.
Definition: gr55xx_ll_pkc.h:2873
ll_pkc_set_mas_b_pointer
__STATIC_INLINE void ll_pkc_set_mas_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular add/sub parameter B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1990
ll_pkc_disable_hardware_start
__STATIC_INLINE void ll_pkc_disable_hardware_start(pkc_regs_t *PKCx)
Disable pkc start in hardware mode.
Definition: gr55xx_ll_pkc.h:363
ll_pkc_set_ba_a_pointer
__STATIC_INLINE void ll_pkc_set_ba_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer operand A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2516
ll_pkc_get_tmp3_pointer
__STATIC_INLINE uint32_t ll_pkc_get_tmp3_pointer(pkc_regs_t *PKCx)
Get PKC parameter Tmp3 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1120
_ll_ecc_curve_init::B
uint32_t B[ECC_U32_LENGTH]
Operand B array.
Definition: gr55xx_ll_pkc.h:105
_ll_ecc_point::X
uint32_t X[ECC_U32_LENGTH]
Specifies the point in x-axis.
Definition: gr55xx_ll_pkc.h:93
ll_pkc_enable_random_clock_gating
__STATIC_INLINE void ll_pkc_enable_random_clock_gating(pkc_regs_t *PKCx)
Enable Random Clock Gating in software mode.
Definition: gr55xx_ll_pkc.h:1737
_ll_ecc_curve_init::N
uint32_t N[ECC_U32_LENGTH]
Prime number N array.
Definition: gr55xx_ll_pkc.h:111
ll_pkc_deinit
error_status_t ll_pkc_deinit(pkc_regs_t *PKCx)
De-initialize PKC registers (Registers restored to their default values).
ll_pkc_clear_flag_it_big_add_overflow
__STATIC_INLINE void ll_pkc_clear_flag_it_big_add_overflow(pkc_regs_t *PKCx)
Clear the big integer overflow interrupt flag.
Definition: gr55xx_ll_pkc.h:2949
ll_pkc_set_ba_b_pointer
__STATIC_INLINE void ll_pkc_set_ba_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer operand B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2555
ll_pkc_get_mas_a_pointer
__STATIC_INLINE uint32_t ll_pkc_get_mas_a_pointer(pkc_regs_t *PKCx)
Get modular add/sub parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1970
ll_pkc_enable_it_big_add_overflow
__STATIC_INLINE void ll_pkc_enable_it_big_add_overflow(pkc_regs_t *PKCx)
Enable the big integer overflow interrupt.
Definition: gr55xx_ll_pkc.h:2715
ll_pkc_set_constp
__STATIC_INLINE void ll_pkc_set_constp(pkc_regs_t *PKCx, uint32_t ConstP)
Set constant value for montgomery multiply in pkc sram.
Definition: gr55xx_ll_pkc.h:1530
ll_pkc_get_x1_pointer
__STATIC_INLINE uint32_t ll_pkc_get_x1_pointer(pkc_regs_t *PKCx)
Get PKC parameter X1 pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1315
ll_pkc_init_t
struct _ll_pkc_init ll_pkc_init_t
LL PKC Init Structure definition.
ll_pkc_set_gy_pointer
__STATIC_INLINE void ll_pkc_set_gy_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set PKC parameter Gy pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:711
ll_pkc_set_ecc_a_pointer
__STATIC_INLINE void ll_pkc_set_ecc_a_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set ECC parameter A pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:1452
ll_ecc_point_t
struct _ll_ecc_point ll_ecc_point_t
LL PKC ECC Point Structure definition.
ll_pkc_get_dummy_multiply_seed
__STATIC_INLINE uint32_t ll_pkc_get_dummy_multiply_seed(pkc_regs_t *PKCx)
Get dummy multiply seed.
Definition: gr55xx_ll_pkc.h:2379
ll_pkc_enable_software
__STATIC_INLINE void ll_pkc_enable_software(pkc_regs_t *PKCx)
Enable pkc software mode.
Definition: gr55xx_ll_pkc.h:401
ll_pkc_set_bm_b_pointer
__STATIC_INLINE void ll_pkc_set_bm_b_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set big integer operand B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2438
ll_pkc_get_ba_b_pointer
__STATIC_INLINE uint32_t ll_pkc_get_ba_b_pointer(pkc_regs_t *PKCx)
Get big integer operand B pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2574
ll_pkc_set_mi_u_pointer
__STATIC_INLINE void ll_pkc_set_mi_u_pointer(pkc_regs_t *PKCx, uint32_t pointer)
Set modular invertion parameter U pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2107
ll_pkc_get_swmi_tmp_pointer
__STATIC_INLINE uint32_t ll_pkc_get_swmi_tmp_pointer(pkc_regs_t *PKCx)
Get modular invertion parameter Tmp pointer in pkc sram.
Definition: gr55xx_ll_pkc.h:2282
ll_pkc_set_operation_mode
__STATIC_INLINE void ll_pkc_set_operation_mode(pkc_regs_t *PKCx, uint32_t operation_mode)
Set operation mode in software mode.
Definition: gr55xx_ll_pkc.h:1634
_ll_ecc_curve_init::ConstN
uint32_t ConstN
Montgomery multiplication constant in prime field N, ConstN = 0xee00bc4f.
Definition: gr55xx_ll_pkc.h:113