Macros | |
| #define | LL_CGC_FRC_AON_MCUSUB_HCLK MCU_SUB_FORCE_AON_MCUSUB_HCLK |
| #define | LL_CGC_FRC_XF_XQSPI_HCLK MCU_SUB_FORCE_XF_XQSPI_HCLK |
| #define | LL_CGC_FRC_SRAM_HCLK MCU_SUB_FORCE_SRAM_HCLK |
| #define | LL_CGC_FRC_ALL_HCLK1 ((uint32_t)0x00070000U) |
| #define LL_CGC_FRC_ALL_HCLK1 ((uint32_t)0x00070000U) |
All clock group 1
| #define LL_CGC_FRC_AON_MCUSUB_HCLK MCU_SUB_FORCE_AON_MCUSUB_HCLK |
Hclk for Always-on register
| #define LL_CGC_FRC_SRAM_HCLK MCU_SUB_FORCE_SRAM_HCLK |
Hclk for SRAMs
| #define LL_CGC_FRC_XF_XQSPI_HCLK MCU_SUB_FORCE_XF_XQSPI_HCLK |
Hclk for cache top