Macros | |
| #define | LL_SSI_ADDRSIZE_0BIT 0x00000000UL |
| #define | LL_SSI_ADDRSIZE_4BIT (1UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_8BIT (2UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_12BIT (3UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_16BIT (4UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_20BIT (5UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_24BIT (6UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_28BIT (7UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_32BIT (8UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_36BIT (9UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_40BIT (10UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_44BIT (11UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_48BIT (12UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_52BIT (13UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_56BIT (14UL << SSI_SCTRL0_ADDRL_Pos) |
| #define | LL_SSI_ADDRSIZE_60BIT (15UL << SSI_SCTRL0_ADDRL_Pos) |
| #define LL_SSI_ADDRSIZE_0BIT 0x00000000UL |
Address length for QSPI transfer: 0 bits
| #define LL_SSI_ADDRSIZE_12BIT (3UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 12 bits
| #define LL_SSI_ADDRSIZE_16BIT (4UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 16 bits
| #define LL_SSI_ADDRSIZE_20BIT (5UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 20 bits
| #define LL_SSI_ADDRSIZE_24BIT (6UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 24 bits
| #define LL_SSI_ADDRSIZE_28BIT (7UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 28 bits
| #define LL_SSI_ADDRSIZE_32BIT (8UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 32 bits
| #define LL_SSI_ADDRSIZE_36BIT (9UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 36 bits
| #define LL_SSI_ADDRSIZE_40BIT (10UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 40 bits
| #define LL_SSI_ADDRSIZE_44BIT (11UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 44 bits
| #define LL_SSI_ADDRSIZE_48BIT (12UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 48 bits
| #define LL_SSI_ADDRSIZE_4BIT (1UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 4 bits
| #define LL_SSI_ADDRSIZE_52BIT (13UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 52 bits
| #define LL_SSI_ADDRSIZE_56BIT (14UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 56 bits
| #define LL_SSI_ADDRSIZE_60BIT (15UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 60 bits
| #define LL_SSI_ADDRSIZE_8BIT (2UL << SSI_SCTRL0_ADDRL_Pos) |
Address length for QSPI transfer: 8 bits