Macros | |
| #define | LL_CGC_FRC_SECU_HCLK MCU_SUB_FORCE_SECU_HCLK |
| #define | LL_CGC_FRC_SIM_HCLK MCU_SUB_FORCE_SIM_HCLK |
| #define | LL_CGC_FRC_HTB_HCLK MCU_SUB_FORCE_HTB_HCLK |
| #define | LL_CGC_FRC_PWM_HCLK MCU_SUB_FORCE_PWM_HCLK |
| #define | LL_CGC_FRC_ROM_HCLK MCU_SUB_FORCE_ROM_HCLK |
| #define | LL_CGC_FRC_SNSADC_HCLK MCU_SUB_FORCE_SNSADC_HCLK |
| #define | LL_CGC_FRC_GPIO_HCLK MCU_SUB_FORCE_GPIO_HCLK |
| #define | LL_CGC_FRC_DMA_HCLK MCU_SUB_FORCE_DMA_HCLK |
| #define | LL_CGC_FRC_BLE_BRG_HCLK MCU_SUB_FORCE_BLE_BRG_HCLK |
| #define | LL_CGC_FRC_APB_SUB_HCLK MCU_SUB_FORCE_APB_SUB_HCLK |
| #define | LL_CGC_FRC_SERIAL_HCLK MCU_SUB_FORCE_SERIAL_HCLK |
| #define | LL_CGC_FRC_I2S_S_HCLK MCU_SUB_FORCE_I2S_S_HCLK |
| #define | LL_CGC_FRC_ALL_HCLK0 ((uint32_t)0x00000FFFU) |
| #define LL_CGC_FRC_ALL_HCLK0 ((uint32_t)0x00000FFFU) |
All clock group 0
| #define LL_CGC_FRC_APB_SUB_HCLK MCU_SUB_FORCE_APB_SUB_HCLK |
Hclk for APB subsystem
| #define LL_CGC_FRC_BLE_BRG_HCLK MCU_SUB_FORCE_BLE_BRG_HCLK |
Hclk for BLE MCU bridge
| #define LL_CGC_FRC_DMA_HCLK MCU_SUB_FORCE_DMA_HCLK |
Hclk for DMA engine
| #define LL_CGC_FRC_GPIO_HCLK MCU_SUB_FORCE_GPIO_HCLK |
Hclk for GPIOs
| #define LL_CGC_FRC_HTB_HCLK MCU_SUB_FORCE_HTB_HCLK |
Hclk for hopping table
| #define LL_CGC_FRC_I2S_S_HCLK MCU_SUB_FORCE_I2S_S_HCLK |
Hclk for I2S slave
| #define LL_CGC_FRC_PWM_HCLK MCU_SUB_FORCE_PWM_HCLK |
Hclk for PWM
| #define LL_CGC_FRC_ROM_HCLK MCU_SUB_FORCE_ROM_HCLK |
Hclk for ROM
| #define LL_CGC_FRC_SECU_HCLK MCU_SUB_FORCE_SECU_HCLK |
Hclk for all security blocks
| #define LL_CGC_FRC_SERIAL_HCLK MCU_SUB_FORCE_SERIAL_HCLK |
Hclk for serial blocks
| #define LL_CGC_FRC_SIM_HCLK MCU_SUB_FORCE_SIM_HCLK |
Hclk for sim card interface
| #define LL_CGC_FRC_SNSADC_HCLK MCU_SUB_FORCE_SNSADC_HCLK |
Hclk for sense ADC