Functions | |
| __STATIC_INLINE void | ll_dma_enable (dma_regs_t *DMAx) |
| Enable DMA Module. More... | |
| __STATIC_INLINE void | ll_dma_disable (dma_regs_t *DMAx) |
| Disable DMA Module. More... | |
| __STATIC_INLINE uint32_t | ll_dma_is_enable (dma_regs_t *DMAx) |
| Check if DMA Module is enabled or disabled. More... | |
| __STATIC_INLINE void | ll_dma_enable_channel (dma_regs_t *DMAx, uint32_t channel) |
| Enable DMA channel. More... | |
| __STATIC_INLINE void | ll_dma_disable_channel (dma_regs_t *DMAx, uint32_t channel) |
| Disable DMA channel. More... | |
| __STATIC_INLINE uint32_t | ll_dma_is_enabled_channel (dma_regs_t *DMAx, uint32_t channel) |
| Check if DMA channel is enabled or disabled. More... | |
| __STATIC_INLINE void | ll_dma_suspend_channel (dma_regs_t *DMAx, uint32_t channel) |
| Suspend a DMA channel transfer. More... | |
| __STATIC_INLINE void | ll_dma_resume_channel (dma_regs_t *DMAx, uint32_t channel) |
| Resume a DMA channel. More... | |
| __STATIC_INLINE uint32_t | ll_dma_is_suspended (dma_regs_t *DMAx, uint32_t channel) |
| Check if DMA channel is suspended or resumed. More... | |
| __STATIC_INLINE uint32_t | ll_dma_is_empty_fifo (dma_regs_t *DMAx, uint32_t channel) |
| Check if DMA channel FIFO is empty. More... | |
| __STATIC_INLINE void | ll_dma_config_transfer (dma_regs_t *DMAx, uint32_t channel, uint32_t configuration) |
| Configure all parameters link to DMA transfer. More... | |
| __STATIC_INLINE void | ll_dma_set_data_transfer_direction (dma_regs_t *DMAx, uint32_t channel, uint32_t direction) |
| Set Data transfer direction (read from peripheral or from memory). More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_data_transfer_direction (dma_regs_t *DMAx, uint32_t channel) |
| Get Data transfer direction (read from peripheral or from memory). More... | |
| __STATIC_INLINE void | ll_dma_set_mode (dma_regs_t *DMAx, uint32_t channel, uint32_t mode) |
| Set DMA mode Single block or Multi block. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_mode (dma_regs_t *DMAx, uint32_t channel) |
| Get DMA mode circular or normal. More... | |
| __STATIC_INLINE void | ll_dma_set_source_increment_mode (dma_regs_t *DMAx, uint32_t channel, uint32_t src_increment_mode) |
| Set Source increment mode. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_source_increment_mode (dma_regs_t *DMAx, uint32_t channel) |
| Get Source increment mode. More... | |
| __STATIC_INLINE void | ll_dma_set_destination_increment_mode (dma_regs_t *DMAx, uint32_t channel, uint32_t dst_increment_mode) |
| Set Destination increment mode. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_destination_increment_mode (dma_regs_t *DMAx, uint32_t channel) |
| Get Destination increment mode. More... | |
| __STATIC_INLINE void | ll_dma_set_source_width (dma_regs_t *DMAx, uint32_t channel, uint32_t src_width) |
| Set Source transfer width. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_source_width (dma_regs_t *DMAx, uint32_t channel) |
| Get Source transfer width. More... | |
| __STATIC_INLINE void | ll_dma_set_destination_width (dma_regs_t *DMAx, uint32_t channel, uint32_t dst_width) |
| Set Destination transfer width. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_destination_width (dma_regs_t *DMAx, uint32_t channel) |
| Get Destination transfer width. More... | |
| __STATIC_INLINE void | ll_dma_set_source_burst_length (dma_regs_t *DMAx, uint32_t channel, uint32_t burst_length) |
| Set Source Burst Transaction Length. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_source_burst_length (dma_regs_t *DMAx, uint32_t channel) |
| Get Burst Transaction Length. More... | |
| __STATIC_INLINE void | ll_dma_set_destination_burst_length (dma_regs_t *DMAx, uint32_t channel, uint32_t burst_length) |
| Set Destination Burst Transaction Length. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_destination_burst_length (dma_regs_t *DMAx, uint32_t channel) |
| Get Destination Burst Transaction Length. More... | |
| __STATIC_INLINE void | ll_dma_set_channel_priority_level (dma_regs_t *DMAx, uint32_t channel, uint32_t priority) |
| Set Channel priority level. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_channel_priority_level (dma_regs_t *DMAx, uint32_t channel) |
| Get Channel priority level. More... | |
| __STATIC_INLINE void | ll_dma_set_block_size (dma_regs_t *DMAx, uint32_t channel, uint32_t block_size) |
| Set the block size of a transfer. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_block_size (dma_regs_t *DMAx, uint32_t channel) |
| Get the block size of a transfer. More... | |
| __STATIC_INLINE void | ll_dma_config_address (dma_regs_t *DMAx, uint32_t channel, uint32_t src_address, uint32_t dst_address, uint32_t direction) |
| Configure the Source and Destination addresses. More... | |
| __STATIC_INLINE void | ll_dma_set_source_address (dma_regs_t *DMAx, uint32_t channel, uint32_t address) |
| Set the Source address. More... | |
| __STATIC_INLINE void | ll_dma_set_destination_address (dma_regs_t *DMAx, uint32_t channel, uint32_t address) |
| Set the Destination address. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_source_address (dma_regs_t *DMAx, uint32_t channel) |
| Get Source address. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_destination_address (dma_regs_t *DMAx, uint32_t channel) |
| Get Destination address. More... | |
| __STATIC_INLINE void | ll_dma_set_m2m_src_address (dma_regs_t *DMAx, uint32_t channel, uint32_t address) |
| Set the Memory to Memory Source address. More... | |
| __STATIC_INLINE void | ll_dma_set_m2m_dst_address (dma_regs_t *DMAx, uint32_t channel, uint32_t address) |
| Set the Memory to Memory Destination address. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_m2m_src_address (dma_regs_t *DMAx, uint32_t channel) |
| Get the Memory to Memory Source address. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_m2m_dst_address (dma_regs_t *DMAx, uint32_t channel) |
| Get the Memory to Memory Destination address. More... | |
| __STATIC_INLINE void | ll_dma_set_source_peripheral (dma_regs_t *DMAx, uint32_t channel, uint32_t peripheral) |
| Set source peripheral for DMA instance on Channel x. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_source_peripheral (dma_regs_t *DMAx, uint32_t channel) |
| Get source peripheral for DMA instance on Channel x. More... | |
| __STATIC_INLINE void | ll_dma_set_destination_peripheral (dma_regs_t *DMAx, uint32_t channel, uint32_t peripheral) |
| Set destination peripheral for DMA instance on Channel x. More... | |
| __STATIC_INLINE uint32_t | ll_dma_get_destination_peripheral (dma_regs_t *DMAx, uint32_t channel) |
| Get destination peripheral for DMA instance on Channel x. More... | |
| __STATIC_INLINE void | ll_dma_select_handshaking (dma_regs_t *DMAx, uint32_t channel, uint32_t src_handshaking, uint32_t dst_handshaking) |
| Set source and destination source handshaking interface. More... | |
| __STATIC_INLINE void | ll_dma_req_src_single_transaction (dma_regs_t *DMAx, uint32_t channel) |
| Source Single Transaction Request. More... | |
| __STATIC_INLINE void | ll_dma_req_src_burst_transaction (dma_regs_t *DMAx, uint32_t channel) |
| Source Burst Transaction Request. More... | |
| __STATIC_INLINE void | ll_dma_req_src_last_single_transaction (dma_regs_t *DMAx, uint32_t channel) |
| Source Last Single Transaction Request. More... | |
| __STATIC_INLINE void | ll_dma_req_src_last_burst_transaction (dma_regs_t *DMAx, uint32_t channel) |
| Source Last Burst Transaction Request. More... | |
| __STATIC_INLINE void | ll_dma_req_dst_single_transaction (dma_regs_t *DMAx, uint32_t channel) |
| Destination Single Transaction Request. More... | |
| __STATIC_INLINE void | ll_dma_req_dst_burst_transaction (dma_regs_t *DMAx, uint32_t channel) |
| Destination Burst Transaction Request. More... | |
| __STATIC_INLINE void | ll_dma_req_dst_last_single_transaction (dma_regs_t *DMAx, uint32_t channel) |
| Destination Last Single Transaction Request. More... | |
| __STATIC_INLINE void | ll_dma_req_dst_last_burst_transaction (dma_regs_t *DMAx, uint32_t channel) |
| Destination Last Burst Transaction Request. More... | |
| __STATIC_INLINE void ll_dma_config_address | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | src_address, | ||
| uint32_t | dst_address, | ||
| uint32_t | direction | ||
| ) |
Configure the Source and Destination addresses.
| Register | BitsName |
|---|---|
| SAR | SAR |
| DAR | DAR |
| CTL_LO | TT_FC |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| src_address | Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
| dst_address | Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
| direction | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_config_transfer | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | configuration | ||
| ) |
Configure all parameters link to DMA transfer.
| Register | BitsName |
|---|---|
| CCR | DIR |
| CCR | MEM2MEM |
| CCR | CIRC |
| CCR | PINC |
| CCR | MINC |
| CCR | PSIZE |
| CCR | MSIZE |
| CCR | PL |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| configuration | This parameter must be a combination of all the following values:
|
| None |
| __STATIC_INLINE void ll_dma_disable | ( | dma_regs_t * | DMAx | ) |
Disable DMA Module.
| Register | BitsName |
|---|---|
| CFG_REG | CFG_EN |
| DMAx | DMA instance. |
| None |
| __STATIC_INLINE void ll_dma_disable_channel | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Disable DMA channel.
| Register | BitsName |
|---|---|
| CH_EN_REG | CH_EN_WE&CH_EN |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_enable | ( | dma_regs_t * | DMAx | ) |
Enable DMA Module.
| Register | BitsName |
|---|---|
| CFG_REG | CFG_EN |
| DMAx | DMA instance. |
| None |
| __STATIC_INLINE void ll_dma_enable_channel | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Enable DMA channel.
| Register | BitsName |
|---|---|
| CH_EN_REG | CH_EN_WE&CH_EN |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE uint32_t ll_dma_get_block_size | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get the block size of a transfer.
| Register | BitsName |
|---|---|
| CTL_HI | BLOCK_TS |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Between | Min_Data = 0 and Max_Data = 0xFFF |
| __STATIC_INLINE uint32_t ll_dma_get_channel_priority_level | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get Channel priority level.
| Register | BitsName |
|---|---|
| CFG_LO | CH_PRIOR |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Returned | value can be one of the following values: |
| __STATIC_INLINE uint32_t ll_dma_get_data_transfer_direction | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get Data transfer direction (read from peripheral or from memory).
| Register | BitsName |
|---|---|
| CTL_LO | TT_FC |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Returned | value can be one of the following values: |
| __STATIC_INLINE uint32_t ll_dma_get_destination_address | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get Destination address.
| Register | BitsName |
|---|---|
| DAR | DAR |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Between | Min_Data = 0 and Max_Data = 0xFFFFFFFF |
| __STATIC_INLINE uint32_t ll_dma_get_destination_burst_length | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get Destination Burst Transaction Length.
| Register | BitsName |
|---|---|
| CTL_LO | DST_MSIZE |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Returned | value can be one of the following values: |
| __STATIC_INLINE uint32_t ll_dma_get_destination_increment_mode | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get Destination increment mode.
| Register | BitsName |
|---|---|
| CTL_LO | DINC |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Returned | value can be one of the following values: |
| __STATIC_INLINE uint32_t ll_dma_get_destination_peripheral | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get destination peripheral for DMA instance on Channel x.
| Register | BitsName |
|---|---|
| CFG_HI | DST_PER |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| __STATIC_INLINE uint32_t ll_dma_get_destination_width | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get Destination transfer width.
| Register | BitsName |
|---|---|
| CTL_LO | DST_TR_WIDTH |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Returned | value can be one of the following values: |
| __STATIC_INLINE uint32_t ll_dma_get_m2m_dst_address | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get the Memory to Memory Destination address.
| Register | BitsName |
|---|---|
| DAR | DAR |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Between | Min_Data = 0 and Max_Data = 0xFFFFFFFF |
| __STATIC_INLINE uint32_t ll_dma_get_m2m_src_address | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get the Memory to Memory Source address.
| Register | BitsName |
|---|---|
| SAR | SAR |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Between | Min_Data = 0 and Max_Data = 0xFFFFFFFF |
| __STATIC_INLINE uint32_t ll_dma_get_mode | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get DMA mode circular or normal.
| Register | BitsName |
|---|---|
| CFG_LO | RELOAD_DST |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Returned | value can be one of the following values: |
| __STATIC_INLINE uint32_t ll_dma_get_source_address | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get Source address.
| Register | BitsName |
|---|---|
| SAR | SAR |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Between | Min_Data = 0 and Max_Data = 0xFFFFFFFF |
| __STATIC_INLINE uint32_t ll_dma_get_source_burst_length | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get Burst Transaction Length.
| Register | BitsName |
|---|---|
| CTL_LO | SRC_MSIZE |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Returned | value can be one of the following values: |
| __STATIC_INLINE uint32_t ll_dma_get_source_increment_mode | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get Source increment mode.
| Register | BitsName |
|---|---|
| CTL_LO | SINC |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Returned | value can be one of the following values: |
| __STATIC_INLINE uint32_t ll_dma_get_source_peripheral | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get source peripheral for DMA instance on Channel x.
| Register | BitsName |
|---|---|
| CFG_HI | SRC_PER |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| __STATIC_INLINE uint32_t ll_dma_get_source_width | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Get Source transfer width.
| Register | BitsName |
|---|---|
| CTL_LO | SRC_TR_WIDTH |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| Returned | value can be one of the following values: |
| __STATIC_INLINE uint32_t ll_dma_is_empty_fifo | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Check if DMA channel FIFO is empty.
| Register | BitsName |
|---|---|
| CFGL | FIFO_EMPTY |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| State | of bit (1 or 0). |
| __STATIC_INLINE uint32_t ll_dma_is_enable | ( | dma_regs_t * | DMAx | ) |
Check if DMA Module is enabled or disabled.
| Register | BitsName |
|---|---|
| CFG_REG | CFG_EN |
| DMAx | DMA instance. |
| State | of bit (1 or 0). |
| __STATIC_INLINE uint32_t ll_dma_is_enabled_channel | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Check if DMA channel is enabled or disabled.
| Register | BitsName |
|---|---|
| CH_EN_REG | CH_EN_WE&CH_EN |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| State | of bit (1 or 0). |
| __STATIC_INLINE uint32_t ll_dma_is_suspended | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Check if DMA channel is suspended or resumed.
| Register | BitsName |
|---|---|
| CFGL | CH_SUSP |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| State | of bit (1 or 0). |
| __STATIC_INLINE void ll_dma_req_dst_burst_transaction | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Destination Burst Transaction Request.
| Register | BitsName |
|---|---|
| REQ_DST | DST_WE&DST |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_req_dst_last_burst_transaction | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Destination Last Burst Transaction Request.
| Register | BitsName |
|---|---|
| LST_DST | LST_DST_WE&LST_DST |
| REQ_DST | DST_WE&DST |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_req_dst_last_single_transaction | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Destination Last Single Transaction Request.
| Register | BitsName |
|---|---|
| SGL_REQ_DST | REQ_DST_WE&REQ_DST |
| LST_DST | LST_DST_WE&LST_DST |
| REQ_DST | DST_WE&DST |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_req_dst_single_transaction | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Destination Single Transaction Request.
| Register | BitsName |
|---|---|
| SGL_REQ_DST | REQ_DST_WE&REQ_DST |
| REQ_DST | DST_WE&DST |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_req_src_burst_transaction | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Source Burst Transaction Request.
| Register | BitsName |
|---|---|
| REQ_SRC | SRC_WE&SRC |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_req_src_last_burst_transaction | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Source Last Burst Transaction Request.
| Register | BitsName |
|---|---|
| LST_SRC | LST_SRC_WE&LST_SRC |
| REQ_SRC | SRC_WE&SRC |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_req_src_last_single_transaction | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Source Last Single Transaction Request.
| Register | BitsName |
|---|---|
| SGL_REQ_SRC | REQ_SRC_WE&REQ_SRC |
| LST_SRC | LST_SRC_WE&LST_SRC |
| REQ_SRC | SRC_WE&SRC |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_req_src_single_transaction | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Source Single Transaction Request.
| Register | BitsName |
|---|---|
| SGL_REQ_SRC | REQ_SRC_WE&REQ_SRC |
| REQ_SRC | SRC_WE&SRC |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_resume_channel | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Resume a DMA channel.
| Register | BitsName |
|---|---|
| CFGL | CH_SUSP |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_select_handshaking | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | src_handshaking, | ||
| uint32_t | dst_handshaking | ||
| ) |
Set source and destination source handshaking interface.
| Register | BitsName |
|---|---|
| CFG_HI | DST_PER |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| src_handshaking | This parameter can be one of the following values: |
| dst_handshaking | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_set_block_size | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | block_size | ||
| ) |
Set the block size of a transfer.
| Register | BitsName |
|---|---|
| CTL_HI | BLOCK_TS |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| block_size | Between Min_Data = 0 and Max_Data = 0xFFF |
| None |
| __STATIC_INLINE void ll_dma_set_channel_priority_level | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | priority | ||
| ) |
Set Channel priority level.
| Register | BitsName |
|---|---|
| CFG_LO | CH_PRIOR |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| priority | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_set_data_transfer_direction | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | direction | ||
| ) |
Set Data transfer direction (read from peripheral or from memory).
| Register | BitsName |
|---|---|
| CTL_LO | TT_FC |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| direction | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_set_destination_address | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | address | ||
| ) |
Set the Destination address.
| Register | BitsName |
|---|---|
| DAR | DAR |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| address | Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
| None |
| __STATIC_INLINE void ll_dma_set_destination_burst_length | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | burst_length | ||
| ) |
Set Destination Burst Transaction Length.
| Register | BitsName |
|---|---|
| CTL_LO | DST_MSIZE |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| burst_length | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_set_destination_increment_mode | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | dst_increment_mode | ||
| ) |
Set Destination increment mode.
| Register | BitsName |
|---|---|
| CTL_LO | DINC |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| dst_increment_mode | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_set_destination_peripheral | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | peripheral | ||
| ) |
Set destination peripheral for DMA instance on Channel x.
| Register | BitsName |
|---|---|
| CFG_HI | DST_PER |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| peripheral | This parameter can be one of the following values:
|
| None |
| __STATIC_INLINE void ll_dma_set_destination_width | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | dst_width | ||
| ) |
Set Destination transfer width.
| Register | BitsName |
|---|---|
| CTL_LO | DST_TR_WIDTH |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| dst_width | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_set_m2m_dst_address | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | address | ||
| ) |
Set the Memory to Memory Destination address.
| Register | BitsName |
|---|---|
| DAR | DAR |
| CTL_LO | TT_FC |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| address | Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
| None |
| __STATIC_INLINE void ll_dma_set_m2m_src_address | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | address | ||
| ) |
Set the Memory to Memory Source address.
| Register | BitsName |
|---|---|
| SAR | SAR |
| CTL_LO | TT_FC |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| address | Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
| None |
| __STATIC_INLINE void ll_dma_set_mode | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | mode | ||
| ) |
Set DMA mode Single block or Multi block.
| Register | BitsName |
|---|---|
| CFG_LO | RELOAD_DST |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| mode | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_set_source_address | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | address | ||
| ) |
Set the Source address.
| Register | BitsName |
|---|---|
| SAR | SAR |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| address | Between Min_Data = 0 and Max_Data = 0xFFFFFFFF |
| None |
| __STATIC_INLINE void ll_dma_set_source_burst_length | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | burst_length | ||
| ) |
Set Source Burst Transaction Length.
| Register | BitsName |
|---|---|
| CTL_LO | SRC_MSIZE |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| burst_length | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_set_source_increment_mode | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | src_increment_mode | ||
| ) |
Set Source increment mode.
| Register | BitsName |
|---|---|
| CTL_LO | SINC |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| src_increment_mode | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_set_source_peripheral | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | peripheral | ||
| ) |
Set source peripheral for DMA instance on Channel x.
| Register | BitsName |
|---|---|
| CFG_HI | SRC_PER |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| peripheral | This parameter can be one of the following values:
|
| None |
| __STATIC_INLINE void ll_dma_set_source_width | ( | dma_regs_t * | DMAx, |
| uint32_t | channel, | ||
| uint32_t | src_width | ||
| ) |
Set Source transfer width.
| Register | BitsName |
|---|---|
| CTL_LO | SRC_TR_WIDTH |
| DMAx | DMAx instance |
| channel | This parameter can be one of the following values: |
| src_width | This parameter can be one of the following values: |
| None |
| __STATIC_INLINE void ll_dma_suspend_channel | ( | dma_regs_t * | DMAx, |
| uint32_t | channel | ||
| ) |
Suspend a DMA channel transfer.
| Register | BitsName |
|---|---|
| CFGL | CH_SUSP |
| DMAx | DMA instance. |
| channel | This parameter can be one of the following values: |
| None |