| #define DUAL_TIMER_PRESCALER_DIV0 LL_DUAL_TIMER_PRESCALER_DIV0 |
0 stage of prescale, clock is divided by 1.
| #define DUAL_TIMER_PRESCALER_DIV16 LL_DUAL_TIMER_PRESCALER_DIV16 |
4 stages of prescale, clock is divided by 16.
| #define DUAL_TIMER_PRESCALER_DIV256 LL_DUAL_TIMER_PRESCALER_DIV256 |
8 stages of prescale, clock is divided by 256.