Macros | |
| #define | LL_CALENDAR_DIV_NONE ((uint32_t)0x00U) |
| #define | LL_CALENDAR_DIV_32 ((uint32_t)0x01U << AON_CALENDAR_TIMER_CTL_CLK_SEL_Pos) |
| #define | LL_CALENDAR_DIV_64 ((uint32_t)0x02U << AON_CALENDAR_TIMER_CTL_CLK_SEL_Pos) |
| #define | LL_CALENDAR_DIV_128 ((uint32_t)0x03U << AON_CALENDAR_TIMER_CTL_CLK_SEL_Pos) |
| #define | LL_CALENDAR_DIV_256 ((uint32_t)0x04U << AON_CALENDAR_TIMER_CTL_CLK_SEL_Pos) |
| #define | LL_CALENDAR_NO_CLOCK ((uint32_t)0x05U << AON_CALENDAR_TIMER_CTL_CLK_SEL_Pos) |
| #define LL_CALENDAR_DIV_128 ((uint32_t)0x03U << AON_CALENDAR_TIMER_CTL_CLK_SEL_Pos) |
Select 1/128 divider
| #define LL_CALENDAR_DIV_256 ((uint32_t)0x04U << AON_CALENDAR_TIMER_CTL_CLK_SEL_Pos) |
Select 1/256 divider
| #define LL_CALENDAR_DIV_32 ((uint32_t)0x01U << AON_CALENDAR_TIMER_CTL_CLK_SEL_Pos) |
Select 1/32 divider
| #define LL_CALENDAR_DIV_64 ((uint32_t)0x02U << AON_CALENDAR_TIMER_CTL_CLK_SEL_Pos) |
Select 1/64 divider
| #define LL_CALENDAR_DIV_NONE ((uint32_t)0x00U) |
Select RTC clock
| #define LL_CALENDAR_NO_CLOCK ((uint32_t)0x05U << AON_CALENDAR_TIMER_CTL_CLK_SEL_Pos) |
Select no clock