XIP LL driver functions

Functions

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_cmd (xqspi_regs_t *XQSPIx, uint32_t cmd)
 Set read command. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_cmd (xqspi_regs_t *XQSPIx)
 Get read command. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_xip_hp (xqspi_regs_t *XQSPIx)
 Enable high performance mode. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_xip_hp (xqspi_regs_t *XQSPIx)
 Disable high performance mode. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_xip_hp (xqspi_regs_t *XQSPIx)
 Check if high performance mode is enabled. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_ss (xqspi_regs_t *XQSPIx, uint32_t ss)
 Set slave select. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_ss (xqspi_regs_t *XQSPIx)
 Get slave select. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_cpha (xqspi_regs_t *XQSPIx, uint32_t cpha)
 Set clock phase. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_cpha (xqspi_regs_t *XQSPIx)
 Get clock phase. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_cpol (xqspi_regs_t *XQSPIx, uint32_t cpol)
 Set clock polarity. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_cpol (xqspi_regs_t *XQSPIx)
 Get clock polarity. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_addr_size (xqspi_regs_t *XQSPIx, uint32_t size)
 Set address bytes in command. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_addr_size (xqspi_regs_t *XQSPIx)
 Get address bytes in command. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_endian (xqspi_regs_t *XQSPIx, uint32_t endian)
 Set endian in reading data. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_endian (xqspi_regs_t *XQSPIx)
 Get endian in reading data. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_hp_cmd (xqspi_regs_t *XQSPIx, uint32_t cmd)
 Set high performance command. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_hp_cmd (xqspi_regs_t *XQSPIx)
 Get high performance command. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_dummycycles (xqspi_regs_t *XQSPIx, uint32_t cycles)
 Set dummy cycles in command. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_dummycycles (xqspi_regs_t *XQSPIx)
 Get dummy cycles in command. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_dummy_hp (xqspi_regs_t *XQSPIx, uint32_t cycles)
 Set dummy cycles in high performance end. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_dummy_hp (xqspi_regs_t *XQSPIx)
 Get dummy cycles in high performance end. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_xip (xqspi_regs_t *XQSPIx)
 Enable XIP mode. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_xip (xqspi_regs_t *XQSPIx)
 Disable XIP mode. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_xip (xqspi_regs_t *XQSPIx)
 Check if XIP mode is enabled. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_flag (xqspi_regs_t *XQSPIx)
 Get XIP status. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_xip_it (xqspi_regs_t *XQSPIx)
 Check if XIP interrupt is enabled. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_flag_xip_it (xqspi_regs_t *XQSPIx)
 Get XIP interrupt flag. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_req_xip_it (xqspi_regs_t *XQSPIx)
 Get XIP interrupt request. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_xip_it (xqspi_regs_t *XQSPIx)
 Set XIP interrupt enable. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_xip_it (xqspi_regs_t *XQSPIx)
 Set XIP interrupt disable. More...
 

Detailed Description

Function Documentation

◆ ll_xqspi_disable_xip()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_xip ( xqspi_regs_t *  XQSPIx)

Disable XIP mode.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL3 | EN_REQ | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1239 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_xip_hp()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_xip_hp ( xqspi_regs_t *  XQSPIx)

Disable high performance mode.

Note
This bit should not be changed when XIP is ongoing.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL1 | CFG_HPEN | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 829 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_xip_it()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_xip_it ( xqspi_regs_t *  XQSPIx)

Set XIP interrupt disable.

Note
This bit is write-only.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | INTCLR | INT_CLR | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1379 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_xip()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_xip ( xqspi_regs_t *  XQSPIx)

Enable XIP mode.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL3 | EN_REQ | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1220 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_xip_hp()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_xip_hp ( xqspi_regs_t *  XQSPIx)

Enable high performance mode.

Note
This bit should not be changed when XIP is ongoing.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL1 | CFG_HPEN | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 809 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_xip_it()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_xip_it ( xqspi_regs_t *  XQSPIx)

Set XIP interrupt enable.

Note
This bit is write-only.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | INTSET | INT_SET | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1359 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_flag_xip_it()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_flag_xip_it ( xqspi_regs_t *  XQSPIx)

Get XIP interrupt flag.

Note
This bit is read-only.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | INTSTAT | INT_STAT | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can between: 0 ~ 1

Definition at line 1319 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_req_xip_it()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_req_xip_it ( xqspi_regs_t *  XQSPIx)

Get XIP interrupt request.

Note
This bit is read-only.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | INTREQ | INT_REQ | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can between: 0 ~ 1

Definition at line 1339 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_xip_addr_size()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_addr_size ( xqspi_regs_t *  XQSPIx)

Get address bytes in command.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL1 | CFG_ADDR4 | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 1028 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_xip_cmd()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_cmd ( xqspi_regs_t *  XQSPIx)

Get read command.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL0 | CFG_CMD | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 789 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_xip_cpha()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_cpha ( xqspi_regs_t *  XQSPIx)

Get clock phase.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL1 | CFG_CPHA | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 940 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_xip_cpol()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_cpol ( xqspi_regs_t *  XQSPIx)

Get clock polarity.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL1 | CFG_CPOL | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 984 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_xip_dummy_hp()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_dummy_hp ( xqspi_regs_t *  XQSPIx)

Get dummy cycles in high performance end.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL2 | CFG_ENDDUMMY | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can between: 0 ~ 3.

Definition at line 1201 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_xip_dummycycles()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_dummycycles ( xqspi_regs_t *  XQSPIx)

Get dummy cycles in command.

Note
- Fast Read Dual I/O: dummycycles = 4 * cycles + 4
  • Fast Read Quad I/O: dummycycles = 2 * cycles + 2
  • Fast Read Dual Out: dummycycles = 8 * cycles
  • Fast Read Quad Out: dummycycles = 8 * cycles

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL2 | CFG_DUMMYCYCLES | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can between: 0 ~ 0xF.

Definition at line 1161 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_xip_endian()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_endian ( xqspi_regs_t *  XQSPIx)

Get endian in reading data.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL1 | CFG_LE32 | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 1072 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_xip_flag()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_flag ( xqspi_regs_t *  XQSPIx)

Get XIP status.

Note
This bit is read-only.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | STAT | EN_OUT | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can between: 0 ~ 1

Definition at line 1279 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_xip_hp_cmd()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_hp_cmd ( xqspi_regs_t *  XQSPIx)

Get high performance command.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL2 | CFG_HPMODE | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can between: 0 ~ 0xFF.

Definition at line 1113 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_xip_ss()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_xip_ss ( xqspi_regs_t *  XQSPIx)

Get slave select.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL1 | CFG_SS | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 896 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_enabled_xip()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_xip ( xqspi_regs_t *  XQSPIx)

Check if XIP mode is enabled.

Note
This bit should not be changed when XIP is ongoing.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL3 | EN_REQ | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
Stateof bit (1 or 0).

Definition at line 1259 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_enabled_xip_hp()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_xip_hp ( xqspi_regs_t *  XQSPIx)

Check if high performance mode is enabled.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL1 | CFG_HPEN | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
Stateof bit (1 or 0).

Definition at line 848 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_enabled_xip_it()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_xip_it ( xqspi_regs_t *  XQSPIx)

Check if XIP interrupt is enabled.

Note
This bit is read-only.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | INTEN | INT_EN | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can between: 0 ~ 1

Definition at line 1299 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_xip_addr_size()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_addr_size ( xqspi_regs_t *  XQSPIx,
uint32_t  size 
)

Set address bytes in command.

Note
This bit should not be changed when XIP is ongoing.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL1 | CFG_ADDR4 | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
sizeThis parameter can be one or more of the following values:
Return values
None

Definition at line 1007 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_xip_cmd()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_cmd ( xqspi_regs_t *  XQSPIx,
uint32_t  cmd 
)

Set read command.

Note
These bits should not be changed when XIP is ongoing.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL0 | CFG_CMD | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
cmdThis parameter can be one of the following values:
Return values
None

Definition at line 764 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_xip_cpha()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_cpha ( xqspi_regs_t *  XQSPIx,
uint32_t  cpha 
)

Set clock phase.

Note
This bit should not be changed when XIP is ongoing.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL1 | CFG_CPHA | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
cphaThis parameter can be one or more of the following values:
Return values
None

Definition at line 919 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_xip_cpol()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_cpol ( xqspi_regs_t *  XQSPIx,
uint32_t  cpol 
)

Set clock polarity.

Note
This bit should not be changed when XIP is ongoing.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL1 | CFG_CPOL | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
cpolThis parameter can be one or more of the following values:
Return values
None

Definition at line 963 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_xip_dummy_hp()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_dummy_hp ( xqspi_regs_t *  XQSPIx,
uint32_t  cycles 
)

Set dummy cycles in high performance end.

Note
These bits should not be changed when XIP is ongoing.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL2 | CFG_ENDDUMMY | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
cyclesThis parameter can between: 0 ~ 3.
Return values
None

Definition at line 1182 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_xip_dummycycles()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_dummycycles ( xqspi_regs_t *  XQSPIx,
uint32_t  cycles 
)

Set dummy cycles in command.

Note
These bits should not be changed when XIP is ongoing.
  • Fast Read Dual I/O: dummycycles = 4 * cycles + 4
  • Fast Read Quad I/O: dummycycles = 2 * cycles + 2
  • Fast Read Dual Out: dummycycles = 8 * cycles
  • Fast Read Quad Out: dummycycles = 8 * cycles

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL2 | CFG_DUMMYCYCLES | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
cyclesThis parameter can between: 0 ~ 0xF.
Return values
None

Definition at line 1138 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_xip_endian()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_endian ( xqspi_regs_t *  XQSPIx,
uint32_t  endian 
)

Set endian in reading data.

Note
This bit should not be changed when XIP is ongoing.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL1 | CFG_LE32 | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
endianThis parameter can be one or more of the following values:
Return values
None

Definition at line 1051 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_xip_hp_cmd()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_hp_cmd ( xqspi_regs_t *  XQSPIx,
uint32_t  cmd 
)

Set high performance command.

Note
These bits should not be changed when XIP is ongoing.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL2 | CFG_HPMODE | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
cmdThis value is specified by different QSPI FLASH memory vendor to enter into its status register to activate HP mode in dual I/O and Quad I/O access. This parameter can between: 0 ~ 0xFF.
Return values
None

Definition at line 1094 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_xip_ss()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_xip_ss ( xqspi_regs_t *  XQSPIx,
uint32_t  ss 
)

Set slave select.

Note
These bits should not be changed when XIP is ongoing.

\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL1 | CFG_SS | +———————-+———————————–+ \endrst

Parameters
XQSPIxXQSPI instance
ssThis parameter can be one or more of the following values:
Return values
None

Definition at line 873 of file gr55xx_ll_xqspi.h.