gr55xx_hal_cortex.h File Reference

Header file of CORTEX HAL module. More...

#include "gr55xx_hal_def.h"

Go to the source code of this file.

Classes

struct  _mpu_region_init_t
 MPU Region initialization structure. More...
 

Macros

#define NVIC_PRIORITYGROUP_0   (0x00000007U)
 
#define NVIC_PRIORITYGROUP_1   (0x00000006U)
 
#define NVIC_PRIORITYGROUP_2   (0x00000005U)
 
#define NVIC_PRIORITYGROUP_3   (0x00000004U)
 
#define NVIC_PRIORITYGROUP_4   (0x00000003U)
 
#define NVIC_PRIORITYGROUP_5   (0x00000002U)
 
#define NVIC_PRIORITYGROUP_6   (0x00000001U)
 
#define NVIC_PRIORITYGROUP_7   (0x00000000U)
 
#define SYSTICK_CLKSOURCE_REFCLK   (0x00000000U)
 
#define SYSTICK_CLKSOURCE_HCLK   (0x00000004U)
 
#define MPU_HFNMI_PRIVDEF_NONE   (0x00000000U)
 
#define MPU_HARDFAULT_NMI   (0x00000002U)
 
#define MPU_PRIVILEGED_DEFAULT   (0x00000004U)
 
#define MPU_HFNMI_PRIVDEF   (0x00000006U)
 
#define MPU_REGION_ENABLE   ((uint8_t)0x01U)
 
#define MPU_REGION_DISABLE   ((uint8_t)0x00U)
 
#define MPU_INSTRUCTION_ACCESS_ENABLE   ((uint8_t)0x00U)
 
#define MPU_INSTRUCTION_ACCESS_DISABLE   ((uint8_t)0x01U)
 
#define MPU_ACCESS_SHAREABLE   ((uint8_t)0x01U)
 
#define MPU_ACCESS_NOT_SHAREABLE   ((uint8_t)0x00U)
 
#define MPU_ACCESS_CACHEABLE   ((uint8_t)0x01U)
 
#define MPU_ACCESS_NOT_CACHEABLE   ((uint8_t)0x00U)
 
#define MPU_ACCESS_BUFFERABLE   ((uint8_t)0x01U)
 
#define MPU_ACCESS_NOT_BUFFERABLE   ((uint8_t)0x00U)
 
#define MPU_TEX_LEVEL0   ((uint8_t)0x00U)
 
#define MPU_TEX_LEVEL1   ((uint8_t)0x01U)
 
#define MPU_TEX_LEVEL2   ((uint8_t)0x02U)
 
#define MPU_REGION_SIZE_32B   ((uint8_t)0x04U)
 
#define MPU_REGION_SIZE_64B   ((uint8_t)0x05U)
 
#define MPU_REGION_SIZE_128B   ((uint8_t)0x06U)
 
#define MPU_REGION_SIZE_256B   ((uint8_t)0x07U)
 
#define MPU_REGION_SIZE_512B   ((uint8_t)0x08U)
 
#define MPU_REGION_SIZE_1KB   ((uint8_t)0x09U)
 
#define MPU_REGION_SIZE_2KB   ((uint8_t)0x0AU)
 
#define MPU_REGION_SIZE_4KB   ((uint8_t)0x0BU)
 
#define MPU_REGION_SIZE_8KB   ((uint8_t)0x0CU)
 
#define MPU_REGION_SIZE_16KB   ((uint8_t)0x0DU)
 
#define MPU_REGION_SIZE_32KB   ((uint8_t)0x0EU)
 
#define MPU_REGION_SIZE_64KB   ((uint8_t)0x0FU)
 
#define MPU_REGION_SIZE_128KB   ((uint8_t)0x10U)
 
#define MPU_REGION_SIZE_256KB   ((uint8_t)0x11U)
 
#define MPU_REGION_SIZE_512KB   ((uint8_t)0x12U)
 
#define MPU_REGION_SIZE_1MB   ((uint8_t)0x13U)
 
#define MPU_REGION_SIZE_2MB   ((uint8_t)0x14U)
 
#define MPU_REGION_SIZE_4MB   ((uint8_t)0x15U)
 
#define MPU_REGION_SIZE_8MB   ((uint8_t)0x16U)
 
#define MPU_REGION_SIZE_16MB   ((uint8_t)0x17U)
 
#define MPU_REGION_SIZE_32MB   ((uint8_t)0x18U)
 
#define MPU_REGION_SIZE_64MB   ((uint8_t)0x19U)
 
#define MPU_REGION_SIZE_128MB   ((uint8_t)0x1AU)
 
#define MPU_REGION_SIZE_256MB   ((uint8_t)0x1BU)
 
#define MPU_REGION_SIZE_512MB   ((uint8_t)0x1CU)
 
#define MPU_REGION_SIZE_1GB   ((uint8_t)0x1DU)
 
#define MPU_REGION_SIZE_2GB   ((uint8_t)0x1EU)
 
#define MPU_REGION_SIZE_4GB   ((uint8_t)0x1FU)
 
#define MPU_REGION_NO_ACCESS   ((uint8_t)0x00U)
 
#define MPU_REGION_PRIV_RW   ((uint8_t)0x01U)
 
#define MPU_REGION_PRIV_RW_URO   ((uint8_t)0x02U)
 
#define MPU_REGION_FULL_ACCESS   ((uint8_t)0x03U)
 
#define MPU_REGION_PRIV_RO   ((uint8_t)0x05U)
 
#define MPU_REGION_PRIV_RO_URO   ((uint8_t)0x06U)
 
#define MPU_REGION_NUMBER0   ((uint8_t)0x00U)
 
#define MPU_REGION_NUMBER1   ((uint8_t)0x01U)
 
#define MPU_REGION_NUMBER2   ((uint8_t)0x02U)
 
#define MPU_REGION_NUMBER3   ((uint8_t)0x03U)
 
#define MPU_REGION_NUMBER4   ((uint8_t)0x04U)
 
#define MPU_REGION_NUMBER5   ((uint8_t)0x05U)
 
#define MPU_REGION_NUMBER6   ((uint8_t)0x06U)
 
#define MPU_REGION_NUMBER7   ((uint8_t)0x07U)
 
#define IS_NVIC_PRIORITY_GROUP(__GROUP__)
 Check if NVIC priority group is valid. More...
 
#define IS_NVIC_PREEMPTION_PRIORITY(__PRIORITY__)   ((__PRIORITY__) < 0x80U)
 Check if NVIC priority group is valid. More...
 
#define IS_NVIC_SUB_PRIORITY(__PRIORITY__)   ((__PRIORITY__) <= 0xFFU)
 Check if NVIC sub priority is valid. More...
 
#define IS_NVIC_DEVICE_IRQ(__IRQ__)   ((__IRQ__) >= 0x00)
 Check if NVIC deivce IRQ is valid. More...
 
#define IS_SYSTICK_CLK_SOURCE(__SOURCE__)
 Check if SYSTICK clock source is valid. More...
 
#define IS_MPU_REGION_ENABLE(__STATE__)
 Check if MPU enable state is valid. More...
 
#define IS_MPU_INSTRUCTION_ACCESS(__STATE__)
 Check if MPU instruction access state is valid. More...
 
#define IS_MPU_ACCESS_SHAREABLE(__STATE__)
 Check if MPU access shareable state is valid. More...
 
#define IS_MPU_ACCESS_CACHEABLE(__STATE__)
 Check if MPU access cacheable state is valid. More...
 
#define IS_MPU_ACCESS_BUFFERABLE(__STATE__)
 Check if MPU access bufferable state is valid. More...
 
#define IS_MPU_TEX_LEVEL(__TYPE__)
 Check if MPU Tex level is valid. More...
 
#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(__TYPE__)
 Check if MPU region permission attribute type is valid. More...
 
#define IS_MPU_REGION_NUMBER(__NUMBER__)
 Check if MPU region number is valid. More...
 
#define IS_MPU_REGION_SIZE(__SIZE__)
 Check if MPU region size is valid. More...
 
#define IS_MPU_SUB_REGION_DISABLE(__SUBREGION__)   ((__SUBREGION__) < (uint16_t)0x00FFU)
 Check if MPU sub region is valid. More...
 

Typedefs

typedef struct _mpu_region_init_t mpu_region_init_t
 MPU Region initialization structure. More...
 

Functions

void hal_nvic_set_priority_grouping (uint32_t priority_group)
 Set the priority grouping field (pre-emption priority and subpriority) using the required unlock sequence. More...
 
void hal_nvic_set_priority (IRQn_Type IRQn, uint32_t preempt_priority, uint32_t sub_priority)
 Set the priority of an interrupt. More...
 
void hal_nvic_enable_irq (IRQn_Type IRQn)
 Enable a device specific interrupt in the NVIC interrupt controller. More...
 
void hal_nvic_disable_irq (IRQn_Type IRQn)
 Disable a device specific interrupt in the NVIC interrupt controller. More...
 
void hal_nvic_system_reset (void)
 Initiate a system reset request to reset the MCU. More...
 
uint32_t hal_systick_config (uint32_t ticks_number)
 Initialize the System Timer and its interrupt, and start the System Tick Timer. Counter is in free running mode to generate periodic interrupts. More...
 
void hal_mpu_config_region (mpu_region_init_t *p_mpu_init)
 Initialize and configures the Region and the memory to be protected. More...
 
uint32_t hal_nvic_get_priority_grouping (void)
 Get the priority grouping field from the NVIC Interrupt Controller. More...
 
void hal_nvic_get_priority (IRQn_Type IRQn, uint32_t priority_group, uint32_t *p_preempt_priority, uint32_t *p_sub_priority)
 Get the priority of an interrupt. More...
 
void hal_nvic_set_pending_irq (IRQn_Type IRQn)
 Set Pending bit of an external interrupt. More...
 
uint32_t hal_nvic_get_pending_irq (IRQn_Type IRQn)
 Get Pending Interrupt (reads the pending register in the NVIC and returns the pending bit for the specified interrupt). More...
 
void hal_nvic_clear_pending_irq (IRQn_Type IRQn)
 Clear the pending bit of an external interrupt. More...
 
uint32_t hal_nvic_get_active (IRQn_Type IRQn)
 Get active interrupt (reads the active register in NVIC and returns the active bit). More...
 
void hal_systick_clk_source_config (uint32_t clk_source)
 Configure the SysTick clock source. More...
 
void hal_systick_irq_handler (void)
 This function handles SYSTICK interrupt request. More...
 
void hal_systick_callback (void)
 SYSTICK callback. More...
 
void hal_mpu_disable (void)
 Disables the MPU and clears the HFNMIENA bit (ARM recommendation) More...
 
void hal_mpu_enable (uint32_t mpu_control)
 Enable the MPU. More...
 

Detailed Description

Header file of CORTEX HAL module.

Author
BLE Driver Team
Attention
#####Copyright (c) 2019 GOODIX All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. Neither the name of GOODIX nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Definition in file gr55xx_hal_cortex.h.