Functions | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_qspi_transmit_data8 (xqspi_regs_t *XQSPIx, uint8_t tx_data) |
Write 8-bit in the data register. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_qspi_transmit_data16 (xqspi_regs_t *XQSPIx, uint16_t tx_data) |
Write 16-bit in the data register. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_qspi_transmit_data32 (xqspi_regs_t *XQSPIx, uint32_t tx_data) |
Write 32-bit in the data register. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint8_t | ll_xqspi_qspi_receive_data8 (xqspi_regs_t *XQSPIx) |
Read 8 bits in the data register. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint16_t | ll_xqspi_qspi_receive_data16 (xqspi_regs_t *XQSPIx) |
Read 16 bits in the data register. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_qspi_receive_data32 (xqspi_regs_t *XQSPIx) |
Read 32 bits in the data register. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_tft (xqspi_regs_t *XQSPIx, uint32_t threshold) |
Set TX FIFO threshold level. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_tft (xqspi_regs_t *XQSPIx) |
Get TX FIFO threshold level. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_rft (xqspi_regs_t *XQSPIx, uint32_t threshold) |
Set RX FIFO threshold level. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_rft (xqspi_regs_t *XQSPIx) |
Get RX FIFO threshold level. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi_dummy (xqspi_regs_t *XQSPIx) |
Enable dummy cycles. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi_dummy (xqspi_regs_t *XQSPIx) |
Disable dummy cycles. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_qspi_dummy (xqspi_regs_t *XQSPIx) |
Check if dummy cycles is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi_dma (xqspi_regs_t *XQSPIx) |
Enable DMA mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi_dma (xqspi_regs_t *XQSPIx) |
Disable DMA mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_qspi_dma (xqspi_regs_t *XQSPIx) |
Check if DMA mode is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_cpol (xqspi_regs_t *XQSPIx, uint32_t cpol) |
Set clock polarity. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_cpol (xqspi_regs_t *XQSPIx) |
Get clock polarity. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_cpha (xqspi_regs_t *XQSPIx, uint32_t cpha) |
Set clock phase. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_cpha (xqspi_regs_t *XQSPIx) |
Get clock phase. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_data_order (xqspi_regs_t *XQSPIx, uint32_t order) |
Set serial data order. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_data_order (xqspi_regs_t *XQSPIx) |
Get serial data order. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi_contxfer (xqspi_regs_t *XQSPIx) |
Enable continuous transfer mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi_contxfer (xqspi_regs_t *XQSPIx) |
Disable continuous transfer mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_qspi_contxfer (xqspi_regs_t *XQSPIx) |
Check if continuous transfer mode is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi_contxfer_extend (xqspi_regs_t *XQSPIx) |
Enable continuous transfer extend mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi_contxfer_extend (xqspi_regs_t *XQSPIx) |
Disable continuous transfer extend mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_qspi_contxfer_extend (xqspi_regs_t *XQSPIx) |
Check if continuous transfer extend mode is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_datasize (xqspi_regs_t *XQSPIx, uint32_t szie) |
Set data size. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_datasize (xqspi_regs_t *XQSPIx) |
Get data size. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_inhibt_rx (xqspi_regs_t *XQSPIx) |
Enable inhibt data input to RX FIFO. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_inhibt_rx (xqspi_regs_t *XQSPIx) |
Disable inhibt data input to RX FIFO. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_inhibt_rx (xqspi_regs_t *XQSPIx) |
Check if inhibt data input to RX FIFO is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_inhibt_tx (xqspi_regs_t *XQSPIx) |
Enable inhibt data output to TX FIFO. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_inhibt_tx (xqspi_regs_t *XQSPIx) |
Disable inhibt data output to TX FIFO. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_inhibt_tx (xqspi_regs_t *XQSPIx) |
Check if inhibt data input to TX FIFO is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_frf (xqspi_regs_t *XQSPIx, uint32_t format) |
Set frame format. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_frf (xqspi_regs_t *XQSPIx) |
Get frame format. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_status (xqspi_regs_t *XQSPIx) |
Get QSPI status. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_active_qspi_flag (xqspi_regs_t *XQSPIx, uint32_t flag) |
Check active flag. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi_ssout (xqspi_regs_t *XQSPIx, uint32_t ssout) |
Enable slave select output. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi_ssout (xqspi_regs_t *XQSPIx, uint32_t ssout) |
Disable slave select output. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_sspol (xqspi_regs_t *XQSPIx, uint32_t sspol) |
Set slave select output polarity. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_sspol (xqspi_regs_t *XQSPIx) |
Get slave select output polarity. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_tx_fifo_level (xqspi_regs_t *XQSPIx) |
Get FIFO Transmission Level. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_rx_fifo_level (xqspi_regs_t *XQSPIx) |
Get FIFO reception Level. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi_it (xqspi_regs_t *XQSPIx, uint32_t mask) |
Enable interrupt. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi_it (xqspi_regs_t *XQSPIx, uint32_t mask) |
Disable interrupt. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_qspi_it (xqspi_regs_t *XQSPIx, uint32_t mask) |
Check if interrupt is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_it_flag (xqspi_regs_t *XQSPIx) |
Get XQSPI interrupt flags. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_qspi_it_flag (xqspi_regs_t *XQSPIx, uint32_t flag) |
Check interrupt flag. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_clear_qspi_flag (xqspi_regs_t *XQSPIx, uint32_t flag) |
Clear interrupt flag. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_wait (xqspi_regs_t *XQSPIx, uint32_t wait) |
Set master inter-transfer delay. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_wait (xqspi_regs_t *XQSPIx) |
Get master inter-transfer delay. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_qspi (xqspi_regs_t *XQSPIx) |
Enable QSPI. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_qspi (xqspi_regs_t *XQSPIx) |
Disable QSPI. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_qspi (xqspi_regs_t *XQSPIx) |
Check if QSPI is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_flash_write (xqspi_regs_t *XQSPIx, uint32_t bits) |
Set QSPI Flash write bits. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_flash_write (xqspi_regs_t *XQSPIx) |
Get QSPI Flash write bits. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_present_bypass (xqspi_regs_t *XQSPIx, uint32_t bypass) |
Set QSPI Present Bypass. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_present_bypass (xqspi_regs_t *XQSPIx) |
Get QSPI Present Bypass. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_exflash_power (void) |
Enable exflash power. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_exflash_power (void) |
Disable exflash power. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enable_exflash_power (void) |
Check if exflash power is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_qspi_speed (uint32_t speed) |
Set XQSPI serial clock. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_qspi_speed (void) |
Get XQSPI serial clock. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_cache_retention (void) |
Enable cache data retention. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_cache_retention (void) |
Disable cache data retention. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enable_cache_retention (void) |
Check if tag memory retention is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_clear_qspi_flag | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | flag | ||
) |
Clear interrupt flag.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | INTCLR | INT_CLR | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
flag | This parameter can be one of the following values: |
None |
Definition at line 2501 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_cache_retention | ( | void | ) |
Disable cache data retention.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | PWR_RET01 | XF_TAG_RET | +———————-+———————————–+ \endrst
None |
Definition at line 2826 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_exflash_power | ( | void | ) |
Disable exflash power.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | PWR_RET01 | EFLASH_PAD_EN | +———————-+———————————–+ \endrst
None |
Definition at line 2723 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_inhibt_rx | ( | xqspi_regs_t * | XQSPIx | ) |
Disable inhibt data input to RX FIFO.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | AUX_CTRL | INHIBITDIN | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 2053 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_inhibt_tx | ( | xqspi_regs_t * | XQSPIx | ) |
Disable inhibt data output to TX FIFO.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | AUX_CTRL | INHIBITDOUT | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 2110 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi | ( | xqspi_regs_t * | XQSPIx | ) |
Disable QSPI.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | SPIEN | EN | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 2579 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_contxfer | ( | xqspi_regs_t * | XQSPIx | ) |
Disable continuous transfer mode.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | CONTXFER | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 1883 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_contxfer_extend | ( | xqspi_regs_t * | XQSPIx | ) |
Disable continuous transfer extend mode.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | AUX_CTRL | CONTXFERX | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 1940 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_dma | ( | xqspi_regs_t * | XQSPIx | ) |
Disable DMA mode.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | DMA | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 1695 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_dummy | ( | xqspi_regs_t * | XQSPIx | ) |
Disable dummy cycles.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | MWAITEN | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 1638 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_it | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | mask | ||
) |
Disable interrupt.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | INTEN | INT_EN | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
mask | This parameter can be one of the following values: |
None |
Definition at line 2397 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_ssout | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | ssout | ||
) |
Disable slave select output.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | SLAVE_SEL | OUT3 OUT2 OUT1 OUT0 | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
ssout | This parameter can between: 0 ~ 0xFF |
None |
Definition at line 2268 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_cache_retention | ( | void | ) |
Enable cache data retention.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | PWR_RET01 | XF_TAG_RET | +———————-+———————————–+ \endrst
None |
Definition at line 2807 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_exflash_power | ( | void | ) |
Enable exflash power.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | PWR_RET01 | EFLASH_PAD_EN | +———————-+———————————–+ \endrst
None |
Definition at line 2704 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_inhibt_rx | ( | xqspi_regs_t * | XQSPIx | ) |
Enable inhibt data input to RX FIFO.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | AUX_CTRL | INHIBITDIN | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 2034 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_inhibt_tx | ( | xqspi_regs_t * | XQSPIx | ) |
Enable inhibt data output to TX FIFO.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | AUX_CTRL | INHIBITDOUT | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 2091 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi | ( | xqspi_regs_t * | XQSPIx | ) |
Enable QSPI.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | SPIEN | EN | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 2560 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_contxfer | ( | xqspi_regs_t * | XQSPIx | ) |
Enable continuous transfer mode.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | CONTXFER | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 1864 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_contxfer_extend | ( | xqspi_regs_t * | XQSPIx | ) |
Enable continuous transfer extend mode.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | AUX_CTRL | CONTXFERX | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 1921 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_dma | ( | xqspi_regs_t * | XQSPIx | ) |
Enable DMA mode.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | DMA | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 1676 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_dummy | ( | xqspi_regs_t * | XQSPIx | ) |
Enable dummy cycles.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | MWAITEN | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
None |
Definition at line 1619 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_it | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | mask | ||
) |
Enable interrupt.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | INTEN | INT_EN | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
mask | This parameter can be one of the following values: |
None |
Definition at line 2371 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_ssout | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | ssout | ||
) |
Enable slave select output.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | SLAVE_SEL | OUT3 OUT2 OUT1 OUT0 | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
ssout | This parameter can between: 0 ~ 0xFF |
None |
Definition at line 2248 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_flash_write | ( | xqspi_regs_t * | XQSPIx | ) |
Get QSPI Flash write bits.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | FLASH_WRITE | FLASH_WRITE | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can be one of the following values: |
Definition at line 2641 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_it_flag | ( | xqspi_regs_t * | XQSPIx | ) |
Get XQSPI interrupt flags.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | INTSTAT | INT_STAT | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can be one or combination of the following values: |
Definition at line 2446 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_present_bypass | ( | xqspi_regs_t * | XQSPIx | ) |
Get QSPI Present Bypass.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | BYPASS | BYPASS | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can be one of the following values: |
Definition at line 2685 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_cpha | ( | xqspi_regs_t * | XQSPIx | ) |
Get clock phase.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | CPHA | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can be one of the following values: |
Definition at line 1802 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_cpol | ( | xqspi_regs_t * | XQSPIx | ) |
Get clock polarity.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | CPOL | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can be one of the following values: |
Definition at line 1758 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_data_order | ( | xqspi_regs_t * | XQSPIx | ) |
Get serial data order.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | MSB1ST | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can be one of the following values: |
Definition at line 1845 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_datasize | ( | xqspi_regs_t * | XQSPIx | ) |
Get data size.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | AUX_CTRL | BITSIZE | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can be one of the following values: |
Definition at line 2015 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_frf | ( | xqspi_regs_t * | XQSPIx | ) |
Get frame format.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | AUX_CTRL | QMODE | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can be one even value: |
Definition at line 2175 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_rft | ( | xqspi_regs_t * | XQSPIx | ) |
Get RX FIFO threshold level.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | RXWMARK | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can be one of the following values: |
Definition at line 1600 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_rx_fifo_level | ( | xqspi_regs_t * | XQSPIx | ) |
Get FIFO reception Level.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | RX_FIFO_LVL | RXFIFOLVL | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can between: 0 ~ 16 |
Definition at line 2345 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_speed | ( | void | ) |
Get XQSPI serial clock.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | PWR_RET01 | XF_SCK_CLK_SEL | +———————-+———————————–+ \endrst
Returned | Value can be one of the following values: |
Definition at line 2788 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_sspol | ( | xqspi_regs_t * | XQSPIx | ) |
Get slave select output polarity.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | SLAVE_SEL_POL | POL3 POL2 POL1 POL0 | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can between: 0 ~ 0xFF |
Definition at line 2307 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_status | ( | xqspi_regs_t * | XQSPIx | ) |
Get QSPI status.
\rst +———————-+——————————————————+ | Register | BitsName | +======================+======================================================+ | STATUS | RXFULL RXWMARK RXEMPTY TXFULL TXWMARK TXEMPTY XFERIP | +———————-+——————————————————+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can be one or combination of the following values: |
Definition at line 2201 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_tft | ( | xqspi_regs_t * | XQSPIx | ) |
Get TX FIFO threshold level.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | TXWMARK | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can be one of the following values: |
Definition at line 1551 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_tx_fifo_level | ( | xqspi_regs_t * | XQSPIx | ) |
Get FIFO Transmission Level.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | TX_FIFO_LVL | TXFIFOLVL | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can between: 0 ~ 16 |
Definition at line 2326 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_wait | ( | xqspi_regs_t * | XQSPIx | ) |
Get master inter-transfer delay.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | MSTR_IT_DELAY | MWAIT | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value can between: 0 ~ 255 |
Definition at line 2540 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_active_qspi_flag | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | flag | ||
) |
Check active flag.
\rst +———————-+——————————————————+ | Register | BitsName | +======================+======================================================+ | STATUS | RXFULL RXWMARK RXEMPTY TXFULL TXWMARK TXEMPTY XFERIP | +———————-+——————————————————+ \endrst
XQSPIx | XQSPI instance |
flag | This parameter can be one of the following values: |
State | of bit (1 or 0). |
Definition at line 2228 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enable_cache_retention | ( | void | ) |
Check if tag memory retention is enabled.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | PWR_RET01 | XF_TAG_RET | +———————-+———————————–+ \endrst
State | of bit (1 or 0). |
Definition at line 2844 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enable_exflash_power | ( | void | ) |
Check if exflash power is enabled.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | PWR_RET01 | EFLASH_PAD_EN | +———————-+———————————–+ \endrst
State | of bit (1 or 0). |
Definition at line 2741 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_inhibt_rx | ( | xqspi_regs_t * | XQSPIx | ) |
Check if inhibt data input to RX FIFO is enabled.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | AUX_CTRL | INHIBITDIN | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
State | of bit (1 or 0). |
Definition at line 2072 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_inhibt_tx | ( | xqspi_regs_t * | XQSPIx | ) |
Check if inhibt data input to TX FIFO is enabled.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | AUX_CTRL | INHIBITDOUT | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
State | of bit (1 or 0). |
Definition at line 2129 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi | ( | xqspi_regs_t * | XQSPIx | ) |
Check if QSPI is enabled.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | SPIEN | EN | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
State | of bit (1 or 0). |
Definition at line 2598 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_contxfer | ( | xqspi_regs_t * | XQSPIx | ) |
Check if continuous transfer mode is enabled.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | CONTXFER | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
State | of bit (1 or 0). |
Definition at line 1902 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_contxfer_extend | ( | xqspi_regs_t * | XQSPIx | ) |
Check if continuous transfer extend mode is enabled.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | AUX_CTRL | CONTXFERX | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
State | of bit (1 or 0). |
Definition at line 1959 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_dma | ( | xqspi_regs_t * | XQSPIx | ) |
Check if DMA mode is enabled.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | DMA | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
State | of bit (1 or 0). |
Definition at line 1714 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_dummy | ( | xqspi_regs_t * | XQSPIx | ) |
Check if dummy cycles is enabled.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | MWAITEN | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
State | of bit (1 or 0). |
Definition at line 1657 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_it | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | mask | ||
) |
Check if interrupt is enabled.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | INTEN | INT_EN | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
mask | This parameter can be one of the following values: |
State | of bit (1 or 0). |
Definition at line 2422 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_qspi_it_flag | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | flag | ||
) |
Check interrupt flag.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | INTSTAT | XFER_DPULSE | +———————-+———————————–+ \endrst INTSTAT | RX_FPULSE INTSTAT | RX_WPULSE INTSTAT | TX_WPULSE INTSTAT | TX_EPULSE
XQSPIx | XQSPI instance |
flag | This parameter can be one of the following values: |
State | of bit (1 or 0). |
Definition at line 2475 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint16_t ll_xqspi_qspi_receive_data16 | ( | xqspi_regs_t * | XQSPIx | ) |
Read 16 bits in the data register.
\rst +———————-+—————————–+ | Register | BitsName | +======================+=============================+ | RX_DATA | DATA | +———————-+—————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value between: 0x00 ~ 0xFFFF |
Definition at line 1483 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_qspi_receive_data32 | ( | xqspi_regs_t * | XQSPIx | ) |
Read 32 bits in the data register.
\rst +———————-+—————————–+ | Register | BitsName | +======================+=============================+ | RX_DATA | DATA | +———————-+—————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value between: 0x00 ~ 0xFFFFFFFF |
Definition at line 1502 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint8_t ll_xqspi_qspi_receive_data8 | ( | xqspi_regs_t * | XQSPIx | ) |
Read 8 bits in the data register.
\rst +———————-+—————————–+ | Register | BitsName | +======================+=============================+ | RX_DATA | DATA | +———————-+—————————–+ \endrst
XQSPIx | XQSPI instance |
Returned | Value between: 0x00 ~ 0xFF |
Definition at line 1464 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_qspi_transmit_data16 | ( | xqspi_regs_t * | XQSPIx, |
uint16_t | tx_data | ||
) |
Write 16-bit in the data register.
\rst +———————-+—————————–+ | Register | BitsName | +======================+=============================+ | TX_DATA | DATA | +———————-+—————————–+ \endrst
XQSPIx | XQSPI instance |
tx_data | This parameter can between: 0x00 ~ 0xFFFF |
None |
Definition at line 1425 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_qspi_transmit_data32 | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | tx_data | ||
) |
Write 32-bit in the data register.
\rst +———————-+—————————–+ | Register | BitsName | +======================+=============================+ | TX_DATA | DATA | +———————-+—————————–+ \endrst
XQSPIx | XQSPI instance |
tx_data | This parameter can between: 0x00 ~ 0xFFFFFFFF |
None |
Definition at line 1445 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_qspi_transmit_data8 | ( | xqspi_regs_t * | XQSPIx, |
uint8_t | tx_data | ||
) |
Write 8-bit in the data register.
\rst +———————-+—————————–+ | Register | BitsName | +======================+=============================+ | TX_DATA | DATA | +———————-+—————————–+ \endrst
XQSPIx | XQSPI instance |
tx_data | This parameter can between: 0x00 ~ 0xFF |
None |
Definition at line 1405 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_flash_write | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | bits | ||
) |
Set QSPI Flash write bits.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | FLASH_WRITE | FLASH_WRITE | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
bits | This parameter can be one of the following values: |
None |
Definition at line 2620 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_present_bypass | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | bypass | ||
) |
Set QSPI Present Bypass.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | BYPASS | BYPASS | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
bypass | This parameter can be one of the following values: |
None |
Definition at line 2664 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_cpha | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | cpha | ||
) |
Set clock phase.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | CPHA | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
cpha | This parameter can be one of the following values: |
None |
Definition at line 1781 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_cpol | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | cpol | ||
) |
Set clock polarity.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | CPOL | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
cpol | This parameter can be one of the following values: |
None |
Definition at line 1737 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_data_order | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | order | ||
) |
Set serial data order.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | MSB1ST | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
order | This parameter can be one of the following values: |
None |
Definition at line 1824 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_datasize | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | szie | ||
) |
Set data size.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | AUX_CTRL | BITSIZE | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
szie | This parameter can be one of the following values: |
None |
Definition at line 1988 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_frf | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | format | ||
) |
Set frame format.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | AUX_CTRL | QMODE | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
format | This parameter can be one of the following values: |
None |
Definition at line 2153 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_rft | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | threshold | ||
) |
Set RX FIFO threshold level.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | RXWMARK | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
threshold | This parameter can be one of the following values: |
None |
Definition at line 1576 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_speed | ( | uint32_t | speed | ) |
Set XQSPI serial clock.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | PWR_RET01 | XF_SCK_CLK_SEL | +———————-+———————————–+ \endrst
speed | This parameter can be one of the following values: |
None |
Definition at line 2765 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_sspol | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | sspol | ||
) |
Set slave select output polarity.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | SLAVE_SEL_POL | POL3 POL2 POL1 POL0 | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
sspol | This parameter can between: 0 ~ 0xFF |
None |
Definition at line 2288 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_tft | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | threshold | ||
) |
Set TX FIFO threshold level.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | CTRL | TXWMARK | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
threshold | This parameter can be one of the following values: |
None |
Definition at line 1527 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_wait | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | wait | ||
) |
Set master inter-transfer delay.
\rst +———————-+———————————–+ | Register | BitsName | +======================+===================================+ | MSTR_IT_DELAY | MWAIT | +———————-+———————————–+ \endrst
XQSPIx | XQSPI instance |
wait | This parameter can between: 0 ~ 255 |
None |
Definition at line 2521 of file gr55xx_ll_xqspi.h.