Macros | |
#define | LL_SSI_INST_ADDR_ALL_IN_SPI 0x00000000UL |
#define | LL_SSI_INST_IN_SPI_ADDR_IN_SPIFRF (1UL << SSI_SCTRL0_TRANSTYPE_Pos) |
#define | LL_SSI_INST_ADDR_ALL_IN_SPIFRF (2UL << SSI_SCTRL0_TRANSTYPE_Pos) |
#define LL_SSI_INST_ADDR_ALL_IN_SPI 0x00000000UL |
Instruction and address are sent in SPI mode
Definition at line 411 of file gr55xx_ll_spi.h.
#define LL_SSI_INST_ADDR_ALL_IN_SPIFRF (2UL << SSI_SCTRL0_TRANSTYPE_Pos) |
Instruction and address are sent in Daul/Quad SPI mode
Definition at line 413 of file gr55xx_ll_spi.h.
#define LL_SSI_INST_IN_SPI_ADDR_IN_SPIFRF (1UL << SSI_SCTRL0_TRANSTYPE_Pos) |
Instruction is in sent in SPI mode and address is sent in Daul/Quad SPI mode
Definition at line 412 of file gr55xx_ll_spi.h.