Macros
CORTEX Private Macros
Peripheral Driver » HAL Driver » CORTEX » Defines

## Macros
#define | IS_NVIC_PRIORITY_GROUP(__GROUP__)
| Check if NVIC priority group is valid. More...
#define | IS_NVIC_PREEMPTION_PRIORITY(__PRIORITY__) ((__PRIORITY__) < 0x80U)
| Check if NVIC priority group is valid. More...
#define | IS_NVIC_SUB_PRIORITY(__PRIORITY__) ((__PRIORITY__) <= 0xFFU)
| Check if NVIC sub priority is valid. More...
#define | IS_NVIC_DEVICE_IRQ(__IRQ__) ((__IRQ__) >= 0x00)
| Check if NVIC deivce IRQ is valid. More...
#define | IS_SYSTICK_CLK_SOURCE(__SOURCE__)
| Check if SYSTICK clock source is valid. More...
#define | IS_MPU_REGION_ENABLE(__STATE__)
| Check if MPU enable state is valid. More...
#define | IS_MPU_INSTRUCTION_ACCESS(__STATE__)
| Check if MPU instruction access state is valid. More...
#define | IS_MPU_ACCESS_SHAREABLE(__STATE__)
| Check if MPU access shareable state is valid. More...
#define | IS_MPU_ACCESS_CACHEABLE(__STATE__)
| Check if MPU access cacheable state is valid. More...
#define | IS_MPU_ACCESS_BUFFERABLE(__STATE__)
| Check if MPU access bufferable state is valid. More...
#define | IS_MPU_TEX_LEVEL(__TYPE__)
| Check if MPU Tex level is valid. More...
#define | IS_MPU_REGION_PERMISSION_ATTRIBUTE(__TYPE__)
| Check if MPU region permission attribute type is valid. More...
#define | IS_MPU_REGION_NUMBER(__NUMBER__)
| Check if MPU region number is valid. More...
#define | IS_MPU_REGION_SIZE(__SIZE__)
| Check if MPU region size is valid. More...
#define | IS_MPU_SUB_REGION_DISABLE(__SUBREGION__) ((__SUBREGION__) < (uint16_t)0x00FFU)
| Check if MPU sub region is valid. More...

## Detailed Description

## Macro Definition Documentation

## ◆ IS_MPU_ACCESS_BUFFERABLE

#define IS_MPU_ACCESS_BUFFERABLE | ( |  | __STATE__ | ) |

Value:
(((__STATE__) == MPU_ACCESS_BUFFERABLE) || \
((__STATE__) == MPU_ACCESS_NOT_BUFFERABLE))

Check if MPU access bufferable state is valid.

Parameters

  __STATE__ | MPU access bufferable state.

Return values

  SET | (__STATE__ is valid) or RESET (__STATE__ is not invalid)

Definition at line 364 of file gr55xx_hal_cortex.h.

## ◆ IS_MPU_ACCESS_CACHEABLE

#define IS_MPU_ACCESS_CACHEABLE | ( |  | __STATE__ | ) |

Value:
(((__STATE__) == MPU_ACCESS_CACHEABLE) || \
((__STATE__) == MPU_ACCESS_NOT_CACHEABLE))

Check if MPU access cacheable state is valid.

Parameters

  __STATE__ | MPU access cacheable state.

Return values

  SET | (__STATE__ is valid) or RESET (__STATE__ is not invalid)

Definition at line 356 of file gr55xx_hal_cortex.h.

## ◆ IS_MPU_ACCESS_SHAREABLE

#define IS_MPU_ACCESS_SHAREABLE | ( |  | __STATE__ | ) |

Value:
(((__STATE__) == MPU_ACCESS_SHAREABLE) || \
((__STATE__) == MPU_ACCESS_NOT_SHAREABLE))

Check if MPU access shareable state is valid.

Parameters

  __STATE__ | MPU access shareable state.

Return values

  SET | (__STATE__ is valid) or RESET (__STATE__ is not invalid)

Definition at line 348 of file gr55xx_hal_cortex.h.

## ◆ IS_MPU_INSTRUCTION_ACCESS

#define IS_MPU_INSTRUCTION_ACCESS | ( |  | __STATE__ | ) |

Value:
(((__STATE__) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
((__STATE__) == MPU_INSTRUCTION_ACCESS_DISABLE))

Check if MPU instruction access state is valid.

Parameters

  __STATE__ | MPU instruction access state.

Return values

  SET | (__STATE__ is valid) or RESET (__STATE__ is not invalid)

Definition at line 340 of file gr55xx_hal_cortex.h.

## ◆ IS_MPU_REGION_ENABLE

#define IS_MPU_REGION_ENABLE | ( |  | __STATE__ | ) |

Value:
(((__STATE__) == MPU_REGION_ENABLE) || \
((__STATE__) == MPU_REGION_DISABLE))

Check if MPU enable state is valid.

Parameters

  __STATE__ | Enable state.

Return values

  SET | (__STATE__ is valid) or RESET (__STATE__ is not invalid)

Definition at line 332 of file gr55xx_hal_cortex.h.

## ◆ IS_MPU_REGION_NUMBER

#define IS_MPU_REGION_NUMBER | ( |  | __NUMBER__ | ) |

Value:
(((__NUMBER__) == MPU_REGION_NUMBER0) || \
((__NUMBER__) == MPU_REGION_NUMBER1) || \
((__NUMBER__) == MPU_REGION_NUMBER2) || \
((__NUMBER__) == MPU_REGION_NUMBER3) || \
((__NUMBER__) == MPU_REGION_NUMBER4) || \
((__NUMBER__) == MPU_REGION_NUMBER5) || \
((__NUMBER__) == MPU_REGION_NUMBER6) || \
((__NUMBER__) == MPU_REGION_NUMBER7))

Check if MPU region number is valid.

Parameters

  __NUMBER__ | MPU region number.

Return values

  SET | (__NUMBER__ is valid) or RESET (__NUMBER__ is invalid)

Definition at line 393 of file gr55xx_hal_cortex.h.

## ◆ IS_MPU_REGION_PERMISSION_ATTRIBUTE

#define IS_MPU_REGION_PERMISSION_ATTRIBUTE | ( |  | __TYPE__ | ) |

Value:
(((__TYPE__) == MPU_REGION_NO_ACCESS) || \
((__TYPE__) == MPU_REGION_PRIV_RW) || \
((__TYPE__) == MPU_REGION_PRIV_RW_URO) || \
((__TYPE__) == MPU_REGION_FULL_ACCESS) || \
((__TYPE__) == MPU_REGION_PRIV_RO) || \
((__TYPE__) == MPU_REGION_PRIV_RO_URO))

Check if MPU region permission attribute type is valid.

Parameters

  __TYPE__ | MPU region permission attribute type.

Return values

  SET | (__TYPE__ is valid) or RESET (__TYPE__ is invalid)

Definition at line 381 of file gr55xx_hal_cortex.h.

## ◆ IS_MPU_REGION_SIZE

#define IS_MPU_REGION_SIZE | ( |  | __SIZE__ | ) |

Value:
(((__SIZE__) == MPU_REGION_SIZE_32B) || \
((__SIZE__) == MPU_REGION_SIZE_64B) || \
((__SIZE__) == MPU_REGION_SIZE_128B) || \
((__SIZE__) == MPU_REGION_SIZE_256B) || \
((__SIZE__) == MPU_REGION_SIZE_512B) || \
((__SIZE__) == MPU_REGION_SIZE_1KB) || \
((__SIZE__) == MPU_REGION_SIZE_2KB) || \
((__SIZE__) == MPU_REGION_SIZE_4KB) || \
((__SIZE__) == MPU_REGION_SIZE_8KB) || \
((__SIZE__) == MPU_REGION_SIZE_16KB) || \
((__SIZE__) == MPU_REGION_SIZE_32KB) || \
((__SIZE__) == MPU_REGION_SIZE_64KB) || \
((__SIZE__) == MPU_REGION_SIZE_128KB) || \
((__SIZE__) == MPU_REGION_SIZE_256KB) || \
((__SIZE__) == MPU_REGION_SIZE_512KB) || \
((__SIZE__) == MPU_REGION_SIZE_1MB) || \
((__SIZE__) == MPU_REGION_SIZE_2MB) || \
((__SIZE__) == MPU_REGION_SIZE_4MB) || \
((__SIZE__) == MPU_REGION_SIZE_8MB) || \
((__SIZE__) == MPU_REGION_SIZE_16MB) || \
((__SIZE__) == MPU_REGION_SIZE_32MB) || \
((__SIZE__) == MPU_REGION_SIZE_64MB) || \
((__SIZE__) == MPU_REGION_SIZE_128MB) || \
((__SIZE__) == MPU_REGION_SIZE_256MB) || \
((__SIZE__) == MPU_REGION_SIZE_512MB) || \
((__SIZE__) == MPU_REGION_SIZE_1GB) || \
((__SIZE__) == MPU_REGION_SIZE_2GB) || \
((__SIZE__) == MPU_REGION_SIZE_4GB))

Check if MPU region size is valid.

Parameters

  __SIZE__ | MPU region size.

Return values

  SET | (__SIZE__ is valid) or RESET (__SIZE__ is invalid)

Definition at line 407 of file gr55xx_hal_cortex.h.

## ◆ IS_MPU_SUB_REGION_DISABLE

#define IS_MPU_SUB_REGION_DISABLE | ( |  | __SUBREGION__ | ) | ((__SUBREGION__) < (uint16_t)0x00FFU)

Check if MPU sub region is valid.

Parameters

  __SUBREGION__ | MPU sub region.

Return values

  SET | (__SUBREGION__ is valid) or RESET (__SUBREGION__ is invalid)

Definition at line 442 of file gr55xx_hal_cortex.h.

## ◆ IS_MPU_TEX_LEVEL

#define IS_MPU_TEX_LEVEL | ( |  | __TYPE__ | ) |

Value:
(((__TYPE__) == MPU_TEX_LEVEL0) || \
((__TYPE__) == MPU_TEX_LEVEL1) || \
((__TYPE__) == MPU_TEX_LEVEL2))

Check if MPU Tex level is valid.

Parameters

  __TYPE__ | MPU Tex level.

Return values

  SET | (__TYPE__ is valid) or RESET (__TYPE__ is invalid)

Definition at line 372 of file gr55xx_hal_cortex.h.

## ◆ IS_NVIC_DEVICE_IRQ

#define IS_NVIC_DEVICE_IRQ | ( |  | __IRQ__ | ) | ((__IRQ__) >= 0x00)

Check if NVIC deivce IRQ is valid.

Parameters

  __IRQ__ | NVIC device IRQ.

Return values

  SET | (__IRQ__ is valid) or RESET (__IRQ__ is invalid)

Definition at line 315 of file gr55xx_hal_cortex.h.

## ◆ IS_NVIC_PREEMPTION_PRIORITY

#define IS_NVIC_PREEMPTION_PRIORITY | ( |  | __PRIORITY__ | ) | ((__PRIORITY__) < 0x80U)

Check if NVIC priority group is valid.

Parameters

  __PRIORITY__ | NVIC priority group.

Return values

  SET | (__PRIORITY__ is valid) or RESET (__PRIORITY__ is invalid)

Definition at line 301 of file gr55xx_hal_cortex.h.

## ◆ IS_NVIC_PRIORITY_GROUP

#define IS_NVIC_PRIORITY_GROUP | ( |  | __GROUP__ | ) |

Value:
(((__GROUP__) == NVIC_PRIORITYGROUP_0) || \
((__GROUP__) == NVIC_PRIORITYGROUP_1) || \
((__GROUP__) == NVIC_PRIORITYGROUP_2) || \
((__GROUP__) == NVIC_PRIORITYGROUP_3) || \
((__GROUP__) == NVIC_PRIORITYGROUP_4) || \
((__GROUP__) == NVIC_PRIORITYGROUP_5) || \
((__GROUP__) == NVIC_PRIORITYGROUP_6) || \
((__GROUP__) == NVIC_PRIORITYGROUP_7))

Check if NVIC priority group is valid.

Parameters

  __GROUP__ | NVIC priority group.

Return values

  SET | (__GROUP__ is valid) or RESET (__GROUP__ is invalid)

Definition at line 287 of file gr55xx_hal_cortex.h.

## ◆ IS_NVIC_SUB_PRIORITY

#define IS_NVIC_SUB_PRIORITY | ( |  | __PRIORITY__ | ) | ((__PRIORITY__) <= 0xFFU)

Check if NVIC sub priority is valid.

Parameters

  __PRIORITY__ | NVIC sub priority.

Return values

  SET | (__PRIORITY__ is valid) or RESET (__PRIORITY__ is invalid)

Definition at line 308 of file gr55xx_hal_cortex.h.

## ◆ IS_SYSTICK_CLK_SOURCE

#define IS_SYSTICK_CLK_SOURCE | ( |  | __SOURCE__ | ) |

Value:
(((__SOURCE__) == SYSTICK_CLKSOURCE_HCLK) || \
((__SOURCE__) == SYSTICK_CLKSOURCE_REFCLK))

Check if SYSTICK clock source is valid.

Parameters

  __SOURCE__ | SYSTICK clock source.

Return values

  SET | (__SOURCE__ is valid) or RESET (__SOURCE__ is invalid)

Definition at line 322 of file gr55xx_hal_cortex.h.

MPU_REGION_FULL_ACCESS
#define MPU_REGION_FULL_ACCESS
Definition: gr55xx_hal_cortex.h:251
MPU_REGION_SIZE_512MB
#define MPU_REGION_SIZE_512MB
Definition: gr55xx_hal_cortex.h:239
MPU_REGION_NUMBER4
#define MPU_REGION_NUMBER4
Definition: gr55xx_hal_cortex.h:263
MPU_REGION_SIZE_32KB
#define MPU_REGION_SIZE_32KB
Definition: gr55xx_hal_cortex.h:225
MPU_REGION_NO_ACCESS
#define MPU_REGION_NO_ACCESS
Definition: gr55xx_hal_cortex.h:248
MPU_REGION_SIZE_128KB
#define MPU_REGION_SIZE_128KB
Definition: gr55xx_hal_cortex.h:227
MPU_REGION_SIZE_64MB
#define MPU_REGION_SIZE_64MB
Definition: gr55xx_hal_cortex.h:236
MPU_REGION_SIZE_2GB
#define MPU_REGION_SIZE_2GB
Definition: gr55xx_hal_cortex.h:241
MPU_REGION_SIZE_512KB
#define MPU_REGION_SIZE_512KB
Definition: gr55xx_hal_cortex.h:229
NVIC_PRIORITYGROUP_4
#define NVIC_PRIORITYGROUP_4
Definition: gr55xx_hal_cortex.h:142
MPU_REGION_ENABLE
#define MPU_REGION_ENABLE
Definition: gr55xx_hal_cortex.h:172
MPU_ACCESS_NOT_CACHEABLE
#define MPU_ACCESS_NOT_CACHEABLE
Definition: gr55xx_hal_cortex.h:194
SYSTICK_CLKSOURCE_REFCLK
#define SYSTICK_CLKSOURCE_REFCLK
Definition: gr55xx_hal_cortex.h:155
NVIC_PRIORITYGROUP_2
#define NVIC_PRIORITYGROUP_2
Definition: gr55xx_hal_cortex.h:138
MPU_REGION_NUMBER7
#define MPU_REGION_NUMBER7
Definition: gr55xx_hal_cortex.h:266
MPU_REGION_SIZE_256B
#define MPU_REGION_SIZE_256B
Definition: gr55xx_hal_cortex.h:218
MPU_REGION_SIZE_1KB
#define MPU_REGION_SIZE_1KB
Definition: gr55xx_hal_cortex.h:220
MPU_TEX_LEVEL1
#define MPU_TEX_LEVEL1
Definition: gr55xx_hal_cortex.h:208
NVIC_PRIORITYGROUP_6
#define NVIC_PRIORITYGROUP_6
Definition: gr55xx_hal_cortex.h:146
MPU_REGION_SIZE_256MB
#define MPU_REGION_SIZE_256MB
Definition: gr55xx_hal_cortex.h:238
MPU_REGION_SIZE_1GB
#define MPU_REGION_SIZE_1GB
Definition: gr55xx_hal_cortex.h:240
MPU_ACCESS_NOT_SHAREABLE
#define MPU_ACCESS_NOT_SHAREABLE
Definition: gr55xx_hal_cortex.h:187
MPU_REGION_SIZE_8KB
#define MPU_REGION_SIZE_8KB
Definition: gr55xx_hal_cortex.h:223
MPU_ACCESS_NOT_BUFFERABLE
#define MPU_ACCESS_NOT_BUFFERABLE
Definition: gr55xx_hal_cortex.h:201
MPU_REGION_PRIV_RW
#define MPU_REGION_PRIV_RW
Definition: gr55xx_hal_cortex.h:249
NVIC_PRIORITYGROUP_3
#define NVIC_PRIORITYGROUP_3
Definition: gr55xx_hal_cortex.h:140
MPU_REGION_SIZE_8MB
#define MPU_REGION_SIZE_8MB
Definition: gr55xx_hal_cortex.h:233
MPU_INSTRUCTION_ACCESS_ENABLE
#define MPU_INSTRUCTION_ACCESS_ENABLE
Definition: gr55xx_hal_cortex.h:179
MPU_REGION_SIZE_512B
#define MPU_REGION_SIZE_512B
Definition: gr55xx_hal_cortex.h:219
MPU_REGION_SIZE_32MB
#define MPU_REGION_SIZE_32MB
Definition: gr55xx_hal_cortex.h:235
MPU_ACCESS_BUFFERABLE
#define MPU_ACCESS_BUFFERABLE
Definition: gr55xx_hal_cortex.h:200
MPU_ACCESS_SHAREABLE
#define MPU_ACCESS_SHAREABLE
Definition: gr55xx_hal_cortex.h:186
MPU_ACCESS_CACHEABLE
#define MPU_ACCESS_CACHEABLE
Definition: gr55xx_hal_cortex.h:193
MPU_REGION_SIZE_1MB
#define MPU_REGION_SIZE_1MB
Definition: gr55xx_hal_cortex.h:230
MPU_REGION_NUMBER5
#define MPU_REGION_NUMBER5
Definition: gr55xx_hal_cortex.h:264
MPU_REGION_PRIV_RO
#define MPU_REGION_PRIV_RO
Definition: gr55xx_hal_cortex.h:252
NVIC_PRIORITYGROUP_5
#define NVIC_PRIORITYGROUP_5
Definition: gr55xx_hal_cortex.h:144
MPU_REGION_PRIV_RW_URO
#define MPU_REGION_PRIV_RW_URO
Definition: gr55xx_hal_cortex.h:250
MPU_REGION_SIZE_256KB
#define MPU_REGION_SIZE_256KB
Definition: gr55xx_hal_cortex.h:228
MPU_REGION_SIZE_4MB
#define MPU_REGION_SIZE_4MB
Definition: gr55xx_hal_cortex.h:232
MPU_REGION_SIZE_16KB
#define MPU_REGION_SIZE_16KB
Definition: gr55xx_hal_cortex.h:224
MPU_REGION_NUMBER2
#define MPU_REGION_NUMBER2
Definition: gr55xx_hal_cortex.h:261
MPU_REGION_SIZE_64KB
#define MPU_REGION_SIZE_64KB
Definition: gr55xx_hal_cortex.h:226
MPU_REGION_NUMBER6
#define MPU_REGION_NUMBER6
Definition: gr55xx_hal_cortex.h:265
MPU_REGION_SIZE_64B
#define MPU_REGION_SIZE_64B
Definition: gr55xx_hal_cortex.h:216
NVIC_PRIORITYGROUP_0
#define NVIC_PRIORITYGROUP_0
Definition: gr55xx_hal_cortex.h:134
MPU_TEX_LEVEL2
#define MPU_TEX_LEVEL2
Definition: gr55xx_hal_cortex.h:209
NVIC_PRIORITYGROUP_1
#define NVIC_PRIORITYGROUP_1
Definition: gr55xx_hal_cortex.h:136
MPU_REGION_PRIV_RO_URO
#define MPU_REGION_PRIV_RO_URO
Definition: gr55xx_hal_cortex.h:253
SYSTICK_CLKSOURCE_HCLK
#define SYSTICK_CLKSOURCE_HCLK
Definition: gr55xx_hal_cortex.h:156
MPU_REGION_SIZE_4GB
#define MPU_REGION_SIZE_4GB
Definition: gr55xx_hal_cortex.h:242
MPU_REGION_DISABLE
#define MPU_REGION_DISABLE
Definition: gr55xx_hal_cortex.h:173
MPU_REGION_NUMBER1
#define MPU_REGION_NUMBER1
Definition: gr55xx_hal_cortex.h:260
MPU_INSTRUCTION_ACCESS_DISABLE
#define MPU_INSTRUCTION_ACCESS_DISABLE
Definition: gr55xx_hal_cortex.h:180
MPU_REGION_NUMBER0
#define MPU_REGION_NUMBER0
Definition: gr55xx_hal_cortex.h:259
MPU_REGION_SIZE_2KB
#define MPU_REGION_SIZE_2KB
Definition: gr55xx_hal_cortex.h:221
MPU_REGION_SIZE_32B
#define MPU_REGION_SIZE_32B
Definition: gr55xx_hal_cortex.h:215
MPU_REGION_SIZE_128B
#define MPU_REGION_SIZE_128B
Definition: gr55xx_hal_cortex.h:217
MPU_REGION_SIZE_2MB
#define MPU_REGION_SIZE_2MB
Definition: gr55xx_hal_cortex.h:231
MPU_REGION_SIZE_4KB
#define MPU_REGION_SIZE_4KB
Definition: gr55xx_hal_cortex.h:222
MPU_REGION_SIZE_16MB
#define MPU_REGION_SIZE_16MB
Definition: gr55xx_hal_cortex.h:234
MPU_REGION_NUMBER3
#define MPU_REGION_NUMBER3
Definition: gr55xx_hal_cortex.h:262
MPU_REGION_SIZE_128MB
#define MPU_REGION_SIZE_128MB
Definition: gr55xx_hal_cortex.h:237
NVIC_PRIORITYGROUP_7
#define NVIC_PRIORITYGROUP_7
Definition: gr55xx_hal_cortex.h:148
MPU_TEX_LEVEL0
#define MPU_TEX_LEVEL0
Definition: gr55xx_hal_cortex.h:207