52 #ifndef __GR55XX_LL_CGC_H__
53 #define __GR55XX_LL_CGC_H__
114 #define LL_CGC_WFI_SECU_HCLK MCU_SUB_WFI_SECU_HCLK
115 #define LL_CGC_WFI_SIM_HCLK MCU_SUB_WFI_SIM_HCLK
116 #define LL_CGC_WFI_HTB_HCLK MCU_SUB_WFI_HTB_HCLK
117 #define LL_CGC_WFI_PWM_HCLK MCU_SUB_WFI_PWM_HCLK
118 #define LL_CGC_WFI_ROM_HCLK MCU_SUB_WFI_ROM_HCLK
119 #define LL_CGC_WFI_SNSADC_HCLK MCU_SUB_WFI_SNSADC_HCLK
120 #define LL_CGC_WFI_GPIO_HCLK MCU_SUB_WFI_GPIO_HCLK
121 #define LL_CGC_WFI_DMA_HCLK MCU_SUB_WFI_DMA_HCLK
122 #define LL_CGC_WFI_BLE_BRG_HCLK MCU_SUB_WFI_BLE_BRG_HCLK
123 #define LL_CGC_WFI_APB_SUB_HCLK MCU_SUB_WFI_APB_SUB_HCLK
124 #define LL_CGC_WFI_SERIAL_HCLK MCU_SUB_WFI_SERIAL_HCLK
125 #define LL_CGC_WFI_I2S_S_HCLK MCU_SUB_WFI_I2S_S_HCLK
127 #define LL_CGC_WFI_ALL_HCLK0 ((uint32_t)0x00000FFFU)
133 #define LL_CGC_WFI_AON_MCUSUB_HCLK MCU_SUB_WFI_AON_MCUSUB_HCLK
134 #define LL_CGC_WFI_XF_XQSPI_HCLK MCU_SUB_WFI_XF_XQSPI_HCLK
135 #define LL_CGC_WFI_SRAM_HCLK MCU_SUB_WFI_SRAM_HCLK
137 #define LL_CGC_WFI_ALL_HCLK1 ((uint32_t)0x00000007U)
143 #define LL_CGC_WFI_SECU_DIV4_PCLK MCU_SUB_WFI_SECU_DIV4_PCLK
144 #define LL_CGC_WFI_XQSPI_DIV4_PCLK MCU_SUB_WFI_XQSPI_DIV4_PCLK
146 #define LL_CGC_WFI_ALL_HCLK2 ((uint32_t)0x05000000U)
153 #define LL_CGC_FRC_SECU_HCLK MCU_SUB_FORCE_SECU_HCLK
154 #define LL_CGC_FRC_SIM_HCLK MCU_SUB_FORCE_SIM_HCLK
155 #define LL_CGC_FRC_HTB_HCLK MCU_SUB_FORCE_HTB_HCLK
156 #define LL_CGC_FRC_PWM_HCLK MCU_SUB_FORCE_PWM_HCLK
157 #define LL_CGC_FRC_ROM_HCLK MCU_SUB_FORCE_ROM_HCLK
158 #define LL_CGC_FRC_SNSADC_HCLK MCU_SUB_FORCE_SNSADC_HCLK
159 #define LL_CGC_FRC_GPIO_HCLK MCU_SUB_FORCE_GPIO_HCLK
160 #define LL_CGC_FRC_DMA_HCLK MCU_SUB_FORCE_DMA_HCLK
161 #define LL_CGC_FRC_BLE_BRG_HCLK MCU_SUB_FORCE_BLE_BRG_HCLK
162 #define LL_CGC_FRC_APB_SUB_HCLK MCU_SUB_FORCE_APB_SUB_HCLK
163 #define LL_CGC_FRC_SERIAL_HCLK MCU_SUB_FORCE_SERIAL_HCLK
164 #define LL_CGC_FRC_I2S_S_HCLK MCU_SUB_FORCE_I2S_S_HCLK
166 #define LL_CGC_FRC_ALL_HCLK0 ((uint32_t)0x00000FFFU)
172 #define LL_CGC_FRC_AON_MCUSUB_HCLK MCU_SUB_FORCE_AON_MCUSUB_HCLK
173 #define LL_CGC_FRC_XF_XQSPI_HCLK MCU_SUB_FORCE_XF_XQSPI_HCLK
174 #define LL_CGC_FRC_SRAM_HCLK MCU_SUB_FORCE_SRAM_HCLK
176 #define LL_CGC_FRC_ALL_HCLK1 ((uint32_t)0x00070000U)
182 #define LL_CGC_FRC_UART0_HCLK MCU_SUB_FORCE_UART0_HCLK
183 #define LL_CGC_FRC_UART1_HCLK MCU_SUB_FORCE_UART1_HCLK
184 #define LL_CGC_FRC_I2C0_HCLK MCU_SUB_FORCE_I2C0_HCLK
185 #define LL_CGC_FRC_I2C1_HCLK MCU_SUB_FORCE_I2C1_HCLK
186 #define LL_CGC_FRC_SPIM_HCLK MCU_SUB_FORCE_SPIM_HCLK
187 #define LL_CGC_FRC_SPIS_HCLK MCU_SUB_FORCE_SPIS_HCLK
188 #define LL_CGC_FRC_QSPI0_HCLK MCU_SUB_FORCE_QSPI0_HCLK
189 #define LL_CGC_FRC_QSPI1_HCLK MCU_SUB_FORCE_QSPI1_HCLK
190 #define LL_CGC_FRC_I2S_HCLK MCU_SUB_FORCE_I2S_HCLK
191 #define LL_CGC_FRC_SECU_DIV4_PCLK MCU_SUB_FORCE_SECU_DIV4_PCLK
192 #define LL_CGC_FRC_XQSPI_DIV4_PCLK MCU_SUB_FORCE_XQSPI_DIV4_PCLK
194 #define LL_CGC_FRC_SERIALS_HCLK2 ((uint32_t)0x0001FF00U)
195 #define LL_CGC_FRC_ALL_HCLK2 ((uint32_t)0x0A01FF00U)
216 #define LL_CGC_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG(__instance__->__REG__, (__VALUE__))
224 #define LL_CGC_ReadReg(__instance__, __REG__) READ_REG(__instance__->__REG__)
245 #define LL_CGC_DEFAULT_CONFIG \
247 .wfi_clk0 = ~LL_CGC_WFI_ALL_HCLK0, \
248 .wfi_clk1 = ~LL_CGC_WFI_ALL_HCLK1, \
249 .wfi_clk2 = ~LL_CGC_WFI_ALL_HCLK2, \
250 .force_clk0 = ~LL_CGC_FRC_ALL_HCLK0, \
251 .force_clk1 = ~LL_CGC_FRC_ALL_HCLK1, \
252 .force_clk2 = ~LL_CGC_FRC_ALL_HCLK2, \
306 WRITE_REG(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], clk_mask);
344 return READ_REG(MCU_SUB->MCU_SUBSYS_CG_CTRL[0]);
365 GLOBAL_EXCEPTION_DISABLE();
366 MODIFY_REG(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_WFI_MSK_HCLK_1, clk_mask);
367 GLOBAL_EXCEPTION_ENABLE();
386 return READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_WFI_MSK_HCLK_1);
404 GLOBAL_EXCEPTION_DISABLE();
405 MODIFY_REG(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_WFI_MSK_HCLK_2, clk_mask);
406 GLOBAL_EXCEPTION_ENABLE();
423 return READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_WFI_MSK_HCLK_2);
462 WRITE_REG(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], clk_mask);
500 return READ_REG(MCU_SUB->MCU_SUBSYS_CG_CTRL[1]);
521 GLOBAL_EXCEPTION_DISABLE();
522 MODIFY_REG(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_FORCE_MSK_HCLK_1, clk_mask);
523 GLOBAL_EXCEPTION_ENABLE();
542 return READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_FORCE_MSK_HCLK_1);
579 GLOBAL_EXCEPTION_DISABLE();
580 MODIFY_REG(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_MSK_HCLK_2, clk_mask);
581 GLOBAL_EXCEPTION_ENABLE();
617 return READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_MSK_HCLK_2);
631 GLOBAL_EXCEPTION_DISABLE();
632 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_SECU_HCLK);
633 GLOBAL_EXCEPTION_ENABLE();
647 GLOBAL_EXCEPTION_DISABLE();
648 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_SECU_HCLK);
649 GLOBAL_EXCEPTION_ENABLE();
663 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_SECU_HCLK) == (MCU_SUB_WFI_SECU_HCLK));
677 GLOBAL_EXCEPTION_DISABLE();
678 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_SIM_HCLK);
679 GLOBAL_EXCEPTION_ENABLE();
693 GLOBAL_EXCEPTION_DISABLE();
694 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_SIM_HCLK);
695 GLOBAL_EXCEPTION_ENABLE();
709 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_SIM_HCLK) == (MCU_SUB_WFI_SIM_HCLK));
723 GLOBAL_EXCEPTION_DISABLE();
724 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_HTB_HCLK);
725 GLOBAL_EXCEPTION_ENABLE();
739 GLOBAL_EXCEPTION_DISABLE();
740 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_HTB_HCLK);
741 GLOBAL_EXCEPTION_ENABLE();
755 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_HTB_HCLK) == (MCU_SUB_WFI_HTB_HCLK));
769 GLOBAL_EXCEPTION_DISABLE();
770 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_PWM_HCLK);
771 GLOBAL_EXCEPTION_ENABLE();
785 GLOBAL_EXCEPTION_DISABLE();
786 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_PWM_HCLK);
787 GLOBAL_EXCEPTION_ENABLE();
801 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_PWM_HCLK) == (MCU_SUB_WFI_PWM_HCLK));
815 GLOBAL_EXCEPTION_DISABLE();
816 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_ROM_HCLK);
817 GLOBAL_EXCEPTION_ENABLE();
831 GLOBAL_EXCEPTION_DISABLE();
832 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_ROM_HCLK);
833 GLOBAL_EXCEPTION_ENABLE();
847 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_ROM_HCLK) == (MCU_SUB_WFI_ROM_HCLK));
861 GLOBAL_EXCEPTION_DISABLE();
862 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_SNSADC_HCLK);
863 GLOBAL_EXCEPTION_ENABLE();
877 GLOBAL_EXCEPTION_DISABLE();
878 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_SNSADC_HCLK);
879 GLOBAL_EXCEPTION_ENABLE();
893 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_SNSADC_HCLK) == (MCU_SUB_WFI_SNSADC_HCLK));
907 GLOBAL_EXCEPTION_DISABLE();
908 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_GPIO_HCLK);
909 GLOBAL_EXCEPTION_ENABLE();
923 GLOBAL_EXCEPTION_DISABLE();
924 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_GPIO_HCLK);
925 GLOBAL_EXCEPTION_ENABLE();
939 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_GPIO_HCLK) == (MCU_SUB_WFI_GPIO_HCLK));
953 GLOBAL_EXCEPTION_DISABLE();
954 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_DMA_HCLK);
955 GLOBAL_EXCEPTION_ENABLE();
969 GLOBAL_EXCEPTION_DISABLE();
970 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_DMA_HCLK);
971 GLOBAL_EXCEPTION_ENABLE();
985 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_DMA_HCLK) == (MCU_SUB_WFI_DMA_HCLK));
999 GLOBAL_EXCEPTION_DISABLE();
1000 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_BLE_BRG_HCLK);
1001 GLOBAL_EXCEPTION_ENABLE();
1015 GLOBAL_EXCEPTION_DISABLE();
1016 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_BLE_BRG_HCLK);
1017 GLOBAL_EXCEPTION_ENABLE();
1031 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_BLE_BRG_HCLK) == (MCU_SUB_WFI_BLE_BRG_HCLK));
1045 GLOBAL_EXCEPTION_DISABLE();
1046 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_APB_SUB_HCLK);
1047 GLOBAL_EXCEPTION_ENABLE();
1061 GLOBAL_EXCEPTION_DISABLE();
1062 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_APB_SUB_HCLK);
1063 GLOBAL_EXCEPTION_ENABLE();
1077 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_APB_SUB_HCLK) == (MCU_SUB_WFI_APB_SUB_HCLK));
1091 GLOBAL_EXCEPTION_DISABLE();
1092 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_SERIAL_HCLK);
1093 GLOBAL_EXCEPTION_ENABLE();
1107 GLOBAL_EXCEPTION_DISABLE();
1108 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_SERIAL_HCLK);
1109 GLOBAL_EXCEPTION_ENABLE();
1124 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_SERIAL_HCLK) == (MCU_SUB_WFI_SERIAL_HCLK));
1138 GLOBAL_EXCEPTION_DISABLE();
1139 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_I2S_S_HCLK);
1140 GLOBAL_EXCEPTION_ENABLE();
1154 GLOBAL_EXCEPTION_DISABLE();
1155 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_I2S_S_HCLK);
1156 GLOBAL_EXCEPTION_ENABLE();
1170 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[0], MCU_SUB_WFI_I2S_S_HCLK) == (MCU_SUB_WFI_I2S_S_HCLK));
1184 GLOBAL_EXCEPTION_DISABLE();
1185 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_WFI_AON_MCUSUB_HCLK);
1186 GLOBAL_EXCEPTION_ENABLE();
1200 GLOBAL_EXCEPTION_DISABLE();
1201 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_WFI_AON_MCUSUB_HCLK);
1202 GLOBAL_EXCEPTION_ENABLE();
1216 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_WFI_AON_MCUSUB_HCLK) == (MCU_SUB_WFI_AON_MCUSUB_HCLK));
1230 GLOBAL_EXCEPTION_DISABLE();
1231 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_WFI_XF_XQSPI_HCLK);
1232 GLOBAL_EXCEPTION_ENABLE();
1246 GLOBAL_EXCEPTION_DISABLE();
1247 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_WFI_XF_XQSPI_HCLK);
1248 GLOBAL_EXCEPTION_ENABLE();
1262 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_WFI_XF_XQSPI_HCLK) == (MCU_SUB_WFI_XF_XQSPI_HCLK));
1276 GLOBAL_EXCEPTION_DISABLE();
1277 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_WFI_SRAM_HCLK);
1278 GLOBAL_EXCEPTION_ENABLE();
1292 GLOBAL_EXCEPTION_DISABLE();
1293 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_WFI_SRAM_HCLK);
1294 GLOBAL_EXCEPTION_ENABLE();
1308 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_WFI_SRAM_HCLK) == (MCU_SUB_WFI_SRAM_HCLK));
1322 GLOBAL_EXCEPTION_DISABLE();
1323 SET_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_WFI_SECU_DIV4_PCLK);
1324 GLOBAL_EXCEPTION_ENABLE();
1338 GLOBAL_EXCEPTION_DISABLE();
1340 CLEAR_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_WFI_SECU_DIV4_PCLK);
1342 GLOBAL_EXCEPTION_ENABLE();
1357 return (READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_WFI_SECU_DIV4_PCLK) == (MCU_SUB_WFI_SECU_DIV4_PCLK));
1371 GLOBAL_EXCEPTION_DISABLE();
1373 SET_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_WFI_XQSPI_DIV4_PCLK);
1375 GLOBAL_EXCEPTION_ENABLE();
1389 GLOBAL_EXCEPTION_DISABLE();
1391 CLEAR_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_WFI_XQSPI_DIV4_PCLK);
1393 GLOBAL_EXCEPTION_ENABLE();
1407 return (READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_WFI_XQSPI_DIV4_PCLK) == (MCU_SUB_WFI_XQSPI_DIV4_PCLK));
1421 GLOBAL_EXCEPTION_DISABLE();
1423 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_SECU_HCLK);
1425 GLOBAL_EXCEPTION_ENABLE();
1439 GLOBAL_EXCEPTION_DISABLE();
1441 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_SECU_HCLK);
1443 GLOBAL_EXCEPTION_ENABLE();
1457 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_SECU_HCLK) == (MCU_SUB_FORCE_SECU_HCLK));
1471 GLOBAL_EXCEPTION_DISABLE();
1473 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_SIM_HCLK);
1475 GLOBAL_EXCEPTION_ENABLE();
1489 GLOBAL_EXCEPTION_DISABLE();
1491 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_SIM_HCLK);
1493 GLOBAL_EXCEPTION_ENABLE();
1507 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_SIM_HCLK) == (MCU_SUB_FORCE_SIM_HCLK));
1521 GLOBAL_EXCEPTION_DISABLE();
1523 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_HTB_HCLK);
1525 GLOBAL_EXCEPTION_ENABLE();
1539 GLOBAL_EXCEPTION_DISABLE();
1541 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_HTB_HCLK);
1543 GLOBAL_EXCEPTION_ENABLE();
1557 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_HTB_HCLK) == (MCU_SUB_FORCE_HTB_HCLK));
1571 GLOBAL_EXCEPTION_DISABLE();
1573 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_PWM_HCLK);
1575 GLOBAL_EXCEPTION_ENABLE();
1589 GLOBAL_EXCEPTION_DISABLE();
1591 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_PWM_HCLK);
1593 GLOBAL_EXCEPTION_ENABLE();
1607 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_PWM_HCLK) == (MCU_SUB_FORCE_PWM_HCLK));
1621 GLOBAL_EXCEPTION_DISABLE();
1623 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_ROM_HCLK);
1625 GLOBAL_EXCEPTION_ENABLE();
1639 GLOBAL_EXCEPTION_DISABLE();
1641 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_ROM_HCLK);
1643 GLOBAL_EXCEPTION_ENABLE();
1657 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_ROM_HCLK) == (MCU_SUB_FORCE_ROM_HCLK));
1671 GLOBAL_EXCEPTION_DISABLE();
1673 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_SNSADC_HCLK);
1675 GLOBAL_EXCEPTION_ENABLE();
1689 GLOBAL_EXCEPTION_DISABLE();
1691 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_SNSADC_HCLK);
1693 GLOBAL_EXCEPTION_ENABLE();
1707 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_SNSADC_HCLK) == (MCU_SUB_FORCE_SNSADC_HCLK));
1721 GLOBAL_EXCEPTION_DISABLE();
1723 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_GPIO_HCLK);
1725 GLOBAL_EXCEPTION_ENABLE();
1739 GLOBAL_EXCEPTION_DISABLE();
1741 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_GPIO_HCLK);
1743 GLOBAL_EXCEPTION_ENABLE();
1757 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_GPIO_HCLK) == (MCU_SUB_FORCE_GPIO_HCLK));
1771 GLOBAL_EXCEPTION_DISABLE();
1773 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_DMA_HCLK);
1775 GLOBAL_EXCEPTION_ENABLE();
1789 GLOBAL_EXCEPTION_DISABLE();
1791 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_DMA_HCLK);
1793 GLOBAL_EXCEPTION_ENABLE();
1807 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_DMA_HCLK) == (MCU_SUB_FORCE_DMA_HCLK));
1821 GLOBAL_EXCEPTION_DISABLE();
1823 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_BLE_BRG_HCLK);
1825 GLOBAL_EXCEPTION_ENABLE();
1839 GLOBAL_EXCEPTION_DISABLE();
1841 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_BLE_BRG_HCLK);
1843 GLOBAL_EXCEPTION_ENABLE();
1857 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_BLE_BRG_HCLK) == (MCU_SUB_FORCE_BLE_BRG_HCLK));
1871 GLOBAL_EXCEPTION_DISABLE();
1873 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_APB_SUB_HCLK);
1875 GLOBAL_EXCEPTION_ENABLE();
1889 GLOBAL_EXCEPTION_DISABLE();
1891 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_APB_SUB_HCLK);
1893 GLOBAL_EXCEPTION_ENABLE();
1907 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_APB_SUB_HCLK) == (MCU_SUB_FORCE_APB_SUB_HCLK));
1921 GLOBAL_EXCEPTION_DISABLE();
1923 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_SERIAL_HCLK);
1925 GLOBAL_EXCEPTION_ENABLE();
1939 GLOBAL_EXCEPTION_DISABLE();
1941 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_SERIAL_HCLK);
1943 GLOBAL_EXCEPTION_ENABLE();
1957 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_SERIAL_HCLK) == (MCU_SUB_FORCE_SERIAL_HCLK));
1971 GLOBAL_EXCEPTION_DISABLE();
1973 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_I2S_S_HCLK);
1975 GLOBAL_EXCEPTION_ENABLE();
1989 GLOBAL_EXCEPTION_DISABLE();
1991 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_I2S_S_HCLK);
1993 GLOBAL_EXCEPTION_ENABLE();
2007 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[1], MCU_SUB_FORCE_I2S_S_HCLK) == (MCU_SUB_FORCE_I2S_S_HCLK));
2021 GLOBAL_EXCEPTION_DISABLE();
2023 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_FORCE_AON_MCUSUB_HCLK);
2025 GLOBAL_EXCEPTION_ENABLE();
2039 GLOBAL_EXCEPTION_DISABLE();
2041 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_FORCE_AON_MCUSUB_HCLK);
2043 GLOBAL_EXCEPTION_ENABLE();
2057 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_FORCE_AON_MCUSUB_HCLK) == (MCU_SUB_FORCE_AON_MCUSUB_HCLK));
2071 GLOBAL_EXCEPTION_DISABLE();
2073 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_FORCE_XF_XQSPI_HCLK);
2075 GLOBAL_EXCEPTION_ENABLE();
2089 GLOBAL_EXCEPTION_DISABLE();
2091 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_FORCE_XF_XQSPI_HCLK);
2093 GLOBAL_EXCEPTION_ENABLE();
2107 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_FORCE_XF_XQSPI_HCLK) == (MCU_SUB_FORCE_XF_XQSPI_HCLK));
2121 GLOBAL_EXCEPTION_DISABLE();
2123 SET_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_FORCE_SRAM_HCLK);
2125 GLOBAL_EXCEPTION_ENABLE();
2139 GLOBAL_EXCEPTION_DISABLE();
2141 CLEAR_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_FORCE_SRAM_HCLK);
2143 GLOBAL_EXCEPTION_ENABLE();
2157 return (READ_BITS(MCU_SUB->MCU_SUBSYS_CG_CTRL[2], MCU_SUB_FORCE_SRAM_HCLK) == (MCU_SUB_FORCE_SRAM_HCLK));
2171 GLOBAL_EXCEPTION_DISABLE();
2173 SET_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_UART0_HCLK);
2175 GLOBAL_EXCEPTION_ENABLE();
2189 GLOBAL_EXCEPTION_DISABLE();
2191 CLEAR_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_UART0_HCLK);
2193 GLOBAL_EXCEPTION_ENABLE();
2207 return (READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_UART0_HCLK) == (MCU_SUB_FORCE_UART0_HCLK));
2221 GLOBAL_EXCEPTION_DISABLE();
2223 SET_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_UART1_HCLK);
2225 GLOBAL_EXCEPTION_ENABLE();
2239 GLOBAL_EXCEPTION_DISABLE();
2241 CLEAR_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_UART1_HCLK);
2243 GLOBAL_EXCEPTION_ENABLE();
2257 return (READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_UART1_HCLK) == (MCU_SUB_FORCE_UART1_HCLK));
2271 GLOBAL_EXCEPTION_DISABLE();
2273 SET_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_I2C0_HCLK);
2275 GLOBAL_EXCEPTION_ENABLE();
2289 GLOBAL_EXCEPTION_DISABLE();
2291 CLEAR_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_I2C0_HCLK);
2293 GLOBAL_EXCEPTION_ENABLE();
2307 return (READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_I2C0_HCLK) == (MCU_SUB_FORCE_I2C0_HCLK));
2321 GLOBAL_EXCEPTION_DISABLE();
2323 SET_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_I2C1_HCLK);
2325 GLOBAL_EXCEPTION_ENABLE();
2339 GLOBAL_EXCEPTION_DISABLE();
2341 CLEAR_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_I2C1_HCLK);
2343 GLOBAL_EXCEPTION_ENABLE();
2357 return (READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_I2C1_HCLK) == (MCU_SUB_FORCE_I2C1_HCLK));
2371 GLOBAL_EXCEPTION_DISABLE();
2373 SET_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_SPIM_HCLK);
2375 GLOBAL_EXCEPTION_ENABLE();
2389 GLOBAL_EXCEPTION_DISABLE();
2391 CLEAR_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_SPIM_HCLK);
2393 GLOBAL_EXCEPTION_ENABLE();
2407 return (READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_SPIM_HCLK) == (MCU_SUB_FORCE_SPIM_HCLK));
2421 GLOBAL_EXCEPTION_DISABLE();
2423 SET_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_SPIS_HCLK);
2425 GLOBAL_EXCEPTION_ENABLE();
2439 GLOBAL_EXCEPTION_DISABLE();
2441 CLEAR_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_SPIS_HCLK);
2443 GLOBAL_EXCEPTION_ENABLE();
2457 return (READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_SPIS_HCLK) == (MCU_SUB_FORCE_SPIS_HCLK));
2471 GLOBAL_EXCEPTION_DISABLE();
2473 SET_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_QSPI0_HCLK);
2475 GLOBAL_EXCEPTION_ENABLE();
2489 GLOBAL_EXCEPTION_DISABLE();
2491 CLEAR_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_QSPI0_HCLK);
2493 GLOBAL_EXCEPTION_ENABLE();
2507 return (READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_QSPI0_HCLK) == (MCU_SUB_FORCE_QSPI0_HCLK));
2521 GLOBAL_EXCEPTION_DISABLE();
2523 SET_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_QSPI1_HCLK);
2525 GLOBAL_EXCEPTION_ENABLE();
2539 GLOBAL_EXCEPTION_DISABLE();
2541 CLEAR_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_QSPI1_HCLK);
2543 GLOBAL_EXCEPTION_ENABLE();
2557 return (READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_QSPI1_HCLK) == (MCU_SUB_FORCE_QSPI1_HCLK));
2571 GLOBAL_EXCEPTION_DISABLE();
2573 SET_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_I2S_HCLK);
2575 GLOBAL_EXCEPTION_ENABLE();
2589 GLOBAL_EXCEPTION_DISABLE();
2591 CLEAR_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_I2S_HCLK);
2593 GLOBAL_EXCEPTION_ENABLE();
2607 return (READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_I2S_HCLK) == (MCU_SUB_FORCE_I2S_HCLK));
2621 GLOBAL_EXCEPTION_DISABLE();
2623 SET_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_SECU_DIV4_PCLK);
2625 GLOBAL_EXCEPTION_ENABLE();
2639 GLOBAL_EXCEPTION_DISABLE();
2641 CLEAR_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_SECU_DIV4_PCLK);
2643 GLOBAL_EXCEPTION_ENABLE();
2657 return (READ_BITS(MCU_SUB->MCU_PERIPH_CG, MCU_SUB_FORCE_SECU_DIV4_PCLK) == (MCU_SUB_FORCE_SECU_DIV4_PCLK));