var group___c_o_r_t_e_x___exported___constants =
[
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    [ "CORTEX SysTick clock source", "d8/da9/group___c_o_r_t_e_x___sys_tick__clock__source.html", "d8/da9/group___c_o_r_t_e_x___sys_tick__clock__source" ],
    [ "MPU HFNMI and PRIVILEGED Access control", "d9/de5/group___c_o_r_t_e_x___m_p_u___h_f_n_m_i___p_r_i_v_d_e_f___control.html", "d9/de5/group___c_o_r_t_e_x___m_p_u___h_f_n_m_i___p_r_i_v_d_e_f___control" ],
    [ "CORTEX MPU Region Enable", "d1/d5f/group___c_o_r_t_e_x___m_p_u___region___enable.html", "d1/d5f/group___c_o_r_t_e_x___m_p_u___region___enable" ],
    [ "CORTEX MPU Instruction Access", "d6/dd2/group___c_o_r_t_e_x___m_p_u___instruction___access.html", "d6/dd2/group___c_o_r_t_e_x___m_p_u___instruction___access" ],
    [ "CORTEX MPU Instruction Access Shareable", "d7/dac/group___c_o_r_t_e_x___m_p_u___access___shareable.html", "d7/dac/group___c_o_r_t_e_x___m_p_u___access___shareable" ],
    [ "CORTEX MPU Instruction Access Cacheable", "d0/dff/group___c_o_r_t_e_x___m_p_u___access___cacheable.html", "d0/dff/group___c_o_r_t_e_x___m_p_u___access___cacheable" ],
    [ "CORTEX MPU Instruction Access Bufferable", "d0/dd1/group___c_o_r_t_e_x___m_p_u___access___bufferable.html", "d0/dd1/group___c_o_r_t_e_x___m_p_u___access___bufferable" ],
    [ "MPU TEX Levels", "da/d0b/group___c_o_r_t_e_x___m_p_u___t_e_x___levels.html", "da/d0b/group___c_o_r_t_e_x___m_p_u___t_e_x___levels" ],
    [ "CORTEX MPU Region Size", "da/d15/group___c_o_r_t_e_x___m_p_u___region___size.html", "da/d15/group___c_o_r_t_e_x___m_p_u___region___size" ],
    [ "CORTEX MPU Region Permission Attributes", "d9/de0/group___c_o_r_t_e_x___m_p_u___region___permission___attributes.html", "d9/de0/group___c_o_r_t_e_x___m_p_u___region___permission___attributes" ],
    [ "CORTEX MPU Region Number", "d6/d91/group___c_o_r_t_e_x___m_p_u___region___number.html", "d6/d91/group___c_o_r_t_e_x___m_p_u___region___number" ]
];