38 #ifndef __GR55xx_DELAY_H__
39 #define __GR55xx_DELAY_H__
64 #if defined ( __CC_ARM )
66 #ifndef __STATIC_FORCEINLINE
67 #define __STATIC_FORCEINLINE static __forceinline
70 #elif defined ( __GNUC__ )
72 #ifndef __STATIC_FORCEINLINE
73 #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
78 #ifndef __STATIC_FORCEINLINE
79 #define __STATIC_FORCEINLINE __STATIC_INLINE
92 typedef void (* delay_func_t)(uint32_t);
126 #define HAL_TIMEOUT_INIT() \
127 uint32_t _demcr_initial = CoreDebug->DEMCR; \
128 uint32_t _dwt_ctrl_initial = DWT->CTRL; \
130 hal_dwt_enable(_demcr_initial, _dwt_ctrl_initial); \
137 #define HAL_TIMEOUT_DEINIT() \
139 hal_dwt_disable(_demcr_initial, _dwt_ctrl_initial); \
156 const uint8_t clocks[] = {64, 48, 16, 24, 16, 32};
157 uint32_t cycles = number_of_us * (clocks[AON->PWR_RET01 & AON_PWR_REG01_SYS_CLK_SEL]);
159 if (number_of_us == 0)
167 uint32_t cyccnt_initial = DWT->CYCCNT;
170 while ((DWT->CYCCNT - cyccnt_initial) < cycles)
180 #if defined ( __CC_ARM )
197 uint32_t pc = (
unsigned int)__current_pc();
198 uint8_t clocks[] = {64, 48, 16, 24, 16, 32};
200 if (number_of_us == 0)
205 static const uint16_t delay_ramcode[] = {
211 const delay_func_t delay_ram_cycles = (delay_func_t)((((uint32_t)delay_ramcode) | 1));
213 static const uint16_t delay_flashcode[] = {
219 const delay_func_t delay_flash_cycles = (delay_func_t)((((uint32_t)delay_flashcode) | 1));
221 static const uint16_t delay_aliascode[] = {
227 const delay_func_t delay_alias_cycles = (delay_func_t)((((uint32_t)delay_aliascode) | 1));
229 uint32_t cycles = number_of_us * (clocks[AON->PWR_RET01 & AON_PWR_REG01_SYS_CLK_SEL]);
231 if(pc & GR55XX_RAM_ADDRESS)
232 delay_ram_cycles(cycles);
233 else if(pc & GR55XX_FLASH_ADDRESS)
234 delay_flash_cycles(cycles);
235 else if(pc & GR55XX_ALIAS_ADDRESS)
236 delay_alias_cycles(cycles);
251 #elif defined ( _WIN32 ) || defined ( __unix ) || defined ( __APPLE__ )
253 #ifndef CUSTOM_DELAY_US
266 #elif defined ( __GNUC__ ) || ( __ICCARM__ )
276 uint8_t clocks[] = {64, 48, 16, 24, 16, 32};
281 cycles = number_of_us*(clocks[AON->PWR_RET01 & AON_PWR_REG01_SYS_CLK_SEL])/6;
282 __asm__
volatile (
"1:\n"
286 "SUBS %[cycles], %[cycles], #1\n"
288 : [cycles]
"=r" (cycles)
289 :
"[cycles]" "r" (cycles)