hal_gdc.h
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1 /** @addtogroup GRAPHICS_SDK Graphics
2  * @{
3  */
4 
5 /** @defgroup HAL_GDC Hal gdc dc
6  * @brief DC HAL module driver.
7  * @{
8  */
9 
10 #ifndef HAL_GDC_H__
11 #define HAL_GDC_H__
12 
13 #include "hal_gfx_sys_defs.h"
14 #include "hal_gdc_hal.h"
15 
16 #ifdef __cplusplus
17 extern "C" {
18 #endif
19 
20 /**
21  * @addtogroup HAL_GDC_MACRO Defines
22  * @{
23  */
24 /** @defgroup HAL_GDC_REG_CFG The DC register configure defines
25  * @{
26  */
27 #define HAL_GDC_CFG_LAYER_EXISTS(i) (1U << (8 + (i)*4)) /**< Configure layer-existence for specifical DC layer */
28 #define HAL_GDC_CFG_LAYER_BLENDER(i) (1U << (8 + (i)*4 + 1)) /**< Configure blender for specifical DC layer */
29 #define HAL_GDC_CFG_LAYER_SCALER(i) (1U << (8 + (i)*4 + 2)) /**< Configure scaler for specifical DC layer */
30 #define HAL_GDC_CFG_LAYER_GAMMA(i) (1U << (8 + (i)*4 + 3)) /**< Configure gamma for specifical DC layer */
31 
32 #define HAL_GDC_LAYER_ENABLE (1U << 31) /**< Enable Layer */
33 #define HAL_GDC_ENABLE (1U << 31) /**< Enable DC */
34 #define HAL_GDC_CFG_L3_YUVMEM (1U << 31) /**< Cfg L3 YUV */
35 #define HAL_GDC_EN_L3PIX (1U << 31) /**< Ignore */
36 #define DC_STATUS_rsrvd_0 (1U << 31) /**< Resrved */
37 #define hal_gdc_clkctrl_cg_l3_bus_clk (1U << 31) /**< Ignore */
38 /** @} */
39 
40 /** @} */
41 
42 /** @addtogroup HAL_GDC_ENUM Enumerations
43  * @{
44  */
45 /**
46  * @brief Layer control definition
47  */
48 typedef enum
49 {
50  HAL_GDC_LAYER_DISABLE = 0, /**< Disable Layer */
51  HAL_GDC_FORCE_A = 1U << 30, /**< Force Alpha */
52  HAL_GDC_SCALE_NN = 1U << 29, /**< Activate Bilinear Filter */
53  HAL_GDC_MODULATE_A = 1U << 28, /**< Modulate Alpha */
54  HAL_GDC_LAYER_AHBLOCK = 1U << 27, /**< Activate HLOCK signal on AHB DMAs */
55  HAL_GDC_LAYER_GAMMALUT_EN = 1U << 26, /**< Enable Gamma Look Up Table */
57 
58 /**
59  * @brief Layer blending factor definition
60  */
61 typedef enum
62 {
63  HAL_GDC_BF_ZERO = 0x0, /**< Black */
64  HAL_GDC_BF_ONE = 0x1, /**< White */
65  HAL_GDC_BF_SRCALPHA = 0x2, /**< Alpha Source */
66  HAL_GDC_BF_GLBALPHA = 0x3, /**< Alpha Global */
67  HAL_GDC_BF_SRCGBLALPHA = 0x4, /**< Alpha Source And Alpha Global */
68  HAL_GDC_BF_INVSRCALPHA = 0x5, /**< Inverted Source */
69  HAL_GDC_BF_INVGBLALPHA = 0x6, /**< Inverted Global */
70  HAL_GDC_BF_INVSRCGBLALPHA = 0x7, /**< Inverted Source And Global */
71  HAL_GDC_BF_DSTALPHA = 0xa, /**< Alpha Destination */
72  HAL_GDC_BF_INVDSTALPHA = 0xb, /**< Inverted Destination */
74 
75 /**
76  * @brief Layer blending mode definition
77  */
78 typedef enum
79 {
80  HAL_GDC_BL_SIMPLE = (HAL_GDC_BF_SRCALPHA | (HAL_GDC_BF_INVSRCALPHA <<4)), /**< Sa * Sa + Da * (1 - Sa) */
83  HAL_GDC_BL_SRC_OVER = (HAL_GDC_BF_ONE | (HAL_GDC_BF_INVSRCALPHA <<4)), /**< Sa + Da * (1 - Sa) */
84  HAL_GDC_BL_DST_OVER = (HAL_GDC_BF_INVDSTALPHA | (HAL_GDC_BF_ONE <<4)), /**< Sa * (1 - Da) + Da */
87  HAL_GDC_BL_SRC_OUT = (HAL_GDC_BF_INVDSTALPHA | (HAL_GDC_BF_ZERO <<4)), /**< Sa * (1 - Da) */
88  HAL_GDC_BL_DST_OUT = (HAL_GDC_BF_ZERO | (HAL_GDC_BF_INVSRCALPHA <<4)), /**< Da * (1 - Sa) */
89  HAL_GDC_BL_SRC_ATOP = (HAL_GDC_BF_DSTALPHA | (HAL_GDC_BF_INVSRCALPHA <<4)), /**< Sa * Da + Da * (1 - Sa) */
90  HAL_GDC_BL_DST_ATOP = (HAL_GDC_BF_INVDSTALPHA | (HAL_GDC_BF_SRCALPHA <<4)), /**< Sa * (1 - Da) + Da * Sa */
91  HAL_GDC_BL_ADD = (HAL_GDC_BF_ONE | (HAL_GDC_BF_ONE <<4)), /**< Sa + Da */
92  HAL_GDC_BL_XOR = (HAL_GDC_BF_INVDSTALPHA | (HAL_GDC_BF_INVSRCALPHA <<4)), /**< Sa * (1 - Da) + Da * (1 - Sa) */
94 
95 /**
96  * @brief Layer color mode definition
97  */
98 typedef enum
99 {
100  HAL_GDC_RGBA5551 = 0x01, /**< RGBA5551 */
101  HAL_GDC_ABGR8888 = 0x02, /**< ABGR8888 */
102  HAL_GDC_RGB332 = 0x04, /**< RGB332 */
103  HAL_GDC_RGB565 = 0x05, /**< RGB565 */
104  HAL_GDC_BGRA8888 = 0x06, /**< BGRA8888 */
105  HAL_GDC_L8 = 0x07, /**< L8 */
106  HAL_GDC_L1 = 0x08, /**< L1 */
107  HAL_GDC_L4 = 0x09, /**< L4 */
108  HAL_GDC_YUYV = 0x0a, /**< YUYV */
109  HAL_GDC_RGB24 = 0x0b, /**< RGB24 */
110  HAL_GDC_YUY2 = 0x0c, /**< YUY2 */
111  HAL_GDC_RGBA8888 = 0x0d, /**< RGBA8888 */
112  HAL_GDC_ARGB8888 = 0x0e, /**< ARGB8888 */
113  HAL_GDC_V_YUV420 = 0x10, /**< V_YUV420 */
114  HAL_GDC_TLYUV420 = 0x11, /**< TLYUV420 */
115  HAL_GDC_TSC4 = 0x12, /**< TSC4 */
116  HAL_GDC_TSC6 = 0x13, /**< TSC6 */
117  HAL_GDC_TSC6A = 0x14, /**< TSC6A */
118  HAL_GDC_RGBA4444 = 0x15, /**< RGBA4444 */
119  HAL_GDC_ARGB4444 = 0x18, /**< ARGB4444 */
121 
122 /**
123  * @brief Layer video mode definition
124  */
125 typedef enum
126 {
127  HAL_GDC_DISABLE = 0, /**< DISABLE */
128  HAL_GDC_CURSOR = 1U << 30, /**< CURSOR */
129  HAL_GDC_NEG_V = 1U << 28, /**< NEG_V */
130  HAL_GDC_NEG_H = 1U << 27, /**< NEG_H */
131  HAL_GDC_NEG_DE = 1U << 26, /**< NEG_DE */
132  HAL_GDC_DITHER = 1U << 24, /**< DITHER 18-bit */
133  HAL_GDC_DITHER16 = 2U << 24, /**< DITHER 16-bit */
134  HAL_GDC_DITHER15 = 3U << 24, /**< DITHER 15-bit */
135  HAL_GDC_SINGLEV = 1U << 23, /**< SINGLEV */
136  HAL_GDC_INVPIXCLK = 1U << 22, /**< INVPIXCLK */
137  HAL_GDC_PALETTE = 1U << 20, /**< PALETTE */
138  HAL_GDC_GAMMA = 1U << 20, /**< GAMMA */
139  HAL_GDC_BLANK = 1U << 19, /**< BLANK */
140  HAL_GDC_INTERLACE = 1U << 18, /**< INTERLACE */
141  HAL_GDC_ONE_FRAME = 1U << 17, /**< ONE_FRAME */
142  HAL_GDC_P_RGB3_18B = 1U << 12, /**< P_RGB3 */
143  HAL_GDC_P_RGB3_18B1= 2U << 12, /**< P_RGB3 */
144  HAL_GDC_P_RGB3_16B = 3U << 12, /**< P_RGB3 */
145  HAL_GDC_P_RGB3_16B1= 4U << 12, /**< P_RGB3 */
146  HAL_GDC_P_RGB3_16B2= 5U << 12, /**< P_RGB3 */
147  HAL_GDC_CLKOUTDIV = 1U << 11, /**< CLKOUTDIV */
148  HAL_GDC_LVDSPADS = 1U << 10, /**< LVDSPADS */
149  HAL_GDC_YUVOUT = 1U << 9, /**< YUVOUT */
150  HAL_GDC_MIPI_OFF = 1U << 4, /**< MIPI_OFF */
151  HAL_GDC_OUTP_OFF = 1U << 3, /**< OUTP_OFF */
152  HAL_GDC_LVDS_OFF = 1U << 2, /**< LVDS_OFF */
153  HAL_GDC_SCANDOUBLE = 1U << 1, /**< SCANDOUBLE */
154  HAL_GDC_TESTMODE = 1U << 0, /**< TESTMODE */
155  HAL_GDC_P_RGB3 = 0U << 5, /**< P_RGB3 */
156  HAL_GDC_S_RGBX4 = 1U << 5, /**< S_RGBX4 */
157  HAL_GDC_S_RGB3 = 2U << 5, /**< S_RGB3 */
158  HAL_GDC_S_12BIT = 3U << 5, /**< S_12BIT */
159  HAL_GDC_LVDS_ISP68 = 4U << 5, /**< LVDS_ISP68 */
160  HAL_GDC_LVDS_ISP8 = 5U << 5, /**< LVDS_ISP8 */
161  HAL_GDC_T_16BIT = 6U << 5, /**< T_16BIT */
162  HAL_GDC_BT656 = 7U << 5, /**< BT656 */
163  HAL_GDC_JDIMIP = 8U << 5, /**< JDIMIP */
164  HAL_GDC_LUT8 = 1U << 20 /**< LUT8 */
166 
167 /**
168  * @brief Layer configuration definition
169  */
170 typedef enum
171 {
172  HAL_GDC_CFG_PALETTE = 1U << 0, /**< Global Gamma enabled */
173  HAL_GDC_CFG_FIXED_CURSOR = 1U << 1, /**< Fixed Cursor enabled */
174  HAL_GDC_CFG_PROGR_CURSOR = 1U << 2, /**< Programmable Cursor enabled */
175  HAL_GDC_CFG_DITHERING = 1U << 3, /**< Dithering enabled */
176  HAL_GDC_CFG_FORMAT = 1U << 4, /**< Formatting enabled */
177  HAL_GDC_CFG_HiQ_YUV = 1U << 5, /**< High Quality YUV converted enabled */
178  HAL_GDC_CFG_DBIB = 1U << 6, /**< DBI Type-B interface enabled */
179  HAL_GDC_CFG_YUVOUT = 1U << 7, /**< RGB to YUV converted */
180  HAL_GDC_CFG_L0_ENABLED = 1U << 8, /**< Layer 0 enabled */
181  HAL_GDC_CFG_L0_BLENDER = 1U << 9, /**< Layer 0 has blender */
182  HAL_GDC_CFG_L0_SCALER = 1U << 10, /**< Layer 0 has scaler */
183  HAL_GDC_CFG_L0_GAMMA = 1U << 11, /**< Layer 0 has gamma LUT */
184  HAL_GDC_CFG_L1_ENABLED = 1U << 12, /**< Layer 1 enabled */
185  HAL_GDC_CFG_L1_BLENDER = 1U << 13, /**< Layer 1 has blender */
186  HAL_GDC_CFG_L1_SCALER = 1U << 14, /**< Layer 1 has scaler */
187  HAL_GDC_CFG_L1_GAMMA = 1U << 15, /**< Layer 1 has gamma LUT */
188  HAL_GDC_CFG_L2_ENABLED = 1U << 16, /**< Layer 2 enabled */
189  HAL_GDC_CFG_L2_BLENDER = 1U << 17, /**< Layer 2 has blender */
190  HAL_GDC_CFG_L2_SCALER = 1U << 18, /**< Layer 2 has scaler */
191  HAL_GDC_CFG_L2_GAMMA = 1U << 19, /**< Layer 2 has gamma LUT */
192  HAL_GDC_CFG_L3_ENABLED = 1U << 20, /**< Layer 3 enabled */
193  HAL_GDC_CFG_L3_BLENDER = 1U << 21, /**< Layer 3 has blender */
194  HAL_GDC_CFG_L3_SCALER = 1U << 22, /**< Layer 3 has scaler */
195  HAL_GDC_CFG_L3_GAMMA = 1U << 23, /**< Layer 3 has gamma LUT */
196  HAL_GDC_CFG_SPI = 1U << 24, /**< SPI interface is enabled */
197  HAL_GDC_CFG_L0_YUVMEM = 1U << 28, /**< layer 0 has YUV Memory */
198  HAL_GDC_CFG_L1_YUVMEM = 1U << 29, /**< layer 1 has YUV Memory */
199  HAL_GDC_CFG_L2_YUVMEM = 1U << 30, /**< layer 2 has YUV Memory */
201 
202 /**
203  * @brief DC status definition
204  */
205 typedef enum
206 {
207  DC_STATUS_rsrvd_1 = (1U<<30), /**< Reserved bit */
208  DC_STATUS_rsrvd_2 = (1U<<29), /**< Reserved bit */
209  DC_STATUS_rsrvd_3 = (1U<<28), /**< Reserved bit */
210  DC_STATUS_rsrvd_4 = (1U<<27), /**< Reserved bit */
211  DC_STATUS_rsrvd_5 = (1U<<26), /**< Reserved bit */
212  DC_STATUS_rsrvd_6 = (1U<<25), /**< Reserved bit */
213  DC_STATUS_rsrvd_7 = (1U<<24), /**< Reserved bit */
214  DC_STATUS_rsrvd_8 = (1U<<23), /**< Reserved bit */
215  DC_STATUS_rsrvd_9 = (1U<<22), /**< Reserved bit */
216  DC_STATUS_rsrvd_10 = (1U<<21), /**< Reserved bit */
217  DC_STATUS_rsrvd_11 = (1U<<20), /**< Reserved bit */
218  DC_STATUS_rsrvd_12 = (1U<<19), /**< Reserved bit */
219  DC_STATUS_rsrvd_13 = (1U<<18), /**< Reserved bit */
220  DC_STATUS_rsrvd_14 = (1U<<17), /**< Reserved bit */
221  DC_STATUS_rsrvd_15 = (1U<<16), /**< Reserved bit */
222  DC_STATUS_dbi_cmd_ready = (1U<<15), /**< DBI i/f fifo full */
223  DC_STATUS_dbi_cs = (1U<<14), /**< DBI/SPI i/f active transaction */
224  DC_STATUS_frame_end = (1U<<13), /**< End of frame pulse */
225  DC_STATUS_dbi_pending_trans = (1U<<12), /**< pending command/data transaction */
226  DC_STATUS_dbi_pending_cmd = (1U<<11), /**< pending command */
227  DC_STATUS_dbi_pending_data = (1U<<10), /**< pending pixel data */
228  DC_STATUS_dbi_busy =((1U<<16)|(1U<<14)|(1U<<13)|(1U<<12)|(1U<<11)|(1U<<10)), /**< DBI i/f busy */
229  DC_STATUS_mmu_error = (1U<< 9), /**< not implemented */
230  DC_STATUS_te = (1U<< 8), /**< tearing */
231  DC_STATUS_sticky = (1U<< 7), /**< underflow flag */
232  DC_STATUS_underflow = (1U<< 6), /**< underflow signal */
233  DC_STATUS_LASTROW = (1U<< 5), /**< last scan-row */
234  DC_STATUS_DPI_Csync = (1U<< 4), /**< DPI C-sync */
235  DC_STATUS_vsync_te = (1U<< 3), /**< Vsync or Tearing */
236  DC_STATUS_hsync = (1U<< 2), /**< Hsync */
237  DC_STATUS_framegen_busy = (1U<< 1), /**< Frame-generation in-progress */
238  DC_STATUS_ACTIVE = (1U<< 0), /**< active */
240 
241 /**
242  * @brief DC clock control definition
243  */
244 typedef enum
245 {
246  HAL_GDC_EN_PIXCLK = (1U<<22), /**< Resolution X */
247  HAL_GDC_EN_CFCLK = (1U<<23), /**< RegFile clock-gaters bypass */
248  HAL_GDC_EN_L0BUS = (1U<<24), /**< layer 0 bus clock clock-gater bypass */
249  HAL_GDC_EN_L0PIX = (1U<<25), /**< layer 0 pixel clock clock-gater bypass */
250  HAL_GDC_EN_L1BUS = (1U<<26), /**< layer 1 bus clock clock-gater bypass */
251  HAL_GDC_EN_L1PIX = (1U<<27), /**< layer 1 pixel clock clock-gater bypass */
252  HAL_GDC_EN_L2BUS = (1U<<28), /**< layer 2 bus clock clock-gater bypass */
253  HAL_GDC_EN_L2PIX = (1U<<29), /**< layer 2 pixel clock clock-gater bypass */
254  HAL_GDC_EN_L3BUS = (1U<<30), /**< layer 3 bus clock clock-gater bypass */
256 
257 /**
258  * @brief DC clock cg control definition
259  */
260 typedef enum
261 {
262  hal_gdc_clkctrl_cg_l3_pix_clk = (1U<<30), /**< layer 3 bus clock clock-gater bypass */
263  hal_gdc_clkctrl_cg_l2_bus_clk = (1U<<29), /**< layer 2 bus clock clock-gater bypass */
264  hal_gdc_clkctrl_cg_l2_pix_clk = (1U<<28), /**< layer 2 pixel clock clock-gater bypass */
265  hal_gdc_clkctrl_cg_l1_bus_clk = (1U<<27), /**< layer 1 bus clock clock-gater bypass */
266  hal_gdc_clkctrl_cg_l1_pix_clk = (1U<<26), /**< layer 1 pixel clock clock-gater bypass */
267  hal_gdc_clkctrl_cg_l0_bus_clk = (1U<<25), /**< layer 0 bus clock clock-gater bypass */
268  hal_gdc_clkctrl_cg_l0_pix_clk = (1U<<24), /**< layer 0 pixel clock clock-gater bypass */
269  hal_gdc_clkctrl_cg_regfil_clk = (1U<<23), /**< RegFile clock-gaters bypass */
270  hal_gdc_clkctrl_cg_bypass_clk = (1U<<22), /**< Clock-gaters bypass */
271  hal_gdc_clkctrl_cg_rsrvd_21 = (1U<<21), /**< Reserved bit */
272  hal_gdc_clkctrl_cg_rsrvd_20 = (1U<<20), /**< Reserved bit */
273  hal_gdc_clkctrl_cg_rsrvd_19 = (1U<<19), /**< Reserved bit */
274  hal_gdc_clkctrl_cg_rsrvd_18 = (1U<<18), /**< Reserved bit */
275  hal_gdc_clkctrl_cg_rsrvd_17 = (1U<<17), /**< Reserved bit */
276  hal_gdc_clkctrl_cg_rsrvd_16 = (1U<<16), /**< Reserved bit */
277  hal_gdc_clkctrl_cg_rsrvd_15 = (1U<<15), /**< Reserved bit */
278  hal_gdc_clkctrl_cg_rsrvd_14 = (1U<<14), /**< Reserved bit */
279  hal_gdc_clkctrl_cg_rsrvd_13 = (1U<<13), /**< Reserved bit */
280  hal_gdc_clkctrl_cg_rsrvd_12 = (1U<<12), /**< Reserved bit */
281  hal_gdc_clkctrl_cg_rsrvd_11 = (1U<<11), /**< Reserved bit */
282  hal_gdc_clkctrl_cg_rsrvd_10 = (1U<<10), /**< Reserved bit */
283  hal_gdc_clkctrl_cg_rsrvd_9 = (1U<< 9), /**< Reserved bit */
284  hal_gdc_clkctrl_cg_rsrvd_8 = (1U<< 8), /**< Reserved bit */
285  hal_gdc_clkctrl_cg_rsrvd_7 = (1U<< 7), /**< Reserved bit */
286  hal_gdc_clkctrl_cg_rsrvd_6 = (1U<< 6), /**< Reserved bit */
287  hal_gdc_clkctrl_cg_rsrvd_5 = (1U<< 5), /**< Reserved bit */
288  hal_gdc_clkctrl_cg_rsrvd_4 = (1U<< 4), /**< Reserved bit */
289  hal_gdc_clkctrl_cg_rsrvd_3 = (1U<< 3), /**< Reserved bit */
290  hal_gdc_clkctrl_cg_clk_swap = (1U<< 2), /**< Pixel generation and format clock swap */
291  hal_gdc_clkctrl_cg_clk_inv = (1U<< 1), /**< Invert (ouput) clock polarity */
292  hal_gdc_clkctrl_cg_clk_en = (1U<< 0), /**< Enable clock divider */
293 
295 
296 /** @} */
297 
298 /** @addtogroup HAL_DC_STRUCTURES Structures
299  * @{
300  */
301 /**
302  * @brief Display parameters definition
303  */
304 typedef struct __hal_gdc_display_t
305 {
306  uint32_t resx ; /**< Resolution X */
307  uint32_t resy ; /**< Resolution Y */
308  uint32_t fpx ; /**< Front Porch X */
309  uint32_t fpy ; /**< Front Porch Y */
310  uint32_t bpx ; /**< Back Porch X */
311  uint32_t bpy ; /**< Back Porch Y */
312  uint32_t blx ; /**< Blanking X */
313  uint32_t bly ; /**< Blanking Y */
315 
316 /**
317  * @brief Layer parameters definition
318  */
319 typedef struct __hal_gdc_layer_t
320 {
321  void *baseaddr_virt ; /**< Virtual Address */
322  uintptr_t baseaddr_phys ; /**< Physical Address */
323  uint32_t resx ; /**< Resolution X */
324  uint32_t resy ; /**< Resolution Y */
325  int32_t stride ; /**< Stride */
326  int32_t startx ; /**< Start X */
327  int32_t starty ; /**< Start Y */
328  uint32_t sizex ; /**< Size X */
329  uint32_t sizey ; /**< Size Y */
330  uint8_t alpha ; /**< Alpha */
331  uint8_t blendmode ; /**< Blending Mode */
332  uint8_t buscfg ; /**< bugcfg */
333  hal_gdc_format_t format ; /**< Format */
334  uint32_t mode ; /**< Mode */
335  uint32_t u_base ; /**< U Base */
336  uint32_t v_base ; /**< Y Base */
337  uint32_t u_stride ; /**< U Stride */
338  uint32_t v_stride ; /**< V Stride */
340 
341 /** @} */
342 
343 /**
344  * @addtogroup HAL_GDC_FUNCTION Functions
345  * @{
346  */
347 /**
348  *****************************************************************************************
349  * @brief Initialize hal_gdc library.
350  *
351  * @return -1 on error
352  *****************************************************************************************
353  */
354 int hal_gdc_init(void);
355 
356 /**
357  *****************************************************************************************
358  * @brief Read Configuration Register.
359  *
360  * @return Configuration Register Value
361  *****************************************************************************************
362  */
363 uint32_t hal_gdc_get_config(void);
364 
365 /**
366  *****************************************************************************************
367  * @brief Read CRC Checksum Register.
368  *
369  * @return CRC checksum value of last frame. For testing purposes
370  *****************************************************************************************
371  */
372 uint32_t hal_gdc_get_crc(void);
373 
374 /**
375  *****************************************************************************************
376  * @brief Set hal_gdc Background Color.
377  *
378  * @param[in] rgba: a 32-bit rgba value (0xRRGGBBXX - Red: color[31:24], Green: color[23:16], Blue: color[15:8])
379  *****************************************************************************************
380  */
381 void hal_gdc_set_bgcolor(uint32_t rgba);
382 
383 /**
384  *****************************************************************************************
385  * @brief Set Display timing parameters.
386  *
387  * @param[in] resx: Resolution X
388  * @param[in] fpx: Front Porch X
389  * @param[in] blx: Blanking X
390  * @param[in] bpx: Back Porch X
391  * @param[in] resy: Resolution Y
392  * @param[in] fpy: Front Porch Y
393  * @param[in] bly: Blanking Y
394  * @param[in] bpy: Back Porch Y
395  *****************************************************************************************
396  */
397 void hal_gdc_timing(int resx, int fpx, int blx, int bpx, int resy, int fpy, int bly, int bpy);
398 
399 /**
400  *****************************************************************************************
401  * @brief Get stride size in bytes.
402  *
403  * @param[in] format: Texture color format
404  * @param[in] width: Texture width
405  *
406  * @return Stride in bytes
407  *****************************************************************************************
408  */
409 int hal_gdc_stride_size(hal_gdc_format_t format, int width);
410 
411 /**
412  *****************************************************************************************
413  * @brief Set the built-in Clock Dividers and DMA Line Prefetch. (See Configuration Register 0x4)
414  *
415  * @param[in] div: Set Divider 1
416  * @param[in] div2: Set Divider 2
417  * @param[in] dma_prefetch: Set number of lines for the dma to prefetch
418  * @param[in] phase: Clock phase shift
419  *****************************************************************************************
420  */
421 void hal_gdc_clkdiv(int div, int div2, int dma_prefetch, int phase);
422 
423 /**
424  *****************************************************************************************
425  * @brief Control the clock gaters
426  *
427  * @param[in] ctrl: struct control
428  *****************************************************************************************
429  */
431 
432 /**
433  *****************************************************************************************
434  * @brief Set operation mode
435  *
436  * @param[in] mode: Mode of operation (See Register 0)
437  *****************************************************************************************
438  */
439 void hal_gdc_set_mode(int mode);
440 
441 /**
442  *****************************************************************************************
443  * @brief Get status from Status Register
444  *
445  * @return Status of DC
446  *****************************************************************************************
447  */
448 uint32_t hal_gdc_get_status (void);
449 
450 /**
451  *****************************************************************************************
452  * @brief Request a VSync Interrupt without blocking
453  *
454  * @return Status of DC
455  *****************************************************************************************
456  */
458 
459 /**
460  *****************************************************************************************
461  * @brief Set the Layer Mode. This function can enable a layer and set attributes to it
462  *
463  * @param[in] layer_no: The layer number
464  * @param[in] layer: Attributes struct
465  *****************************************************************************************
466  */
467 void hal_gdc_set_layer (int layer_no, hal_gdc_layer_t *layer);
468 
469 /**
470  *****************************************************************************************
471  * @brief Set the physical address of a layer.
472  *
473  * @param[in] layer_no: The layer number
474  * @param[in] addr: Layer Physical Address
475  *****************************************************************************************
476  */
477 void hal_gdc_set_layer_addr(int layer_no, uintptr_t addr);
478 
479 /**
480  *****************************************************************************************
481  * @brief Set the physical address of a layer.
482  *
483  * @param[in] layer: Layer number
484  * @param[in] index: Layer Physical Address
485  * @param[in] colour: 32-bit RGBA color value or gamma index
486  *****************************************************************************************
487  */
488 void hal_gdc_set_layer_gamma_lut(int layer, int index, int colour);
489 
490 /**
491  *****************************************************************************************
492  * @brief Get an entry in the lut8 Palette Gamma table for a layer
493  *
494  * @param[in] layer: Layer number
495  * @param[in] index: Color Index
496  *
497  * @return Palette index
498  *****************************************************************************************
499  */
500 int hal_gdc_get_layer_gamma_lut(int layer, int index);
501 
502 /**
503  *****************************************************************************************
504  * @brief Sets an entry in the lut8 Palatte Gamma table.
505  *
506  * @param[in] index: Color Index
507  * @param[in] colour: 32-bit RGBA colour value or Gamma index
508  *****************************************************************************************
509  */
510 void hal_gdc_set_palette(uint32_t index, uint32_t colour);
511 
512 /**
513  *****************************************************************************************
514  * @brief Reads an entry from the lut8 Palatte Gamma table
515  *
516  * @param[in] index: Color Index
517  *
518  * @return Colour for given palette index
519  *****************************************************************************************
520  */
521 int hal_gdc_get_palette(uint32_t index);
522 
523 /**
524  *****************************************************************************************
525  * @brief Disable layer
526  *
527  * @param[in] layer_no: Layer Number
528  *****************************************************************************************
529  */
530 void hal_gdc_layer_disable(int layer_no);
531 
532 /**
533  *****************************************************************************************
534  * @brief Enable layer
535  *
536  * @param[in] layer_no: Layer Number
537  *****************************************************************************************
538  */
539 void hal_gdc_layer_enable(int layer_no);
540 
541 /**
542  *****************************************************************************************
543  * @brief Enable or Disable fixed cursor
544  *
545  * @param[in] enable: 1 for enable or 0 for disable cursor
546  *****************************************************************************************
547  */
548 void hal_gdc_cursor_enable(int enable);
549 
550 /**
551  *****************************************************************************************
552  * @brief Set the location of the cursor
553  *
554  * @param[in] x: Cursor X coordinate
555  * @param[in] y: Cursor Y coordinate
556  *****************************************************************************************
557  */
558 void hal_gdc_cursor_xy(int x, int y);
559 
560 /**
561  *****************************************************************************************
562  * @brief Set programmable cursor image (32x32 pixels)
563  *
564  * @param[in] img: Base address of the 32x32 Cursor Image
565  *****************************************************************************************
566  */
567 void hal_gdc_set_cursor_img(unsigned char *img);
568 
569 /**
570  *****************************************************************************************
571  * @brief Set a color for the Cursor LUT
572  *
573  * @param[in] index: Color index
574  * @param[in] color: 32-bit RGBA value
575  *****************************************************************************************
576  */
577 void hal_gdc_set_cursor_lut(uint32_t index, uint32_t color);
578 
579 /**
580  *****************************************************************************************
581  * @brief Check whether hal_gdc supports a specific characteristic
582  *
583  * @param[in] flag: Flag to query
584  *
585  * @return True if the characteristic is supported
586  *****************************************************************************************
587  */
589 
590 /**
591  *****************************************************************************************
592  * @brief Read Color Mode Register
593  *
594  * @return Color mode register
595  *****************************************************************************************
596  */
597 uint32_t hal_gdc_get_col_mode(void);
598 
599 /**
600  *****************************************************************************************
601  * @brief Get the number of layers available
602  *
603  * @return Number of layers
604  *****************************************************************************************
605  */
607 
608 /** @} */
609 
610 #ifdef __cplusplus
611 }
612 #endif
613 
614 #endif
615 /** @} */
616 /** @} */
617 
618 
__hal_gdc_layer_t::baseaddr_phys
uintptr_t baseaddr_phys
Definition: hal_gdc.h:322
HAL_GDC_EN_L2BUS
@ HAL_GDC_EN_L2BUS
Definition: hal_gdc.h:252
HAL_GDC_TSC6
@ HAL_GDC_TSC6
Definition: hal_gdc.h:116
HAL_GDC_LAYER_AHBLOCK
@ HAL_GDC_LAYER_AHBLOCK
Definition: hal_gdc.h:54
HAL_GDC_CFG_PROGR_CURSOR
@ HAL_GDC_CFG_PROGR_CURSOR
Definition: hal_gdc.h:174
HAL_GDC_CFG_PALETTE
@ HAL_GDC_CFG_PALETTE
Definition: hal_gdc.h:172
hal_gdc_cursor_xy
void hal_gdc_cursor_xy(int x, int y)
Set the location of the cursor.
hal_gdc_clkctrl_cg_rsrvd_8
@ hal_gdc_clkctrl_cg_rsrvd_8
Definition: hal_gdc.h:284
hal_gdc_clkctrl_cg_rsrvd_19
@ hal_gdc_clkctrl_cg_rsrvd_19
Definition: hal_gdc.h:273
DC_STATUS_dbi_cs
@ DC_STATUS_dbi_cs
Definition: hal_gdc.h:223
__hal_gdc_layer_t::u_stride
uint32_t u_stride
Definition: hal_gdc.h:337
__hal_gdc_display_t::resy
uint32_t resy
Definition: hal_gdc.h:307
HAL_GDC_EN_L3BUS
@ HAL_GDC_EN_L3BUS
Definition: hal_gdc.h:254
hal_gdc_init
int hal_gdc_init(void)
Initialize hal_gdc library.
hal_gdc_clkctrl_cg_rsrvd_15
@ hal_gdc_clkctrl_cg_rsrvd_15
Definition: hal_gdc.h:277
hal_gdc_blend_mode_t
hal_gdc_blend_mode_t
Layer blending mode definition.
Definition: hal_gdc.h:79
DC_STATUS_LASTROW
@ DC_STATUS_LASTROW
Definition: hal_gdc.h:233
HAL_GDC_S_12BIT
@ HAL_GDC_S_12BIT
Definition: hal_gdc.h:158
hal_gdc_hal.h
hal_gdc_clkctrl_cg_rsrvd_13
@ hal_gdc_clkctrl_cg_rsrvd_13
Definition: hal_gdc.h:279
DC_STATUS_rsrvd_1
@ DC_STATUS_rsrvd_1
Definition: hal_gdc.h:207
hal_gdc_set_cursor_img
void hal_gdc_set_cursor_img(unsigned char *img)
Set programmable cursor image (32x32 pixels)
__hal_gdc_layer_t::v_stride
uint32_t v_stride
Definition: hal_gdc.h:338
__hal_gdc_display_t
Display parameters definition.
Definition: hal_gdc.h:305
HAL_GDC_BL_CLEAR
@ HAL_GDC_BL_CLEAR
Definition: hal_gdc.h:81
hal_gdc_clkctrl_cg_l2_pix_clk
@ hal_gdc_clkctrl_cg_l2_pix_clk
Definition: hal_gdc.h:264
DC_STATUS_rsrvd_9
@ DC_STATUS_rsrvd_9
Definition: hal_gdc.h:215
HAL_GDC_BL_SRC
@ HAL_GDC_BL_SRC
Definition: hal_gdc.h:82
HAL_GDC_NEG_H
@ HAL_GDC_NEG_H
Definition: hal_gdc.h:130
__hal_gdc_display_t::bpx
uint32_t bpx
Definition: hal_gdc.h:310
HAL_GDC_EN_L0PIX
@ HAL_GDC_EN_L0PIX
Definition: hal_gdc.h:249
hal_gdc_get_crc
uint32_t hal_gdc_get_crc(void)
Read CRC Checksum Register.
hal_gdc_get_config
uint32_t hal_gdc_get_config(void)
Read Configuration Register.
HAL_GDC_BL_SRC_OVER
@ HAL_GDC_BL_SRC_OVER
Definition: hal_gdc.h:83
HAL_GDC_CFG_L1_YUVMEM
@ HAL_GDC_CFG_L1_YUVMEM
Definition: hal_gdc.h:198
__hal_gdc_display_t::fpy
uint32_t fpy
Definition: hal_gdc.h:309
__hal_gdc_layer_t::resy
uint32_t resy
Definition: hal_gdc.h:324
HAL_GDC_LVDSPADS
@ HAL_GDC_LVDSPADS
Definition: hal_gdc.h:148
hal_gdc_videomode_t
hal_gdc_videomode_t
Layer video mode definition.
Definition: hal_gdc.h:126
hal_gdc_clkctrl_cg_bypass_clk
@ hal_gdc_clkctrl_cg_bypass_clk
Definition: hal_gdc.h:270
hal_gdc_config_t
hal_gdc_config_t
Layer configuration definition.
Definition: hal_gdc.h:171
DC_STATUS_dbi_cmd_ready
@ DC_STATUS_dbi_cmd_ready
Definition: hal_gdc.h:222
DC_STATUS_DPI_Csync
@ DC_STATUS_DPI_Csync
Definition: hal_gdc.h:234
HAL_GDC_T_16BIT
@ HAL_GDC_T_16BIT
Definition: hal_gdc.h:161
hal_gdc_clkctrl_cg_l1_pix_clk
@ hal_gdc_clkctrl_cg_l1_pix_clk
Definition: hal_gdc.h:266
hal_gdc_format_t
hal_gdc_format_t
Layer color mode definition.
Definition: hal_gdc.h:99
hal_gdc_get_col_mode
uint32_t hal_gdc_get_col_mode(void)
Read Color Mode Register.
DC_STATUS_rsrvd_12
@ DC_STATUS_rsrvd_12
Definition: hal_gdc.h:218
HAL_GDC_CFG_SPI
@ HAL_GDC_CFG_SPI
Definition: hal_gdc.h:196
HAL_GDC_DITHER15
@ HAL_GDC_DITHER15
Definition: hal_gdc.h:134
__hal_gdc_layer_t::starty
int32_t starty
Definition: hal_gdc.h:327
DC_STATUS_mmu_error
@ DC_STATUS_mmu_error
Definition: hal_gdc.h:229
__hal_gdc_display_t::fpx
uint32_t fpx
Definition: hal_gdc.h:308
HAL_GDC_P_RGB3_16B
@ HAL_GDC_P_RGB3_16B
Definition: hal_gdc.h:144
HAL_GDC_EN_PIXCLK
@ HAL_GDC_EN_PIXCLK
Definition: hal_gdc.h:246
hal_gdc_clkctrl_cg_clk_en
@ hal_gdc_clkctrl_cg_clk_en
Definition: hal_gdc.h:292
HAL_GDC_L4
@ HAL_GDC_L4
Definition: hal_gdc.h:107
hal_gdc_clkdiv
void hal_gdc_clkdiv(int div, int div2, int dma_prefetch, int phase)
Set the built-in Clock Dividers and DMA Line Prefetch. (See Configuration Register 0x4)
HAL_GDC_CFG_L2_BLENDER
@ HAL_GDC_CFG_L2_BLENDER
Definition: hal_gdc.h:189
HAL_GDC_BF_INVGBLALPHA
@ HAL_GDC_BF_INVGBLALPHA
Definition: hal_gdc.h:69
hal_gdc_clkctrl_cg_l0_bus_clk
@ hal_gdc_clkctrl_cg_l0_bus_clk
Definition: hal_gdc.h:267
hal_gdc_clkctrl_cg_l0_pix_clk
@ hal_gdc_clkctrl_cg_l0_pix_clk
Definition: hal_gdc.h:268
HAL_GDC_OUTP_OFF
@ HAL_GDC_OUTP_OFF
Definition: hal_gdc.h:151
__hal_gdc_layer_t::stride
int32_t stride
Definition: hal_gdc.h:325
hal_gdc_stride_size
int hal_gdc_stride_size(hal_gdc_format_t format, int width)
Get stride size in bytes.
hal_gdc_clkctrl_t
hal_gdc_clkctrl_t
DC clock control definition.
Definition: hal_gdc.h:245
hal_gdc_clkctrl_cg_rsrvd_20
@ hal_gdc_clkctrl_cg_rsrvd_20
Definition: hal_gdc.h:272
DC_STATUS_rsrvd_6
@ DC_STATUS_rsrvd_6
Definition: hal_gdc.h:212
DC_STATUS_dbi_busy
@ DC_STATUS_dbi_busy
Definition: hal_gdc.h:228
HAL_GDC_S_RGB3
@ HAL_GDC_S_RGB3
Definition: hal_gdc.h:157
HAL_GDC_L1
@ HAL_GDC_L1
Definition: hal_gdc.h:106
HAL_GDC_CFG_DITHERING
@ HAL_GDC_CFG_DITHERING
Definition: hal_gdc.h:175
hal_gdc_clkctrl_cg_rsrvd_12
@ hal_gdc_clkctrl_cg_rsrvd_12
Definition: hal_gdc.h:280
DC_STATUS_vsync_te
@ DC_STATUS_vsync_te
Definition: hal_gdc.h:235
__hal_gdc_layer_t::alpha
uint8_t alpha
Definition: hal_gdc.h:330
HAL_GDC_LVDS_ISP8
@ HAL_GDC_LVDS_ISP8
Definition: hal_gdc.h:160
DC_STATUS_frame_end
@ DC_STATUS_frame_end
Definition: hal_gdc.h:224
hal_gdc_request_vsync_non_blocking
void hal_gdc_request_vsync_non_blocking(void)
Request a VSync Interrupt without blocking.
__hal_gdc_layer_t::resx
uint32_t resx
Definition: hal_gdc.h:323
HAL_GDC_NEG_V
@ HAL_GDC_NEG_V
Definition: hal_gdc.h:129
hal_gdc_clkctrl_cg_regfil_clk
@ hal_gdc_clkctrl_cg_regfil_clk
Definition: hal_gdc.h:269
DC_STATUS_rsrvd_11
@ DC_STATUS_rsrvd_11
Definition: hal_gdc.h:217
hal_gdc_clkctrl_cg_l2_bus_clk
@ hal_gdc_clkctrl_cg_l2_bus_clk
Definition: hal_gdc.h:263
HAL_GDC_CFG_L0_BLENDER
@ HAL_GDC_CFG_L0_BLENDER
Definition: hal_gdc.h:181
__hal_gdc_layer_t
Layer parameters definition.
Definition: hal_gdc.h:320
DC_STATUS_hsync
@ DC_STATUS_hsync
Definition: hal_gdc.h:236
__hal_gdc_layer_t::baseaddr_virt
void * baseaddr_virt
Definition: hal_gdc.h:321
HAL_GDC_SCALE_NN
@ HAL_GDC_SCALE_NN
Definition: hal_gdc.h:52
__hal_gdc_layer_t::u_base
uint32_t u_base
Definition: hal_gdc.h:335
DC_STATUS_rsrvd_2
@ DC_STATUS_rsrvd_2
Definition: hal_gdc.h:208
hal_gdc_clkctrl_cg_rsrvd_16
@ hal_gdc_clkctrl_cg_rsrvd_16
Definition: hal_gdc.h:276
HAL_GDC_FORCE_A
@ HAL_GDC_FORCE_A
Definition: hal_gdc.h:51
HAL_GDC_ARGB8888
@ HAL_GDC_ARGB8888
Definition: hal_gdc.h:112
hal_gfx_sys_defs.h
HAL_GDC_CFG_L2_YUVMEM
@ HAL_GDC_CFG_L2_YUVMEM
Definition: hal_gdc.h:199
hal_gdc_status_t
hal_gdc_status_t
DC status definition.
Definition: hal_gdc.h:206
DC_STATUS_rsrvd_14
@ DC_STATUS_rsrvd_14
Definition: hal_gdc.h:220
HAL_GDC_P_RGB3
@ HAL_GDC_P_RGB3
Definition: hal_gdc.h:155
HAL_GDC_NEG_DE
@ HAL_GDC_NEG_DE
Definition: hal_gdc.h:131
DC_STATUS_rsrvd_10
@ DC_STATUS_rsrvd_10
Definition: hal_gdc.h:216
hal_gdc_set_bgcolor
void hal_gdc_set_bgcolor(uint32_t rgba)
Set hal_gdc Background Color.
HAL_GDC_LAYER_DISABLE
@ HAL_GDC_LAYER_DISABLE
Definition: hal_gdc.h:50
DC_STATUS_rsrvd_15
@ DC_STATUS_rsrvd_15
Definition: hal_gdc.h:221
HAL_GDC_CFG_L0_GAMMA
@ HAL_GDC_CFG_L0_GAMMA
Definition: hal_gdc.h:183
__hal_gdc_display_t::bly
uint32_t bly
Definition: hal_gdc.h:313
hal_gdc_clkctrl_cg_rsrvd_14
@ hal_gdc_clkctrl_cg_rsrvd_14
Definition: hal_gdc.h:278
__hal_gdc_layer_t::buscfg
uint8_t buscfg
Definition: hal_gdc.h:332
HAL_GDC_CLKOUTDIV
@ HAL_GDC_CLKOUTDIV
Definition: hal_gdc.h:147
HAL_GDC_PALETTE
@ HAL_GDC_PALETTE
Definition: hal_gdc.h:137
HAL_GDC_BGRA8888
@ HAL_GDC_BGRA8888
Definition: hal_gdc.h:104
__hal_gdc_display_t::blx
uint32_t blx
Definition: hal_gdc.h:312
DC_STATUS_rsrvd_3
@ DC_STATUS_rsrvd_3
Definition: hal_gdc.h:209
hal_gdc_clkctrl_cg_rsrvd_5
@ hal_gdc_clkctrl_cg_rsrvd_5
Definition: hal_gdc.h:287
HAL_GDC_TSC4
@ HAL_GDC_TSC4
Definition: hal_gdc.h:115
HAL_GDC_RGBA8888
@ HAL_GDC_RGBA8888
Definition: hal_gdc.h:111
HAL_GDC_BL_SRC_IN
@ HAL_GDC_BL_SRC_IN
Definition: hal_gdc.h:85
hal_gdc_clkctrl_cg_rsrvd_6
@ hal_gdc_clkctrl_cg_rsrvd_6
Definition: hal_gdc.h:286
HAL_GDC_CFG_FORMAT
@ HAL_GDC_CFG_FORMAT
Definition: hal_gdc.h:176
HAL_GDC_CFG_L1_ENABLED
@ HAL_GDC_CFG_L1_ENABLED
Definition: hal_gdc.h:184
__hal_gdc_layer_t::mode
uint32_t mode
Definition: hal_gdc.h:334
hal_gdc_clkctrl_cg_rsrvd_3
@ hal_gdc_clkctrl_cg_rsrvd_3
Definition: hal_gdc.h:289
HAL_GDC_EN_L1BUS
@ HAL_GDC_EN_L1BUS
Definition: hal_gdc.h:250
HAL_GDC_P_RGB3_18B1
@ HAL_GDC_P_RGB3_18B1
Definition: hal_gdc.h:143
HAL_GDC_RGB24
@ HAL_GDC_RGB24
Definition: hal_gdc.h:109
DC_STATUS_rsrvd_5
@ DC_STATUS_rsrvd_5
Definition: hal_gdc.h:211
HAL_GDC_EN_L0BUS
@ HAL_GDC_EN_L0BUS
Definition: hal_gdc.h:248
hal_gdc_set_layer_addr
void hal_gdc_set_layer_addr(int layer_no, uintptr_t addr)
Set the physical address of a layer.
HAL_GDC_YUY2
@ HAL_GDC_YUY2
Definition: hal_gdc.h:110
HAL_GDC_BF_INVDSTALPHA
@ HAL_GDC_BF_INVDSTALPHA
Definition: hal_gdc.h:72
HAL_GDC_MIPI_OFF
@ HAL_GDC_MIPI_OFF
Definition: hal_gdc.h:150
HAL_GDC_CFG_L1_SCALER
@ HAL_GDC_CFG_L1_SCALER
Definition: hal_gdc.h:186
__hal_gdc_layer_t::blendmode
uint8_t blendmode
Definition: hal_gdc.h:331
HAL_GDC_BT656
@ HAL_GDC_BT656
Definition: hal_gdc.h:162
hal_gdc_clkctrl_cg_rsrvd_17
@ hal_gdc_clkctrl_cg_rsrvd_17
Definition: hal_gdc.h:275
HAL_GDC_CURSOR
@ HAL_GDC_CURSOR
Definition: hal_gdc.h:128
DC_STATUS_underflow
@ DC_STATUS_underflow
Definition: hal_gdc.h:232
HAL_GDC_GAMMA
@ HAL_GDC_GAMMA
Definition: hal_gdc.h:138
HAL_GDC_CFG_DBIB
@ HAL_GDC_CFG_DBIB
Definition: hal_gdc.h:178
DC_STATUS_dbi_pending_cmd
@ DC_STATUS_dbi_pending_cmd
Definition: hal_gdc.h:226
DC_STATUS_ACTIVE
@ DC_STATUS_ACTIVE
Definition: hal_gdc.h:238
HAL_GDC_RGBA4444
@ HAL_GDC_RGBA4444
Definition: hal_gdc.h:118
HAL_GDC_YUVOUT
@ HAL_GDC_YUVOUT
Definition: hal_gdc.h:149
HAL_GDC_CFG_L3_SCALER
@ HAL_GDC_CFG_L3_SCALER
Definition: hal_gdc.h:194
HAL_GDC_BL_DST_OVER
@ HAL_GDC_BL_DST_OVER
Definition: hal_gdc.h:84
HAL_GDC_CFG_L0_SCALER
@ HAL_GDC_CFG_L0_SCALER
Definition: hal_gdc.h:182
HAL_GDC_EN_L1PIX
@ HAL_GDC_EN_L1PIX
Definition: hal_gdc.h:251
DC_STATUS_rsrvd_4
@ DC_STATUS_rsrvd_4
Definition: hal_gdc.h:210
hal_gdc_clkctrl_cg_l1_bus_clk
@ hal_gdc_clkctrl_cg_l1_bus_clk
Definition: hal_gdc.h:265
HAL_GDC_CFG_YUVOUT
@ HAL_GDC_CFG_YUVOUT
Definition: hal_gdc.h:179
hal_gdc_clkctrl_cg_rsrvd_10
@ hal_gdc_clkctrl_cg_rsrvd_10
Definition: hal_gdc.h:282
HAL_GDC_BL_DST_IN
@ HAL_GDC_BL_DST_IN
Definition: hal_gdc.h:86
HAL_GDC_RGB565
@ HAL_GDC_RGB565
Definition: hal_gdc.h:103
hal_gdc_get_palette
int hal_gdc_get_palette(uint32_t index)
Reads an entry from the lut8 Palatte Gamma table.
hal_gdc_timing
void hal_gdc_timing(int resx, int fpx, int blx, int bpx, int resy, int fpy, int bly, int bpy)
Set Display timing parameters.
hal_gdc_layer_t
struct __hal_gdc_layer_t hal_gdc_layer_t
Layer parameters definition.
hal_gdc_get_layer_count
int hal_gdc_get_layer_count(void)
Get the number of layers available.
HAL_GDC_BL_DST_OUT
@ HAL_GDC_BL_DST_OUT
Definition: hal_gdc.h:88
hal_gdc_clkctrl_cg_l3_pix_clk
@ hal_gdc_clkctrl_cg_l3_pix_clk
Definition: hal_gdc.h:262
HAL_GDC_BF_GLBALPHA
@ HAL_GDC_BF_GLBALPHA
Definition: hal_gdc.h:66
HAL_GDC_EN_CFCLK
@ HAL_GDC_EN_CFCLK
Definition: hal_gdc.h:247
hal_gdc_set_cursor_lut
void hal_gdc_set_cursor_lut(uint32_t index, uint32_t color)
Set a color for the Cursor LUT.
HAL_GDC_BF_INVSRCGBLALPHA
@ HAL_GDC_BF_INVSRCGBLALPHA
Definition: hal_gdc.h:70
hal_gdc_display_t
struct __hal_gdc_display_t hal_gdc_display_t
Display parameters definition.
hal_gdc_get_status
uint32_t hal_gdc_get_status(void)
Get status from Status Register.
__hal_gdc_layer_t::format
hal_gdc_format_t format
Definition: hal_gdc.h:333
HAL_GDC_BF_ZERO
@ HAL_GDC_BF_ZERO
Definition: hal_gdc.h:63
HAL_GDC_SINGLEV
@ HAL_GDC_SINGLEV
Definition: hal_gdc.h:135
HAL_GDC_CFG_L3_GAMMA
@ HAL_GDC_CFG_L3_GAMMA
Definition: hal_gdc.h:195
HAL_GDC_P_RGB3_16B1
@ HAL_GDC_P_RGB3_16B1
Definition: hal_gdc.h:145
DC_STATUS_framegen_busy
@ DC_STATUS_framegen_busy
Definition: hal_gdc.h:237
__hal_gdc_layer_t::v_base
uint32_t v_base
Definition: hal_gdc.h:336
HAL_GDC_BF_INVSRCALPHA
@ HAL_GDC_BF_INVSRCALPHA
Definition: hal_gdc.h:68
DC_STATUS_rsrvd_7
@ DC_STATUS_rsrvd_7
Definition: hal_gdc.h:213
HAL_GDC_BL_XOR
@ HAL_GDC_BL_XOR
Definition: hal_gdc.h:92
HAL_GDC_CFG_L0_YUVMEM
@ HAL_GDC_CFG_L0_YUVMEM
Definition: hal_gdc.h:197
HAL_GDC_P_RGB3_18B
@ HAL_GDC_P_RGB3_18B
Definition: hal_gdc.h:142
hal_gdc_clkctrl_cg_rsrvd_18
@ hal_gdc_clkctrl_cg_rsrvd_18
Definition: hal_gdc.h:274
__hal_gdc_display_t::bpy
uint32_t bpy
Definition: hal_gdc.h:311
HAL_GDC_ONE_FRAME
@ HAL_GDC_ONE_FRAME
Definition: hal_gdc.h:141
HAL_GDC_BL_SRC_OUT
@ HAL_GDC_BL_SRC_OUT
Definition: hal_gdc.h:87
HAL_GDC_BF_ONE
@ HAL_GDC_BF_ONE
Definition: hal_gdc.h:64
HAL_GDC_BF_SRCALPHA
@ HAL_GDC_BF_SRCALPHA
Definition: hal_gdc.h:65
HAL_GDC_BL_DST_ATOP
@ HAL_GDC_BL_DST_ATOP
Definition: hal_gdc.h:90
hal_gdc_set_layer
void hal_gdc_set_layer(int layer_no, hal_gdc_layer_t *layer)
Set the Layer Mode. This function can enable a layer and set attributes to it.
hal_gdc_clkctrl_cg_clk_inv
@ hal_gdc_clkctrl_cg_clk_inv
Definition: hal_gdc.h:291
HAL_GDC_BF_DSTALPHA
@ HAL_GDC_BF_DSTALPHA
Definition: hal_gdc.h:71
HAL_GDC_CFG_L2_GAMMA
@ HAL_GDC_CFG_L2_GAMMA
Definition: hal_gdc.h:191
hal_gdc_layer_enable
void hal_gdc_layer_enable(int layer_no)
Enable layer.
HAL_GDC_INTERLACE
@ HAL_GDC_INTERLACE
Definition: hal_gdc.h:140
HAL_GDC_TSC6A
@ HAL_GDC_TSC6A
Definition: hal_gdc.h:117
HAL_GDC_BLANK
@ HAL_GDC_BLANK
Definition: hal_gdc.h:139
hal_gdc_clkctrl
void hal_gdc_clkctrl(hal_gdc_clkctrl_t ctrl)
Control the clock gaters.
hal_gdc_layer_disable
void hal_gdc_layer_disable(int layer_no)
Disable layer.
HAL_GDC_RGBA5551
@ HAL_GDC_RGBA5551
Definition: hal_gdc.h:100
hal_gdc_clkctrl_cg_clk_swap
@ hal_gdc_clkctrl_cg_clk_swap
Definition: hal_gdc.h:290
HAL_GDC_LUT8
@ HAL_GDC_LUT8
Definition: hal_gdc.h:164
hal_gdc_cursor_enable
void hal_gdc_cursor_enable(int enable)
Enable or Disable fixed cursor.
HAL_GDC_DISABLE
@ HAL_GDC_DISABLE
Definition: hal_gdc.h:127
HAL_GDC_ABGR8888
@ HAL_GDC_ABGR8888
Definition: hal_gdc.h:101
HAL_GDC_LAYER_GAMMALUT_EN
@ HAL_GDC_LAYER_GAMMALUT_EN
Definition: hal_gdc.h:55
HAL_GDC_LVDS_ISP68
@ HAL_GDC_LVDS_ISP68
Definition: hal_gdc.h:159
HAL_GDC_MODULATE_A
@ HAL_GDC_MODULATE_A
Definition: hal_gdc.h:53
HAL_GDC_CFG_L2_ENABLED
@ HAL_GDC_CFG_L2_ENABLED
Definition: hal_gdc.h:188
__hal_gdc_layer_t::sizex
uint32_t sizex
Definition: hal_gdc.h:328
HAL_GDC_DITHER16
@ HAL_GDC_DITHER16
Definition: hal_gdc.h:133
hal_gdc_clkctrl_cg_t
hal_gdc_clkctrl_cg_t
DC clock cg control definition.
Definition: hal_gdc.h:261
hal_gdc_blend_factors_t
hal_gdc_blend_factors_t
Layer blending factor definition.
Definition: hal_gdc.h:62
DC_STATUS_dbi_pending_data
@ DC_STATUS_dbi_pending_data
Definition: hal_gdc.h:227
HAL_GDC_EN_L2PIX
@ HAL_GDC_EN_L2PIX
Definition: hal_gdc.h:253
DC_STATUS_rsrvd_8
@ DC_STATUS_rsrvd_8
Definition: hal_gdc.h:214
hal_gdc_clkctrl_cg_rsrvd_4
@ hal_gdc_clkctrl_cg_rsrvd_4
Definition: hal_gdc.h:288
__hal_gdc_layer_t::startx
int32_t startx
Definition: hal_gdc.h:326
HAL_GDC_CFG_L3_ENABLED
@ HAL_GDC_CFG_L3_ENABLED
Definition: hal_gdc.h:192
hal_gdc_clkctrl_cg_rsrvd_9
@ hal_gdc_clkctrl_cg_rsrvd_9
Definition: hal_gdc.h:283
HAL_GDC_CFG_FIXED_CURSOR
@ HAL_GDC_CFG_FIXED_CURSOR
Definition: hal_gdc.h:173
DC_STATUS_dbi_pending_trans
@ DC_STATUS_dbi_pending_trans
Definition: hal_gdc.h:225
HAL_GDC_LVDS_OFF
@ HAL_GDC_LVDS_OFF
Definition: hal_gdc.h:152
HAL_GDC_CFG_L3_BLENDER
@ HAL_GDC_CFG_L3_BLENDER
Definition: hal_gdc.h:193
HAL_GDC_CFG_L1_BLENDER
@ HAL_GDC_CFG_L1_BLENDER
Definition: hal_gdc.h:185
HAL_GDC_P_RGB3_16B2
@ HAL_GDC_P_RGB3_16B2
Definition: hal_gdc.h:146
hal_gdc_get_layer_gamma_lut
int hal_gdc_get_layer_gamma_lut(int layer, int index)
Get an entry in the lut8 Palette Gamma table for a layer.
HAL_GDC_YUYV
@ HAL_GDC_YUYV
Definition: hal_gdc.h:108
HAL_GDC_S_RGBX4
@ HAL_GDC_S_RGBX4
Definition: hal_gdc.h:156
DC_STATUS_te
@ DC_STATUS_te
Definition: hal_gdc.h:230
HAL_GDC_BL_SRC_ATOP
@ HAL_GDC_BL_SRC_ATOP
Definition: hal_gdc.h:89
HAL_GDC_CFG_L2_SCALER
@ HAL_GDC_CFG_L2_SCALER
Definition: hal_gdc.h:190
HAL_GDC_JDIMIP
@ HAL_GDC_JDIMIP
Definition: hal_gdc.h:163
HAL_GDC_CFG_L1_GAMMA
@ HAL_GDC_CFG_L1_GAMMA
Definition: hal_gdc.h:187
DC_STATUS_sticky
@ DC_STATUS_sticky
Definition: hal_gdc.h:231
HAL_GDC_INVPIXCLK
@ HAL_GDC_INVPIXCLK
Definition: hal_gdc.h:136
__hal_gdc_display_t::resx
uint32_t resx
Definition: hal_gdc.h:306
HAL_GDC_RGB332
@ HAL_GDC_RGB332
Definition: hal_gdc.h:102
HAL_GDC_SCANDOUBLE
@ HAL_GDC_SCANDOUBLE
Definition: hal_gdc.h:153
HAL_GDC_BL_SIMPLE
@ HAL_GDC_BL_SIMPLE
Definition: hal_gdc.h:80
HAL_GDC_TLYUV420
@ HAL_GDC_TLYUV420
Definition: hal_gdc.h:114
HAL_GDC_BF_SRCGBLALPHA
@ HAL_GDC_BF_SRCGBLALPHA
Definition: hal_gdc.h:67
__hal_gdc_layer_t::sizey
uint32_t sizey
Definition: hal_gdc.h:329
hal_gdc_check_config
unsigned char hal_gdc_check_config(hal_gdc_config_t flag)
Check whether hal_gdc supports a specific characteristic.
hal_gdc_set_layer_gamma_lut
void hal_gdc_set_layer_gamma_lut(int layer, int index, int colour)
Set the physical address of a layer.
HAL_GDC_CFG_HiQ_YUV
@ HAL_GDC_CFG_HiQ_YUV
Definition: hal_gdc.h:177
HAL_GDC_L8
@ HAL_GDC_L8
Definition: hal_gdc.h:105
DC_STATUS_rsrvd_13
@ DC_STATUS_rsrvd_13
Definition: hal_gdc.h:219
hal_gdc_clkctrl_cg_rsrvd_21
@ hal_gdc_clkctrl_cg_rsrvd_21
Definition: hal_gdc.h:271
hal_gdc_layer_ctrl_t
hal_gdc_layer_ctrl_t
Layer control definition.
Definition: hal_gdc.h:49
HAL_GDC_BL_ADD
@ HAL_GDC_BL_ADD
Definition: hal_gdc.h:91
hal_gdc_clkctrl_cg_rsrvd_11
@ hal_gdc_clkctrl_cg_rsrvd_11
Definition: hal_gdc.h:281
HAL_GDC_CFG_L0_ENABLED
@ HAL_GDC_CFG_L0_ENABLED
Definition: hal_gdc.h:180
hal_gdc_set_mode
void hal_gdc_set_mode(int mode)
Set operation mode.
HAL_GDC_DITHER
@ HAL_GDC_DITHER
Definition: hal_gdc.h:132
HAL_GDC_V_YUV420
@ HAL_GDC_V_YUV420
Definition: hal_gdc.h:113
HAL_GDC_TESTMODE
@ HAL_GDC_TESTMODE
Definition: hal_gdc.h:154
HAL_GDC_ARGB4444
@ HAL_GDC_ARGB4444
Definition: hal_gdc.h:119
hal_gdc_clkctrl_cg_rsrvd_7
@ hal_gdc_clkctrl_cg_rsrvd_7
Definition: hal_gdc.h:285
hal_gdc_set_palette
void hal_gdc_set_palette(uint32_t index, uint32_t colour)
Sets an entry in the lut8 Palatte Gamma table.