Go to the documentation of this file.
61 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
68 #ifdef HAL_QSPI_MODULE_ENABLED
83 #define APP_QSPI_PIN_ENABLE 1
84 #define APP_QSPI_PIN_DISABLE 0
87 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
91 #define QSPI_MAX_XFER_SIZE_ONCE (0xFFFCu)
92 #define DMA_MAX_XFER_SIZE_ONCE (4095u)
95 #define APP_STORAGE_RAM_ID 0xf
113 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
128 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
134 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
287 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
304 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
359 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
477 #ifdef APP_DRIVER_WAKEUP_CALL_FUN
500 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
509 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
516 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
523 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
543 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
599 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
724 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
737 uint16_t app_qspi_transmit_sync(
app_qspi_id_t id, uint8_t *p_data, uint32_t length, uint32_t timeout);
759 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
771 uint16_t app_qspi_transmit_async(
app_qspi_id_t id, uint8_t *p_data, uint32_t length);
794 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
807 uint16_t app_qspi_receive_sync(
app_qspi_id_t id, uint8_t *p_data, uint32_t length, uint32_t timeout);
829 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
841 uint16_t app_qspi_receive_async(
app_qspi_id_t id, uint8_t *p_data, uint32_t length);
844 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
915 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
927 uint16_t app_qspi_transmit_in_qpi_async(
app_qspi_id_t id, uint32_t data_width, uint8_t *p_data, uint32_t length);
uint16_t app_qspi_command_receive_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout)
Receive an amount of data with the specified instruction, address and dummy cycles in blocking mode.
qspi_command_t app_qspi_command_t
QSPI command structure definition.
qspi_handle_t * app_qspi_get_handle(app_qspi_id_t id)
Return the QSPI handle.
const app_qspi_pin_cfg_t g_qspi_pin_groups[QSPIx_PIN_GROUP_MAX]
The Referrence to pin groups define.
qspi_pins_group_e
Define Pin Groups for QSPI.
@ FLASH_MMAP_CMD_4READ_EBH
uint32_t llp_cfg_right_shift_bit
@ DRAW_TYPE_IF_DUAL_SCREEN
uint32_t frame_offset_lines
app_qspi_dma_state_t qspi_dma_state
uint16_t app_qspi_transmit_sync_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length, uint32_t timeout)
Transmit data without command, support std/dual/quad mode.
app_qspi_mmap_device_t mounted_mmap_device
QSPI device structure definition.
@ FLASH_MMAP_CMD_QREAD_6BH
@ APP_QSPI_EVT_ASYNC_WR_SCRN_FAIL
volatile bool is_dma_done
QSPI IO configuration Structures.
uint16_t app_qspi_command_transmit_async(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data)
Receive an amount of data with the specified instruction, address and dummy cycles in non-blocking mo...
@ PSRAM_MMAP_CMD_READ_MAX
app_qspi_state_t
App qspi state types.
uint16_t app_qspi_mmap_read_u16(app_qspi_id_t id, uint32_t address)
Read U16 Data in Memory mapped Mode(XIP Mode), The Data is ordered by the order in flash/psram device...
uint32_t instruction_size
app_qspi_screen_command_t qspi_screen_command
QSPI event structure definition.
app_io_pull_t
GPIO pull Enumerations definition.
blit_xfer_type_e
Define BLIT Mode By DMA.
app_io_type_t
GPIO type Enumerations definition.
uint16_t app_qspi_deinit(app_qspi_id_t id)
De-initialize the APP QSPI DRIVER peripheral.
QSPI init Structure definition.
@ PSRAM_MMAP_CMD_QREAD_EBH
uint16_t app_qspi_receive_sync_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length, uint32_t timeout)
Receive data without command, support std/dual/quad mode.
unsigned int scrn_pixel_depth
QSPI command Structure definition.
@ PSRAM_MMAP_CMD_QWRITE_38H
unsigned int scrn_pixel_height
app_io_mode_t
GPIO mode Enumerations definition.
bool app_qspi_mmap_set_endian_mode(app_qspi_id_t id, app_qspi_mmap_endian_mode_e mode)
Set Data Endian Mode to Read in Memory mapped Mode(XIP Mode)
@ APP_QSPI_MMAP_ENDIAN_MODE_2
app_qspi_flash_mmap_rd_cmd_e
Define Flash's Read Command for Memory-Mapped Mode.
app_qspi_psram_mmap_rd_cmd_e psram_rd
bool app_qspi_active_memory_mappped(app_qspi_id_t id, bool is_active)
Active or Deactive memory mapped mode (also called XIP mode)
app_qspi_id_t
QSPI module Enumerations definition.
QSPI DMA configuration structure definition.
@ FLASH_MMAP_CMD_2READ_BBH_SIOO
Header file containing functions prototypes of GPIO app library.
uint16_t app_qspi_abort(app_qspi_id_t id)
Abort qspi communication with Interrupt.
QSPI configuration Structures.
veri_linked_screen_scroll_t veri_linked_ss
@ PSRAM_MMAP_CMD_WRITE_MAX
One block of screen Structure.
volatile bool is_dma_mode_m2m
uint32_t app_qspi_get_xip_base_address(app_qspi_id_t id)
Return the XIP Base Address of QSPI Instance.
void(* app_qspi_evt_handler_t)(app_qspi_evt_t *p_evt)
QSPI event callback definition.
uint16_t app_qspi_command_receive_async(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data)
Receive an amount of data with the specified instruction, address and dummy cycles in non-blocking mo...
uint16_t app_qspi_command_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint32_t timeout)
Transmit only instruction in blocking mode.
app_qspi_screen_info_t screen_info
volatile bool is_mmap_prefetch_en
app_qspi_dma_state_t
App qspi dma_state types.
@ FLASH_MMAP_CMD_2READ_BBH
@ PSRAM_MMAP_CMD_QREAD_0BH
uint16_t app_qspi_receive_async_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length)
Receive data without command, support std/dual/quad mode.
uint16_t app_qspi_transmit_async_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length)
Transmit data without command, support std/dual/quad mode.
@ FLASH_MMAP_CMD_4READ_EBH_SIOO
app_qspi_dma_cfg_t dma_cfg
uint8_t app_qspi_mmap_read_u8(app_qspi_id_t id, uint32_t address)
Read U8 Data in Memory mapped Mode(XIP Mode), can be used in flash/psram device.
Screen Info. structure definition.
app_qspi_mmap_endian_mode_e
QSPI Memory-Mapped Endian Mode.
bool app_qspi_config_memory_mappped(app_qspi_id_t id, app_qspi_mmap_device_t dev)
Config the memory mapped mode (also called XIP mode) and Active the mode.
volatile uint8_t mmap_endian_mode
app_qspi_psram_mmap_wr_cmd_e psram_wr
volatile bool is_used_dma
uint32_t frame_ahb_start_address
bool app_qspi_mmap_read_block(app_qspi_id_t id, uint32_t address, uint8_t *buffer, uint32_t length)
Read data block in Memory mapped Mode(XIP Mode), The Data is ordered by the order in flash/psram devi...
uint32_t instruction_address_mode
volatile bool is_mmap_inited
app_qspi_pin_cfg_t * p_pin_cfg
app_qspi_pin_cfg_t pin_cfg
app_qspi_state_t qspi_state
Header file containing functions prototypes of DMA app library.
This file contains all the functions prototypes for the HAL module driver.
uint16_t app_qspi_command_async(app_qspi_id_t id, app_qspi_command_t *p_cmd)
Transmit instruction in non-blocking mode with Interrupt.
@ APP_QSPI_MMAP_ENDIAN_MODE_1
unsigned int scrn_pixel_width
app_qspi_draw_screen_interface_type_e
APP QSPI interface type when drawing screen.
@ APP_QSPI_MMAP_ENDIAN_MODE_0
struct _screen_veri_link_scroll_t app_qspi_screen_veri_link_scroll_t
Vertical Scroll-Screen Linked List Structure.
app_qspi_device_e
QSPI Device supporting Memory-Mapped Mode.
app_qspi_device_e dev_type
uint32_t app_qspi_mmap_read_u32(app_qspi_id_t id, uint32_t address)
Read U32 Data in Memory mapped Mode(XIP Mode), The Data is ordered by the order in flash/psram device...
@ PSRAM_MMAP_CMD_QWRITE_02H
Async Draw Screen Structure, just used for inner driver.
app_qspi_evt_type_t
APP QSPI Event Type.
Blit Image structure definition.
app_qspi_dma_cfg_t dma_cfg
dma_regs_t * dma_instance
app_qspi_psram_mmap_rd_cmd_e
Define PSRAM's Read Command for Memory-Mapped Mode.
app_io_mux_t
GPIO mux Enumerations definition.
app_qspi_evt_handler_t evt_handler
app_qspi_flash_mmap_rd_cmd_e flash_rd
uint32_t frame_draw_lines
Header file of app driver error code.
Header file of app driver config code.
uint16_t app_qspi_init(app_qspi_params_t *p_params, app_qspi_evt_handler_t evt_handler)
Initialize the APP QSPI DRIVER according to the specified parameters in the app_qspi_params_t and app...
app_qspi_psram_mmap_wr_cmd_e
Define PSRAM's Write Command for Memory-Mapped Mode.
@ APP_QSPI_EVT_ASYNC_WR_SCRN_CPLT
QSPI handle Structure definition.
uint32_t llp_cfg_ctrl_low
volatile bool is_xfer_err
uint16_t app_qspi_command_transmit_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout)
Receive an amount of data with the specified instruction, address and dummy cycles in blocking mode.
QSPI parameters structure definition.
int16_t dma_id_t
DMA id definition.
dma_channel_t dma_channel
@ FLASH_MMAP_CMD_DREAD_3BH
volatile bool is_async_write_screen
dma_channel_t
HAL DMA Channel Enumerations definition.
app_qspi_draw_screen_interface_type_e if_type
@ DRAW_TYPE_IF_VERI_LINKED_SCREEN
QSPI memory-mapped configuration Structures.
dual_screen_scroll_t dual_ss
@ FLASH_MMAP_CMD_READ_MAX
uint32_t dst_buff_address