Macros | |
#define | HAL_GFX_RING_BUFFER_SIZE (5*1024u) |
#define | HAL_GFX_MEM_POOL_ASSETS 0 |
#define | HAL_GFX_MEM_POOL_FB 0 |
#define | VMEM_BASEADDR ((uint32_t)(&s_graphics_memory_buffer[0])) |
#define | VMEM_SIZE (30*1024u) |
#define | USE_TSI_MALLOC |
#define | HAL_GFX_MULTI_MEM_POOLS_CNT 1 |
#define HAL_GFX_MEM_POOL_ASSETS 0 |
The same to Pool id
Definition at line 63 of file graphics_sys_defs.h.
#define HAL_GFX_MEM_POOL_FB 0 |
Pool id, only set to 0 currently
Definition at line 64 of file graphics_sys_defs.h.
#define HAL_GFX_MULTI_MEM_POOLS_CNT 1 |
if HAL_GFX_MULTI_MEM_POOLS is defined, use HAL_GFX_MULTI_MEM_POOLS_CNT pools must be equal or less than 4.
Definition at line 76 of file graphics_sys_defs.h.
#define HAL_GFX_RING_BUFFER_SIZE (5*1024u) |
The GPU RING BUFFER SIZE.
Definition at line 62 of file graphics_sys_defs.h.
#define USE_TSI_MALLOC |
If enable, use the memory management of GPU.
Definition at line 72 of file graphics_sys_defs.h.
#define VMEM_BASEADDR ((uint32_t)(&s_graphics_memory_buffer[0])) |
the graphics (video) memory base address.
Definition at line 65 of file graphics_sys_defs.h.
#define VMEM_SIZE (30*1024u) |
The GPU max memory size for frame buffer.
Definition at line 68 of file graphics_sys_defs.h.