hal_gdc_intern.h
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1 /** @addtogroup GRAPHICS_SDK Graphics
2  * @{
3  */
4 
5 /** @defgroup HAL_GDC_INTERN Gdc intern
6  * @brief DC-related MIPI command definition.
7  * @{
8  */
9 
10 #ifndef HAL_GDC_INTERN_H__
11 #define HAL_GDC_INTERN_H__
12 
13 /**
14  * @addtogroup HAL_GDC_INTERN_MACRO Defines
15  * @{
16  */
17 /** @defgroup HAL_GDC_INTERN_RW_CMD The DC RW CMD
18  * @{
19  */
20 #define HAL_GDC_MAGIC (0x87452365) /**< DC ID */
21 #define HAL_GDC_DBIB_STALL (1U << 31) /**< Specify MIPI DBI */
22 #define SPI_WRITE (2U) /**< Set to SPI Write CMD */
23 #define SPI_READ (3U) /**< Set to SPI Read CMD */
24 #define SPICMD (1U<<5U) /**< Special as SPI CMD */
25 #define QSPICMD (0U<<5U) /**< Special as QSPI CMD */
26 #define QSPIDATA (1U<<4U) /**< Special as QSPI DATA */
27 #define CMD_OFFSET (8U) /**< offset for command */
28 #define CMD1_DATA1 (SPI_WRITE) /**< Send cmd in 1-wire and data in 1-wire */
29 #define CMD1_DATA4 (SPICMD|QSPIDATA|SPI_WRITE) /**< Send cmd in 1-wire and data in 4-wire */
30 #define CMD4_DATA4 (QSPICMD|QSPIDATA|SPI_WRITE) /**< Send cmd in 4-wire and data in 4-wire */
31 #define CMD1_RDAT1 (SPI_READ) /**< Read cmd in 1-wire and data in 1-wire */
32 /** @} */
33 
34 /** @} */
35 
36 /** @addtogroup HAL_GDC_INTERN_ENUM Enumerations
37  * @{
38  */
39 /**
40  * @brief DC's color mode check definition
41  */
42 typedef enum {
43  HAL_GDC_DBIB_STALL_CHK = 1 << 31, /**< DBIB stall check */
44  HAL_GDC_OPENLDI_CHK = 1U << 30, /**< Openldi check */
45  HAL_GDC_JDIMIP_CHK = 1U << 29, /**< JDIMIP check */
46  HAL_GDC_ARGB4444_CHK = 1U << 22, /**< ARGB444 check */
47  HAL_GDC_RGBA4444_CHK = 1U << 21, /**< RGBA444 check */
48  HAL_GDC_GPI_CHK = 1U << 20, /**< GPI check */
49  HAL_GDC_EXTRCTRL_CHK = 1U << 19, /**< EXTRCTRL check */
50  HAL_GDC_TSC6_CHK = 1U << 18, /**< TSC6 check */
51  HAL_GDC_TSC_CHK = 1U << 17, /**< TSC check */
52  HAL_GDC_LUT8_CHK = 1U << 16, /**< LUT8 check */
53  HAL_GDC_RGBA5551_CHK = 1U << 15, /**< RGBA5551 check */
54  HAL_GDC_ABGR8888_CHK = 1U << 14, /**< ARGB8888 check */
55  HAL_GDC_RGB332_CHK = 1U << 13, /**< RGB332 check */
56  HAL_GDC_RGB565_CHK = 1U << 12, /**< RGB565 check */
57  HAL_GDC_BGRA8888_CHK = 1U << 11, /**< BGRA8888 check */
58  HAL_GDC_L8_CHK = 1U << 10, /**< L8 check */
59  HAL_GDC_L1_CHK = 1U << 9, /**< L1 check */
60  HAL_GDC_L4_CHK = 1U << 8, /**< L4 check */
61  HAL_GDC_YUVV_CHK = 1U << 7, /**< YUVV check */
62  HAL_GDC_RGB24_CHK = 1U << 6, /**< RGB24 check */
63  HAL_GDC_YUY2_CHK = 1U << 5, /**< YUV2 check */
64  HAL_GDC_RGBA8888_CHK = 1U << 4, /**< RGBA8888 check */
65  HAL_GDC_ARGB8888_CHK = 1U << 3, /**< ARGB8888 check */
66  HAL_GDC_V_YUV420_CHK = 1U << 2, /**< V_YUV420 check */
67  HAL_GDC_TLYUV420_CHK = 1U << 1, /**< TLYUV420 check */
68  HAL_GDC_BLOCK4X4_CHK = 1U << 0 /**< BLOCK4X4 check */
70 
71 /**
72  * @brief AXI control definition
73  */
74 typedef enum {
75  HAL_GDC_AXI_16BEAT = 0x0, /**< 16 beat */
76  HAL_GDC_AXI_2BEAT = 0x1, /**< 2beat */
77  HAL_GDC_AXI_4BEAT = 0x2, /**< 4 beat */
78  HAL_GDC_AXI_8BEAT = 0x3, /**< 8 beat */
79  HAL_GDC_AXI_32BEAT = 0x5, /**< 32 beat */
80  HAL_GDC_AXI_64BEAT = 0x6, /**< 64 beat */
81  HAL_GDC_AXI_128BEAT = 0x7, /**< 128 beat */
82  HAL_GDC_AXI_FT_HF = 0x0U << 3, /**< Ignore */
83  HAL_GDC_AXI_FT_2B = 0x1U << 3, /**< Ignore */
84  HAL_GDC_AXI_FT_4B = 0x2U << 3, /**< Ignore */
85  HAL_GDC_AXI_FT_8B = 0x3U << 3 /**< Ignore */
87 
88 /**
89  * @brief MIPI CMD definition
90  */
91 typedef enum {
92  hal_gdc_snapshot = 0xff, /**< Snapshot */
93  hal_gdc_store_base_addr = (1 <<31), /**< Store base addr */
94  hal_gdc_DBI_cmd = (1U<<30), /**< DBI CMD */
95  hal_gdc_wcmd16 = (1U<<28), /**< Write CMD 16bits */
96  hal_gdc_wcmd24 = (1U<<29), /**< Write CMD 24bits */
97  hal_gdc_wcmd32 = (1U<<29)|(1U<<28), /**< Write CMD 32bits */
98  hal_gdc_rcmd16 = (1U<<28), /**< Read CMD 16bits */
99  hal_gdc_rcmd24 = (1U<<29), /**< Read CMD 24its */
100  hal_gdc_rcmd32 = (1U<<29)|(1U<<28), /**< Read CMD 32bits */
101  hal_gdc_mask_qspi = (1U<<27), /**< Force QSPI to be single wire */
102  hal_gdc_DBI_ge = (1U<<27), /**< DBI ge */
103  hal_gdc_DBI_read = (1U<<26), /**< DBI read */
104  hal_gdc_ext_ctrl = (1U<<25), /**< Ext control */
105  hal_gdc_sline_cmd = (1U<<24), /**< Sline CMD */
106  hal_gdc_read_byte = (0U<<30), /**< Read 1Byte */
107  hal_gdc_read_2byte = (1U<<30), /**< Read 2Byte */
108  hal_gdc_read_3byte = (2 <<30), /**< Read 3Byte */
109  hal_gdc_read_4byte = (3 <<30) /**< Read 4Byte */
111 
112 /** @} */
113 
114 #endif
115 
116 /** @} */
117 /** @} */
118 
HAL_GDC_RGBA5551_CHK
@ HAL_GDC_RGBA5551_CHK
Definition: hal_gdc_intern.h:53
HAL_GDC_TSC6_CHK
@ HAL_GDC_TSC6_CHK
Definition: hal_gdc_intern.h:50
HAL_GDC_TSC_CHK
@ HAL_GDC_TSC_CHK
Definition: hal_gdc_intern.h:51
HAL_GDC_GPI_CHK
@ HAL_GDC_GPI_CHK
Definition: hal_gdc_intern.h:48
dc_mipi_cmd_t
dc_mipi_cmd_t
MIPI CMD definition.
Definition: hal_gdc_intern.h:91
HAL_GDC_AXI_FT_4B
@ HAL_GDC_AXI_FT_4B
Definition: hal_gdc_intern.h:84
HAL_GDC_BGRA8888_CHK
@ HAL_GDC_BGRA8888_CHK
Definition: hal_gdc_intern.h:57
HAL_GDC_JDIMIP_CHK
@ HAL_GDC_JDIMIP_CHK
Definition: hal_gdc_intern.h:45
HAL_GDC_AXI_2BEAT
@ HAL_GDC_AXI_2BEAT
Definition: hal_gdc_intern.h:76
hal_gdc_DBI_ge
@ hal_gdc_DBI_ge
Definition: hal_gdc_intern.h:102
HAL_GDC_AXI_4BEAT
@ HAL_GDC_AXI_4BEAT
Definition: hal_gdc_intern.h:77
hal_gdc_read_4byte
@ hal_gdc_read_4byte
Definition: hal_gdc_intern.h:109
HAL_GDC_RGB24_CHK
@ HAL_GDC_RGB24_CHK
Definition: hal_gdc_intern.h:62
hal_gdc_DBI_read
@ hal_gdc_DBI_read
Definition: hal_gdc_intern.h:103
hal_gdc_read_2byte
@ hal_gdc_read_2byte
Definition: hal_gdc_intern.h:107
HAL_GDC_YUY2_CHK
@ HAL_GDC_YUY2_CHK
Definition: hal_gdc_intern.h:63
HAL_GDC_YUVV_CHK
@ HAL_GDC_YUVV_CHK
Definition: hal_gdc_intern.h:61
hal_gdc_wcmd32
@ hal_gdc_wcmd32
Definition: hal_gdc_intern.h:97
HAL_GDC_L1_CHK
@ HAL_GDC_L1_CHK
Definition: hal_gdc_intern.h:59
hal_gdc_rcmd24
@ hal_gdc_rcmd24
Definition: hal_gdc_intern.h:99
HAL_GDC_RGB565_CHK
@ HAL_GDC_RGB565_CHK
Definition: hal_gdc_intern.h:56
hal_gdc_sline_cmd
@ hal_gdc_sline_cmd
Definition: hal_gdc_intern.h:105
HAL_GDC_RGBA8888_CHK
@ HAL_GDC_RGBA8888_CHK
Definition: hal_gdc_intern.h:64
HAL_GDC_ARGB4444_CHK
@ HAL_GDC_ARGB4444_CHK
Definition: hal_gdc_intern.h:46
HAL_GDC_DBIB_STALL_CHK
@ HAL_GDC_DBIB_STALL_CHK
Definition: hal_gdc_intern.h:43
HAL_GDC_EXTRCTRL_CHK
@ HAL_GDC_EXTRCTRL_CHK
Definition: hal_gdc_intern.h:49
HAL_GDC_AXI_32BEAT
@ HAL_GDC_AXI_32BEAT
Definition: hal_gdc_intern.h:79
HAL_GDC_L4_CHK
@ HAL_GDC_L4_CHK
Definition: hal_gdc_intern.h:60
hal_gdc_wcmd16
@ hal_gdc_wcmd16
Definition: hal_gdc_intern.h:95
HAL_GDC_AXI_8BEAT
@ HAL_GDC_AXI_8BEAT
Definition: hal_gdc_intern.h:78
HAL_GDC_AXI_FT_8B
@ HAL_GDC_AXI_FT_8B
Definition: hal_gdc_intern.h:85
HAL_GDC_BLOCK4X4_CHK
@ HAL_GDC_BLOCK4X4_CHK
Definition: hal_gdc_intern.h:68
HAL_GDC_LUT8_CHK
@ HAL_GDC_LUT8_CHK
Definition: hal_gdc_intern.h:52
HAL_GDC_AXI_FT_HF
@ HAL_GDC_AXI_FT_HF
Definition: hal_gdc_intern.h:82
HAL_GDC_OPENLDI_CHK
@ HAL_GDC_OPENLDI_CHK
Definition: hal_gdc_intern.h:44
hal_gdc_read_byte
@ hal_gdc_read_byte
Definition: hal_gdc_intern.h:106
HAL_GDC_ABGR8888_CHK
@ HAL_GDC_ABGR8888_CHK
Definition: hal_gdc_intern.h:54
HAL_GDC_AXI_FT_2B
@ HAL_GDC_AXI_FT_2B
Definition: hal_gdc_intern.h:83
hal_gdc_snapshot
@ hal_gdc_snapshot
Definition: hal_gdc_intern.h:92
hal_gdc_AXI_cfg_t
hal_gdc_AXI_cfg_t
AXI control definition.
Definition: hal_gdc_intern.h:74
hal_gdc_DBI_cmd
@ hal_gdc_DBI_cmd
Definition: hal_gdc_intern.h:94
HAL_GDC_V_YUV420_CHK
@ HAL_GDC_V_YUV420_CHK
Definition: hal_gdc_intern.h:66
HAL_GDC_TLYUV420_CHK
@ HAL_GDC_TLYUV420_CHK
Definition: hal_gdc_intern.h:67
HAL_GDC_RGBA4444_CHK
@ HAL_GDC_RGBA4444_CHK
Definition: hal_gdc_intern.h:47
hal_gdc_wcmd24
@ hal_gdc_wcmd24
Definition: hal_gdc_intern.h:96
hal_gdc_rcmd32
@ hal_gdc_rcmd32
Definition: hal_gdc_intern.h:100
hal_gdc_rcmd16
@ hal_gdc_rcmd16
Definition: hal_gdc_intern.h:98
HAL_GDC_L8_CHK
@ HAL_GDC_L8_CHK
Definition: hal_gdc_intern.h:58
HAL_GDC_AXI_64BEAT
@ HAL_GDC_AXI_64BEAT
Definition: hal_gdc_intern.h:80
hal_gdc_read_3byte
@ hal_gdc_read_3byte
Definition: hal_gdc_intern.h:108
HAL_GDC_AXI_128BEAT
@ HAL_GDC_AXI_128BEAT
Definition: hal_gdc_intern.h:81
HAL_GDC_ARGB8888_CHK
@ HAL_GDC_ARGB8888_CHK
Definition: hal_gdc_intern.h:65
hal_gdc_store_base_addr
@ hal_gdc_store_base_addr
Definition: hal_gdc_intern.h:93
hal_gdc_mask_qspi
@ hal_gdc_mask_qspi
Definition: hal_gdc_intern.h:101
HAL_GDC_RGB332_CHK
@ HAL_GDC_RGB332_CHK
Definition: hal_gdc_intern.h:55
hal_gdc_colormode_check_t
hal_gdc_colormode_check_t
DC's color mode check definition.
Definition: hal_gdc_intern.h:42
hal_gdc_ext_ctrl
@ hal_gdc_ext_ctrl
Definition: hal_gdc_intern.h:104
HAL_GDC_AXI_16BEAT
@ HAL_GDC_AXI_16BEAT
Definition: hal_gdc_intern.h:75