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#define | QSPI_DMA_CRTL_LOW_REGISTER_CFG(src_direction, src_tr_width, dst_tr_width, src_msize, dst_msize, en_gather) |
| Set DMA Control Register. More...
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#define | QSPI_MAX_FIFO_DEPTH LL_QSPI_MAX_FIFO_DEPTH |
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#define | HAL_QSPI_ERROR_NONE ((uint32_t)0x00000000) |
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#define | HAL_QSPI_ERROR_TIMEOUT ((uint32_t)0x00000001) |
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#define | HAL_QSPI_ERROR_TRANSFER ((uint32_t)0x00000002) |
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#define | HAL_QSPI_ERROR_DMA ((uint32_t)0x00000004) |
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#define | HAL_QSPI_ERROR_INVALID_PARAM ((uint32_t)0x00000008) |
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#define | QSPI_CLOCK_MODE_0 (LL_QSPI_SCPOL_LOW | LL_QSPI_SCPHA_1EDGE) |
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#define | QSPI_CLOCK_MODE_1 (LL_QSPI_SCPOL_LOW | LL_QSPI_SCPHA_2EDGE) |
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#define | QSPI_CLOCK_MODE_2 (LL_QSPI_SCPOL_HIGH | LL_QSPI_SCPHA_1EDGE) |
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#define | QSPI_CLOCK_MODE_3 (LL_QSPI_SCPOL_HIGH | LL_QSPI_SCPHA_2EDGE) |
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#define | QSPI_DATA_MODE_SPI LL_QSPI_FRF_SPI |
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#define | QSPI_DATA_MODE_DUALSPI LL_QSPI_FRF_DUALSPI |
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#define | QSPI_DATA_MODE_QUADSPI LL_QSPI_FRF_QUADSPI |
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#define | QSPI_INSTSIZE_00_BITS LL_QSPI_INSTSIZE_0BIT |
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#define | QSPI_INSTSIZE_04_BITS LL_QSPI_INSTSIZE_4BIT |
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#define | QSPI_INSTSIZE_08_BITS LL_QSPI_INSTSIZE_8BIT |
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#define | QSPI_INSTSIZE_16_BITS LL_QSPI_INSTSIZE_16BIT |
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#define | QSPI_ADDRSIZE_00_BITS LL_QSPI_ADDRSIZE_0BIT |
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#define | QSPI_ADDRSIZE_04_BITS LL_QSPI_ADDRSIZE_4BIT |
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#define | QSPI_ADDRSIZE_08_BITS LL_QSPI_ADDRSIZE_8BIT |
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#define | QSPI_ADDRSIZE_12_BITS LL_QSPI_ADDRSIZE_12BIT |
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#define | QSPI_ADDRSIZE_16_BITS LL_QSPI_ADDRSIZE_16BIT |
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#define | QSPI_ADDRSIZE_20_BITS LL_QSPI_ADDRSIZE_20BIT |
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#define | QSPI_ADDRSIZE_24_BITS LL_QSPI_ADDRSIZE_24BIT |
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#define | QSPI_ADDRSIZE_28_BITS LL_QSPI_ADDRSIZE_28BIT |
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#define | QSPI_ADDRSIZE_32_BITS LL_QSPI_ADDRSIZE_32BIT |
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#define | QSPI_DATASIZE_04_BITS LL_QSPI_DATASIZE_4BIT |
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#define | QSPI_DATASIZE_05_BITS LL_QSPI_DATASIZE_5BIT |
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#define | QSPI_DATASIZE_06_BITS LL_QSPI_DATASIZE_6BIT |
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#define | QSPI_DATASIZE_07_BITS LL_QSPI_DATASIZE_7BIT |
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#define | QSPI_DATASIZE_08_BITS LL_QSPI_DATASIZE_8BIT |
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#define | QSPI_DATASIZE_09_BITS LL_QSPI_DATASIZE_9BIT |
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#define | QSPI_DATASIZE_10_BITS LL_QSPI_DATASIZE_10BIT |
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#define | QSPI_DATASIZE_11_BITS LL_QSPI_DATASIZE_11BIT |
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#define | QSPI_DATASIZE_12_BITS LL_QSPI_DATASIZE_12BIT |
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#define | QSPI_DATASIZE_13_BITS LL_QSPI_DATASIZE_13BIT |
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#define | QSPI_DATASIZE_14_BITS LL_QSPI_DATASIZE_14BIT |
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#define | QSPI_DATASIZE_15_BITS LL_QSPI_DATASIZE_15BIT |
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#define | QSPI_DATASIZE_16_BITS LL_QSPI_DATASIZE_16BIT |
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#define | QSPI_DATASIZE_17_BITS LL_QSPI_DATASIZE_17BIT |
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#define | QSPI_DATASIZE_18_BITS LL_QSPI_DATASIZE_18BIT |
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#define | QSPI_DATASIZE_19_BITS LL_QSPI_DATASIZE_19BIT |
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#define | QSPI_DATASIZE_20_BITS LL_QSPI_DATASIZE_20BIT |
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#define | QSPI_DATASIZE_21_BITS LL_QSPI_DATASIZE_21BIT |
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#define | QSPI_DATASIZE_22_BITS LL_QSPI_DATASIZE_22BIT |
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#define | QSPI_DATASIZE_23_BITS LL_QSPI_DATASIZE_23BIT |
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#define | QSPI_DATASIZE_24_BITS LL_QSPI_DATASIZE_24BIT |
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#define | QSPI_DATASIZE_25_BITS LL_QSPI_DATASIZE_25BIT |
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#define | QSPI_DATASIZE_26_BITS LL_QSPI_DATASIZE_26BIT |
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#define | QSPI_DATASIZE_27_BITS LL_QSPI_DATASIZE_27BIT |
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#define | QSPI_DATASIZE_28_BITS LL_QSPI_DATASIZE_28BIT |
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#define | QSPI_DATASIZE_29_BITS LL_QSPI_DATASIZE_29BIT |
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#define | QSPI_DATASIZE_30_BITS LL_QSPI_DATASIZE_30BIT |
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#define | QSPI_DATASIZE_31_BITS LL_QSPI_DATASIZE_31BIT |
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#define | QSPI_DATASIZE_32_BITS LL_QSPI_DATASIZE_32BIT |
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#define | QSPI_INST_ADDR_ALL_IN_SPI LL_QSPI_INST_ADDR_ALL_IN_SPI |
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#define | QSPI_INST_IN_SPI_ADDR_IN_SPIFRF LL_QSPI_INST_IN_SPI_ADDR_IN_SPIFRF |
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#define | QSPI_INST_ADDR_ALL_IN_SPIFRF LL_QSPI_INST_ADDR_ALL_IN_SPIFRF |
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#define | QSPI_FLAG_DCOL LL_QSPI_SR_DCOL |
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#define | QSPI_FLAG_TXE LL_QSPI_SR_TXE |
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#define | QSPI_FLAG_RFF LL_QSPI_SR_RFF |
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#define | QSPI_FLAG_RFNE LL_QSPI_SR_RFNE |
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#define | QSPI_FLAG_TFE LL_QSPI_SR_TFE |
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#define | QSPI_FLAG_TFNF LL_QSPI_SR_TFNF |
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#define | QSPI_FLAG_BUSY LL_QSPI_SR_BUSY |
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#define | QSPI_IT_TXU LL_QSPI_IS_TXU |
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#define | QSPI_IT_XRXO LL_QSPI_IS_XRXO |
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#define | QSPI_IT_MST LL_QSPI_IS_MST |
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#define | QSPI_IT_RXF LL_QSPI_IS_RXF |
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#define | QSPI_IT_RXO LL_QSPI_IS_RXO |
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#define | QSPI_IT_RXU LL_QSPI_IS_RXU |
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#define | QSPI_IT_TXO LL_QSPI_IS_TXO |
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#define | QSPI_IT_TXE LL_QSPI_IS_TXE |
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#define | QSPI_IT_ALL LL_QSPI_IS_ALL |
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#define | HAL_QSPI_TIMEOUT_DEFAULT_VALUE ((uint32_t)5000) |
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#define | QSPI_CONCURRENT_XIP_ENDIAN_MODE_0 LL_QSPI_CONCURRENT_XIP_ENDIAN_MODE_0 |
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#define | QSPI_CONCURRENT_XIP_ENDIAN_MODE_1 LL_QSPI_CONCURRENT_XIP_ENDIAN_MODE_1 |
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#define | QSPI_CONCURRENT_XIP_ENDIAN_MODE_2 LL_QSPI_CONCURRENT_XIP_ENDIAN_MODE_2 |
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#define | QSPI_CONCURRENT_XIP_SLAVE0 LL_QSPI_CONCURRENT_XIP_SLAVE0 |
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#define | QSPI_CONCURRENT_XIP_DFS_BYTE LL_QSPI_CONCURRENT_XIP_DFS_BYTE |
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#define | QSPI_CONCURRENT_XIP_DFS_HALFWORD LL_QSPI_CONCURRENT_XIP_DFS_HALFWORD |
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#define | QSPI_CONCURRENT_XIP_DFS_WORD LL_QSPI_CONCURRENT_XIP_DFS_WORD |
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#define | QSPI_CONCURRENT_XIP_MBL_2 LL_QSPI_CONCURRENT_XIP_MBL_2 |
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#define | QSPI_CONCURRENT_XIP_MBL_4 LL_QSPI_CONCURRENT_XIP_MBL_4 |
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#define | QSPI_CONCURRENT_XIP_MBL_8 LL_QSPI_CONCURRENT_XIP_MBL_8 |
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#define | QSPI_CONCURRENT_XIP_MBL_16 LL_QSPI_CONCURRENT_XIP_MBL_16 |
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#define | QSPI_CONCURRENT_XIP_INSTSIZE_0BIT LL_QSPI_CONCURRENT_XIP_INSTSIZE_0BIT |
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#define | QSPI_CONCURRENT_XIP_INSTSIZE_4BIT LL_QSPI_CONCURRENT_XIP_INSTSIZE_4BIT |
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#define | QSPI_CONCURRENT_XIP_INSTSIZE_8BIT LL_QSPI_CONCURRENT_XIP_INSTSIZE_8BIT |
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#define | QSPI_CONCURRENT_XIP_INSTSIZE_16BIT LL_QSPI_CONCURRENT_XIP_INSTSIZE_16BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_0BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_0BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_4BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_4BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_8BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_8BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_12BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_12BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_16BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_16BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_20BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_20BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_24BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_24BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_28BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_28BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_32BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_32BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_36BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_36BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_40BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_40BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_44BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_44BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_48BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_48BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_52BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_52BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_56BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_56BIT |
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#define | QSPI_CONCURRENT_XIP_ADDRSIZE_60BIT LL_QSPI_CONCURRENT_XIP_ADDRSIZE_60BIT |
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#define | QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPI LL_QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPI |
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#define | QSPI_CONCURRENT_XIP_INST_IN_SPI_ADDR_IN_SPIFRF LL_QSPI_CONCURRENT_XIP_INST_IN_SPI_ADDR_IN_SPIFRF |
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#define | QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPIFRF LL_QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPIFRF |
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#define | QSPI_CONCURRENT_XIP_FRF_RSVD LL_QSPI_CONCURRENT_XIP_FRF_RSVD |
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#define | QSPI_CONCURRENT_XIP_FRF_DUAL_SPI LL_QSPI_CONCURRENT_XIP_FRF_DUAL_SPI |
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#define | QSPI_CONCURRENT_XIP_FRF_QUAD_SPI LL_QSPI_CONCURRENT_XIP_FRF_QUAD_SPI |
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#define | QSPI_CONCURRENT_XIP_FRF_OCTAL_SPI LL_QSPI_CONCURRENT_XIP_FRF_OCTAL_SPI |
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#define | QSPI_CLK_STRETCH_ENABLE LL_QSPI_CLK_STRETCH_ENABLE |
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#define | QSPI_CLK_STRETCH_DISABLE LL_QSPI_CLK_STRETCH_DISABLE |
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#define | QSPI_CONCURRENT_XIP_PREFETCH_ENABLE LL_QSPI_CONCURRENT_XIP_PREFETCH_ENABLE |
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#define | QSPI_CONCURRENT_XIP_PREFETCH_DISABLE LL_QSPI_CONCURRENT_XIP_PREFETCH_DISABLE |
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#define | QSPI_CONCURRENT_XIP_CONT_XFER_ENABLE LL_QSPI_CONCURRENT_XIP_CONT_XFER_ENABLE |
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#define | QSPI_CONCURRENT_XIP_CONT_XFER_DISABLE LL_QSPI_CONCURRENT_XIP_CONT_XFER_DISABLE |
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#define | QSPI_CONCURRENT_XIP_INST_ENABLE LL_QSPI_CONCURRENT_XIP_INST_ENABLE |
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#define | QSPI_CONCURRENT_XIP_INST_DISABLE LL_QSPI_CONCURRENT_XIP_INST_DISABLE |
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#define | QSPI_CONCURRENT_XIP_MODE_BITS_ENABLE LL_QSPI_CONCURRENT_XIP_MODE_BITS_ENABLE |
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#define | QSPI_CONCURRENT_XIP_MODE_BITS_DISABLE LL_QSPI_CONCURRENT_XIP_MODE_BITS_DISABLE |
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#define | QSPI_CONCURRENT_XIP_DFS_HARDCODE_ENABLE LL_QSPI_CONCURRENT_XIP_DFS_HARDCODE_ENABLE |
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#define | QSPI_CONCURRENT_XIP_DFS_HARDCODE_DISABLE LL_QSPI_CONCURRENT_XIP_DFS_HARDCODE_DISABLE |
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#define | QSPI_CONCURRENT_XIP_INST_SENT_EVERY_ACCESS LL_QSPI_CONCURRENT_XIP_INST_SENT_EVERY_ACCESS |
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#define | QSPI_CONCURRENT_XIP_INST_SENT_ONLY_FIRST_ACCESS LL_QSPI_CONCURRENT_XIP_INST_SENT_ONLY_FIRST_ACCESS |
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#define | QSPI_PSRAM_LINKED_BLOCK_DATA_MODE_0 0u |
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#define | QSPI_PSRAM_LINKED_BLOCK_DATA_MODE_1 1u |
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#define | QSPI_PSRAM_LINKED_BLOCK_DATA_SHAPE_RECTANGLE 0u |
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#define | QSPI_PSRAM_LINKED_BLOCK_DATA_SHAPE_NON_RECTANGLE 1u |
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#define | __HAL_QSPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->state = HAL_QSPI_STATE_RESET) |
| Reset QSPI handle states. More...
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#define | __HAL_QSPI_ENABLE(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->QSPI_EN, QSPI_SSI_EN) |
| Enable the specified QSPI peripheral. More...
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#define | __HAL_QSPI_DISABLE(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->QSPI_EN, QSPI_SSI_EN) |
| Disable the specified QSPI peripheral. More...
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#define | __HAL_QSPI_ENABLE_DMATX(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->DMAC, QSPI_DMAC_TDMAE) |
| Enable the QSPI DMA TX Request. More...
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#define | __HAL_QSPI_ENABLE_DMARX(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->DMAC, QSPI_DMAC_RDMAE) |
| Enable the QSPI DMA RX Request. More...
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#define | __HAL_QSPI_DISABLE_DMATX(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->DMAC, QSPI_DMAC_TDMAE) |
| Disable the QSPI DMA TX Request. More...
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#define | __HAL_QSPI_DISABLE_DMARX(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->DMAC, QSPI_DMAC_RDMAE) |
| Disable the QSPI DMA RX Request. More...
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#define | __HAL_QSPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BITS((__HANDLE__)->p_instance->INTMASK, (__INTERRUPT__)) |
| Enable the specified QSPI interrupts. More...
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#define | __HAL_QSPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BITS((__HANDLE__)->p_instance->INTMASK, (__INTERRUPT__)) |
| Disable the specified QSPI interrupts. More...
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#define | __HAL_QSPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_BITS((__HANDLE__)->p_instance->INTSTAT, (__INTERRUPT__)) == (__INTERRUPT__)) |
| Check whether the specified QSPI interrupt source is enabled or not. More...
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#define | __HAL_QSPI_GET_FLAG(__HANDLE__, __FLAG__) ((READ_BITS((__HANDLE__)->p_instance->STAT, (__FLAG__)) != 0) ? SET : RESET) |
| Check whether the specified QSPI flag is set or not. More...
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#define | __HAL_QSPI_CLEAR_FLAG(__HANDLE__, __FLAG__) READ_BITS((__HANDLE__)->p_instance->STAT, (__FLAG__)) |
| Clear the specified QSPI flag. More...
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#define | IS_QSPI_CLOCK_PRESCALER(__PRESCALER__) ((__PRESCALER__) <= 0xFFFF) |
| Check if QSPI Clock Prescaler is valid. More...
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#define | IS_QSPI_FIFO_THRESHOLD(__THR__) (((__THR__) >= 0) && ((__THR__) <= (QSPI_MAX_FIFO_DEPTH - 1))) |
| Check if QSPI FIFO Threshold is valid. More...
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#define | IS_QSPI_CLOCK_MODE(__CLKMODE__) |
| Check if QSPI Clock Mode is valid. More...
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#define | IS_QSPI_RX_SAMPLE_DLY(__DLY__) (((__DLY__) >= 0) && ((__DLY__) <= 7)) |
| Check if QSPI RX Sample Delay Value is valid. More...
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#define | IS_QSPI_INSTRUCTION_SIZE(__INST_SIZE__) |
| Check if QSPI Instruction Size is valid. More...
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#define | IS_QSPI_ADDRESS_SIZE(__ADDR_SIZE__) |
| Check if QSPI Address Size is valid. More...
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#define | IS_QSPI_DUMMY_CYCLES(__DCY__) ((__DCY__) <= 31) |
| Check if QSPI Dummy Cycle is valid. More...
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#define | IS_QSPI_INSTADDR_MODE(__MODE__) |
| Check if QSPI Instruction and Address Mode is valid. More...
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#define | IS_QSPI_DATA_MODE(__MODE__) |
| Check if QSPI Data Mode is valid. More...
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#define | IS_QSPI_SUPPORTED_DATA_SIZE(__SIZE__) |
| Check if QSPI Data Size is supported currently. More...
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#define | IS_QSPI_CONC_XIP_SIOO_MODE(_SIOO_) |
| Check if QSPI.XIP SIOO Mode is valid. More...
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#define | IS_QSPI_CONC_XIP_DFS(_DFS_) |
| Check if QSPI.XIP DFS Value is valid. More...
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#define | IS_QSPI_CONC_XIP_DFS_HC_EN(_HC_EN_) |
| Check if QSPI.XIP DFS_HC Switch Value is valid. More...
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#define | IS_QSPI_CONC_XIP_INST_EN(_INST_EN_) |
| Check if QSPI.XIP inst Switch is valid. More...
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#define | IS_QSPI_CONC_XIP_INST_SIZE(_INST_SIZE_) |
| Check if QSPI.XIP inst size is valid. More...
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#define | IS_QSPI_CONC_XIP_INST(_INST_) ((_INST_) <= 0xFFFF ) |
| Check if QSPI.XIP inst is valid. More...
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#define | IS_QSPI_CONC_XIP_ADDR_SIZE(_ADDR_SIZE_) |
| Check if QSPI.XIP Address Size is valid. More...
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#define | IS_QSPI_CONC_INST_ADDR_XFER_FORMAT(_FORMAT_) |
| Check if QSPI.XIP Addr Xfer format is valid. More...
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#define | IS_QSPI_CONC_XIP_MODE_BITS_EN(_MD_EN_) |
| Check if QSPI.XIP Mode bits Switch is valid. More...
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#define | IS_QSPI_CONC_XIP_MODE_BITS_SIZE(_MD_SIZE_) |
| Check if QSPI.XIP Mode Bits size is valid. More...
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#define | IS_QSPI_CONC_XIP_MODE_BITS(_MD_BITS_) ( (_MD_BITS_) <= 0xFFFF) |
| Check if QSPI.XIP Mode Bits is valid. More...
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#define | IS_QSPI_CONC_XIP_DUMMY_CYCLES(__DCY__) ( (__DCY__) <= 31) |
| Check if QSPI.XIP dummy cycles is valid. More...
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#define | IS_QSPI_CONC_XIP_DATA_FRF(_XIP_FRF_) |
| Check if QSPI.XIP frame format is valid. More...
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#define | IS_QSPI_CONC_XIP_PREFETCH_EN(_PREFETCH_EN_) |
| Check if QSPI.XIP prefetch switch is valid. More...
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#define | IS_QSPI_CONC_XIP_CONT_XFER_EN(_CONT_XFER_EN_) |
| Check if QSPI.XIP cont xfer switch is valid. More...
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#define | IS_QSPI_CONC_XIP_CONT_XFER_TOC(_TOC_) ( (_TOC_) <= 0xFF) |
| Check if QSPI.XIP timeout count of cont xfer is valid. More...
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#define | IS_QSPI_CONC_XIP_ENDIAN_MODE(_MODE_) |
| Check if QSPI.XIP Data endian Mode is valid. More...
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hal_status_t | hal_qspi_init (qspi_handle_t *p_qspi) |
| Initialize the QSPI according to the specified parameters in the qspi_init_t and initialize the associated handle. More...
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hal_status_t | hal_qspi_deinit (qspi_handle_t *p_qspi) |
| De-initialize the QSPI peripheral. More...
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void | hal_qspi_msp_init (qspi_handle_t *p_qspi) |
| Initialize the QSPI MSP. More...
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void | hal_qspi_msp_deinit (qspi_handle_t *p_qspi) |
| De-initialize the QSPI MSP. More...
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hal_status_t | hal_qspi_memorymapped (qspi_handle_t *p_qspi, qspi_memorymapped_t *mmap_cmd, qspi_memorymapped_write_t *mmap_wr_cmd) |
| Configure the Memory Mapped mode. Called after hal_qspi_init(...) More...
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hal_status_t | hal_qspi_memorymapped_active (qspi_handle_t *p_qspi, uint32_t is_sioo_mode) |
| Active the memory mapped mode from Ready state. users must make sure parameters of mmaped mode hava been set correctly. More...
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hal_status_t | hal_qspi_memorymapped_deactive (qspi_handle_t *p_qspi) |
| Deactive the memory mapped mode to Ready state it's recommended to use with hal_qspi_memorymapped_active to switch mode quickly. More...
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hal_memorymapped_status_t | hal_qspi_memorymapped_is_actived (qspi_handle_t *p_qspi) |
| Check whether the memory mapped mode is Actived. More...
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hal_status_t | hal_qspi_memorymapped_update (qspi_handle_t *p_qspi, qspi_memorymapped_set_t *mmap_set, uint32_t count) |
| Used to update memorymapped any parameter quickly. More...
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hal_status_t | hal_qspi_command_transmit (qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout) |
| Transmit an amount of data with the specified instruction and address in blocking mode. More...
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hal_status_t | hal_qspi_command_receive (qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout) |
| Receive an amount of data with the specified instruction, address and dummy cycles in blocking mode. More...
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hal_status_t | hal_qspi_command (qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint32_t timeout) |
| Transmit only instruction in blocking mode. More...
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hal_status_t | hal_qspi_transmit (qspi_handle_t *p_qspi, uint32_t data_mode, uint32_t data_size, uint8_t *p_data, uint32_t data_length, uint32_t timeout) |
| Transmit an amount of data in blocking mode with standard SPI. More...
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hal_status_t | hal_qspi_receive (qspi_handle_t *p_qspi, uint32_t data_mode, uint32_t data_size, uint8_t *p_data, uint32_t length, uint32_t timeout) |
| Receive an amount of data in blocking mode with standard SPI. More...
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hal_status_t | hal_qspi_command_transmit_it (qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint8_t *p_data) |
| Transmit an amount of data with the specified instruction and address in non-blocking mode with Interrupt. More...
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hal_status_t | hal_qspi_command_receive_it (qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint8_t *p_data) |
| Receive an amount of data with the specified instruction, address and dummy cycles in non-blocking mode with Interrupt. More...
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hal_status_t | hal_qspi_command_it (qspi_handle_t *p_qspi, qspi_command_t *p_cmd) |
| Transmit instruction in non-blocking mode with Interrupt. More...
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hal_status_t | hal_qspi_transmit_it (qspi_handle_t *p_qspi, uint32_t data_mode, uint32_t data_size, uint8_t *p_data, uint32_t data_length) |
| Transmit an amount of data in non-blocking mode at standard SPI with Interrupt. More...
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hal_status_t | hal_qspi_receive_it (qspi_handle_t *p_qspi, uint32_t data_mode, uint32_t data_size, uint8_t *p_data, uint32_t length) |
| Receive an amount of data in non-blocking mode at standard SPI with Interrupt. More...
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hal_status_t | hal_qspi_command_transmit_dma (qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint8_t *p_data) |
| Transmit an amount of data with the specified instruction and address in non-blocking mode with DMA . More...
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hal_status_t | hal_qspi_command_receive_dma (qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint8_t *p_data) |
| Receive an amount of data with the specified instruction, address and dummy cycles in non-blocking mode with DMA . More...
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hal_status_t | hal_qspi_command_dma (qspi_handle_t *p_qspi, qspi_command_t *p_cmd) |
| Transmit instruction in non-blocking mode with DMA. More...
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hal_status_t | hal_qspi_transmit_dma (qspi_handle_t *p_qspi, uint32_t data_mode, uint32_t data_size, uint8_t *p_data, uint32_t length) |
| Transmit an amount of data in non-blocking mode at standard SPI with DMA. More...
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hal_status_t | hal_qspi_receive_dma (qspi_handle_t *p_qspi, uint32_t data_mode, uint32_t data_size, uint8_t *p_data, uint32_t length) |
| Receive an amount of data in non-blocking mode at standard SPI with DMA. More...
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hal_status_t | hal_qspi_command_transmit_dma_llp (qspi_handle_t *p_qspi, qspi_command_t *p_cmd, dma_llp_config_t *p_llp_config) |
| Transmit Multi-Block of data with the specified instruction and address in non-blocking mode with DMA Linked List Block. More...
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hal_status_t | hal_qspi_transmit_dma_llp (qspi_handle_t *p_qspi, dma_llp_config_t *p_llp_config, uint32_t data_mode, uint32_t data_length, uint32_t clock_stretch_enable) |
| Transmit Multi-Block of data without instruction and address in non-blocking mode with DMA Linked List Block. More...
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hal_status_t | hal_qspi_command_transmit_dma_gather (qspi_handle_t *p_qspi, qspi_command_t *p_cmd, dma_gather_config_t *p_gather_config, uint8_t *p_data) |
| Transmit an amount of data with the specified instruction and address in non-blocking mode with DMA Gather. More...
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hal_status_t | hal_qspi_command_transmit_dma_llp_gather (qspi_handle_t *p_qspi, qspi_command_t *p_cmd, dma_llp_config_t *p_llp_config, dma_gather_config_t *p_gather_config) |
| Transmit an amount of data with the specified instruction and address in non-blocking mode with DMA LLP. And In Each Block, xfered specified by gather, every data block has the same gather configuration. More...
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hal_status_t | hal_qspi_command_receive_dma_scatter (qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint8_t *p_data, uint32_t sct_interval, uint32_t sct_count) |
| Receive an amount of data with the specified instruction and address in non-blocking mode with DMA Scatter. More...
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hal_status_t | hal_qspi_psram_transmit_dma_llp_limited (qspi_handle_t *p_qspi, qspi_psram_command_t *p_cmd, dma_llp_config_t *p_llp_config) |
| : Used to write PSRAM in high speed mode with dma LLP More...
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hal_status_t | hal_qspi_abort (qspi_handle_t *p_qspi) |
| Abort the current transmission. More...
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hal_status_t | hal_qspi_abort_it (qspi_handle_t *p_qspi) |
| Abort the current transmission (non-blocking function) More...
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void | hal_qspi_irq_handler (qspi_handle_t *p_qspi) |
| Handle QSPI interrupt request. More...
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void | hal_qspi_tx_cplt_callback (qspi_handle_t *p_qspi) |
| Tx Transfer completed callback. More...
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void | hal_qspi_rx_cplt_callback (qspi_handle_t *p_qspi) |
| Rx Transfer completed callback. More...
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void | hal_qspi_error_callback (qspi_handle_t *p_qspi) |
| QSPI error callback. More...
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void | hal_qspi_abort_cplt_callback (qspi_handle_t *p_qspi) |
| QSPI Abort Complete callback. More...
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hal_qspi_state_t | hal_qspi_get_state (qspi_handle_t *p_qspi) |
| Return the QSPI handle state. More...
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uint32_t | hal_qspi_get_error (qspi_handle_t *p_qspi) |
| Return the QSPI error code. More...
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void | hal_qspi_set_tcsu (qspi_handle_t *p_qspi, uint32_t delay) |
| Set the QSPI cs setup & release time value. More...
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void | hal_qspi_set_timeout (qspi_handle_t *p_qspi, uint32_t timeout) |
| Set the QSPI internal process timeout value. More...
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hal_status_t | hal_qspi_suspend_reg (qspi_handle_t *p_qspi) |
| Suspend some registers related to QSPI configuration before sleep. More...
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hal_status_t | hal_qspi_resume_reg (qspi_handle_t *p_qspi) |
| Restore some registers related to QSPI configuration after sleep. This function must be used in conjunction with the hal_qspi_suspend_reg(). More...
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Header file containing functions prototypes of QSPI HAL library.
- Author
- BLE Driver Team
- Attention
- #####Copyright (c) 2019 GOODIX All rights reserved.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. Neither the name of GOODIX nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Definition in file gr55xx_hal_qspi.h.