QSPI driver functions

Functions

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_qspi_transmit_data8 (xqspi_regs_t *XQSPIx, uint8_t tx_data)
 Write 8-bit in the data register. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_qspi_transmit_data16 (xqspi_regs_t *XQSPIx, uint16_t tx_data)
 Write 16-bit in the data register. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_qspi_transmit_data32 (xqspi_regs_t *XQSPIx, uint32_t tx_data)
 Write 32-bit in the data register. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint8_t ll_xqspi_qspi_receive_data8 (xqspi_regs_t *XQSPIx)
 Read 8 bits in the data register. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint16_t ll_xqspi_qspi_receive_data16 (xqspi_regs_t *XQSPIx)
 Read 16 bits in the data register. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_qspi_receive_data32 (xqspi_regs_t *XQSPIx)
 Read 32 bits in the data register. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_tft (xqspi_regs_t *XQSPIx, uint32_t threshold)
 Set TX FIFO threshold level. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_tft (xqspi_regs_t *XQSPIx)
 Get TX FIFO threshold level. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_rft (xqspi_regs_t *XQSPIx, uint32_t threshold)
 Set RX FIFO threshold level. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_rft (xqspi_regs_t *XQSPIx)
 Get RX FIFO threshold level. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_dummy (xqspi_regs_t *XQSPIx)
 Enable dummy cycles. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_dummy (xqspi_regs_t *XQSPIx)
 Disable dummy cycles. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_dummy (xqspi_regs_t *XQSPIx)
 Check if dummy cycles is enabled. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_dma (xqspi_regs_t *XQSPIx)
 Enable DMA mode. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_dma (xqspi_regs_t *XQSPIx)
 Disable DMA mode. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_dma (xqspi_regs_t *XQSPIx)
 Check if DMA mode is enabled. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_cpol (xqspi_regs_t *XQSPIx, uint32_t cpol)
 Set clock polarity. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_cpol (xqspi_regs_t *XQSPIx)
 Get clock polarity. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_cpha (xqspi_regs_t *XQSPIx, uint32_t cpha)
 Set clock phase. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_cpha (xqspi_regs_t *XQSPIx)
 Get clock phase. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_data_order (xqspi_regs_t *XQSPIx, uint32_t order)
 Set serial data order. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_data_order (xqspi_regs_t *XQSPIx)
 Get serial data order. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_contxfer (xqspi_regs_t *XQSPIx)
 Enable continuous transfer mode. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_contxfer (xqspi_regs_t *XQSPIx)
 Disable continuous transfer mode. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_contxfer (xqspi_regs_t *XQSPIx)
 Check if continuous transfer mode is enabled. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_contxfer_extend (xqspi_regs_t *XQSPIx)
 Enable continuous transfer extend mode. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_contxfer_extend (xqspi_regs_t *XQSPIx)
 Disable continuous transfer extend mode. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_contxfer_extend (xqspi_regs_t *XQSPIx)
 Check if continuous transfer extend mode is enabled. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_datasize (xqspi_regs_t *XQSPIx, uint32_t szie)
 Set data size. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_datasize (xqspi_regs_t *XQSPIx)
 Get data size. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_inhibt_rx (xqspi_regs_t *XQSPIx)
 Enable inhibt data input to RX FIFO. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_inhibt_rx (xqspi_regs_t *XQSPIx)
 Disable inhibt data input to RX FIFO. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_inhibt_rx (xqspi_regs_t *XQSPIx)
 Check if inhibt data input to RX FIFO is enabled. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_inhibt_tx (xqspi_regs_t *XQSPIx)
 Enable inhibt data output to TX FIFO. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_inhibt_tx (xqspi_regs_t *XQSPIx)
 Disable inhibt data output to TX FIFO. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_inhibt_tx (xqspi_regs_t *XQSPIx)
 Check if inhibt data input to TX FIFO is enabled. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_frf (xqspi_regs_t *XQSPIx, uint32_t format)
 Set frame format. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_frf (xqspi_regs_t *XQSPIx)
 Get frame format. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_status (xqspi_regs_t *XQSPIx)
 Get QSPI status. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_active_qspi_flag (xqspi_regs_t *XQSPIx, uint32_t flag)
 Check active flag. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_ssout (xqspi_regs_t *XQSPIx, uint32_t ssout)
 Enable slave select output. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_ssout (xqspi_regs_t *XQSPIx, uint32_t ssout)
 Disable slave select output. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_sspol (xqspi_regs_t *XQSPIx, uint32_t sspol)
 Set slave select output polarity. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_sspol (xqspi_regs_t *XQSPIx)
 Get slave select output polarity. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_tx_fifo_level (xqspi_regs_t *XQSPIx)
 Get FIFO Transmission Level. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_rx_fifo_level (xqspi_regs_t *XQSPIx)
 Get FIFO reception Level. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_it (xqspi_regs_t *XQSPIx, uint32_t mask)
 Enable interrupt. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_it (xqspi_regs_t *XQSPIx, uint32_t mask)
 Disable interrupt. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_it (xqspi_regs_t *XQSPIx, uint32_t mask)
 Check if interrupt is enabled. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_it_flag (xqspi_regs_t *XQSPIx)
 Get XQSPI interrupt flags. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_qspi_it_flag (xqspi_regs_t *XQSPIx, uint32_t flag)
 Check interrupt flag. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_clear_qspi_flag (xqspi_regs_t *XQSPIx, uint32_t flag)
 Clear interrupt flag. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_wait (xqspi_regs_t *XQSPIx, uint32_t wait)
 Set master inter-transfer delay. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_wait (xqspi_regs_t *XQSPIx)
 Get master inter-transfer delay. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi (xqspi_regs_t *XQSPIx)
 Enable QSPI. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi (xqspi_regs_t *XQSPIx)
 Disable QSPI. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi (xqspi_regs_t *XQSPIx)
 Check if QSPI is enabled. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_flash_write (xqspi_regs_t *XQSPIx, uint32_t bits)
 Set QSPI Flash write bits. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_flash_write (xqspi_regs_t *XQSPIx)
 Get QSPI Flash write bits. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_present_bypass (xqspi_regs_t *XQSPIx, uint32_t bypass)
 Set QSPI Present Bypass. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_present_bypass (xqspi_regs_t *XQSPIx)
 Get QSPI Present Bypass. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_cs_idle_valid (xqspi_regs_t *XQSPIx)
 CS keeps valid while not reading. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_cs_idle_invalid (xqspi_regs_t *XQSPIx)
 CS keeps invalid while not reading. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_1st_prefecth (xqspi_regs_t *XQSPIx)
 enable 1st prefecth function More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_1st_prefecth (xqspi_regs_t *XQSPIx)
 disable 1st prefecth function More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_key_pulse (xqspi_regs_t *XQSPIx)
 enable key_pulse to interrupt rd_data state More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_key_pulse (xqspi_regs_t *XQSPIx)
 disable key_pulse to interrupt rd_data state More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_exflash_power (void)
 Enable exflash power. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_exflash_power (void)
 Disable exflash power. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enable_exflash_power (void)
 Check if exflash power is enabled. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_speed (uint32_t speed)
 Set XQSPI serial clock. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_speed (void)
 Get XQSPI serial clock. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_cache_retention (void)
 Enable cache data retention. More...
 
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_cache_retention (void)
 Disable cache data retention. More...
 
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enable_cache_retention (void)
 Check if tag memory retention is enabled. More...
 

Detailed Description

Function Documentation

◆ ll_xqspi_clear_qspi_flag()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_clear_qspi_flag ( xqspi_regs_t *  XQSPIx,
uint32_t  flag 
)

Clear interrupt flag.

Note
Clearing interrupt flag is done by writting INTCLR register

Register|BitsName --------|-------- INTCLR |INT_CLR

Parameters
XQSPIxXQSPI instance
flagThis parameter can be one of the following values:
Return values
None

Definition at line 2219 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_1st_prefecth()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_1st_prefecth ( xqspi_regs_t *  XQSPIx)

disable 1st prefecth function

Note
This bit should not be changed when XIP is ongoing.

Register |BitsName -------------------|-------- CS_IDLE_UNVLD_EN |XQSPI_QSPI_1ST_PRETETCH_DIS

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 2431 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_cache_retention()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_cache_retention ( void  )

Disable cache data retention.

Note
This bit should not be changed when XIP is ongoing.

Register|BitsName --------|-------- PWR_RET01 | XF_TAG_RET

Return values
None

Definition at line 2576 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_exflash_power()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_exflash_power ( void  )

Disable exflash power.

Note
This bit should not be changed when XIP is ongoing.

Register|BitsName --------|-------- PWR_RET01 | EFLASH_PAD_EN

Return values
None

Definition at line 2493 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_inhibt_rx()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_inhibt_rx ( xqspi_regs_t *  XQSPIx)

Disable inhibt data input to RX FIFO.

Register|BitsName --------|-------- AUX_CTRL|INHIBITDIN

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1851 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_inhibt_tx()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_inhibt_tx ( xqspi_regs_t *  XQSPIx)

Disable inhibt data output to TX FIFO.

Register|BitsName --------|-------- AUX_CTRL|INHIBITDOUT

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1896 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_key_pulse()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_key_pulse ( xqspi_regs_t *  XQSPIx)

disable key_pulse to interrupt rd_data state

Note
This bit should not be changed when XIP is ongoing.

Register |BitsName -------------------|-------- CS_IDLE_UNVLD_EN |XQSPI_QSPI_KEY_PULSE_DIS

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 2463 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_qspi()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi ( xqspi_regs_t *  XQSPIx)

Disable QSPI.

Register|BitsName --------|-------- SPIEN |EN

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 2281 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_qspi_contxfer()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_contxfer ( xqspi_regs_t *  XQSPIx)

Disable continuous transfer mode.

Register|BitsName --------|-------- CTRL |CONTXFER

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1713 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_qspi_contxfer_extend()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_contxfer_extend ( xqspi_regs_t *  XQSPIx)

Disable continuous transfer extend mode.

Register|BitsName --------|-------- AUX_CTRL|CONTXFERX

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1758 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_qspi_dma()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_dma ( xqspi_regs_t *  XQSPIx)

Disable DMA mode.

Register|BitsName --------|-------- CTRL |DMA

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1561 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_qspi_dummy()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_dummy ( xqspi_regs_t *  XQSPIx)

Disable dummy cycles.

Register|BitsName --------|-------- CTRL |MWAITEN

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1516 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_qspi_it()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_it ( xqspi_regs_t *  XQSPIx,
uint32_t  mask 
)

Disable interrupt.

Note
This bit controls the generation of an interrupt when an event occurs.

Register|BitsName --------|-------- INTEN |INT_EN

Parameters
XQSPIxXQSPI instance
maskThis parameter can be one of the following values:
Return values
None

Definition at line 2131 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_disable_qspi_ssout()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_qspi_ssout ( xqspi_regs_t *  XQSPIx,
uint32_t  ssout 
)

Disable slave select output.

Register|BitsName --------|-------- SLAVE_SEL|OUT3 OUT2 OUT1 OUT0

Parameters
XQSPIxXQSPI instance
ssoutThis parameter can between: 0 ~ 0xFF
Return values
None

Definition at line 2026 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_1st_prefecth()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_1st_prefecth ( xqspi_regs_t *  XQSPIx)

enable 1st prefecth function

Note
This bit should not be changed when XIP is ongoing.

Register |BitsName -------------------|-------- CS_IDLE_UNVLD_EN |XQSPI_QSPI_1ST_PRETETCH_DIS

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 2415 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_cache_retention()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_cache_retention ( void  )

Enable cache data retention.

Note
This bit should not be changed when XIP is ongoing..

Register|BitsName --------|-------- PWR_RET01 | XF_TAG_RET

Return values
None

Definition at line 2561 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_exflash_power()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_exflash_power ( void  )

Enable exflash power.

Note
This bit should not be changed when XIP is ongoing.

Register|BitsName --------|-------- PWR_RET01 | EFLASH_PAD_EN

Return values
None

Definition at line 2478 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_inhibt_rx()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_inhibt_rx ( xqspi_regs_t *  XQSPIx)

Enable inhibt data input to RX FIFO.

Register|BitsName --------|-------- AUX_CTRL|INHIBITDIN

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1836 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_inhibt_tx()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_inhibt_tx ( xqspi_regs_t *  XQSPIx)

Enable inhibt data output to TX FIFO.

Register|BitsName --------|-------- AUX_CTRL|INHIBITDOUT

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1881 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_key_pulse()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_key_pulse ( xqspi_regs_t *  XQSPIx)

enable key_pulse to interrupt rd_data state

Note
This bit should not be changed when XIP is ongoing.

Register |BitsName -------------------|-------- CS_IDLE_UNVLD_EN |XQSPI_QSPI_KEY_PULSE_DIS

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 2447 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_qspi()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi ( xqspi_regs_t *  XQSPIx)

Enable QSPI.

Note
This bit should not be enable when XIP is ongoing.

Register|BitsName --------|-------- SPIEN |EN

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 2266 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_qspi_contxfer()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_contxfer ( xqspi_regs_t *  XQSPIx)

Enable continuous transfer mode.

Register|BitsName --------|-------- CTRL |CONTXFER

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1698 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_qspi_contxfer_extend()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_contxfer_extend ( xqspi_regs_t *  XQSPIx)

Enable continuous transfer extend mode.

Register|BitsName --------|-------- AUX_CTRL|CONTXFERX

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1743 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_qspi_dma()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_dma ( xqspi_regs_t *  XQSPIx)

Enable DMA mode.

Register|BitsName --------|-------- CTRL |DMA

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1546 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_qspi_dummy()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_dummy ( xqspi_regs_t *  XQSPIx)

Enable dummy cycles.

Register|BitsName --------|-------- CTRL |MWAITEN

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 1501 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_qspi_it()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_it ( xqspi_regs_t *  XQSPIx,
uint32_t  mask 
)

Enable interrupt.

Note
This bit controls the generation of an interrupt when an event occurs.

Register|BitsName --------|-------- INTEN |INT_EN

Parameters
XQSPIxXQSPI instance
maskThis parameter can be one of the following values:
Return values
None

Definition at line 2109 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_enable_qspi_ssout()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_qspi_ssout ( xqspi_regs_t *  XQSPIx,
uint32_t  ssout 
)

Enable slave select output.

Register|BitsName --------|-------- SLAVE_SEL|OUT3 OUT2 OUT1 OUT0

Parameters
XQSPIxXQSPI instance
ssoutThis parameter can between: 0 ~ 0xFF
Return values
None

Definition at line 2010 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_flash_write()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_flash_write ( xqspi_regs_t *  XQSPIx)

Get QSPI Flash write bits.

Register|BitsName --------|-------- FLASH_WRITE |FLASH_WRITE

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 2331 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_it_flag()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_it_flag ( xqspi_regs_t *  XQSPIx)

Get XQSPI interrupt flags.

Register|BitsName --------|-------- INTSTAT |INT_STAT

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one or combination of the following values:

Definition at line 2172 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_present_bypass()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_present_bypass ( xqspi_regs_t *  XQSPIx)

Get QSPI Present Bypass.

Register|BitsName --------|-------- BYPASS |BYPASS

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 2367 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_qspi_cpha()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_cpha ( xqspi_regs_t *  XQSPIx)

Get clock phase.

Register|BitsName --------|-------- CTRL |CPHA

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 1648 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_qspi_cpol()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_cpol ( xqspi_regs_t *  XQSPIx)

Get clock polarity.

Register|BitsName --------|-------- CTRL |CPOL

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 1612 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_qspi_data_order()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_data_order ( xqspi_regs_t *  XQSPIx)

Get serial data order.

Register|BitsName --------|-------- CTRL |MSB1ST

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 1683 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_qspi_datasize()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_datasize ( xqspi_regs_t *  XQSPIx)

Get data size.

Register|BitsName --------|-------- AUX_CTRL|BITSIZE

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 1821 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_qspi_frf()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_frf ( xqspi_regs_t *  XQSPIx)

Get frame format.

Register|BitsName --------|-------- AUX_CTRL|QMODE

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one even value:

Definition at line 1949 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_qspi_rft()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_rft ( xqspi_regs_t *  XQSPIx)

Get RX FIFO threshold level.

Note
FIFO maximum depth is 16 units.

Register|BitsName --------|-------- CTRL |RXWMARK

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 1486 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_qspi_rx_fifo_level()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_rx_fifo_level ( xqspi_regs_t *  XQSPIx)

Get FIFO reception Level.

Register|BitsName --------|-------- RX_FIFO_LVL | RXFIFOLVL

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can between: 0 ~ 16

Definition at line 2087 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_qspi_speed()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_speed ( void  )

Get XQSPI serial clock.

Register|BitsName --------|-------- PWR_RET01 | XF_SCK_CLK_SEL

Return values
ReturnedValue can be one of the following values:

Definition at line 2546 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_qspi_sspol()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_sspol ( xqspi_regs_t *  XQSPIx)

Get slave select output polarity.

Register|BitsName --------|-------- SLAVE_SEL_POL|POL3 POL2 POL1 POL0

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can between: 0 ~ 0xFF

Definition at line 2057 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_qspi_status()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_status ( xqspi_regs_t *  XQSPIx)

Get QSPI status.

Register|BitsName --------|-------- STATUS | RXFULL RXWMARK RXEMPTY TXFULL TXWMARK TXEMPTY XFERIP

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one or combination of the following values:

Definition at line 1971 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_qspi_tft()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_tft ( xqspi_regs_t *  XQSPIx)

Get TX FIFO threshold level.

Note
FIFO maximum depth is 16 units.

Register|BitsName --------|-------- CTRL |TXWMARK

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can be one of the following values:

Definition at line 1445 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_qspi_tx_fifo_level()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_tx_fifo_level ( xqspi_regs_t *  XQSPIx)

Get FIFO Transmission Level.

Register|BitsName --------|-------- TX_FIFO_LVL | TXFIFOLVL

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can between: 0 ~ 16

Definition at line 2072 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_get_qspi_wait()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_qspi_wait ( xqspi_regs_t *  XQSPIx)

Get master inter-transfer delay.

Register|BitsName --------|-------- MSTR_IT_DELAY | MWAIT

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue can between: 0 ~ 255

Definition at line 2250 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_active_qspi_flag()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_active_qspi_flag ( xqspi_regs_t *  XQSPIx,
uint32_t  flag 
)

Check active flag.

Register|BitsName --------|-------- STATUS | RXFULL RXWMARK RXEMPTY TXFULL TXWMARK TXEMPTY XFERIP

Parameters
XQSPIxXQSPI instance
flagThis parameter can be one of the following values:
Return values
Stateof bit (1 or 0).

Definition at line 1994 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_enable_cache_retention()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enable_cache_retention ( void  )

Check if tag memory retention is enabled.

Register|BitsName --------|-------- PWR_RET01 | XF_TAG_RET

Return values
Stateof bit (1 or 0).

Definition at line 2590 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_enable_exflash_power()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enable_exflash_power ( void  )

Check if exflash power is enabled.

Register|BitsName --------|-------- PWR_RET01 | EFLASH_PAD_EN

Return values
Stateof bit (1 or 0).

Definition at line 2507 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_enabled_inhibt_rx()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_inhibt_rx ( xqspi_regs_t *  XQSPIx)

Check if inhibt data input to RX FIFO is enabled.

Register|BitsName --------|-------- AUX_CTRL|INHIBITDIN

Parameters
XQSPIxXQSPI instance
Return values
Stateof bit (1 or 0).

Definition at line 1866 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_enabled_inhibt_tx()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_inhibt_tx ( xqspi_regs_t *  XQSPIx)

Check if inhibt data input to TX FIFO is enabled.

Register|BitsName --------|-------- AUX_CTRL|INHIBITDOUT

Parameters
XQSPIxXQSPI instance
Return values
Stateof bit (1 or 0).

Definition at line 1911 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_enabled_qspi()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi ( xqspi_regs_t *  XQSPIx)

Check if QSPI is enabled.

Register|BitsName --------|-------- SPIEN |EN

Parameters
XQSPIxXQSPI instance
Return values
Stateof bit (1 or 0).

Definition at line 2296 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_enabled_qspi_contxfer()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_contxfer ( xqspi_regs_t *  XQSPIx)

Check if continuous transfer mode is enabled.

Register|BitsName --------|-------- CTRL |CONTXFER

Parameters
XQSPIxXQSPI instance
Return values
Stateof bit (1 or 0).

Definition at line 1728 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_enabled_qspi_contxfer_extend()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_contxfer_extend ( xqspi_regs_t *  XQSPIx)

Check if continuous transfer extend mode is enabled.

Register|BitsName --------|-------- AUX_CTRL|CONTXFERX

Parameters
XQSPIxXQSPI instance
Return values
Stateof bit (1 or 0).

Definition at line 1773 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_enabled_qspi_dma()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_dma ( xqspi_regs_t *  XQSPIx)

Check if DMA mode is enabled.

Register|BitsName --------|-------- CTRL |DMA

Parameters
XQSPIxXQSPI instance
Return values
Stateof bit (1 or 0).

Definition at line 1576 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_enabled_qspi_dummy()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_dummy ( xqspi_regs_t *  XQSPIx)

Check if dummy cycles is enabled.

Register|BitsName --------|-------- CTRL |MWAITEN

Parameters
XQSPIxXQSPI instance
Return values
Stateof bit (1 or 0).

Definition at line 1531 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_enabled_qspi_it()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_qspi_it ( xqspi_regs_t *  XQSPIx,
uint32_t  mask 
)

Check if interrupt is enabled.

Register|BitsName --------|-------- INTEN |INT_EN

Parameters
XQSPIxXQSPI instance
maskThis parameter can be one of the following values:
Return values
Stateof bit (1 or 0).

Definition at line 2152 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_is_qspi_it_flag()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_qspi_it_flag ( xqspi_regs_t *  XQSPIx,
uint32_t  flag 
)

Check interrupt flag.

Register|BitsName --------|-------- INTSTAT | XFER_DPULSE INTSTAT | RX_FPULSE INTSTAT | RX_WPULSE INTSTAT | TX_WPULSE INTSTAT | TX_EPULSE

Parameters
XQSPIxXQSPI instance
flagThis parameter can be one of the following values:
Return values
Stateof bit (1 or 0).

Definition at line 2197 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_qspi_receive_data16()

SECTION_RAM_CODE __STATIC_INLINE uint16_t ll_xqspi_qspi_receive_data16 ( xqspi_regs_t *  XQSPIx)

Read 16 bits in the data register.

Register|BitsName --------|-------- RX_DATA | DATA

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue between: 0x00 ~ 0xFFFF

Definition at line 1389 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_qspi_receive_data32()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_qspi_receive_data32 ( xqspi_regs_t *  XQSPIx)

Read 32 bits in the data register.

Register|BitsName --------|-------- RX_DATA | DATA

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue between: 0x00 ~ 0xFFFFFFFF

Definition at line 1404 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_qspi_receive_data8()

SECTION_RAM_CODE __STATIC_INLINE uint8_t ll_xqspi_qspi_receive_data8 ( xqspi_regs_t *  XQSPIx)

Read 8 bits in the data register.

Register|BitsName --------|-------- RX_DATA | DATA

Parameters
XQSPIxXQSPI instance
Return values
ReturnedValue between: 0x00 ~ 0xFF

Definition at line 1374 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_qspi_transmit_data16()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_qspi_transmit_data16 ( xqspi_regs_t *  XQSPIx,
uint16_t  tx_data 
)

Write 16-bit in the data register.

Register|BitsName --------|-------- TX_DATA | DATA

Parameters
XQSPIxXQSPI instance
tx_dataThis parameter can between: 0x00 ~ 0xFFFF
Return values
None

Definition at line 1343 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_qspi_transmit_data32()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_qspi_transmit_data32 ( xqspi_regs_t *  XQSPIx,
uint32_t  tx_data 
)

Write 32-bit in the data register.

Register|BitsName --------|-------- TX_DATA | DATA

Parameters
XQSPIxXQSPI instance
tx_dataThis parameter can between: 0x00 ~ 0xFFFFFFFF
Return values
None

Definition at line 1359 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_qspi_transmit_data8()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_qspi_transmit_data8 ( xqspi_regs_t *  XQSPIx,
uint8_t  tx_data 
)

Write 8-bit in the data register.

Register|BitsName --------|-------- TX_DATA | DATA

Parameters
XQSPIxXQSPI instance
tx_dataThis parameter can between: 0x00 ~ 0xFF
Return values
None

Definition at line 1327 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_cs_idle_invalid()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_cs_idle_invalid ( xqspi_regs_t *  XQSPIx)

CS keeps invalid while not reading.

Note
This bit should not be changed when XIP is ongoing.

Register |BitsName -------------------|-------- CS_IDLE_UNVLD_EN |XQSPI_QSPI_CS_IDLE_UNVLD_EN

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 2399 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_cs_idle_valid()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_cs_idle_valid ( xqspi_regs_t *  XQSPIx)

CS keeps valid while not reading.

Note
This bit should not be changed when XIP is ongoing.

Register |BitsName -------------------|-------- CS_IDLE_UNVLD_EN |XQSPI_QSPI_CS_IDLE_UNVLD_EN

Parameters
XQSPIxXQSPI instance
Return values
None

Definition at line 2383 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_flash_write()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_flash_write ( xqspi_regs_t *  XQSPIx,
uint32_t  bits 
)

Set QSPI Flash write bits.

Register|BitsName --------|-------- FLASH_WRITE |FLASH_WRITE

Parameters
XQSPIxXQSPI instance
bitsThis parameter can be one of the following values:
Return values
None

Definition at line 2314 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_present_bypass()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_present_bypass ( xqspi_regs_t *  XQSPIx,
uint32_t  bypass 
)

Set QSPI Present Bypass.

Register|BitsName --------|-------- BYPASS |BYPASS

Parameters
XQSPIxXQSPI instance
bypassThis parameter can be one of the following values:
Return values
None

Definition at line 2350 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_qspi_cpha()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_cpha ( xqspi_regs_t *  XQSPIx,
uint32_t  cpha 
)

Set clock phase.

Note
This bit should not be changed when communication is ongoing.

Register|BitsName --------|-------- CTRL |CPHA

Parameters
XQSPIxXQSPI instance
cphaThis parameter can be one of the following values:
Return values
None

Definition at line 1631 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_qspi_cpol()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_cpol ( xqspi_regs_t *  XQSPIx,
uint32_t  cpol 
)

Set clock polarity.

Note
This bit should not be changed when communication is ongoing.

Register|BitsName --------|-------- CTRL |CPOL

Parameters
XQSPIxXQSPI instance
cpolThis parameter can be one of the following values:
Return values
None

Definition at line 1595 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_qspi_data_order()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_data_order ( xqspi_regs_t *  XQSPIx,
uint32_t  order 
)

Set serial data order.

Register|BitsName --------|-------- CTRL |MSB1ST

Parameters
XQSPIxXQSPI instance
orderThis parameter can be one of the following values:
Return values
None

Definition at line 1666 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_qspi_datasize()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_datasize ( xqspi_regs_t *  XQSPIx,
uint32_t  szie 
)

Set data size.

Note
These bits should not be changed when communication is ongoing.

Register|BitsName --------|-------- AUX_CTRL|BITSIZE

Parameters
XQSPIxXQSPI instance
szieThis parameter can be one of the following values:
Return values
None

Definition at line 1798 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_qspi_frf()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_frf ( xqspi_regs_t *  XQSPIx,
uint32_t  format 
)

Set frame format.

Note
These bits should not be changed when communication is ongoing.

Register|BitsName --------|-------- AUX_CTRL|QMODE

Parameters
XQSPIxXQSPI instance
formatThis parameter can be one of the following values:
Return values
None

Definition at line 1931 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_qspi_rft()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_rft ( xqspi_regs_t *  XQSPIx,
uint32_t  threshold 
)

Set RX FIFO threshold level.

Note
FIFO maximum depth is 16 units.

Register|BitsName --------|-------- CTRL |RXWMARK

Parameters
XQSPIxXQSPI instance
thresholdThis parameter can be one of the following values:
Return values
None

Definition at line 1466 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_qspi_speed()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_speed ( uint32_t  speed)

Set XQSPI serial clock.

Register|BitsName --------|-------- PWR_RET01 | XF_SCK_CLK_SEL

Parameters
speedThis parameter can be one of the following values:
Return values
None

Definition at line 2527 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_qspi_sspol()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_sspol ( xqspi_regs_t *  XQSPIx,
uint32_t  sspol 
)

Set slave select output polarity.

Register|BitsName --------|-------- SLAVE_SEL_POL|POL3 POL2 POL1 POL0

Parameters
XQSPIxXQSPI instance
sspolThis parameter can between: 0 ~ 0xFF
Return values
None

Definition at line 2042 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_qspi_tft()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_tft ( xqspi_regs_t *  XQSPIx,
uint32_t  threshold 
)

Set TX FIFO threshold level.

Note
FIFO maximum depth is 16 units.

Register|BitsName --------|-------- CTRL |TXWMARK

Parameters
XQSPIxXQSPI instance
thresholdThis parameter can be one of the following values:
Return values
None

Definition at line 1425 of file gr55xx_ll_xqspi.h.

◆ ll_xqspi_set_qspi_wait()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_qspi_wait ( xqspi_regs_t *  XQSPIx,
uint32_t  wait 
)

Set master inter-transfer delay.

Register|BitsName --------|-------- MSTR_IT_DELAY | MWAIT

Parameters
XQSPIxXQSPI instance
waitThis parameter can between: 0 ~ 255
Return values
None

Definition at line 2235 of file gr55xx_ll_xqspi.h.