Header file containing functions prototypes of QSPI LL library. More...
#include "gr55xx.h"
Go to the source code of this file.
Classes | |
struct | _ll_qspi_init_t |
QSPI init structures definition. More... | |
struct | _ll_qspi_memorymapped_read_init_t |
struct | _ll_qspi_memorymapped_write_init_t |
struct | _ll_qspi_memorymapped_init_t |
Macros | |
#define | LL_QSPI_MAX_FIFO_DEPTH (32u) |
#define | LL_QSPI0_REG_RX_FIFO_DEPTH (16u) |
#define | LL_QSPI0_REG_TX_FIFO_DEPTH (16u) |
#define | LL_QSPI0_XIP_RX_FIFO_DEPTH (32u) |
#define | LL_QSPI0_XIP_TX_FIFO_DEPTH (16u) |
#define | LL_QSPI1_REG_RX_FIFO_DEPTH (32u) |
#define | LL_QSPI1_REG_TX_FIFO_DEPTH (32u) |
#define | LL_QSPI1_XIP_RX_FIFO_DEPTH (32u) |
#define | LL_QSPI1_XIP_TX_FIFO_DEPTH (32u) |
#define | LL_QSPI2_REG_RX_FIFO_DEPTH (16u) |
#define | LL_QSPI2_REG_TX_FIFO_DEPTH (32u) |
#define | LL_QSPI2_XIP_RX_FIFO_DEPTH (16u) |
#define | LL_QSPI2_XIP_TX_FIFO_DEPTH (16u) |
#define | LL_QSPI_SR_DCOL QSPI_STAT_DCOL |
#define | LL_QSPI_SR_TXE QSPI_STAT_TXE |
#define | LL_QSPI_SR_RFF QSPI_STAT_RFF |
#define | LL_QSPI_SR_RFNE QSPI_STAT_RFNE |
#define | LL_QSPI_SR_TFE QSPI_STAT_TFE |
#define | LL_QSPI_SR_TFNF QSPI_STAT_TFNF |
#define | LL_QSPI_SR_BUSY QSPI_STAT_BUSY |
#define | LL_QSPI_IM_SPITE QSPI_INTMASK_SPITEIM |
#define | LL_QSPI_IM_TXU QSPI_INTMASK_TXUIM |
#define | LL_QSPI_IM_XRXO QSPI_INTMASK_XRXOIM |
#define | LL_QSPI_IM_MST QSPI_INTMASK_MSTIM |
#define | LL_QSPI_IM_RXF QSPI_INTMASK_RXFIM |
#define | LL_QSPI_IM_RXO QSPI_INTMASK_RXOIM |
#define | LL_QSPI_IM_RXU QSPI_INTMASK_RXUIM |
#define | LL_QSPI_IM_TXO QSPI_INTMASK_TXOIM |
#define | LL_QSPI_IM_TXE QSPI_INTMASK_TXEIM |
#define | LL_QSPI_IM_ALL |
#define | LL_QSPI_IS_SPITE QSPI_INTMASK_SPITEIS |
#define | LL_QSPI_IS_TXU QSPI_INTMASK_TXUIS |
#define | LL_QSPI_IS_XRXO QSPI_INTSTAT_XRXOIS |
#define | LL_QSPI_IS_MST QSPI_INTSTAT_MSTIS |
#define | LL_QSPI_IS_RXF QSPI_INTSTAT_RXFIS |
#define | LL_QSPI_IS_RXO QSPI_INTSTAT_RXOIS |
#define | LL_QSPI_IS_RXU QSPI_INTSTAT_RXUIS |
#define | LL_QSPI_IS_TXO QSPI_INTSTAT_TXOIS |
#define | LL_QSPI_IS_TXE QSPI_INTSTAT_TXEIS |
#define | LL_QSPI_IS_ALL |
#define | LL_QSPI_RIS_SPITE QSPI_RAW_INTMASK_SPITEIR |
#define | LL_QSPI_RIS_TXU QSPI_RAW_INTMASK_TXUIIR |
#define | LL_QSPI_RIS_XRXO QSPI_RAW_INTSTAT_XRXOIR |
#define | LL_QSPI_RIS_MST QSPI_RAW_INTSTAT_MSTIR |
#define | LL_QSPI_RIS_RXF QSPI_RAW_INTSTAT_RXFIR |
#define | LL_QSPI_RIS_RXO QSPI_RAW_INTSTAT_RXOIR |
#define | LL_QSPI_RIS_RXU QSPI_RAW_INTSTAT_RXUIR |
#define | LL_QSPI_RIS_TXO QSPI_RAW_INTSTAT_TXOIR |
#define | LL_QSPI_RIS_TXE QSPI_RAW_INTSTAT_TXEIR |
#define | LL_QSPI_RIS_ALL |
#define | LL_QSPI_FRF_SPI 0x00000000UL |
#define | LL_QSPI_FRF_DUALSPI (1UL << QSPI_CTRL0_SPIFRF_Pos) |
#define | LL_QSPI_FRF_QUADSPI (2UL << QSPI_CTRL0_SPIFRF_Pos) |
#define | LL_QSPI_DATASIZE_4BIT (3UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_5BIT (4UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_6BIT (5UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_7BIT (6UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_8BIT (7UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_9BIT (8UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_10BIT (9UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_11BIT (10UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_12BIT (11UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_13BIT (12UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_14BIT (13UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_15BIT (14UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_16BIT (15UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_17BIT (16UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_18BIT (17UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_19BIT (18UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_20BIT (19UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_21BIT (20UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_22BIT (21UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_23BIT (22UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_24BIT (23UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_25BIT (24UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_26BIT (25UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_27BIT (26UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_28BIT (27UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_29BIT (28UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_30BIT (29UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_31BIT (30UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_DATASIZE_32BIT (31UL << QSPI_CTRL0_DFS32_Pos) |
#define | LL_QSPI_MW_CMDSIZE_1BIT 0x00000000UL |
#define | LL_QSPI_MW_CMDSIZE_2BIT (1UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_3BIT (2UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_4BIT (3UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_5BIT (4UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_6BIT (5UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_7BIT (6UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_8BIT (7UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_9BIT (8UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_10BIT (9UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_11BIT (10UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_12BIT (11UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_13BIT (12UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_14BIT (13UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_15BIT (14UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_MW_CMDSIZE_16BIT (15UL << QSPI_CTRL0_CFS_Pos) |
#define | LL_QSPI_NORMAL_MODE 0x00000000UL |
#define | LL_QSPI_TEST_MODE (1UL << QSPI_CTRL0_SRL_Pos) |
#define | LL_QSPI_SLAVE_OUTDIS 0x00000000UL |
#define | LL_QSPI_SLAVE_OUTEN (1UL << QSPI_CTRL0_SLVOE_Pos) |
#define | LL_QSPI_FULL_DUPLEX 0x00000000UL |
#define | LL_QSPI_SIMPLEX_TX (1UL << QSPI_CTRL0_TMOD_Pos) |
#define | LL_QSPI_SIMPLEX_RX (2UL << QSPI_CTRL0_TMOD_Pos) |
#define | LL_QSPI_READ_EEPROM (3UL << QSPI_CTRL0_TMOD_Pos) |
#define | LL_QSPI_SCPHA_1EDGE 0x00000000UL |
#define | LL_QSPI_SCPHA_2EDGE (1UL << QSPI_CTRL0_SCPHA_Pos) |
#define | LL_QSPI_SCPOL_LOW 0x00000000UL |
#define | LL_QSPI_SCPOL_HIGH (1UL << QSPI_CTRL0_SCPOL_Pos) |
#define | LL_QSPI_PROTOCOL_MOTOROLA 0x00000000UL |
#define | LL_QSPI_PROTOCOL_TI (1UL << QSPI_CTRL0_FRF_Pos) |
#define | LL_QSPI_PROTOCOL_MICROWIRE (2UL << QSPI_CTRL0_FRF_Pos) |
#define | LL_QSPI_MICROWIRE_HANDSHAKE_DIS 0x00000000UL |
#define | LL_QSPI_MICROWIRE_HANDSHAKE_EN (1UL << QSPI_MWC_MHS_Pos) |
#define | LL_QSPI_MICROWIRE_RX 0x00000000UL |
#define | LL_QSPI_MICROWIRE_TX (1UL << QSPI_MWC_MDD_Pos) |
#define | LL_QSPI_MICROWIRE_NON_SEQUENTIAL 0x00000000UL |
#define | LL_QSPI_MICROWIRE_SEQUENTIAL (1UL << QSPI_MWC_MWMOD_Pos) |
#define | LL_QSPI_SLAVE1 QSPI_SE_SLAVE1 |
#define | LL_QSPI_SLAVE0 QSPI_SE_SLAVE0 |
#define | LL_QSPI_DMA_TX_DIS 0x00000000UL |
#define | LL_QSPI_DMA_TX_EN QSPI_DMAC_TDMAE |
#define | LL_QSPI_DMA_RX_DIS 0x00000000UL |
#define | LL_QSPI_DMA_RX_EN QSPI_DMAC_RDMAE |
#define | LL_QSPI_INSTSIZE_0BIT 0x00000000UL |
#define | LL_QSPI_INSTSIZE_4BIT (1UL << QSPI_SCTRL0_INSTL_Pos) |
#define | LL_QSPI_INSTSIZE_8BIT (2UL << QSPI_SCTRL0_INSTL_Pos) |
#define | LL_QSPI_INSTSIZE_16BIT (3UL << QSPI_SCTRL0_INSTL_Pos) |
#define | LL_QSPI_ADDRSIZE_0BIT 0x00000000UL |
#define | LL_QSPI_ADDRSIZE_4BIT (1UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_8BIT (2UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_12BIT (3UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_16BIT (4UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_20BIT (5UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_24BIT (6UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_28BIT (7UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_32BIT (8UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_36BIT (9UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_40BIT (10UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_44BIT (11UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_48BIT (12UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_52BIT (13UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_56BIT (14UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_ADDRSIZE_60BIT (15UL << QSPI_SCTRL0_ADDRL_Pos) |
#define | LL_QSPI_RX_SAMPLE_POSITIVE_EDGE (0U) |
#define | LL_QSPI_RX_SAMPLE_NEGATIVE_EDGE (1U) |
#define | LL_QSPI_INST_ADDR_ALL_IN_SPI 0x00000000UL |
#define | LL_QSPI_INST_IN_SPI_ADDR_IN_SPIFRF (1UL << QSPI_SCTRL0_TRANSTYPE_Pos) |
#define | LL_QSPI_INST_ADDR_ALL_IN_SPIFRF (2UL << QSPI_SCTRL0_TRANSTYPE_Pos) |
#define | LL_QSPI_CONCURRENT_XIP_ENDIAN_MODE_0 0u /* Default endian order from AHB */ |
#define | LL_QSPI_CONCURRENT_XIP_ENDIAN_MODE_1 1u /* Re-order the read data as [23:16], [31:24], [7:0], [15:8] */ |
#define | LL_QSPI_CONCURRENT_XIP_ENDIAN_MODE_2 2u /* Re-order the read data as [7:0], [15:8], [23:16], [31:24] */ |
#define | LL_QSPI_CONCURRENT_XIP_SLAVE0 QSPI_XIP_SLAVE0_EN |
#define | LL_QSPI_CONCURRENT_XIP_DFS_BYTE LL_QSPI_DATASIZE_8BIT |
#define | LL_QSPI_CONCURRENT_XIP_DFS_HALFWORD LL_QSPI_DATASIZE_16BIT |
#define | LL_QSPI_CONCURRENT_XIP_DFS_WORD LL_QSPI_DATASIZE_32BIT |
#define | LL_QSPI_CONCURRENT_XIP_MBL_2 0x0 /* mode bits length equals to 2 bit */ |
#define | LL_QSPI_CONCURRENT_XIP_MBL_4 0x1 /* mode bits length equals to 4 bit */ |
#define | LL_QSPI_CONCURRENT_XIP_MBL_8 0x2 /* mode bits length equals to 8 bit */ |
#define | LL_QSPI_CONCURRENT_XIP_MBL_16 0x3 /* mode bits length equals to 16 bit */ |
#define | LL_QSPI_CONCURRENT_XIP_INSTSIZE_0BIT 0x0 /* no instruction */ |
#define | LL_QSPI_CONCURRENT_XIP_INSTSIZE_4BIT 0x1 /* instruction size equals 4bits */ |
#define | LL_QSPI_CONCURRENT_XIP_INSTSIZE_8BIT 0x2 /* instruction size equals 8bits */ |
#define | LL_QSPI_CONCURRENT_XIP_INSTSIZE_16BIT 0x3 /* instruction size equals 16bits */ |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_0BIT 0x0 |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_4BIT 0x1 |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_8BIT 0x2 |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_12BIT 0x3 |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_16BIT 0x4 |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_20BIT 0x5 |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_24BIT 0x6 |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_28BIT 0x7 |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_32BIT 0x8 |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_36BIT 0x9 |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_40BIT 0xA |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_44BIT 0xB |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_48BIT 0xC |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_52BIT 0xD |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_56BIT 0xE |
#define | LL_QSPI_CONCURRENT_XIP_ADDRSIZE_60BIT 0xF |
#define | LL_QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPI 0x0 |
#define | LL_QSPI_CONCURRENT_XIP_INST_IN_SPI_ADDR_IN_SPIFRF 0x1 |
#define | LL_QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPIFRF 0x2 |
#define | LL_QSPI_CONCURRENT_XIP_FRF_RSVD 0x0 |
#define | LL_QSPI_CONCURRENT_XIP_FRF_DUAL_SPI 0x1 |
#define | LL_QSPI_CONCURRENT_XIP_FRF_QUAD_SPI 0x2 |
#define | LL_QSPI_CONCURRENT_XIP_FRF_OCTAL_SPI 0x3 |
#define | LL_QSPI_CLK_STRETCH_ENABLE 1u |
#define | LL_QSPI_CLK_STRETCH_DISABLE 0u |
#define | LL_QSPI_CONCURRENT_XIP_PREFETCH_ENABLE 1u |
#define | LL_QSPI_CONCURRENT_XIP_PREFETCH_DISABLE 0u |
#define | LL_QSPI_CONCURRENT_XIP_CONT_XFER_ENABLE 1u |
#define | LL_QSPI_CONCURRENT_XIP_CONT_XFER_DISABLE 0u |
#define | LL_QSPI_CONCURRENT_XIP_INST_ENABLE 1u |
#define | LL_QSPI_CONCURRENT_XIP_INST_DISABLE 0u |
#define | LL_QSPI_CONCURRENT_XIP_MODE_BITS_ENABLE 1u |
#define | LL_QSPI_CONCURRENT_XIP_MODE_BITS_DISABLE 0u |
#define | LL_QSPI_CONCURRENT_XIP_DFS_HARDCODE_ENABLE 1u |
#define | LL_QSPI_CONCURRENT_XIP_DFS_HARDCODE_DISABLE 0u |
#define | LL_QSPI_CONCURRENT_XIP_INST_SENT_EVERY_ACCESS 0u |
#define | LL_QSPI_CONCURRENT_XIP_INST_SENT_ONLY_FIRST_ACCESS 1u |
#define | LL_QSPI_DEFAULT_CONFIG |
LL QSPI InitStrcut default configuartion. More... | |
#define | LL_CONC_QSPI_DEFAULT_CONFIG |
#define | LL_SPI_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG(__instance__->__REG__, (__VALUE__)) |
Write a value in SPI register. More... | |
#define | LL_SPI_ReadReg(__instance__, __REG__) READ_REG(__instance__->__REG__) |
Read a value in SPI register. More... | |
#define | ll_qspi_set_xfer_size ll_qspi_set_receive_size |
Typedefs | |
typedef struct _ll_qspi_init_t | ll_qspi_init_t |
QSPI init structures definition. More... | |
typedef struct _ll_qspi_memorymapped_read_init_t | ll_qspi_memorymapped_read_init_t |
typedef struct _ll_qspi_memorymapped_write_init_t | ll_qspi_memorymapped_write_init_t |
typedef struct _ll_qspi_memorymapped_init_t | ll_qspi_memorymapped_init_t |
Enumerations | |
enum | ll_qspi_memorymapped_mode_e { LL_QSPI_MEMORYMAPPED_MODE_READ_ONLY = 0, LL_QSPI_MEMORYMAPPED_MODE_READ_WRITE = 1 } |
Functions | |
__STATIC_INLINE void | ll_qspi_enable_ss_toggle (qspi_regs_t *QSPIx) |
Enable slave select toggle. More... | |
__STATIC_INLINE void | ll_qspi_disable_ss_toggle (qspi_regs_t *QSPIx) |
Disable slave select toggle. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_enabled_ss_toggle (qspi_regs_t *QSPIx) |
Check if slave select toggle is enabled. More... | |
__STATIC_INLINE void | ll_qspi_set_frame_format (qspi_regs_t *QSPIx, uint32_t frf) |
Set data frame format for transmitting/receiving the data. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_frame_format (qspi_regs_t *QSPIx) |
Get data frame format for transmitting/receiving the data. More... | |
__STATIC_INLINE void | ll_qspi_set_data_size (qspi_regs_t *QSPIx, uint32_t size) |
Set frame data size. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_data_size (qspi_regs_t *QSPIx) |
Get frame data size. More... | |
__STATIC_INLINE void | ll_qspi_set_control_frame_size (qspi_regs_t *QSPIx, uint32_t size) |
Set the length of the control word for the Microwire frame format. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_control_frame_size (qspi_regs_t *QSPIx) |
Get the length of the control word for the Microwire frame format. More... | |
__STATIC_INLINE void | ll_qspi_enable_test_mode (qspi_regs_t *QSPIx) |
Enable SPI test mode. More... | |
__STATIC_INLINE void | ll_qspi_disable_test_mode (qspi_regs_t *QSPIx) |
Disable SPI test mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_enabled_test_mode (qspi_regs_t *QSPIx) |
Check if SPI test mode is enabled. More... | |
__STATIC_INLINE void | ll_qspi_enable_slave_out (qspi_regs_t *QSPIx) |
Enable slave output. More... | |
__STATIC_INLINE void | ll_qspi_disable_salve_out (qspi_regs_t *QSPIx) |
Disable slave output. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_enabled_slave_out (qspi_regs_t *QSPIx) |
Check if slave output is enabled. More... | |
__STATIC_INLINE void | ll_qspi_set_transfer_direction (qspi_regs_t *QSPIx, uint32_t transfer_direction) |
Set transfer direction mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_transfer_direction (qspi_regs_t *QSPIx) |
Get transfer direction mode. More... | |
__STATIC_INLINE void | ll_qspi_set_clock_polarity (qspi_regs_t *QSPIx, uint32_t clock_polarity) |
Set clock polarity. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_clock_polarity (qspi_regs_t *QSPIx) |
Get clock polarity. More... | |
__STATIC_INLINE void | ll_qspi_set_clock_phase (qspi_regs_t *QSPIx, uint32_t clock_phase) |
Set clock phase. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_clock_phase (qspi_regs_t *QSPIx) |
Get clock phase. More... | |
__STATIC_INLINE void | ll_qspi_set_standard (qspi_regs_t *QSPIx, uint32_t standard) |
Set serial protocol used. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_standard (qspi_regs_t *QSPIx) |
Get serial protocol used. More... | |
__STATIC_INLINE void | ll_qspi_set_receive_size (qspi_regs_t *QSPIx, uint32_t size) |
Set the number of data frames to be continuously received. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_receive_size (qspi_regs_t *QSPIx) |
Get the number of data frames to be continuously received. More... | |
__STATIC_INLINE void | ll_qspi_enable (qspi_regs_t *QSPIx) |
Enable SPI peripheral. More... | |
__STATIC_INLINE void | ll_qspi_disable (qspi_regs_t *QSPIx) |
Disable SPI peripheral. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_enabled (qspi_regs_t *QSPIx) |
Check if SPI peripheral is enabled. More... | |
__STATIC_INLINE void | ll_qspi_enable_micro_handshake (qspi_regs_t *QSPIx) |
Enable Handshake in Microwire mode. More... | |
__STATIC_INLINE void | ll_qspi_disable_micro_handshake (qspi_regs_t *QSPIx) |
Disable Handshake in Microwire mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_enabled_micro_handshake (qspi_regs_t *QSPIx) |
Check if Handshake in Microwire mode is enabled. More... | |
__STATIC_INLINE void | ll_qspi_set_micro_transfer_direction (qspi_regs_t *QSPIx, uint32_t transfer_direction) |
Set transfer direction mode in Microwire mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_micro_transfer_direction (qspi_regs_t *QSPIx) |
Get transfer direction mode in Microwire mode. More... | |
__STATIC_INLINE void | ll_qspi_set_micro_transfer_mode (qspi_regs_t *QSPIx, uint32_t transfer_mode) |
Set transfer mode in Microwire mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_micro_transfer_mode (qspi_regs_t *QSPIx) |
Get transfer mode in Microwire mode. More... | |
__STATIC_INLINE void | ll_qspi_enable_ss (qspi_regs_t *QSPIx, uint32_t ss) |
Enable slave select. More... | |
__STATIC_INLINE void | ll_qspi_disable_ss (qspi_regs_t *QSPIx, uint32_t ss) |
Disable slave select. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_enabled_ss (qspi_regs_t *QSPIx, uint32_t ss) |
Check if slave select is enabled. More... | |
__STATIC_INLINE void | ll_qspi_set_baud_rate_prescaler (qspi_regs_t *QSPIx, uint32_t baud_rate) |
Set baud rate prescaler. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_baud_rate_prescaler (qspi_regs_t *QSPIx) |
Get baud rate prescaler. More... | |
__STATIC_INLINE void | ll_qspi_set_tx_start_fifo_threshold (qspi_regs_t *QSPIx, uint32_t threshold) |
Set threshold of TX transfer start. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_tx_start_fifo_threshold (qspi_regs_t *QSPIx) |
Get threshold of TX transfer start. More... | |
__STATIC_INLINE void | ll_qspi_set_tx_fifo_threshold (qspi_regs_t *QSPIx, uint32_t threshold) |
Set threshold of TXFIFO that triggers an TXE event. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_tx_fifo_threshold (qspi_regs_t *QSPIx) |
Get threshold of TXFIFO that triggers an TXE event. More... | |
__STATIC_INLINE void | ll_qspi_set_rx_fifo_threshold (qspi_regs_t *QSPIx, uint32_t threshold) |
Set threshold of RXFIFO that triggers an RXNE event. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_rx_fifo_threshold (qspi_regs_t *QSPIx) |
Get threshold of RXFIFO that triggers an RXNE event. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_tx_fifo_level (qspi_regs_t *QSPIx) |
Get FIFO Transmission Level. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_rx_fifo_level (qspi_regs_t *QSPIx) |
Get FIFO reception Level. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_id_code (qspi_regs_t *QSPIx) |
Get ID code. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_version (qspi_regs_t *QSPIx) |
Get IP version. More... | |
__STATIC_INLINE void | ll_qspi_enable_it (qspi_regs_t *QSPIx, uint32_t mask) |
Enable interrupt. More... | |
__STATIC_INLINE void | ll_qspi_disable_it (qspi_regs_t *QSPIx, uint32_t mask) |
Disable interrupt. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_enabled_it (qspi_regs_t *QSPIx, uint32_t mask) |
Check if interrupt is enabled. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_status (qspi_regs_t *QSPIx) |
Get SPI status. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_active_flag (qspi_regs_t *QSPIx, uint32_t flag) |
Check active flag. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_it_flag (qspi_regs_t *QSPIx) |
Get SPI interrupt flags. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_it_flag (qspi_regs_t *QSPIx, uint32_t flag) |
Check interrupt flag. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_raw_if_flag (qspi_regs_t *QSPIx) |
Get SPI raw interrupt flags. More... | |
__STATIC_INLINE void | ll_qspi_clear_flag_txo (qspi_regs_t *QSPIx) |
Clear transmit FIFO overflow error flag. More... | |
__STATIC_INLINE void | ll_qspi_clear_flag_rxo (qspi_regs_t *QSPIx) |
Clear receive FIFO overflow error flag. More... | |
__STATIC_INLINE void | ll_qspi_clear_flag_rxu (qspi_regs_t *QSPIx) |
Clear receive FIFO underflow error flag. More... | |
__STATIC_INLINE void | ll_qspi_clear_flag_mst (qspi_regs_t *QSPIx) |
Clear multi-master error flag. More... | |
__STATIC_INLINE void | ll_qspi_clear_flag_xrxo (qspi_regs_t *QSPIx) |
Clear XIP receive FIFO overflow flag. More... | |
__STATIC_INLINE void | ll_qspi_clear_flag_all (qspi_regs_t *QSPIx) |
Clear all error(txo,rxu,rxo,mst) flag. More... | |
__STATIC_INLINE void | ll_qspi_enable_dma_req_tx (qspi_regs_t *QSPIx) |
Enable DMA Tx. More... | |
__STATIC_INLINE void | ll_qspi_disable_dma_req_tx (qspi_regs_t *QSPIx) |
Disable DMA Tx. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_enabled_dma_req_tx (qspi_regs_t *QSPIx) |
Check if DMA Tx is enabled. More... | |
__STATIC_INLINE void | ll_qspi_enable_dma_req_rx (qspi_regs_t *QSPIx) |
Enable DMA Rx. More... | |
__STATIC_INLINE void | ll_qspi_disable_dma_req_rx (qspi_regs_t *QSPIx) |
Disable DMA Rx. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_enabled_dma_req_rx (qspi_regs_t *QSPIx) |
Check if DMA Rx is enabled. More... | |
__STATIC_INLINE void | ll_qspi_set_dma_tx_fifo_threshold (qspi_regs_t *QSPIx, uint32_t threshold) |
Set threshold of TXFIFO that triggers an DMA Tx request event. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_dma_tx_fifo_threshold (qspi_regs_t *QSPIx) |
Get threshold of TXFIFO that triggers an DMA Tx request event. More... | |
__STATIC_INLINE void | ll_qspi_set_dma_rx_fifo_threshold (qspi_regs_t *QSPIx, uint32_t threshold) |
Set threshold of RXFIFO that triggers an DMA Rx request event. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_dma_rx_fifo_threshold (qspi_regs_t *QSPIx) |
Get threshold of RXFIFO that triggers an DMA Rx request event. More... | |
__STATIC_INLINE void | ll_qspi_transmit_data8 (qspi_regs_t *QSPIx, uint8_t tx_data) |
Write 8-Bits in the data register. More... | |
__STATIC_INLINE void | ll_qspi_transmit_data16 (qspi_regs_t *QSPIx, uint16_t tx_data) |
Write 16-Bits in the data register. More... | |
__STATIC_INLINE void | ll_qspi_transmit_data32 (qspi_regs_t *QSPIx, uint32_t tx_data) |
Write 32-Bits in the data register. More... | |
__STATIC_INLINE uint8_t | ll_qspi_receive_data8 (qspi_regs_t *QSPIx) |
Read 8-Bits in the data register. More... | |
__STATIC_INLINE uint16_t | ll_qspi_receive_data16 (qspi_regs_t *QSPIx) |
Read 16-Bits in the data register. More... | |
__STATIC_INLINE uint32_t | ll_qspi_receive_data32 (qspi_regs_t *QSPIx) |
Read 32-Bits in the data register. More... | |
__STATIC_INLINE void | ll_qspi_set_rx_sample_edge (qspi_regs_t *QSPIx, uint32_t edge) |
Set the RX sample edge. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_rx_sample_edge (qspi_regs_t *QSPIx) |
Get the RX sample edge. More... | |
__STATIC_INLINE void | ll_qspi_set_rx_sample_delay (qspi_regs_t *QSPIx, uint32_t delay) |
Set Rx sample delay. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_rx_sample_delay (qspi_regs_t *QSPIx) |
Get Rx sample delay. More... | |
__STATIC_INLINE void | ll_qspi_enable_clk_stretch (qspi_regs_t *QSPIx) |
Enable the clock stretch feature for Enhanced SPI. More... | |
__STATIC_INLINE void | ll_qspi_disable_clk_stretch (qspi_regs_t *QSPIx) |
Disable the clock stretch feature for Enhanced SPI. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_enabled_clk_stretch (qspi_regs_t *QSPIx) |
Check if the clock stretch feature is enabled or not for Enhanced SPI. More... | |
__STATIC_INLINE void | ll_qspi_set_wait_cycles (qspi_regs_t *QSPIx, uint32_t wait_cycles) |
Set number of wait cycles in Dual/Quad SPI mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_wait_cycles (qspi_regs_t *QSPIx) |
Get number of wait cycles in Dual/Quad SPI mode. More... | |
__STATIC_INLINE void | ll_qspi_set_instruction_size (qspi_regs_t *QSPIx, uint32_t size) |
Set Dual/Quad SPI mode instruction length in bits. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_instruction_size (qspi_regs_t *QSPIx) |
Get Dual/Quad SPI mode instruction length in bits. More... | |
__STATIC_INLINE void | ll_qspi_set_address_size (qspi_regs_t *QSPIx, uint32_t size) |
Set Dual/Quad SPI mode address length in bits. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_address_size (qspi_regs_t *QSPIx) |
Get Dual/Quad SPI mode address length in bits. More... | |
__STATIC_INLINE void | ll_qspi_set_add_inst_transfer_format (qspi_regs_t *QSPIx, uint32_t format) |
Set Dual/Quad SPI mode address and instruction transfer format. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_addr_inst_transfer_format (qspi_regs_t *QSPIx) |
Get Dual/Quad SPI mode address and instruction transfer format. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_enable_xip_mode_bits (qspi_regs_t *QSPIx) |
Enable the mode bits phase for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_disable_xip_mode_bits (qspi_regs_t *QSPIx) |
Disable the mode bits phase for concurrent xip mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_is_enabled_xip_mode_bits (qspi_regs_t *QSPIx) |
Check if the mode bits phase is enabled or not for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_mode_bits_length (qspi_regs_t *QSPIx, uint32_t mbl) |
Set the length of mode bits phase for concurrent xip mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_mode_bits_length (qspi_regs_t *QSPIx) |
Get the length of mode bits phase for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_mode_bits_data (qspi_regs_t *QSPIx, uint32_t mode) |
set the mode phase (sent after address phase) value in xip mode More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_mode_bits_data (qspi_regs_t *QSPIx) |
get the mode phase (sent after address phase) value in xip mode More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_incr_inst (qspi_regs_t *QSPIx, uint32_t inst) |
set the ahb-incr transfer instruction in xip mode More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_incr_inst (qspi_regs_t *QSPIx) |
get the ahb-incr transfer instruction in xip mode More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_wrap_inst (qspi_regs_t *QSPIx, uint32_t inst) |
set the ahb-wrap transfer instruction in xip mode More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_wrap_inst (qspi_regs_t *QSPIx) |
get the ahb-wrap transfer instruction in xip mode More... | |
__STATIC_INLINE void | ll_qspi_concurrent_enable_xip_ss (qspi_regs_t *QSPIx, uint32_t ss) |
Enable the slave in xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_disable_xip_ss (qspi_regs_t *QSPIx, uint32_t ss) |
Disable the slave in xip mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_is_enabled_xip_ss (qspi_regs_t *QSPIx, uint32_t ss) |
Check if the slave is enabled or not for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_toc (qspi_regs_t *QSPIx, uint32_t xtoc) |
Set time out count for continuous transfer for xip mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_toc (qspi_regs_t *QSPIx) |
Get time out count for continuous transfer for xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_enable_xip_prefetch (qspi_regs_t *QSPIx) |
Enable the pre-fetch feature for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_disable_xip_prefetch (qspi_regs_t *QSPIx) |
Disable the pre-fetch feature for concurrent xip mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_is_enabled_xip_prefetch (qspi_regs_t *QSPIx) |
check if the pre-fetch feature is enabled or not for concurrent xip mode More... | |
__STATIC_INLINE void | ll_qspi_concurrent_enable_xip_continuous_xfer (qspi_regs_t *QSPIx) |
Enable the continuous transfer feature for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_disable_xip_continuous_xfer (qspi_regs_t *QSPIx) |
Disable the continuous transfer feature for concurrent xip mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_is_enabled_xip_continuous_xfer (qspi_regs_t *QSPIx) |
Check if the continuous transfer feature is enabled or not for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_enable_xip_instruction (qspi_regs_t *QSPIx) |
Enable the instruction phase for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_disable_xip_instruction (qspi_regs_t *QSPIx) |
Disable the instruction phase for concurrent xip mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_is_enabled_xip_instruction (qspi_regs_t *QSPIx) |
Check if the instruction phase is enabled or not for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_instruction_size (qspi_regs_t *QSPIx, uint32_t inst_size) |
Set the instruction size for concurrent xip mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_instruction_size (qspi_regs_t *QSPIx) |
Get the instruction size for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_enable_xip_dfs_hardcode (qspi_regs_t *QSPIx) |
Enable the hardcoded DFS feature for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_disable_xip_dfs_hardcode (qspi_regs_t *QSPIx) |
Disable the hardcoded DFS feature for concurrent xip mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_is_enabled_xip_dfs_hardcode (qspi_regs_t *QSPIx) |
Check if the hardcoded DFS feature is enabled or not for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_wait_cycles (qspi_regs_t *QSPIx, uint32_t wait_cycles) |
Set the wait(also called dummy) cycles for concurrent xip mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_wait_cycles (qspi_regs_t *QSPIx) |
Get the wait(also called dummy) cycles for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_address_size (qspi_regs_t *QSPIx, uint32_t addr_size) |
Set the address size for concurrent xip mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_address_size (qspi_regs_t *QSPIx) |
Get the address size for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_inst_addr_transfer_format (qspi_regs_t *QSPIx, uint32_t format) |
Set the transfer format of inst & address for concurrent xip mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_addr_inst_transfer_format (qspi_regs_t *QSPIx) |
Get the transfer format of inst & address for concurrent xip mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_frame_format (qspi_regs_t *QSPIx, uint32_t format) |
Set the QSPI frame format for concurrent xip mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_frame_format (qspi_regs_t *QSPIx) |
Get the QSPI frame format for concurrent xip mode. More... | |
void | ll_qspi_enable_xip (qspi_regs_t *QSPIx) |
Enable qspi xip mode. More... | |
void | ll_qspi_disable_xip (qspi_regs_t *QSPIx) |
Disable qspi xip mode. More... | |
uint32_t | ll_qspi_is_enabled_xip (qspi_regs_t *QSPIx) |
Check if qspi xip mode is enabled. More... | |
__STATIC_INLINE void | ll_qspi_set_xip_endian_mode (qspi_regs_t *QSPIx, uint32_t mode) |
Set xip's endian mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_xip_endian_mode (qspi_regs_t *QSPIx) |
Get xip's endian mode. More... | |
__STATIC_INLINE void | ll_qspi_enable_dws (qspi_regs_t *QSPIx) |
Enable dynamic of wait states for QSPI peripheral. More... | |
__STATIC_INLINE void | ll_qspi_disable_dws (qspi_regs_t *QSPIx) |
Disable dynamic of wait states for QSPI peripheral. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_enabled_dws (qspi_regs_t *QSPIx) |
Check if dynamic of wait states for QSPI peripheral is enabled. More... | |
__STATIC_INLINE void | ll_qspi_clear_flag_spite (qspi_regs_t *QSPIx) |
Clear QSPI Transmit Error interrupt. More... | |
__STATIC_INLINE void | ll_qspi_set_max_wait_cycles (qspi_regs_t *QSPIx, uint32_t max_ws) |
set the max wait cycles per transaction for dynamic wait state More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_max_wait_cycles (qspi_regs_t *QSPIx) |
get the max wait cycles per transaction for dynamic wait state More... | |
__STATIC_INLINE void | ll_qspi_set_dynamic_wait_state (qspi_regs_t *QSPIx, uint32_t dyn_ws) |
set the value for dynamic wait state More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_dynamic_wait_state (qspi_regs_t *QSPIx, uint32_t dyn_ws) |
get the value for dynamic wait state More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_wr_incr_inst (qspi_regs_t *QSPIx, uint32_t inst) |
set the ahb-incr transfer instruction for write in xip mode More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_wr_incr_inst (qspi_regs_t *QSPIx) |
get the ahb-incr transfer instruction for write in xip mode More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_wr_wrap_inst (qspi_regs_t *QSPIx, uint32_t inst) |
set the ahb-wrap transfer instruction for write in xip mode More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_wr_wrap_inst (qspi_regs_t *QSPIx) |
get the ahb-wrap transfer instruction for write in xip mode More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_wr_wait_cycles (qspi_regs_t *QSPIx, uint32_t wait_cycles) |
Set the wait(also called dummy) cycles for concurrent xip write mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_wr_wait_cycles (qspi_regs_t *QSPIx) |
Get the wait(also called dummy) cycles for concurrent xip write mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_wr_instruction_size (qspi_regs_t *QSPIx, uint32_t inst_size) |
Set the instruction size for concurrent xip write mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_wr_instruction_size (qspi_regs_t *QSPIx) |
Get the instruction size for concurrent xip write mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_wr_address_size (qspi_regs_t *QSPIx, uint32_t addr_size) |
Set the address size for concurrent xip write mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_wr_address_size (qspi_regs_t *QSPIx) |
Get the address size for concurrent xip write mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_wr_inst_addr_transfer_format (qspi_regs_t *QSPIx, uint32_t format) |
Set the transfer format of inst & address for concurrent xip write mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_wr_addr_inst_transfer_format (qspi_regs_t *QSPIx) |
Get the transfer format of inst & address for concurrent xip write mode. More... | |
__STATIC_INLINE void | ll_qspi_concurrent_set_xip_wr_frame_format (qspi_regs_t *QSPIx, uint32_t format) |
Set the QSPI frame format for concurrent xip write mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_concurrent_get_xip_wr_frame_format (qspi_regs_t *QSPIx) |
Get the QSPI frame format for concurrent xip write mode. More... | |
__STATIC_INLINE void | ll_qspi_enable_hresp_err_debug_mode (void) |
Enable the AHB Response Error Debug for all QSPI Modules. if violation, hardfault happens. More... | |
__STATIC_INLINE void | ll_qspi_disable_hresp_err_debug_mode (void) |
Disable the AHB Response Error Debug for all QSPI Modules. if violation, hardfault happens. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_hresp_err_debug_mode_enabled (void) |
Check if the AHB Response Error Debug is enabled for all QSPI Modules. More... | |
__STATIC_INLINE void | ll_qspi_set_cs_setup_delay (qspi_regs_t *QSPIx, uint32_t delay) |
Set CS Setup Delay for QSPI. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_cs_setup_delay (qspi_regs_t *QSPIx) |
Get CS Setup Delay for QSPI. More... | |
__STATIC_INLINE void | ll_qspi_set_cs_release_delay (qspi_regs_t *QSPIx, uint32_t delay) |
Set CS Release Delay for QSPI. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_cs_release_delay (qspi_regs_t *QSPIx) |
Get CS Release Delay for QSPI. More... | |
__STATIC_INLINE void | ll_qspi_enable_xip_dynamic_le (qspi_regs_t *QSPIx) |
Enable qspi xip dynamic little-endian mode. More... | |
__STATIC_INLINE void | ll_qspi_disable_xip_dynamic_le (qspi_regs_t *QSPIx) |
Disable qspi xip dynamic little-endian mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_is_enabled_xip_dynamic_le (qspi_regs_t *QSPIx) |
Check if qspi xip dynamic little-endian mode is enabled. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_reg_mode_rx_fifo_depth (qspi_regs_t *QSPIx) |
Get Receive FIFO Depth Of Register Mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_reg_mode_tx_fifo_depth (qspi_regs_t *QSPIx) |
Get Transmit FIFO Depth Of Register Mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_xip_mode_rx_fifo_depth (qspi_regs_t *QSPIx) |
Get Receive FIFO Depth Of XIP Mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_xip_mode_tx_fifo_depth (qspi_regs_t *QSPIx) |
Get Transmit FIFO Depth Of XIP Mode. More... | |
__STATIC_INLINE uint32_t | ll_qspi_get_xip_base_address (qspi_regs_t *QSPIx) |
Get Transmit FIFO Depth Of XIP Mode. More... | |
error_status_t | ll_qspi_deinit (qspi_regs_t *QSPIx) |
De-initialize SSI registers (Registers restored to their default values). More... | |
error_status_t | ll_qspi_init (qspi_regs_t *QSPIx, ll_qspi_init_t *p_spi_init) |
Initialize SSI registers according to the specified parameters in SPI_InitStruct. More... | |
error_status_t | ll_qspi_memorymapped (qspi_regs_t *QSPIx, ll_qspi_memorymapped_init_t *p_qspi_mmap_init) |
Configure the qspi to memorymapped. More... | |
void | ll_qspi_struct_init (ll_qspi_init_t *p_spi_init) |
Set each field of a ll_qspi_init_t type structure to default value. More... | |
Header file containing functions prototypes of QSPI LL library.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. Neither the name of GOODIX nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
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Definition in file gr55xx_ll_qspi.h.