52 #ifndef __GR55xx_LL_PDM_H__
53 #define __GR55xx_LL_PDM_H__
76 typedef struct _ll_pdm_init
109 #define LL_PDM_SAMPLE_RATE_15_625K PDM_CLK_SAMPLE_RATE_15_625K
110 #define LL_PDM_SAMPLE_RATE_16K PDM_CLK_SAMPLE_RATE_16K
111 #define LL_PDM_SAMPLE_RATE_8K PDM_CLK_SAMPLE_RATE_8K
121 #define LL_PDM_MODE_LEFT ((uint32_t)0x00000000U)
122 #define LL_PDM_MODE_RIGHT ((uint32_t)0x00000001U)
123 #define LL_PDM_MODE_STEREO ((uint32_t)0x00000002U)
129 #define LL_PDM_CLK_ENABLE PDM_CLK_EN_ENABLE
130 #define LL_PDM_CLK_DISABLE PDM_CLK_EN_DISABLE
136 #define LL_PDM_LEFT_RX_ENABLE PDM_EN_L_EN_RX_ENABLE
137 #define LL_PDM_LEFT_RX_DISABLE PDM_EN_L_EN_RX_DISABLE
138 #define LL_PDM_RIGHT_RX_ENABLE PDM_EN_R_EN_RX_ENABLE
139 #define LL_PDM_RIGHT_RX_DISABLE PDM_EN_R_EN_RX_DISABLE
145 #define LL_PDM_LEFT_SAMPLE_DMIC_ENABLE PDM_EN_L_SMP_DMIC_ENABLE
146 #define LL_PDM_LEFT_SAMPLE_DMIC_DISABLE PDM_EN_L_SMP_DMIC_DISABLE
147 #define LL_PDM_RIGHT_SAMPLE_DMIC_ENABLE PDM_EN_R_SMP_DMIC_ENABLE
148 #define LL_PDM_RIGHT_SAMPLE_DMIC_DISABLE PDM_EN_R_SMP_DMIC_DISABLE
154 #define LL_PDM_LEFT_STAGE0_ENABLE PDM_EN_L_EN_STAGE0_ENABLE
155 #define LL_PDM_LEFT_STAGE0_DISABLE PDM_EN_L_EN_STAGE0_DISABLE
156 #define LL_PDM_LEFT_STAGE1_ENABLE PDM_EN_L_EN_STAGE1_ENABLE
157 #define LL_PDM_LEFT_STAGE1_DISABLE PDM_EN_L_EN_STAGE1_DISABLE
158 #define LL_PDM_LEFT_STAGE2_ENABLE PDM_EN_L_EN_STAGE2_ENABLE
159 #define LL_PDM_LEFT_STAGE2_DISABLE PDM_EN_L_EN_STAGE2_DISABLE
160 #define LL_PDM_LEFT_STAGE3_ENABLE PDM_EN_L_EN_STAGE3_ENABLE
161 #define LL_PDM_LEFT_STAGE3_DISABLE PDM_EN_L_EN_STAGE3_DISABLE
162 #define LL_PDM_LEFT_STAGE4_ENABLE PDM_EN_L_EN_STAGE4_ENABLE
163 #define LL_PDM_LEFT_STAGE4_DISABLE PDM_EN_L_EN_STAGE4_DISABLE
164 #define LL_PDM_LEFT_STAGE5_ENABLE PDM_EN_L_EN_STAGE5_ENABLE
165 #define LL_PDM_LEFT_STAGE5_DISABLE PDM_EN_L_EN_STAGE5_DISABLE
166 #define LL_PDM_LEFT_STAGE6_ENABLE PDM_EN_L_EN_STAGE6_ENABLE
167 #define LL_PDM_LEFT_STAGE6_DISABLE PDM_EN_L_EN_STAGE6_DISABLE
168 #define LL_PDM_LEFT_STAGE7_ENABLE PDM_EN_L_EN_STAGE7_ENABLE
169 #define LL_PDM_LEFT_STAGE7_DISABLE PDM_EN_L_EN_STAGE7_DISABLE
170 #define LL_PDM_RIGHT_STAGE0_ENABLE PDM_EN_R_EN_STAGE0_ENABLE
171 #define LL_PDM_RIGHT_STAGE0_DISABLE PDM_EN_R_EN_STAGE0_DISABLE
172 #define LL_PDM_RIGHT_STAGE1_ENABLE PDM_EN_R_EN_STAGE1_ENABLE
173 #define LL_PDM_RIGHT_STAGE1_DISABLE PDM_EN_R_EN_STAGE1_DISABLE
174 #define LL_PDM_RIGHT_STAGE2_ENABLE PDM_EN_R_EN_STAGE2_ENABLE
175 #define LL_PDM_RIGHT_STAGE2_DISABLE PDM_EN_R_EN_STAGE2_DISABLE
176 #define LL_PDM_RIGHT_STAGE3_ENABLE PDM_EN_R_EN_STAGE3_ENABLE
177 #define LL_PDM_RIGHT_STAGE3_DISABLE PDM_EN_R_EN_STAGE3_DISABLE
178 #define LL_PDM_RIGHT_STAGE4_ENABLE PDM_EN_R_EN_STAGE4_ENABLE
179 #define LL_PDM_RIGHT_STAGE4_DISABLE PDM_EN_R_EN_STAGE4_DISABLE
180 #define LL_PDM_RIGHT_STAGE5_ENABLE PDM_EN_R_EN_STAGE5_ENABLE
181 #define LL_PDM_RIGHT_STAGE5_DISABLE PDM_EN_R_EN_STAGE5_DISABLE
182 #define LL_PDM_RIGHT_STAGE6_ENABLE PDM_EN_R_EN_STAGE6_ENABLE
183 #define LL_PDM_RIGHT_STAGE6_DISABLE PDM_EN_R_EN_STAGE6_DISABLE
184 #define LL_PDM_RIGHT_STAGE7_ENABLE PDM_EN_R_EN_STAGE7_ENABLE
185 #define LL_PDM_RIGHT_STAGE7_DISABLE PDM_EN_R_EN_STAGE7_DISABLE
191 #define LL_PDM_LEFT_HPF_ENABLE PDM_EN_L_EN_HPF_ENABLE
192 #define LL_PDM_LEFT_HPF_DISABLE PDM_EN_L_EN_HPF_DISABLE
193 #define LL_PDM_RIGHT_HPF_ENABLE PDM_EN_R_EN_HPF_ENABLE
194 #define LL_PDM_RIGHT_HPF_DISABLE PDM_EN_R_EN_HPF_DISABLE
200 #define LL_PDM_LEFT_HPF_BYPASS_ENABLE PDM_HPF_CFG_L_BYPASS_ENABLE
201 #define LL_PDM_LEFT_HPF_BYPASS_DISABLE PDM_HPF_CFG_L_BYPASS_DISABLE
202 #define LL_PDM_RIGHT_HPF_BYPASS_ENABLE PDM_HPF_CFG_R_BYPASS_ENABLE
203 #define LL_PDM_RIGHT_HPF_BYPASS_DISABLE PDM_HPF_CFG_R_BYPASS_DISABLE
209 #define LL_PDM_LEFT_HPF_CORNER_0_25 PDM_HPF_CFG_L_CORNER_0_25
210 #define LL_PDM_LEFT_HPF_CORNER_1 PDM_HPF_CFG_L_CORNER_1
211 #define LL_PDM_LEFT_HPF_CORNER_4 PDM_HPF_CFG_L_CORNER_4
212 #define LL_PDM_LEFT_HPF_CORNER_16 PDM_HPF_CFG_L_CORNER_16
213 #define LL_PDM_RIGHT_HPF_CORNER_0_25 PDM_HPF_CFG_R_CORNER_0_25
214 #define LL_PDM_RIGHT_HPF_CORNER_1 PDM_HPF_CFG_R_CORNER_1
215 #define LL_PDM_RIGHT_HPF_CORNER_4 PDM_HPF_CFG_R_CORNER_4
216 #define LL_PDM_RIGHT_HPF_CORNER_16 PDM_HPF_CFG_R_CORNER_16
222 #define LL_PDM_LEFT_HPF_FREEZE_ENABLE PDM_HPF_CFG_L_FREEZE_ENABLE
223 #define LL_PDM_LEFT_HPF_FREEZE_DISABLE PDM_HPF_CFG_L_FREEZE_DISABLE
224 #define LL_PDM_RIGHT_HPF_FREEZE_ENABLE PDM_HPF_CFG_R_FREEZE_ENABLE
225 #define LL_PDM_RIGHT_HPF_FREEZE_DISABLE PDM_HPF_CFG_R_FREEZE_DISABLE
245 #define LL_PDM_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG(__instance__->__REG__, (__VALUE__))
253 #define LL_PDM_ReadReg(__instance__, __REG__) READ_REG(__instance__->__REG__)
281 __STATIC_INLINE
void ll_pdm_enable_clk(pdm_regs_t *PDMx)
283 MODIFY_REG(PDMx->CLK, PDM_CLK_EN, LL_PDM_CLK_ENABLE);
297 __STATIC_INLINE
void ll_pdm_disable_clk(pdm_regs_t *PDMx)
299 MODIFY_REG(PDMx->CLK, PDM_CLK_EN, LL_PDM_CLK_DISABLE);
313 __STATIC_INLINE uint32_t ll_pdm_is_enable_clk(pdm_regs_t *PDMx)
315 return (READ_BITS(PDMx->CLK, PDM_CLK_EN) == LL_PDM_CLK_ENABLE);
333 __STATIC_INLINE
void ll_pdm_set_sample_rate(pdm_regs_t *PDMx, uint32_t sample_rate)
335 MODIFY_REG(PDMx->CLK, PDM_CLK_SAMPLE_RATE, sample_rate);
351 __STATIC_INLINE uint32_t ll_pdm_get_sample_rate(pdm_regs_t *PDMx)
353 return (READ_BITS(PDMx->CLK, PDM_CLK_SAMPLE_RATE));
369 __STATIC_INLINE
void ll_pdm_set_posedge_en_pulse_cfg(pdm_regs_t *PDMx, uint32_t target)
371 MODIFY_REG(PDMx->CLK_DIV, PDM_CLK_DIV_POSEDGE_EN_PULSE_CFG, (target << PDM_CLK_DIV_POSEDGE_EN_PULSE_CFG_POS));
384 __STATIC_INLINE uint32_t ll_pdm_get_posedge_en_pulse_cfg(pdm_regs_t *PDMx)
386 return (READ_BITS(PDMx->CLK_DIV, PDM_CLK_DIV_POSEDGE_EN_PULSE_CFG) >> PDM_CLK_DIV_POSEDGE_EN_PULSE_CFG_POS);
402 __STATIC_INLINE
void ll_pdm_set_negedge_en_pulse_cfg(pdm_regs_t *PDMx, uint32_t target)
404 MODIFY_REG(PDMx->CLK_DIV, PDM_CLK_DIV_NEGEDGE_EN_PULSE_CFG, (target << PDM_CLK_DIV_NEGEDGE_EN_PULSE_CFG_POS));
417 __STATIC_INLINE uint32_t ll_pdm_get_negedge_en_pulse_cfg(pdm_regs_t *PDMx)
419 return (READ_BITS(PDMx->CLK_DIV, PDM_CLK_DIV_NEGEDGE_EN_PULSE_CFG) >> PDM_CLK_DIV_NEGEDGE_EN_PULSE_CFG_POS);
433 __STATIC_INLINE
void ll_pdm_enable_left_channel(pdm_regs_t *PDMx)
436 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_RX | PDM_EN_L_EN_STAGE0 | PDM_EN_L_EN_STAGE1 |\
437 PDM_EN_L_EN_STAGE2 | PDM_EN_L_EN_STAGE3 | PDM_EN_L_EN_STAGE4 |\
438 PDM_EN_L_EN_STAGE5 | PDM_EN_L_EN_STAGE6 | PDM_EN_L_EN_STAGE7 |\
439 PDM_EN_L_SMP_DMIC | PDM_EN_L_EN_HPF, \
440 PDM_EN_L_EN_RX_ENABLE | PDM_EN_L_SMP_DMIC_ENABLE | PDM_EN_L_EN_STAGE0_DISABLE |\
441 PDM_EN_L_EN_STAGE1_DISABLE | PDM_EN_L_EN_STAGE2_ENABLE | PDM_EN_L_EN_STAGE3_ENABLE |\
442 PDM_EN_L_EN_STAGE4_ENABLE | PDM_EN_L_EN_STAGE5_ENABLE | PDM_EN_L_EN_STAGE6_ENABLE |\
443 PDM_EN_L_EN_STAGE7_ENABLE | PDM_EN_L_EN_HPF_ENABLE);
457 __STATIC_INLINE
void ll_pdm_disable_left_channel(pdm_regs_t *PDMx)
460 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_RX | PDM_EN_L_EN_STAGE0 | PDM_EN_L_EN_STAGE1 |\
461 PDM_EN_L_EN_STAGE2 | PDM_EN_L_EN_STAGE3 | PDM_EN_L_EN_STAGE4 |\
462 PDM_EN_L_EN_STAGE5 | PDM_EN_L_EN_STAGE6 | PDM_EN_L_EN_STAGE7 |\
463 PDM_EN_L_SMP_DMIC | PDM_EN_L_EN_HPF, \
464 PDM_EN_L_EN_RX_DISABLE | PDM_EN_L_SMP_DMIC_DISABLE | PDM_EN_L_EN_STAGE0_DISABLE |\
465 PDM_EN_L_EN_STAGE1_DISABLE | PDM_EN_L_EN_STAGE2_DISABLE | PDM_EN_L_EN_STAGE3_DISABLE |\
466 PDM_EN_L_EN_STAGE4_DISABLE | PDM_EN_L_EN_STAGE5_DISABLE | PDM_EN_L_EN_STAGE6_DISABLE |\
467 PDM_EN_L_EN_STAGE7_DISABLE | PDM_EN_L_EN_HPF_DISABLE);
481 __STATIC_INLINE
void ll_pdm_enable_right_channel(pdm_regs_t *PDMx)
484 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_RX | PDM_EN_R_EN_STAGE0 | PDM_EN_R_EN_STAGE1 |\
485 PDM_EN_R_EN_STAGE2 | PDM_EN_R_EN_STAGE3 | PDM_EN_R_EN_STAGE4 |\
486 PDM_EN_R_EN_STAGE5 | PDM_EN_R_EN_STAGE6 | PDM_EN_R_EN_STAGE7 |\
487 PDM_EN_R_SMP_DMIC | PDM_EN_R_EN_HPF, \
488 PDM_EN_R_EN_RX_ENABLE | PDM_EN_R_SMP_DMIC_ENABLE | PDM_EN_R_EN_STAGE0_DISABLE |\
489 PDM_EN_R_EN_STAGE1_DISABLE | PDM_EN_R_EN_STAGE2_ENABLE | PDM_EN_R_EN_STAGE3_ENABLE |\
490 PDM_EN_R_EN_STAGE4_ENABLE | PDM_EN_R_EN_STAGE5_ENABLE | PDM_EN_R_EN_STAGE6_ENABLE |\
491 PDM_EN_R_EN_STAGE7_ENABLE | PDM_EN_R_EN_HPF_ENABLE);
505 __STATIC_INLINE
void ll_pdm_disable_right_channel(pdm_regs_t *PDMx)
508 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_RX | PDM_EN_R_EN_STAGE0 | PDM_EN_R_EN_STAGE1 |\
509 PDM_EN_R_EN_STAGE2 | PDM_EN_R_EN_STAGE3 | PDM_EN_R_EN_STAGE4 |\
510 PDM_EN_R_EN_STAGE5 | PDM_EN_R_EN_STAGE6 | PDM_EN_R_EN_STAGE7 |\
511 PDM_EN_R_SMP_DMIC | PDM_EN_R_EN_HPF, \
512 PDM_EN_R_EN_RX_DISABLE | PDM_EN_R_SMP_DMIC_DISABLE | PDM_EN_R_EN_STAGE0_DISABLE |\
513 PDM_EN_R_EN_STAGE1_DISABLE | PDM_EN_R_EN_STAGE2_DISABLE | PDM_EN_R_EN_STAGE3_DISABLE |\
514 PDM_EN_R_EN_STAGE4_DISABLE | PDM_EN_R_EN_STAGE5_DISABLE | PDM_EN_R_EN_STAGE6_DISABLE |\
515 PDM_EN_R_EN_STAGE7_DISABLE | PDM_EN_R_EN_HPF_DISABLE);
529 __STATIC_INLINE
void ll_pdm_enable_left_rx(pdm_regs_t *PDMx)
531 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_RX, LL_PDM_LEFT_RX_ENABLE);
545 __STATIC_INLINE
void ll_pdm_disable_left_rx(pdm_regs_t *PDMx)
547 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_RX, LL_PDM_LEFT_RX_DISABLE);
561 __STATIC_INLINE uint32_t ll_pdm_is_enable_left_rx(pdm_regs_t *PDMx)
563 return (READ_BITS(PDMx->EN_L, PDM_EN_L_EN_RX) == LL_PDM_LEFT_RX_ENABLE);
578 __STATIC_INLINE
void ll_pdm_enable_right_rx(pdm_regs_t *PDMx)
580 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_RX, LL_PDM_RIGHT_RX_ENABLE);
594 __STATIC_INLINE
void ll_pdm_disable_right_rx(pdm_regs_t *PDMx)
596 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_RX, LL_PDM_RIGHT_RX_DISABLE);
610 __STATIC_INLINE uint32_t ll_pdm_is_enable_right_rx(pdm_regs_t *PDMx)
612 return (READ_BITS(PDMx->EN_R, PDM_EN_R_EN_RX) == LL_PDM_RIGHT_RX_ENABLE);
627 __STATIC_INLINE
void ll_pdm_enable_left_sample_dmic(pdm_regs_t *PDMx)
629 MODIFY_REG(PDMx->EN_L, PDM_EN_L_SMP_DMIC, LL_PDM_LEFT_SAMPLE_DMIC_ENABLE);
643 __STATIC_INLINE
void ll_pdm_disable_left_sample_dmic(pdm_regs_t *PDMx)
645 MODIFY_REG(PDMx->EN_L, PDM_EN_L_SMP_DMIC, LL_PDM_LEFT_SAMPLE_DMIC_DISABLE);
659 __STATIC_INLINE uint32_t ll_pdm_is_enable_left_sample_dmic(pdm_regs_t *PDMx)
661 return (READ_BITS(PDMx->EN_L, PDM_EN_L_SMP_DMIC) == LL_PDM_LEFT_SAMPLE_DMIC_ENABLE);
675 __STATIC_INLINE
void ll_pdm_enable_right_sample_dmic(pdm_regs_t *PDMx)
677 MODIFY_REG(PDMx->EN_R, PDM_EN_R_SMP_DMIC, LL_PDM_RIGHT_SAMPLE_DMIC_ENABLE);
691 __STATIC_INLINE
void ll_pdm_disable_right_sample_dmic(pdm_regs_t *PDMx)
693 MODIFY_REG(PDMx->EN_R, PDM_EN_R_SMP_DMIC, LL_PDM_RIGHT_SAMPLE_DMIC_DISABLE);
707 __STATIC_INLINE uint32_t ll_pdm_is_enable_right_sample_dmic(pdm_regs_t *PDMx)
709 return (READ_BITS(PDMx->EN_R, PDM_EN_R_SMP_DMIC) == LL_PDM_RIGHT_SAMPLE_DMIC_ENABLE);
723 __STATIC_INLINE
void ll_pdm_enable_left_stage0(pdm_regs_t *PDMx)
725 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE0, LL_PDM_LEFT_STAGE0_ENABLE);
739 __STATIC_INLINE
void ll_pdm_disable_left_stage0(pdm_regs_t *PDMx)
741 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE0, LL_PDM_LEFT_STAGE0_DISABLE);
755 __STATIC_INLINE uint32_t ll_pdm_is_enable_left_stage0(pdm_regs_t *PDMx)
757 return (READ_BITS(PDMx->EN_L, PDM_EN_L_EN_STAGE0) == LL_PDM_LEFT_STAGE0_ENABLE);
771 __STATIC_INLINE
void ll_pdm_enable_right_stage0(pdm_regs_t *PDMx)
773 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE0, LL_PDM_RIGHT_STAGE0_ENABLE);
787 __STATIC_INLINE
void ll_pdm_disable_right_stage0(pdm_regs_t *PDMx)
789 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE0, LL_PDM_RIGHT_STAGE0_DISABLE);
803 __STATIC_INLINE uint32_t ll_pdm_is_enable_right_stage0(pdm_regs_t *PDMx)
805 return (READ_BITS(PDMx->EN_R, PDM_EN_R_EN_STAGE0) == LL_PDM_RIGHT_STAGE0_ENABLE);
819 __STATIC_INLINE
void ll_pdm_enable_left_stage1(pdm_regs_t *PDMx)
821 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE1, LL_PDM_LEFT_STAGE1_ENABLE);
835 __STATIC_INLINE
void ll_pdm_disable_left_stage1(pdm_regs_t *PDMx)
837 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE1, LL_PDM_LEFT_STAGE1_DISABLE);
851 __STATIC_INLINE uint32_t ll_pdm_is_enable_left_stage1(pdm_regs_t *PDMx)
853 return (READ_BITS(PDMx->EN_L, PDM_EN_L_EN_STAGE1) == LL_PDM_LEFT_STAGE1_ENABLE);
867 __STATIC_INLINE
void ll_pdm_enable_right_stage1(pdm_regs_t *PDMx)
869 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE1, LL_PDM_RIGHT_STAGE1_ENABLE);
883 __STATIC_INLINE
void ll_pdm_disable_right_stage1(pdm_regs_t *PDMx)
885 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE1, LL_PDM_RIGHT_STAGE1_DISABLE);
899 __STATIC_INLINE uint32_t ll_pdm_is_enable_right_stage1(pdm_regs_t *PDMx)
901 return (READ_BITS(PDMx->EN_R, PDM_EN_R_EN_STAGE1) == LL_PDM_RIGHT_STAGE1_ENABLE);
915 __STATIC_INLINE
void ll_pdm_enable_left_stage2(pdm_regs_t *PDMx)
917 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE2, LL_PDM_LEFT_STAGE2_ENABLE);
931 __STATIC_INLINE
void ll_pdm_disable_left_stage2(pdm_regs_t *PDMx)
933 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE2, LL_PDM_LEFT_STAGE2_DISABLE);
947 __STATIC_INLINE uint32_t ll_pdm_is_enable_left_stage2(pdm_regs_t *PDMx)
949 return (READ_BITS(PDMx->EN_L, PDM_EN_L_EN_STAGE2) == LL_PDM_LEFT_STAGE2_ENABLE);
963 __STATIC_INLINE
void ll_pdm_enable_right_stage2(pdm_regs_t *PDMx)
965 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE2, LL_PDM_RIGHT_STAGE2_ENABLE);
979 __STATIC_INLINE
void ll_pdm_disable_right_stage2(pdm_regs_t *PDMx)
981 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE2, LL_PDM_RIGHT_STAGE2_DISABLE);
995 __STATIC_INLINE uint32_t ll_pdm_is_enable_right_stage2(pdm_regs_t *PDMx)
997 return (READ_BITS(PDMx->EN_R, PDM_EN_R_EN_STAGE2) == LL_PDM_RIGHT_STAGE2_ENABLE);
1011 __STATIC_INLINE
void ll_pdm_enable_left_stage3(pdm_regs_t *PDMx)
1013 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE3, LL_PDM_LEFT_STAGE3_ENABLE);
1027 __STATIC_INLINE
void ll_pdm_disable_left_stage3(pdm_regs_t *PDMx)
1029 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE3, LL_PDM_LEFT_STAGE3_DISABLE);
1043 __STATIC_INLINE uint32_t ll_pdm_is_enable_left_stage3(pdm_regs_t *PDMx)
1045 return (READ_BITS(PDMx->EN_L, PDM_EN_L_EN_STAGE3) == LL_PDM_LEFT_STAGE3_ENABLE);
1059 __STATIC_INLINE
void ll_pdm_enable_right_stage3(pdm_regs_t *PDMx)
1061 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE3, LL_PDM_RIGHT_STAGE3_ENABLE);
1075 __STATIC_INLINE
void ll_pdm_disable_right_stage3(pdm_regs_t *PDMx)
1077 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE3, LL_PDM_RIGHT_STAGE3_DISABLE);
1091 __STATIC_INLINE uint32_t ll_pdm_is_enable_right_stage3(pdm_regs_t *PDMx)
1093 return (READ_BITS(PDMx->EN_R, PDM_EN_R_EN_STAGE3) == LL_PDM_RIGHT_STAGE3_ENABLE);
1107 __STATIC_INLINE
void ll_pdm_enable_left_stage4(pdm_regs_t *PDMx)
1109 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE4, LL_PDM_LEFT_STAGE4_ENABLE);
1123 __STATIC_INLINE
void ll_pdm_disable_left_stage4(pdm_regs_t *PDMx)
1125 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE4, LL_PDM_LEFT_STAGE4_DISABLE);
1139 __STATIC_INLINE uint32_t ll_pdm_is_enable_left_stage4(pdm_regs_t *PDMx)
1141 return (READ_BITS(PDMx->EN_L, PDM_EN_L_EN_STAGE4) == LL_PDM_LEFT_STAGE4_ENABLE);
1155 __STATIC_INLINE
void ll_pdm_enable_right_stage4(pdm_regs_t *PDMx)
1157 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE4, LL_PDM_RIGHT_STAGE4_ENABLE);
1171 __STATIC_INLINE
void ll_pdm_disable_right_stage4(pdm_regs_t *PDMx)
1173 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE4, LL_PDM_RIGHT_STAGE4_DISABLE);
1187 __STATIC_INLINE uint32_t ll_pdm_is_enable_right_stage4(pdm_regs_t *PDMx)
1189 return (READ_BITS(PDMx->EN_R, PDM_EN_R_EN_STAGE4) == LL_PDM_RIGHT_STAGE4_ENABLE);
1203 __STATIC_INLINE
void ll_pdm_enable_left_stage5(pdm_regs_t *PDMx)
1205 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE5, LL_PDM_LEFT_STAGE5_ENABLE);
1219 __STATIC_INLINE
void ll_pdm_disable_left_stage5(pdm_regs_t *PDMx)
1221 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE5, LL_PDM_LEFT_STAGE5_DISABLE);
1235 __STATIC_INLINE uint32_t ll_pdm_is_enable_left_stage5(pdm_regs_t *PDMx)
1237 return (READ_BITS(PDMx->EN_L, PDM_EN_L_EN_STAGE5) == LL_PDM_LEFT_STAGE5_ENABLE);
1251 __STATIC_INLINE
void ll_pdm_enable_right_stage5(pdm_regs_t *PDMx)
1253 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE5, LL_PDM_RIGHT_STAGE5_ENABLE);
1267 __STATIC_INLINE
void ll_pdm_disable_right_stage5(pdm_regs_t *PDMx)
1269 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE5, LL_PDM_RIGHT_STAGE5_DISABLE);
1283 __STATIC_INLINE uint32_t ll_pdm_is_enable_right_stage5(pdm_regs_t *PDMx)
1285 return (READ_BITS(PDMx->EN_R, PDM_EN_R_EN_STAGE5) == LL_PDM_RIGHT_STAGE5_ENABLE);
1299 __STATIC_INLINE
void ll_pdm_enable_left_stage6(pdm_regs_t *PDMx)
1301 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE6, LL_PDM_LEFT_STAGE6_ENABLE);
1315 __STATIC_INLINE
void ll_pdm_disable_left_stage6(pdm_regs_t *PDMx)
1317 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE6, LL_PDM_LEFT_STAGE6_DISABLE);
1331 __STATIC_INLINE uint32_t ll_pdm_is_enable_left_stage6(pdm_regs_t *PDMx)
1333 return (READ_BITS(PDMx->EN_L, PDM_EN_L_EN_STAGE6) == LL_PDM_LEFT_STAGE6_ENABLE);
1347 __STATIC_INLINE
void ll_pdm_enable_right_stage6(pdm_regs_t *PDMx)
1349 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE6, LL_PDM_RIGHT_STAGE6_ENABLE);
1363 __STATIC_INLINE
void ll_pdm_disable_right_stage6(pdm_regs_t *PDMx)
1365 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE6, LL_PDM_RIGHT_STAGE6_DISABLE);
1379 __STATIC_INLINE uint32_t ll_pdm_is_enable_right_stage6(pdm_regs_t *PDMx)
1381 return (READ_BITS(PDMx->EN_R, PDM_EN_R_EN_STAGE6) == LL_PDM_RIGHT_STAGE6_ENABLE);
1395 __STATIC_INLINE
void ll_pdm_enable_left_stage7(pdm_regs_t *PDMx)
1397 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE7, LL_PDM_LEFT_STAGE7_ENABLE);
1411 __STATIC_INLINE
void ll_pdm_disable_left_stage7(pdm_regs_t *PDMx)
1413 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_STAGE7, LL_PDM_LEFT_STAGE7_DISABLE);
1427 __STATIC_INLINE uint32_t ll_pdm_is_enable_left_stage7(pdm_regs_t *PDMx)
1429 return (READ_BITS(PDMx->EN_L, PDM_EN_L_EN_STAGE7) == LL_PDM_LEFT_STAGE7_ENABLE);
1443 __STATIC_INLINE
void ll_pdm_enable_right_stage7(pdm_regs_t *PDMx)
1445 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE7, LL_PDM_RIGHT_STAGE7_ENABLE);
1459 __STATIC_INLINE
void ll_pdm_disable_right_stage7(pdm_regs_t *PDMx)
1461 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_STAGE7, LL_PDM_RIGHT_STAGE7_DISABLE);
1475 __STATIC_INLINE uint32_t ll_pdm_is_enable_right_stage7(pdm_regs_t *PDMx)
1477 return (READ_BITS(PDMx->EN_R, PDM_EN_R_EN_STAGE7) == LL_PDM_RIGHT_STAGE7_ENABLE);
1491 __STATIC_INLINE
void ll_pdm_enable_left_hpf(pdm_regs_t *PDMx)
1493 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_HPF, LL_PDM_LEFT_HPF_ENABLE);
1507 __STATIC_INLINE
void ll_pdm_disable_left_hpf(pdm_regs_t *PDMx)
1509 MODIFY_REG(PDMx->EN_L, PDM_EN_L_EN_HPF, LL_PDM_LEFT_HPF_DISABLE);
1523 __STATIC_INLINE uint32_t ll_pdm_is_enable_left_hpf(pdm_regs_t *PDMx)
1525 return (READ_BITS(PDMx->EN_L, PDM_EN_L_EN_HPF) == LL_PDM_LEFT_HPF_ENABLE);
1539 __STATIC_INLINE
void ll_pdm_enable_right_hpf(pdm_regs_t *PDMx)
1541 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_HPF, LL_PDM_RIGHT_HPF_ENABLE);
1555 __STATIC_INLINE
void ll_pdm_disable_right_hpf(pdm_regs_t *PDMx)
1557 MODIFY_REG(PDMx->EN_R, PDM_EN_R_EN_HPF, LL_PDM_RIGHT_HPF_DISABLE);
1571 __STATIC_INLINE uint32_t ll_pdm_is_enable_right_hpf(pdm_regs_t *PDMx)
1573 return (READ_BITS(PDMx->EN_R, PDM_EN_R_EN_HPF) == LL_PDM_RIGHT_HPF_ENABLE);
1589 __STATIC_INLINE
void ll_pdm_set_left_rxd_upsample(pdm_regs_t *PDMx, uint32_t rxd_upsample)
1591 MODIFY_REG(PDMx->IN_CFG_L, PDM_IN_CFG_L_RX_UPSMP, rxd_upsample << PDM_IN_CFG_L_RX_UPSMP_POS);
1606 __STATIC_INLINE uint32_t ll_pdm_get_left_rxd_upsample(pdm_regs_t *PDMx)
1608 return READ_BITS(PDMx->IN_CFG_L, PDM_IN_CFG_L_RX_UPSMP >> PDM_IN_CFG_L_RX_UPSMP_POS);
1624 __STATIC_INLINE
void ll_pdm_set_right_rxd_upsample(pdm_regs_t *PDMx, uint32_t rxd_upsample)
1626 MODIFY_REG(PDMx->IN_CFG_R, PDM_IN_CFG_R_RX_UPSMP, rxd_upsample << PDM_IN_CFG_R_RX_UPSMP_POS);
1641 __STATIC_INLINE uint32_t ll_pdm_get_right_rxd_upsample(pdm_regs_t *PDMx)
1643 return READ_BITS(PDMx->IN_CFG_R, PDM_IN_CFG_R_RX_UPSMP >> PDM_IN_CFG_R_RX_UPSMP_POS);
1659 __STATIC_INLINE
void ll_pdm_set_left_stage_init(pdm_regs_t *PDMx, uint32_t stage_init)
1661 MODIFY_REG(PDMx->IN_CFG_L, PDM_IN_CFG_L_STAGE_INIT, stage_init << PDM_IN_CFG_L_STAGE_INIT_POS);
1676 __STATIC_INLINE uint32_t ll_pdm_get_left_stage_init(pdm_regs_t *PDMx)
1678 return (READ_BITS(PDMx->IN_CFG_L, PDM_IN_CFG_L_STAGE_INIT) >> PDM_IN_CFG_L_STAGE_INIT_POS) ;
1694 __STATIC_INLINE
void ll_pdm_set_right_stage_init(pdm_regs_t *PDMx, uint32_t stage_init)
1696 MODIFY_REG(PDMx->IN_CFG_R, PDM_IN_CFG_R_STAGE_INIT, stage_init << PDM_IN_CFG_R_STAGE_INIT_POS);
1711 __STATIC_INLINE uint32_t ll_pdm_get_right_stage_init(pdm_regs_t *PDMx)
1713 return (READ_BITS(PDMx->IN_CFG_R, PDM_IN_CFG_R_STAGE_INIT) >> PDM_IN_CFG_R_STAGE_INIT_POS) ;
1729 __STATIC_INLINE
void ll_pdm_set_left_upsample_factor(pdm_regs_t *PDMx, uint32_t upsample_factor)
1731 MODIFY_REG(PDMx->LPF_CFG_L, PDM_LPF_CFG_L_UPSMP_FACTOR, upsample_factor << PDM_LPF_CFG_L_UPSMP_FACTOR_POS);
1746 __STATIC_INLINE uint32_t ll_pdm_get_left_upsample_factor(pdm_regs_t *PDMx)
1748 return (READ_BITS(PDMx->LPF_CFG_L, PDM_LPF_CFG_L_UPSMP_FACTOR) >> PDM_LPF_CFG_L_UPSMP_FACTOR_POS) ;
1764 __STATIC_INLINE
void ll_pdm_set_right_upsample_factor(pdm_regs_t *PDMx, uint32_t upsample_factor)
1766 MODIFY_REG(PDMx->LPF_CFG_R, PDM_LPF_CFG_R_UPSMP_FACTOR, upsample_factor << PDM_LPF_CFG_R_UPSMP_FACTOR_POS);
1781 __STATIC_INLINE uint32_t ll_pdm_get_right_upsample_factor(pdm_regs_t *PDMx)
1783 return (READ_BITS(PDMx->LPF_CFG_R, PDM_LPF_CFG_R_UPSMP_FACTOR) >> PDM_LPF_CFG_R_UPSMP_FACTOR_POS) ;
1797 __STATIC_INLINE
void ll_pdm_enable_left_hpy_bypass(pdm_regs_t *PDMx)
1799 MODIFY_REG(PDMx->HPF_CFG_L, PDM_HPF_CFG_L_BYPASS, LL_PDM_LEFT_HPF_BYPASS_ENABLE);
1812 __STATIC_INLINE
void ll_pdm_disable_left_hpy_bypass(pdm_regs_t *PDMx)
1814 MODIFY_REG(PDMx->HPF_CFG_L, PDM_HPF_CFG_L_BYPASS, LL_PDM_LEFT_HPF_BYPASS_DISABLE);
1828 __STATIC_INLINE uint32_t ll_pdm_is_enable_left_hpy_bypass(pdm_regs_t *PDMx)
1830 return (READ_BITS(PDMx->HPF_CFG_L, PDM_HPF_CFG_L_BYPASS) == LL_PDM_LEFT_HPF_BYPASS_ENABLE);
1844 __STATIC_INLINE
void ll_pdm_enable_right_hpy_bypass(pdm_regs_t *PDMx)
1846 MODIFY_REG(PDMx->HPF_CFG_R, PDM_HPF_CFG_R_BYPASS, LL_PDM_RIGHT_HPF_BYPASS_ENABLE);
1859 __STATIC_INLINE
void ll_pdm_disable_right_hpy_bypass(pdm_regs_t *PDMx)
1861 MODIFY_REG(PDMx->HPF_CFG_R, PDM_HPF_CFG_R_BYPASS, LL_PDM_RIGHT_HPF_BYPASS_DISABLE);
1875 __STATIC_INLINE uint32_t ll_pdm_is_enable_right_hpy_bypass(pdm_regs_t *PDMx)
1877 return (READ_BITS(PDMx->HPF_CFG_R, PDM_HPF_CFG_R_BYPASS) == LL_PDM_RIGHT_HPF_BYPASS_ENABLE);
1896 __STATIC_INLINE
void ll_pdm_set_left_hpf_corner(pdm_regs_t *PDMx, uint32_t hpf_corner)
1898 MODIFY_REG(PDMx->HPF_CFG_L, PDM_HPF_CFG_L_CORNER, hpf_corner);
1916 __STATIC_INLINE uint32_t ll_pdm_get_left_hpf_corner(pdm_regs_t *PDMx)
1918 return READ_BITS(PDMx->HPF_CFG_L, PDM_HPF_CFG_L_CORNER);
1937 __STATIC_INLINE
void ll_pdm_set_right_hpf_corner(pdm_regs_t *PDMx, uint32_t hpf_corner)
1939 MODIFY_REG(PDMx->HPF_CFG_R, PDM_HPF_CFG_R_CORNER, hpf_corner);
1957 __STATIC_INLINE uint32_t ll_pdm_get_right_hpf_corner(pdm_regs_t *PDMx)
1959 return READ_BITS(PDMx->HPF_CFG_R, PDM_HPF_CFG_R_CORNER);
1973 __STATIC_INLINE
void ll_pdm_enable_left_hpf_freeze_en(pdm_regs_t *PDMx)
1975 MODIFY_REG(PDMx->HPF_CFG_L, PDM_HPF_CFG_L_FREEZE_EN, LL_PDM_LEFT_HPF_FREEZE_ENABLE);
1988 __STATIC_INLINE
void ll_pdm_disable_left_hpf_freeze_en(pdm_regs_t *PDMx)
1990 MODIFY_REG(PDMx->HPF_CFG_L, PDM_HPF_CFG_L_FREEZE_EN, LL_PDM_LEFT_HPF_FREEZE_DISABLE);
2004 __STATIC_INLINE uint32_t ll_pdm_is_enable_left_hpf_freeze_en(pdm_regs_t *PDMx)
2006 return (READ_BITS(PDMx->HPF_CFG_L, PDM_HPF_CFG_L_FREEZE_EN) == LL_PDM_LEFT_HPF_FREEZE_ENABLE);
2020 __STATIC_INLINE
void ll_pdm_enable_right_hpf_freeze_en(pdm_regs_t *PDMx)
2022 MODIFY_REG(PDMx->HPF_CFG_R, PDM_HPF_CFG_R_FREEZE_EN, LL_PDM_RIGHT_HPF_FREEZE_ENABLE);
2035 __STATIC_INLINE
void ll_pdm_disable_right_hpf_freeze_en(pdm_regs_t *PDMx)
2037 MODIFY_REG(PDMx->HPF_CFG_R, PDM_HPF_CFG_R_FREEZE_EN, LL_PDM_RIGHT_HPF_FREEZE_DISABLE);
2051 __STATIC_INLINE uint32_t ll_pdm_is_enable_right_hpf_freeze_en(pdm_regs_t *PDMx)
2053 return (READ_BITS(PDMx->HPF_CFG_R, PDM_HPF_CFG_R_FREEZE_EN) == LL_PDM_RIGHT_HPF_FREEZE_ENABLE);
2069 __STATIC_INLINE
void ll_pdm_set_left_pga_val(pdm_regs_t *PDMx, uint32_t pga_val)
2071 MODIFY_REG(PDMx->PGA_CFG_L, PDM_PGA_CFG_L_VAL, pga_val << PDM_PGA_CFG_L_VAL_POS);
2086 __STATIC_INLINE uint32_t ll_pdm_get_left_pga_val(pdm_regs_t *PDMx)
2088 return (READ_BITS(PDMx->PGA_CFG_L, PDM_PGA_CFG_L_VAL) >> PDM_PGA_CFG_L_VAL_POS);
2104 __STATIC_INLINE
void ll_pdm_set_right_pga_val(pdm_regs_t *PDMx, uint32_t pga_val)
2106 MODIFY_REG(PDMx->PGA_CFG_R, PDM_PGA_CFG_R_VAL, pga_val << PDM_PGA_CFG_R_VAL_POS);
2121 __STATIC_INLINE uint32_t ll_pdm_get_right_pga_val(pdm_regs_t *PDMx)
2123 return (READ_BITS(PDMx->PGA_CFG_R, PDM_PGA_CFG_R_VAL) >> PDM_PGA_CFG_R_VAL_POS);
2138 __STATIC_INLINE uint32_t ll_pdm_get_left_data(pdm_regs_t *PDMx)
2140 return (READ_BITS(PDMx->DATA_L, PDM_DATA_L_DATA) >> PDM_DATA_L_DATA_POS);
2155 __STATIC_INLINE uint32_t ll_pdm_get_right_data(pdm_regs_t *PDMx)
2157 return (READ_BITS(PDMx->DATA_R, PDM_DATA_R_DATA) >> PDM_DATA_R_DATA_POS);
2173 __STATIC_INLINE
void ll_pdm_left_clear_flag_valid(pdm_regs_t *PDMx)
2175 MODIFY_REG(PDMx->DATA_L, PDM_DATA_L_VALID, (1 << PDM_DATA_L_VALID_POS));
2191 __STATIC_INLINE uint32_t ll_pdm_left_is_active_flag_valid(pdm_regs_t *PDMx)
2193 return ((READ_BITS(PDMx->DATA_L, PDM_DATA_L_VALID) >> PDM_DATA_L_VALID_POS) == 1);
2209 __STATIC_INLINE
void ll_pdm_right_clear_flag_valid(pdm_regs_t *PDMx)
2211 MODIFY_REG(PDMx->DATA_R, PDM_DATA_R_VALID, (1 << PDM_DATA_R_VALID_POS));
2227 __STATIC_INLINE uint32_t ll_pdm_right_is_active_flag_valid(pdm_regs_t *PDMx)
2229 return ((READ_BITS(PDMx->DATA_R, PDM_DATA_R_VALID) >> PDM_DATA_R_VALID_POS) == 1);
2245 __STATIC_INLINE
void ll_pdm_left_clear_flag_overflow(pdm_regs_t *PDMx)
2247 MODIFY_REG(PDMx->DATA_L, PDM_DATA_L_OVER, (1 << PDM_DATA_L_OVER_POS));
2263 __STATIC_INLINE uint32_t ll_pdm_left_is_active_flag_overflow(pdm_regs_t *PDMx)
2265 return ((READ_BITS(PDMx->DATA_L, PDM_DATA_L_OVER) >> PDM_DATA_L_OVER_POS) == 1);
2281 __STATIC_INLINE
void ll_pdm_right_clear_flag_overflow(pdm_regs_t *PDMx)
2283 MODIFY_REG(PDMx->DATA_R, PDM_DATA_R_OVER, (1 << PDM_DATA_R_OVER_POS));
2299 __STATIC_INLINE uint32_t ll_pdm_right_is_active_flag_overflow(pdm_regs_t *PDMx)
2301 return ((READ_BITS(PDMx->DATA_R, PDM_DATA_R_OVER) >> PDM_DATA_R_OVER_POS) == 1);
2314 __STATIC_INLINE
void ll_pdm_left_enable_it_valid(pdm_regs_t *PDMx)
2316 MODIFY_REG(PDMx->INT_L, PDM_INT_L_VALID_MASK,(0 << PDM_INT_L_VALID_MASK_POS));
2329 __STATIC_INLINE
void ll_pdm_left_disable_it_valid(pdm_regs_t *PDMx)
2331 MODIFY_REG(PDMx->INT_L, PDM_INT_L_VALID_MASK,(1 << PDM_INT_L_VALID_MASK_POS));
2344 __STATIC_INLINE uint32_t ll_pdm_left_is_enable_it_valid(pdm_regs_t *PDMx)
2346 return ((READ_BITS(PDMx->INT_L, PDM_INT_L_VALID_MASK) >> PDM_INT_L_VALID_MASK_POS) == 0);
2359 __STATIC_INLINE
void ll_pdm_right_enable_it_valid(pdm_regs_t *PDMx)
2361 MODIFY_REG(PDMx->INT_R, PDM_INT_R_VALID_MASK,(0 << PDM_INT_R_VALID_MASK_POS));
2374 __STATIC_INLINE
void ll_pdm_right_disable_it_valid(pdm_regs_t *PDMx)
2376 MODIFY_REG(PDMx->INT_R, PDM_INT_R_VALID_MASK,(1 << PDM_INT_R_VALID_MASK_POS));
2389 __STATIC_INLINE uint32_t ll_pdm_right_is_enable_it_valid(pdm_regs_t *PDMx)
2391 return ((READ_BITS(PDMx->INT_R, PDM_INT_R_VALID_MASK) >> PDM_INT_R_VALID_MASK_POS) == 0);
2404 __STATIC_INLINE
void ll_pdm_left_enable_it_overflow(pdm_regs_t *PDMx)
2406 MODIFY_REG(PDMx->INT_L, PDM_INT_L_OVER_MASK,(0 << PDM_INT_L_OVER_MASK_POS));
2419 __STATIC_INLINE
void ll_pdm_left_disable_it_overflow(pdm_regs_t *PDMx)
2421 MODIFY_REG(PDMx->INT_L, PDM_INT_L_OVER_MASK,(1 << PDM_INT_L_OVER_MASK_POS));
2434 __STATIC_INLINE uint32_t ll_pdm_left_is_enable_it_overflow(pdm_regs_t *PDMx)
2436 return ((READ_BITS(PDMx->INT_L, PDM_INT_L_OVER_MASK) >> PDM_INT_L_OVER_MASK_POS) == 0);
2449 __STATIC_INLINE
void ll_pdm_right_enable_it_overflow(pdm_regs_t *PDMx)
2451 MODIFY_REG(PDMx->INT_R, PDM_INT_R_OVER_MASK,(0 << PDM_INT_R_OVER_MASK_POS));
2464 __STATIC_INLINE
void ll_pdm_right_disable_it_overflow(pdm_regs_t *PDMx)
2466 MODIFY_REG(PDMx->INT_R, PDM_INT_R_OVER_MASK,(1 << PDM_INT_R_OVER_MASK_POS));
2479 __STATIC_INLINE uint32_t ll_pdm_right_is_enable_it_overflow(pdm_regs_t *PDMx)
2481 return ((READ_BITS(PDMx->INT_R, PDM_INT_R_OVER_MASK) >> PDM_INT_R_OVER_MASK_POS) == 0);
2494 __STATIC_INLINE
void ll_pdm_left_enable_dma_mask(pdm_regs_t *PDMx)
2496 MODIFY_REG(PDMx->DATA_L, PDM_DATA_L_VALID_DMA_MASK,PDM_DATA_L_VALID_DMA_MASK_ENABLE);
2509 __STATIC_INLINE
void ll_pdm_left_disable_dma_mask(pdm_regs_t *PDMx)
2511 MODIFY_REG(PDMx->DATA_L, PDM_DATA_L_VALID_DMA_MASK,PDM_DATA_L_VALID_DMA_MASK_DISABLE);
2524 __STATIC_INLINE
void ll_pdm_right_enable_dma_mask(pdm_regs_t *PDMx)
2526 MODIFY_REG(PDMx->DATA_R, PDM_DATA_R_VALID_DMA_MASK,PDM_DATA_R_VALID_DMA_MASK_ENABLE);
2539 __STATIC_INLINE
void ll_pdm_right_disable_dma_mask(pdm_regs_t *PDMx)
2541 MODIFY_REG(PDMx->DATA_R, PDM_DATA_R_VALID_DMA_MASK,PDM_DATA_R_VALID_DMA_MASK_DISABLE);
2557 error_status_t ll_pdm_deinit(pdm_regs_t *PDMx);
2567 error_status_t ll_pdm_init(pdm_regs_t *PDMx, ll_pdm_init_t *p_pdm_init);
2575 void ll_pdm_struct_init(ll_pdm_init_t *p_pdm_init);