52 #ifndef __GR55xx_LL_OSPI_X_H__
53 #define __GR55xx_LL_OSPI_X_H__
70 typedef struct _ll_ospi_x_init_t {
74 uint32_t dqs_timeout_ns;
76 uint32_t mem_base_address;
78 uint32_t mem_top_address;
80 uint32_t mem_page_size;
82 uint32_t timing_max_tCEM_us;
84 uint32_t timing_min_tRST_us;
86 uint32_t timing_min_tCPH_ns;
88 uint32_t timing_min_tRC_ns;
90 uint32_t timing_min_tXPDPD_ns;
92 uint32_t timing_min_tXDPD_us;
94 uint32_t timing_min_tXPHS_ns;
96 uint32_t timing_min_tXHS_us;
98 uint8_t is_tcem_ignore;
100 uint8_t is_txdpd_ignore;
102 uint8_t is_txhs_ignore;
104 uint8_t cmd_linear_burst_rd;
106 uint8_t cmd_linear_burst_wr;
112 uint8_t cmd_mode_register_rd;
114 uint8_t cmd_mode_register_wr;
116 uint8_t cmd_global_reset;
128 #define LL_OSPI_X_TCEM_TIME_IGNORE_DISABLE 0x00
129 #define LL_OSPI_X_TCEM_TIME_IGNORE_ENABLE 0x01
136 #define LL_OSPI_X_TXHS_TIME_IGNORE_DISABLE 0x00
137 #define LL_OSPI_X_TXHS_TIME_IGNORE_ENABLE 0x01
144 #define LL_OSPI_X_ACCESS_TYPE_MEMORY_ARRAY 0x00
145 #define LL_OSPI_X_ACCESS_TYPE_MODE_REGISTER 0x01
152 #define LL_OSPI_X_TXDPD_TIME_IGNORE_DISABLE 0x00
153 #define LL_OSPI_X_TXDPD_TIME_IGNORE_ENABLE 0x01
160 #define LL_OSPI_X_READ_PREFETCH_DISABLE 0x00
161 #define LL_OSPI_X_READ_PREFETCH_ENABLE 0x01
168 #define LL_OSPI_X_INTERRUPT_DISABLE 0x00
169 #define LL_OSPI_X_INTERRUPT_ENABLE 0x01
176 #define LL_OSPI_X_MEM_PAGE_SIZE_64Bytes 0x06
177 #define LL_OSPI_X_MEM_PAGE_SIZE_128Bytes 0x07
178 #define LL_OSPI_X_MEM_PAGE_SIZE_256Bytes 0x08
179 #define LL_OSPI_X_MEM_PAGE_SIZE_512Bytes 0x09
180 #define LL_OSPI_X_MEM_PAGE_SIZE_1024Bytes 0x0A
181 #define LL_OSPI_X_MEM_PAGE_SIZE_2048Bytes 0x0B
182 #define LL_OSPI_X_MEM_PAGE_SIZE_4096Bytes 0x0C
196 __STATIC_INLINE
void ll_ospi_x_set_mem_base_address(ospi_x_regs_t * OSPIx, uint32_t base_address)
198 MODIFY_REG(OSPIx->MEM_BASE_ADDR, OSPI_X_MEM_BASE_ADDR, base_address << OSPI_X_MEM_BASE_ADDR_POS);
207 __STATIC_INLINE uint32_t ll_ospi_x_get_mem_base_address(ospi_x_regs_t * OSPIx)
209 return (uint32_t)(READ_BITS(OSPIx->MEM_BASE_ADDR, OSPI_X_MEM_BASE_ADDR) >> OSPI_X_MEM_BASE_ADDR_POS);
219 __STATIC_INLINE
void ll_ospi_x_set_mem_top_address(ospi_x_regs_t * OSPIx, uint32_t top_address)
221 MODIFY_REG(OSPIx->MEM_TOP_ADDR, OSPI_X_MEM_TOP_ADDR, top_address << OSPI_X_MEM_TOP_ADDR_POS);
230 __STATIC_INLINE uint32_t ll_ospi_x_get_mem_top_address(ospi_x_regs_t * OSPIx)
232 return (uint32_t)(READ_BITS(OSPIx->MEM_TOP_ADDR, OSPI_X_MEM_TOP_ADDR) >> OSPI_X_MEM_TOP_ADDR_POS);
242 __STATIC_INLINE
void ll_ospi_x_set_trst_count(ospi_x_regs_t * OSPIx, uint32_t trst_cnt)
244 MODIFY_REG(OSPIx->GLOBAL_RESET, OSPI_X_TRST_CNT, trst_cnt << OSPI_X_TRST_CNT_POS);
253 __STATIC_INLINE uint32_t ll_ospi_x_get_trst_count(ospi_x_regs_t * OSPIx)
255 return (uint32_t)(READ_BITS(OSPIx->GLOBAL_RESET, OSPI_X_TRST_CNT) >> OSPI_X_TRST_CNT_POS);
264 __STATIC_INLINE
void ll_ospi_x_enable_global_reset(ospi_x_regs_t * OSPIx)
266 MODIFY_REG(OSPIx->GLOBAL_RESET, OSPI_X_GLOBAL_RST_EN, 1 << OSPI_X_GLOBAL_RST_EN_POS);
276 __STATIC_INLINE
void ll_ospi_x_set_access_type(ospi_x_regs_t * OSPIx, uint32_t access_type)
278 MODIFY_REG(OSPIx->ACCESS_TYPE, OSPI_X_ACCESS_TYPE, access_type << OSPI_X_ACCESS_TYPE_POS);
287 __STATIC_INLINE uint32_t ll_ospi_x_get_access_type(ospi_x_regs_t * OSPIx)
289 return (uint32_t)(READ_BITS(OSPIx->ACCESS_TYPE, OSPI_X_ACCESS_TYPE) >> OSPI_X_ACCESS_TYPE_POS);
299 __STATIC_INLINE
void ll_ospi_x_set_tcem_ignore(ospi_x_regs_t * OSPIx, uint32_t is_ignore)
301 MODIFY_REG(OSPIx->ACCESS_TIMING, OSPI_X_TCEM_IGNORE, is_ignore << OSPI_X_TCEM_IGNORE_POS);
310 __STATIC_INLINE uint32_t ll_ospi_x_get_tcem_ignore(ospi_x_regs_t * OSPIx)
312 return (uint32_t)(READ_BITS(OSPIx->ACCESS_TIMING, OSPI_X_TCEM_IGNORE) >> OSPI_X_TCEM_IGNORE_POS);
322 __STATIC_INLINE
void ll_ospi_x_set_tcem_count(ospi_x_regs_t * OSPIx, uint32_t tcem_cnt)
324 MODIFY_REG(OSPIx->ACCESS_TIMING, OSPI_X_TCEM_CNT, tcem_cnt << OSPI_X_TCEM_CNT_POS);
333 __STATIC_INLINE uint32_t ll_ospi_x_get_tcem_count(ospi_x_regs_t * OSPIx)
335 return (uint32_t)(READ_BITS(OSPIx->ACCESS_TIMING, OSPI_X_TCEM_CNT) >> OSPI_X_TCEM_CNT_POS);
345 __STATIC_INLINE
void ll_ospi_x_set_trc_count(ospi_x_regs_t * OSPIx, uint32_t trc_cnt)
347 MODIFY_REG(OSPIx->ACCESS_TIMING, OSPI_X_TRC_CNT, trc_cnt << OSPI_X_TRC_CNT_POS);
356 __STATIC_INLINE uint32_t ll_ospi_x_get_trc_count(ospi_x_regs_t * OSPIx)
358 return (uint32_t)(READ_BITS(OSPIx->ACCESS_TIMING, OSPI_X_TRC_CNT) >> OSPI_X_TRC_CNT_POS);
368 __STATIC_INLINE
void ll_ospi_x_set_tcph_count(ospi_x_regs_t * OSPIx, uint32_t tcph_cnt)
370 MODIFY_REG(OSPIx->ACCESS_TIMING, OSPI_X_TCPH_CNT, tcph_cnt << OSPI_X_TCPH_CNT_POS);
379 __STATIC_INLINE uint32_t ll_ospi_x_get_tcph_count(ospi_x_regs_t * OSPIx)
381 return (uint32_t)(READ_BITS(OSPIx->ACCESS_TIMING, OSPI_X_TCPH_CNT) >> OSPI_X_TCPH_CNT_POS);
391 __STATIC_INLINE
void ll_ospi_x_set_mem_page_size(ospi_x_regs_t * OSPIx, uint32_t mem_page_size)
393 MODIFY_REG(OSPIx->ACCESS_TIMING, OSPI_X_MEM_PAGE_SIZE, mem_page_size << OSPI_X_MEM_PAGE_SIZE_POS);
402 __STATIC_INLINE uint32_t ll_ospi_x_get_mem_page_size(ospi_x_regs_t * OSPIx)
404 return (uint32_t)(READ_BITS(OSPIx->ACCESS_TIMING, OSPI_X_MEM_PAGE_SIZE) >> OSPI_X_MEM_PAGE_SIZE_POS);
413 __STATIC_INLINE
void ll_ospi_x_entry_dpd(ospi_x_regs_t * OSPIx)
415 MODIFY_REG(OSPIx->DEEP_DOWN_CNTRL, OSPI_X_DPD_ENTRY, 0x01 << OSPI_X_DPD_ENTRY_POS);
424 __STATIC_INLINE
void ll_ospi_x_exit_dpd(ospi_x_regs_t * OSPIx)
426 MODIFY_REG(OSPIx->DEEP_DOWN_CNTRL, OSPI_X_DPD_EXIT, 0x01 << OSPI_X_DPD_EXIT_POS);
436 __STATIC_INLINE
void ll_ospi_x_set_txdpd_ignore(ospi_x_regs_t * OSPIx, uint32_t is_ignore)
438 MODIFY_REG(OSPIx->DEEP_DOWN_CNTRL, OSPI_X_TXDPD_TIME_IGNORE, is_ignore << OSPI_X_TXDPD_TIME_IGNORE_POS);
447 __STATIC_INLINE uint32_t ll_ospi_x_get_txdpd_ignore(ospi_x_regs_t * OSPIx)
449 return (uint32_t)(READ_BITS(OSPIx->DEEP_DOWN_CNTRL, OSPI_X_TXDPD_TIME_IGNORE) >> OSPI_X_TXDPD_TIME_IGNORE_POS);
459 __STATIC_INLINE
void ll_ospi_x_set_txdpd_count(ospi_x_regs_t * OSPIx, uint32_t txdpd_cnt)
461 MODIFY_REG(OSPIx->DEEP_DOWN_CNTRL, OSPI_X_TXDPD_CNT, txdpd_cnt << OSPI_X_TXDPD_CNT_POS);
470 __STATIC_INLINE uint32_t ll_ospi_x_get_txdpd_count(ospi_x_regs_t * OSPIx)
472 return (uint32_t)(READ_BITS(OSPIx->DEEP_DOWN_CNTRL, OSPI_X_TXDPD_CNT) >> OSPI_X_TXDPD_CNT_POS);
482 __STATIC_INLINE
void ll_ospi_x_set_txpdpd_count(ospi_x_regs_t * OSPIx, uint32_t txpdpd_cnt)
484 MODIFY_REG(OSPIx->DEEP_DOWN_CNTRL, OSPI_X_TXPDPD_CNT, txpdpd_cnt << OSPI_X_DPD_EXIT_CYCLE_CNT_POS);
493 __STATIC_INLINE uint32_t ll_ospi_x_get_txpdpd_count(ospi_x_regs_t * OSPIx)
495 return (uint32_t)(READ_BITS(OSPIx->DEEP_DOWN_CNTRL, OSPI_X_TXPDPD_CNT) >> OSPI_X_DPD_EXIT_CYCLE_CNT_POS);
504 __STATIC_INLINE
void ll_ospi_x_entry_half_sleep(ospi_x_regs_t * OSPIx)
506 MODIFY_REG(OSPIx->HALF_SLP_CNTRL, OSPI_X_HS_ENTRY, 0x01 << OSPI_X_HS_ENTRY_POS);
515 __STATIC_INLINE
void ll_ospi_x_exit_half_sleep(ospi_x_regs_t * OSPIx)
517 MODIFY_REG(OSPIx->HALF_SLP_CNTRL, OSPI_X_HS_EXIT, 0x01 << OSPI_X_HS_EXIT_POS);
527 __STATIC_INLINE
void ll_ospi_x_set_txhs_ignore(ospi_x_regs_t * OSPIx, uint32_t is_ignore)
529 MODIFY_REG(OSPIx->HALF_SLP_CNTRL, OSPI_X_TXHS_TIME_IGNORE, is_ignore << OSPI_X_TXHS_TIME_IGNORE_POS);
538 __STATIC_INLINE uint32_t ll_ospi_x_get_txhs_ignore(ospi_x_regs_t * OSPIx)
540 return (uint32_t)(READ_BITS(OSPIx->HALF_SLP_CNTRL, OSPI_X_TXHS_TIME_IGNORE) >> OSPI_X_TXHS_TIME_IGNORE_POS);
550 __STATIC_INLINE
void ll_ospi_x_set_txhs_count(ospi_x_regs_t * OSPIx, uint32_t txhs_count)
552 MODIFY_REG(OSPIx->HALF_SLP_CNTRL, OSPI_X_TXHS_CNT, txhs_count << OSPI_X_TXHS_CNT_POS);
561 __STATIC_INLINE uint32_t ll_ospi_x_get_txhs_count(ospi_x_regs_t * OSPIx)
563 return (uint32_t)(READ_BITS(OSPIx->HALF_SLP_CNTRL, OSPI_X_TXHS_CNT) >> OSPI_X_TXHS_CNT_POS);
573 __STATIC_INLINE
void ll_ospi_x_set_txphs_count(ospi_x_regs_t * OSPIx, uint32_t txphs_count)
575 MODIFY_REG(OSPIx->HALF_SLP_CNTRL, OSPI_X_HS_EXIT_CYCLE_CNT, txphs_count << OSPI_X_HS_EXIT_CYCLE_CNT_POS);
584 __STATIC_INLINE uint32_t ll_ospi_x_get_txphs_count(ospi_x_regs_t * OSPIx)
586 return (uint32_t)(READ_BITS(OSPIx->HALF_SLP_CNTRL, OSPI_X_HS_EXIT_CYCLE_CNT) >> OSPI_X_HS_EXIT_CYCLE_CNT_POS);
596 __STATIC_INLINE
void ll_ospi_x_set_global_rst_interrupt(ospi_x_regs_t * OSPIx, uint32_t intr)
598 MODIFY_REG(OSPIx->INTERRUPT_CNTRL, OSPI_X_GLOBAL_RST_IE, intr << OSPI_X_GLOBAL_RST_IE_POS);
607 __STATIC_INLINE uint32_t ll_ospi_x_is_global_rst_interrupt_enabled(ospi_x_regs_t * OSPIx)
609 return (READ_BITS(OSPIx->INTERRUPT_CNTRL, OSPI_X_GLOBAL_RST_IE) == OSPI_X_GLOBAL_RST_IE) ? 1 : 0;
619 __STATIC_INLINE
void ll_ospi_x_set_half_sleep_entry_interrupt(ospi_x_regs_t * OSPIx, uint32_t intr)
621 MODIFY_REG(OSPIx->INTERRUPT_CNTRL, OSPI_X_HS_ENTRY_IE, intr << OSPI_X_HS_ENTRY_IE_POS);
630 __STATIC_INLINE uint32_t ll_ospi_x_is_half_sleep_entry_interrupt_enabled(ospi_x_regs_t * OSPIx)
632 return (READ_BITS(OSPIx->INTERRUPT_CNTRL, OSPI_X_HS_ENTRY_IE) == OSPI_X_HS_ENTRY_IE) ? 1 : 0;
642 __STATIC_INLINE
void ll_ospi_x_set_half_sleep_exit_interrupt(ospi_x_regs_t * OSPIx, uint32_t intr)
644 MODIFY_REG(OSPIx->INTERRUPT_CNTRL, OSPI_X_HS_EXIT_IE, intr << OSPI_X_HS_EXIT_IE_POS);
653 __STATIC_INLINE uint32_t ll_ospi_x_is_half_sleep_exit_interrupt_enabled(ospi_x_regs_t * OSPIx)
655 return (READ_BITS(OSPIx->INTERRUPT_CNTRL, OSPI_X_HS_EXIT_IE) == OSPI_X_HS_EXIT_IE) ? 1 : 0;
665 __STATIC_INLINE
void ll_ospi_x_set_dpd_entry_interrupt(ospi_x_regs_t * OSPIx, uint32_t intr)
667 MODIFY_REG(OSPIx->INTERRUPT_CNTRL, OSPI_X_DPD_ENTRY_IE, intr << OSPI_X_DPD_ENTRY_IE_POS);
676 __STATIC_INLINE uint32_t ll_ospi_x_is_dpd_entry_interrupt_enabled(ospi_x_regs_t * OSPIx)
678 return (READ_BITS(OSPIx->INTERRUPT_CNTRL, OSPI_X_DPD_ENTRY_IE) == OSPI_X_DPD_ENTRY_IE) ? 1 : 0;
688 __STATIC_INLINE
void ll_ospi_x_set_dpd_exit_interrupt(ospi_x_regs_t * OSPIx, uint32_t intr)
690 MODIFY_REG(OSPIx->INTERRUPT_CNTRL, OSPI_X_DPD_EXIT_IE, intr << OSPI_X_DPD_EXIT_IE_POS);
699 __STATIC_INLINE uint32_t ll_ospi_x_is_dpd_exit_interrupt_enabled(ospi_x_regs_t * OSPIx)
701 return (READ_BITS(OSPIx->INTERRUPT_CNTRL, OSPI_X_DPD_EXIT_IE) == OSPI_X_DPD_EXIT_IE) ? 1 : 0;
711 __STATIC_INLINE
void ll_ospi_x_set_dqs_timeout_interrupt(ospi_x_regs_t * OSPIx, uint32_t intr)
713 MODIFY_REG(OSPIx->INTERRUPT_CNTRL, OSPI_X_DQS_TIMEOUT_IE, intr << OSPI_X_DQS_TIMEOUT_IE_POS);
722 __STATIC_INLINE uint32_t ll_ospi_x_is_dqs_timeout_interrupt_enabled(ospi_x_regs_t * OSPIx)
724 return (READ_BITS(OSPIx->INTERRUPT_CNTRL, OSPI_X_DQS_TIMEOUT_IE) == OSPI_X_DQS_TIMEOUT_IE) ? 1 : 0;
733 __STATIC_INLINE uint32_t ll_ospi_x_is_global_rst_done(ospi_x_regs_t * OSPIx)
735 uint32_t status = OSPIx->XFER_STATUS;
736 return ((status & 0x01) > 0 ? 1 : 0);
745 __STATIC_INLINE uint32_t ll_ospi_x_is_half_sleep_entry_done(ospi_x_regs_t * OSPIx)
747 return (READ_BITS(OSPIx->XFER_STATUS, OSPI_X_HS_ENTRY_DONE) == OSPI_X_HS_ENTRY_DONE) ? 1 : 0;
756 __STATIC_INLINE uint32_t ll_ospi_x_is_half_sleep_exit_done(ospi_x_regs_t * OSPIx)
758 return (READ_BITS(OSPIx->XFER_STATUS, OSPI_X_HS_EXIT_DONE) == OSPI_X_HS_EXIT_DONE) ? 1 : 0;
767 __STATIC_INLINE uint32_t ll_ospi_x_is_dpd_entry_done(ospi_x_regs_t * OSPIx)
769 return (READ_BITS(OSPIx->XFER_STATUS, OSPI_X_DPD_ENTRY_DONE) == OSPI_X_DPD_ENTRY_DONE) ? 1 : 0;
778 __STATIC_INLINE uint32_t ll_ospi_x_is_dpd_exit_done(ospi_x_regs_t * OSPIx)
780 return (READ_BITS(OSPIx->XFER_STATUS, OSPI_X_DPD_EXIT_DONE) == OSPI_X_DPD_EXIT_DONE) ? 1 : 0;
789 __STATIC_INLINE uint32_t ll_ospi_x_is_dqs_timeout_err(ospi_x_regs_t * OSPIx)
791 return (READ_BITS(OSPIx->XFER_STATUS, OSPI_X_DQS_NON_TOGGLE_ERR) == OSPI_X_DQS_NON_TOGGLE_ERR) ? 1 : 0;
801 __STATIC_INLINE
void ll_ospi_x_set_sync_read_cmd(ospi_x_regs_t * OSPIx, uint32_t cmd)
803 MODIFY_REG(OSPIx->CMD_CNTRL_1, OSPI_X_CMD_SYNC_RD, cmd << OSPI_X_CMD_SYNC_RD_POS);
812 __STATIC_INLINE uint32_t ll_ospi_x_get_sync_read_cmd(ospi_x_regs_t * OSPIx)
814 return (uint32_t)(READ_BITS(OSPIx->CMD_CNTRL_1, OSPI_X_CMD_SYNC_RD) >> OSPI_X_CMD_SYNC_RD_POS);
824 __STATIC_INLINE
void ll_ospi_x_set_sync_write_cmd(ospi_x_regs_t * OSPIx, uint32_t cmd)
826 MODIFY_REG(OSPIx->CMD_CNTRL_1, OSPI_X_CMD_SYNC_WR, cmd << OSPI_X_CMD_SYNC_WR_POS);
835 __STATIC_INLINE uint32_t ll_ospi_x_get_sync_write_cmd(ospi_x_regs_t * OSPIx)
837 return (uint32_t)(READ_BITS(OSPIx->CMD_CNTRL_1, OSPI_X_CMD_SYNC_WR) >> OSPI_X_CMD_SYNC_WR_POS);
847 __STATIC_INLINE
void ll_ospi_x_set_burst_read_cmd(ospi_x_regs_t * OSPIx, uint32_t cmd)
849 MODIFY_REG(OSPIx->CMD_CNTRL_1, OSPI_X_CMD_BURST_RD, cmd << OSPI_X_CMD_BURST_RD_POS);
858 __STATIC_INLINE uint32_t ll_ospi_x_get_burst_read_cmd(ospi_x_regs_t * OSPIx)
860 return (uint32_t)(READ_BITS(OSPIx->CMD_CNTRL_1, OSPI_X_CMD_BURST_RD) >> OSPI_X_CMD_BURST_RD_POS);
870 __STATIC_INLINE
void ll_ospi_x_set_burst_write_cmd(ospi_x_regs_t * OSPIx, uint32_t cmd)
872 MODIFY_REG(OSPIx->CMD_CNTRL_1, OSPI_X_CMD_BURST_WR, cmd << OSPI_X_CMD_BURST_WR_POS);
881 __STATIC_INLINE uint32_t ll_ospi_x_get_burst_write_cmd(ospi_x_regs_t * OSPIx)
883 return (uint32_t)(READ_BITS(OSPIx->CMD_CNTRL_1, OSPI_X_CMD_BURST_WR) >> OSPI_X_CMD_BURST_WR_POS);
893 __STATIC_INLINE
void ll_ospi_x_set_register_read_cmd(ospi_x_regs_t * OSPIx, uint32_t cmd)
895 MODIFY_REG(OSPIx->CMD_CNTRL_2, OSPI_X_CMD_REG_RD, cmd << OSPI_X_CMD_REG_RD_POS);
904 __STATIC_INLINE uint32_t ll_ospi_x_get_register_read_cmd(ospi_x_regs_t * OSPIx)
906 return (uint32_t)(READ_BITS(OSPIx->CMD_CNTRL_2, OSPI_X_CMD_REG_RD) >> OSPI_X_CMD_REG_RD_POS);
916 __STATIC_INLINE
void ll_ospi_x_set_register_write_cmd(ospi_x_regs_t * OSPIx, uint32_t cmd)
918 MODIFY_REG(OSPIx->CMD_CNTRL_2, OSPI_X_CMD_REG_WR, cmd << OSPI_X_CMD_REG_WR_POS);
927 __STATIC_INLINE uint32_t ll_ospi_x_get_register_write_cmd(ospi_x_regs_t * OSPIx)
929 return (uint32_t)(READ_BITS(OSPIx->CMD_CNTRL_2, OSPI_X_CMD_REG_WR) >> OSPI_X_CMD_REG_WR_POS);
939 __STATIC_INLINE
void ll_ospi_x_set_global_rst_cmd(ospi_x_regs_t * OSPIx, uint32_t cmd)
941 MODIFY_REG(OSPIx->CMD_CNTRL_2, OSPI_X_CMD_GLOBAL_RST, cmd << OSPI_X_CMD_GLOBAL_RST_POS);
950 __STATIC_INLINE uint32_t ll_ospi_x_get_global_rst_cmd(ospi_x_regs_t * OSPIx)
952 return (uint32_t)(READ_BITS(OSPIx->CMD_CNTRL_2, OSPI_X_CMD_GLOBAL_RST) >> OSPI_X_CMD_GLOBAL_RST_POS);
962 __STATIC_INLINE
void ll_ospi_x_set_dqs_timeout(ospi_x_regs_t * OSPIx, uint32_t timeout_clk)
964 timeout_clk = (timeout_clk > 31) ? 31 : timeout_clk;
965 MODIFY_REG(OSPIx->DQS_TIMEOUT, OSPI_X_DQS_NON_TGL_TIMEOUT, timeout_clk << OSPI_X_DQS_NON_TGL_TIMEOUT_POS);
974 __STATIC_INLINE uint32_t ll_ospi_x_get_dqs_timeout(ospi_x_regs_t * OSPIx)
976 return (uint32_t)(READ_BITS(OSPIx->DQS_TIMEOUT, OSPI_X_DQS_NON_TGL_TIMEOUT) >> OSPI_X_DQS_NON_TGL_TIMEOUT_POS);
986 __STATIC_INLINE
void ll_ospi_x_set_read_prefetch(ospi_x_regs_t * OSPIx, uint32_t is_prefetch)
988 MODIFY_REG(OSPIx->READ_PREFETCH, OSPI_X_RD_DATA_PREFETCH, is_prefetch << OSPI_X_RD_DATA_PREFETCH_POS);
997 __STATIC_INLINE uint32_t ll_ospi_x_is_read_prefetch_enabled(ospi_x_regs_t * OSPIx)
999 return (READ_BITS(OSPIx->READ_PREFETCH, OSPI_X_RD_DATA_PREFETCH) == OSPI_X_RD_DATA_PREFETCH) ? 1 : 0;
1009 __STATIC_INLINE
void ll_ospi_x_set_phy_delay(ospi_x_regs_t * OSPIx, uint32_t phy_delay)
1011 MODIFY_REG(OSPIx->PHY_CNTRL_0, 0xFF, phy_delay);
1020 __STATIC_INLINE uint32_t ll_ospi_x_get_phy_delay(ospi_x_regs_t * OSPIx)
1022 return READ_BITS(OSPIx->PHY_CNTRL_0, 0xFF);
1031 __STATIC_INLINE uint32_t ll_ospi_x_get_xip_base_address(ospi_x_regs_t * OSPIx) {
1032 return OSPI0_XIP_BASE;
1043 error_status_t ll_ospi_x_init(ospi_x_regs_t * OSPIx, ll_ospi_x_init_t * p_ospi_x_init);
1052 error_status_t ll_ospi_x_deinit(ospi_x_regs_t * OSPIx);