51 #ifndef __GR55XX_LL_ADVS_H_
52 #define __GR55XX_LL_ADVS_H_
68 #define LL_ADVS_DIS (0U)
69 #define LL_ADVS_EN (1U)
75 #define LL_ADVS_LOWER_TYPE (0U)
76 #define LL_ADVS_HIGHER_TYPE (1U)
82 #define LL_ADVS_LIMIT_DIS (0U)
83 #define LL_ADVS_LIMIT_EN (1U)
100 MODIFY_REG(AON_PMU->ADVS_DCDC, AON_PMU_ADVS_DCDC_EN_VTBIAS, (enable << AON_PMU_ADVS_DCDC_EN_VTBIAS_Pos));
112 return ((READ_BITS(AON_PMU->ADVS_DCDC, AON_PMU_ADVS_DCDC_EN_VTBIAS)) >> AON_PMU_ADVS_DCDC_EN_VTBIAS_Pos);
124 MODIFY_REG(AON_PMU->ADVS_DCDC, AON_PMU_ADVS_DCDC_VTBIAS_SLOPE_CTRL, (type << AON_PMU_ADVS_DCDC_VTBIAS_SLOPE_CTRL_Pos));
136 return ((READ_BITS(AON_PMU->ADVS_DCDC, AON_PMU_ADVS_DCDC_VTBIAS_SLOPE_CTRL)) >> AON_PMU_ADVS_DCDC_VTBIAS_SLOPE_CTRL_Pos);
148 MODIFY_REG(AON_PMU->ADVS_DCDC, AON_PMU_ADVS_DCDC_EN_LIMITER, (enable << AON_PMU_ADVS_DCDC_EN_LIMITER_Pos));
160 return ((READ_BITS(AON_PMU->ADVS_DCDC, AON_PMU_ADVS_DCDC_EN_LIMITER)) >> AON_PMU_ADVS_DCDC_EN_LIMITER_Pos);
172 MODIFY_REG(AON_PMU->ADVS_DCDC, AON_PMU_ADVS_DCDC_VTBIAS_CTRL_VT_2_0, (vt << AON_PMU_ADVS_DCDC_VTBIAS_CTRL_VT_2_0_Pos));
184 return ((READ_BITS(AON_PMU->ADVS_DCDC, AON_PMU_ADVS_DCDC_VTBIAS_CTRL_VT_2_0)) >> AON_PMU_ADVS_DCDC_VTBIAS_CTRL_VT_2_0_Pos);
196 MODIFY_REG(AON_PMU->ADVS_DCDC, AON_PMU_ADVS_DCDC_VTBIAS_CTRL_LIMIT_2_0, (limit << AON_PMU_ADVS_DCDC_VTBIAS_CTRL_LIMIT_2_0_Pos));
208 return ((READ_BITS(AON_PMU->ADVS_DCDC, AON_PMU_ADVS_DCDC_VTBIAS_CTRL_LIMIT_2_0)) >> AON_PMU_ADVS_DCDC_VTBIAS_CTRL_LIMIT_2_0_Pos);
220 MODIFY_REG(AON_PMU->ADVS_DIGCORE, AON_PMU_ADVS_DIGCORE_EN_VTBIAS, (enable << AON_PMU_ADVS_DIGCORE_EN_VTBIAS_Pos));
232 return ((READ_BITS(AON_PMU->ADVS_DIGCORE, AON_PMU_ADVS_DIGCORE_EN_VTBIAS)) >> AON_PMU_ADVS_DIGCORE_EN_VTBIAS_Pos);
244 MODIFY_REG(AON_PMU->ADVS_DIGCORE, AON_PMU_ADVS_DIGCORE_VTBIAS_SLOPE_CTRL, (type << AON_PMU_ADVS_DIGCORE_VTBIAS_SLOPE_CTRL_Pos));
256 return ((READ_BITS(AON_PMU->ADVS_DIGCORE, AON_PMU_ADVS_DIGCORE_VTBIAS_SLOPE_CTRL)) >> AON_PMU_ADVS_DIGCORE_VTBIAS_SLOPE_CTRL_Pos);
268 MODIFY_REG(AON_PMU->ADVS_DIGCORE, AON_PMU_ADVS_DIGCORE_EN_LIMITER, (enable << AON_PMU_ADVS_DIGCORE_EN_LIMITER_Pos));
280 return ((READ_BITS(AON_PMU->ADVS_DIGCORE, AON_PMU_ADVS_DIGCORE_EN_LIMITER)) >> AON_PMU_ADVS_DIGCORE_EN_LIMITER_Pos);
292 MODIFY_REG(AON_PMU->ADVS_DIGCORE, AON_PMU_ADVS_DIGCORE_VTBIAS_CTRL_VT_2_0, (vt << AON_PMU_ADVS_DIGCORE_VTBIAS_CTRL_VT_2_0_Pos));
304 return ((READ_BITS(AON_PMU->ADVS_DIGCORE, AON_PMU_ADVS_DIGCORE_VTBIAS_CTRL_VT_2_0)) >> AON_PMU_ADVS_DIGCORE_VTBIAS_CTRL_VT_2_0_Pos);
316 MODIFY_REG(AON_PMU->ADVS_DIGCORE, AON_PMU_ADVS_DIGCORE_VTBIAS_CTRL_LIMIT_2_0, (limit << AON_PMU_ADVS_DIGCORE_VTBIAS_CTRL_LIMIT_2_0_Pos));
328 return ((READ_BITS(AON_PMU->ADVS_DIGCORE, AON_PMU_ADVS_DIGCORE_VTBIAS_CTRL_LIMIT_2_0)) >> AON_PMU_ADVS_DIGCORE_VTBIAS_CTRL_LIMIT_2_0_Pos);