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#define | LL_GPIO_MODE_INPUT_POS ((uint32_t)0x0U) |
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#define | LL_GPIO_MODE_OUTPUT_POS ((uint32_t)0x1U) |
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#define | LL_GPIO_STRENGTH_DS0_MASK ((uint32_t)0x10U) |
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#define | LL_GPIO_STRENGTH_DS1_MASK ((uint32_t)0x01U) |
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#define | LL_GPIO_STRENGTH_DS0_POS ((uint32_t)0x04U) |
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#define | LL_GPIO_STRENGTH_DS1_POS ((uint32_t)0x00U) |
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#define | LL_GPIO_PIN_0 ((uint32_t)0x0001U) |
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#define | LL_GPIO_PIN_1 ((uint32_t)0x0002U) |
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#define | LL_GPIO_PIN_2 ((uint32_t)0x0004U) |
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#define | LL_GPIO_PIN_3 ((uint32_t)0x0008U) |
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#define | LL_GPIO_PIN_4 ((uint32_t)0x0010U) |
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#define | LL_GPIO_PIN_5 ((uint32_t)0x0020U) |
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#define | LL_GPIO_PIN_6 ((uint32_t)0x0040U) |
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#define | LL_GPIO_PIN_7 ((uint32_t)0x0080U) |
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#define | LL_GPIO_PIN_8 ((uint32_t)0x0100U) |
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#define | LL_GPIO_PIN_9 ((uint32_t)0x0200U) |
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#define | LL_GPIO_PIN_10 ((uint32_t)0x0400U) |
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#define | LL_GPIO_PIN_11 ((uint32_t)0x0800U) |
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#define | LL_GPIO_PIN_12 ((uint32_t)0x1000U) |
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#define | LL_GPIO_PIN_13 ((uint32_t)0x2000U) |
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#define | LL_GPIO_PIN_14 ((uint32_t)0x4000U) |
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#define | LL_GPIO_PIN_15 ((uint32_t)0x8000U) |
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#define | LL_GPIO_PIN_ALL ((uint32_t)0xFFFFU) |
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#define | LL_GPIO_MODE_NONE ((uint32_t)0x0U) |
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#define | LL_GPIO_MODE_INPUT ((uint32_t)0x1U) |
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#define | LL_GPIO_MODE_OUTPUT ((uint32_t)0x2U) |
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#define | LL_GPIO_MODE_INOUT ((uint32_t)0x3U) |
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#define | LL_GPIO_PULL_NO ((uint32_t)0x0U) |
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#define | LL_GPIO_PULL_UP ((uint32_t)0x1U) |
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#define | LL_GPIO_PULL_DOWN ((uint32_t)0x2U) |
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#define | LL_GPIO_MUX_0 ((uint32_t)0x0U) |
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#define | LL_GPIO_MUX_1 ((uint32_t)0x1U) |
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#define | LL_GPIO_MUX_2 ((uint32_t)0x2U) |
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#define | LL_GPIO_MUX_3 ((uint32_t)0x3U) |
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#define | LL_GPIO_MUX_4 ((uint32_t)0x4U) |
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#define | LL_GPIO_MUX_5 ((uint32_t)0x5U) |
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#define | LL_GPIO_MUX_6 ((uint32_t)0x6U) |
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#define | LL_GPIO_MUX_7 ((uint32_t)0x7U) |
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#define | LL_GPIO_MUX_8 ((uint32_t)0x8U) |
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#define | LL_GPIO_SPEED_MEDIUM ((uint32_t)0x0U) |
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#define | LL_GPIO_SPEED_HIGH ((uint32_t)0x1U) |
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#define | LL_GPIO_STRENGTH_LOW ((uint32_t)0x00U) |
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#define | LL_GPIO_STRENGTH_MEDIUM ((uint32_t)0x01U) |
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#define | LL_GPIO_STRENGTH_HIGH ((uint32_t)0x10U) |
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#define | LL_GPIO_STRENGTH_ULTRA ((uint32_t)0x11U) |
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#define | LL_GPIO_INPUT_TYPE_CMOS ((uint32_t)0x00U) |
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#define | LL_GPIO_INPUT_TYPE_SCHMITT ((uint32_t)0x01U) |
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#define | LL_GPIO_TRIGGER_NONE ((uint32_t)0x00U) |
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#define | LL_GPIO_TRIGGER_RISING ((uint32_t)0x01U) |
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#define | LL_GPIO_TRIGGER_FALLING ((uint32_t)0x02U) |
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#define | LL_GPIO_TRIGGER_HIGH ((uint32_t)0x03U) |
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#define | LL_GPIO_TRIGGER_LOW ((uint32_t)0x04U) |
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#define | LL_GPIO_TRIGGER_BOTH_EDGE ((uint32_t)0x05U) |
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#define | GPIO_DATA_ADDR(x) (GPIO##x##_BASE+0x00) |
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#define | GPIO_DATAOUT_ADDR(x) (GPIO##x##_BASE+0x04) |
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#define | GPIO_OUTENSET_ADDR(x) (GPIO##x##_BASE+0x10) |
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#define | GPIO_OUTENCLR_ADDR(x) (GPIO##x##_BASE+0x14) |
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#define | GPIO_ALTFUNCSET_ADDR(x) (GPIO##x##_BASE+0x18) |
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#define | GPIO_ALTFUNCCLR_ADDR(x) (GPIO##x##_BASE+0x1c) |
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#define | GPIO_INTENSET_ADDR(x) (GPIO##x##_BASE+0x20) |
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#define | GPIO_INTENCLR_ADDR(x) (GPIO##x##_BASE+0x24) |
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#define | GPIO_INTTYPESET_ADDR(x) (GPIO##x##_BASE+0x28) |
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#define | GPIO_INTTYPECLR_ADDR(x) (GPIO##x##_BASE+0x2c) |
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#define | GPIO_INTPOLSET_ADDR(x) (GPIO##x##_BASE+0x30) |
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#define | GPIO_INTPOLCLR_ADDR(x) (GPIO##x##_BASE+0x34) |
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#define | GPIO_INTSTAT_ADDR(x) (GPIO##x##_BASE+0x38) |
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#define | GPIO_INTDBESET_ADDR(x) (GPIO##x##_BASE+0x40) |
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#define | GPIO_INTDBECLR_ADDR(x) (GPIO##x##_BASE+0x44) |
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#define | SET_GPIO_DATA(x, n) BIT_ADDR(GPIO_DATA_ADDR(x),n) |
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#define | SET_GPIO_DATAOUT(x, n) BIT_ADDR(GPIO_DATAOUT_ADDR(x),n) |
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#define | SET_GPIO_OUTENSET(x, n) BIT_ADDR(GPIO_OUTENSET_ADDR(x),n) |
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#define | SET_GPIO_OUTENCLR(x, n) BIT_ADDR(GPIO_OUTENCLR_ADDR(x),n) |
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#define | SET_GPIO_ALTFUNCSET(x, n) BIT_ADDR(GPIO_ALTFUNCSET_ADDR(x),n) |
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#define | SET_GPIO_ALTFUNCCLR(x, n) BIT_ADDR(GPIO_ALTFUNCCLR_ADDR(x),n) |
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#define | SET_GPIO_INTENSET(x, n) BIT_ADDR(GPIO_INTENSET_ADDR(x),n) |
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#define | SET_GPIO_INTENCLR(x, n) BIT_ADDR(GPIO_INTENCLR_ADDR(x),n) |
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#define | SET_GPIO_INTTYPESET(x, n) BIT_ADDR(GPIO_INTTYPESET_ADDR(x),n) |
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#define | SET_GPIO_INTTYPECLR(x, n) BIT_ADDR(GPIO_INTTYPECLR_ADDR(x),n) |
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#define | SET_GPIO_INTPOLSET(x, n) BIT_ADDR(GPIO_INTPOLSET_ADDR(x),n) |
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#define | SET_GPIO_INTPOLCLR(x, n) BIT_ADDR(GPIO_INTPOLCLR_ADDR(x),n) |
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#define | SET_GPIO_INTSTAT(x, n) BIT_ADDR(GPIO_INTSTAT_ADDR(x),n) |
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#define | SET_GPIO_INTDBESET(x, n) BIT_ADDR(GPIO_INTDBESET_ADDR(x),n) |
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#define | SET_GPIO_INTDBECLR(x, n) BIT_ADDR(GPIO_INTDBECLR_ADDR(x),n) |
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#define | LL_GPIO_DEFAULT_CONFIG |
| LL GPIO InitStrcut default configuration. More...
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#define | LL_GPIO_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG(__instance__->__REG__, (__VALUE__)) |
| Write a value in GPIO register. More...
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#define | LL_GPIO_ReadReg(__instance__, __REG__) READ_REG(__instance__->__REG__) |
| Read a value in GPIO register. More...
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#define | IE_SET ((uint32_t)0x1U) |
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#define | OE_SET ((uint32_t)0x2U) |
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#define | TYPE_SET ((uint32_t)0x4U) |
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#define | POL_SET ((uint32_t)0x2U) |
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#define | DBE_SET ((uint32_t)0x1U) |
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__STATIC_INLINE void | ll_gpio_set_pin_mode (gpio_regs_t *GPIOx, uint32_t pin_mask, uint32_t mode) |
| Set several pins to input/output mode on dedicated port. More...
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__STATIC_INLINE uint32_t | ll_gpio_get_pin_mode (gpio_regs_t *GPIOx, uint32_t pin) |
| Return gpio mode for a dedicated pin on dedicated port. More...
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__STATIC_INLINE void | ll_gpio_set_pin_input_type (gpio_regs_t *GPIOx, uint32_t pin_mask, uint32_t type) |
| Set several pins input type on dedicated port. More...
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__STATIC_INLINE uint32_t | ll_gpio_get_pin_input_type (gpio_regs_t *GPIOx, uint32_t pin) |
| Return gpio input type for a dedicated pin on dedicated port. More...
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__STATIC_INLINE void | ll_gpio_set_pin_pull (gpio_regs_t *GPIOx, uint32_t pin_mask, uint32_t pull) |
| Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port. More...
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__STATIC_INLINE uint32_t | ll_gpio_get_pin_pull (gpio_regs_t *GPIOx, uint32_t pin) |
| Return gpio pull-up or pull-down for a dedicated pin on a dedicated port. More...
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__STATIC_INLINE void | ll_gpio_set_pin_mux (gpio_regs_t *GPIOx, uint32_t pin, uint32_t mux) |
| Configure gpio pinmux number of a dedicated pin from 0 to 15 for a dedicated port. More...
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__STATIC_INLINE uint32_t | ll_gpio_get_pin_mux (gpio_regs_t *GPIOx, uint32_t pin) |
| Return gpio alternate function of a dedicated pin from 0 to 15 for a dedicated port. More...
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__STATIC_INLINE void | ll_gpio_set_pin_speed (gpio_regs_t *GPIOx, uint32_t pin_mask, uint32_t speed) |
| Configure gpio speed for a dedicated pin on a dedicated port. More...
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__STATIC_INLINE uint32_t | ll_gpio_get_pin_speed (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Return gpio speed for a dedicated pin on a dedicated port. More...
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__STATIC_INLINE void | ll_gpio_set_pin_strength (gpio_regs_t *GPIOx, uint32_t pin_mask, uint32_t strength) |
| Configure gpio output drive strength for a dedicated pin on a dedicated port. More...
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__STATIC_INLINE uint32_t | ll_gpio_get_pin_strength (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Return gpio output drive strength for a dedicated pin on a dedicated port. More...
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__STATIC_INLINE uint32_t | ll_gpio_read_input_port (gpio_regs_t *GPIOx) |
| Return full input data register value for a dedicated port. More...
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__STATIC_INLINE uint32_t | ll_gpio_read_input_pin (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Return if input data level for several pins of dedicated port is high or low. More...
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__STATIC_INLINE void | ll_gpio_write_output_port (gpio_regs_t *GPIOx, uint32_t port_value) |
| Write output data register for the port. More...
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__STATIC_INLINE uint32_t | ll_gpio_read_output_port (gpio_regs_t *GPIOx) |
| Return full output data register value for a dedicated port. More...
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__STATIC_INLINE uint32_t | ll_gpio_read_output_pin (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Return if output data level for several pins of dedicated port is high or low. More...
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__STATIC_INLINE void | ll_gpio_set_output_pin (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Set several pins to high level on dedicated gpio port. More...
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__STATIC_INLINE void | ll_gpio_reset_output_pin (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Set several pins to low level on dedicated gpio port. More...
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__STATIC_INLINE void | ll_gpio_toggle_pin (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Toggle data value for several pin of dedicated port. More...
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__STATIC_INLINE void | ll_gpio_enable_falling_trigger (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Enable GPIO Falling Edge Trigger for pins in the range of 0 to 15. More...
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__STATIC_INLINE void | ll_gpio_enable_rising_trigger (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Enable GPIO Rising Edge Trigger for pins in the range of 0 to 15. More...
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__STATIC_INLINE void | ll_gpio_enable_high_trigger (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Enable GPIO High Level Trigger for pins in the range of 0 to 15. More...
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__STATIC_INLINE void | ll_gpio_enable_low_trigger (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Enable GPIO Low Level Trigger for pins in the range of 0 to 15. More...
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__STATIC_INLINE void | ll_gpio_enable_both_edge_trigger (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Enable GPIO both edge Trigger for pins in the range of 0 to 15. More...
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__STATIC_INLINE uint32_t | ll_gpio_get_trigger_type (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Get trigger type for pins in the range of 0 to 15. More...
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__STATIC_INLINE void | ll_gpio_enable_it (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Enable GPIO interrupts for pins in the range of 0 to 15. More...
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__STATIC_INLINE void | ll_gpio_disable_it (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Disable GPIO interrupts for pins in the range of 0 to 15. More...
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__STATIC_INLINE uint32_t | ll_gpio_is_enabled_it (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Check if the Interrupt of specified GPIO pins is enabled or disabled. More...
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__STATIC_INLINE uint32_t | ll_gpio_read_flag_it (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Read GPIO Interrupt Combination Flag for pins in the range of 0 to 15. More...
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__STATIC_INLINE uint32_t | ll_gpio_is_active_flag_it (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Indicates if the GPIO Interrupt Flag is set or not for pins in the range of 0 to 15. More...
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__STATIC_INLINE void | ll_gpio_clear_flag_it (gpio_regs_t *GPIOx, uint32_t pin_mask) |
| Clear Interrupt Status flag for pins in the range of 0 to 15. More...
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error_status_t | ll_gpio_init (gpio_regs_t *GPIOx, ll_gpio_init_t *p_gpio_init) |
| Initialize GPIO registers according to the specified parameters in p_gpio_init. More...
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Header file containing functions prototypes of GPIO LL library.
- Author
- BLE Driver Team
- Attention
- #####Copyright (c) 2019 GOODIX All rights reserved.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. Neither the name of GOODIX nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Definition in file gr55xx_ll_gpio.h.