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52 #ifndef __GR55xx_HAL_I2S_H__
53 #define __GR55xx_HAL_I2S_H__
117 #if I2S_CHANNEL_NUM > 1
118 uint32_t channel_active;
211 #define I2S_DIRECTION_FULL_DUPLEX LL_I2S_FULL_DUPLEX
212 #define I2S_DIRECTION_SIMPLEX_TX LL_I2S_SIMPLEX_TX
213 #define I2S_DIRECTION_SIMPLEX_RX LL_I2S_SIMPLEX_RX
219 #define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000)
220 #define HAL_I2S_ERROR_TIMEOUT ((uint32_t)0x00000001)
221 #define HAL_I2S_ERROR_TRANSFER ((uint32_t)0x00000002)
222 #define HAL_I2S_ERROR_DMA ((uint32_t)0x00000004)
223 #define HAL_I2S_ERROR_INVALID_PARAM ((uint32_t)0x00000008)
224 #define HAL_I2S_ERROR_TX_OVERFLOW ((uint32_t)0x00000010)
225 #define HAL_I2S_ERROR_RX_OVERFLOW ((uint32_t)0x00000020)
231 #define I2S_DATASIZE_12BIT LL_I2S_DATASIZE_12BIT
232 #define I2S_DATASIZE_16BIT LL_I2S_DATASIZE_16BIT
233 #define I2S_DATASIZE_20BIT LL_I2S_DATASIZE_20BIT
234 #define I2S_DATASIZE_24BIT LL_I2S_DATASIZE_24BIT
235 #define I2S_DATASIZE_32BIT LL_I2S_DATASIZE_32BIT
241 #define I2S_CLOCK_SRC_96M LL_I2S_CLOCK_SRC_96M
242 #define I2S_CLOCK_SRC_64M LL_I2S_CLOCK_SRC_64M
243 #define I2S_CLOCK_SRC_32M LL_I2S_CLOCK_SRC_32M
249 #define I2S_WS_CYCLES_16 LL_I2S_WS_CYCLES_16
250 #define I2S_WS_CYCLES_24 LL_I2S_WS_CYCLES_24
251 #define I2S_WS_CYCLES_32 LL_I2S_WS_CYCLES_32
257 #define I2S_TX_FIFO_LEVEL_MAX 16
258 #define I2S_RX_FIFO_LEVEL_MAX 16
264 #define I2S_FLAG_TXFO LL_I2S_STATUS_TXFO
265 #define I2S_FLAG_TXFE LL_I2S_STATUS_TXFE
266 #define I2S_FLAG_RXFO LL_I2S_STATUS_RXFO
267 #define I2S_FLAG_RXDA LL_I2S_STATUS_RXDA
273 #define I2S_IT_TXFO LL_I2S_INT_TXFO
274 #define I2S_IT_TXFE LL_I2S_INT_TXFE
275 #define I2S_IT_RXFO LL_I2S_INT_RXFO
276 #define I2S_IT_RXDA LL_I2S_INT_RXDA
282 #define HAL_I2S_TIMEOUT_DEFAULT_VALUE ((uint32_t)5000)
296 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->state = HAL_I2S_STATE_RESET)
302 #define __HAL_I2S_ENABLE(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->EN, I2S_EN_I2S_EN)
308 #define __HAL_I2S_DISABLE(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->EN, I2S_EN_I2S_EN)
315 #if !defined (GR551xx)
316 #define __HAL_I2S_ENABLE_CLOCK(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->CLK_EN, I2S_CLK_EN_CLK_EN)
318 #define __HAL_I2S_ENABLE_CLOCK(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->CLKEN, I2S_CLKEN_EN)
326 #if !defined (GR551xx)
327 #define __HAL_I2S_DISABLE_CLOCK(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->CLK_EN, I2S_CLK_EN_CLK_EN)
329 #define __HAL_I2S_DISABLE_CLOCK(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->CLKEN, I2S_CLKEN_EN)
335 #define __HAL_I2S_ENABLE_TX_BLOCK(__HANDLE__) ll_i2s_enable_txblock((__HANDLE__)->p_instance)
341 #define __HAL_I2S_DISABLE_TX_BLOCK(__HANDLE__) ll_i2s_disable_txblock((__HANDLE__)->p_instance)
347 #define __HAL_I2S_ENABLE_RX_BLOCK(__HANDLE__) ll_i2s_enable_rxblock((__HANDLE__)->p_instance)
353 #define __HAL_I2S_DISABLE_RX_BLOCK(__HANDLE__) ll_i2s_disable_rxblock((__HANDLE__)->p_instance)
360 #define __HAL_I2S_ENABLE_TX_CHANNEL(__HANDLE__) ll_i2s_enable_tx((__HANDLE__)->p_instance)
367 #define __HAL_I2S_DISABLE_TX_CHANNEL(__HANDLE__) ll_i2s_disable_tx((__HANDLE__)->p_instance)
374 #define __HAL_I2S_ENABLE_RX_CHANNEL(__HANDLE__) ll_i2s_enable_rx((__HANDLE__)->p_instance)
381 #define __HAL_I2S_DISABLE_RX_CHANNEL(__HANDLE__) ll_i2s_disable_rx((__HANDLE__)->p_instance)
387 #define __HAL_I2S_FLUSH_TX_FIFO(__HANDLE__) ll_i2s_clr_txfifo_all((__HANDLE__)->p_instance)
393 #define __HAL_I2S_FLUSH_RX_FIFO(__HANDLE__) ll_i2s_clr_rxfifo_all((__HANDLE__)->p_instance)
399 #define __HAL_I2S_ENABLE_DMA(__HANDLE__) ll_i2s_enable_dma(__HANDLE__->p_instance)
405 #define __HAL_I2S_DISABLE_DMA(__HANDLE__) ll_i2s_disable_dma(__HANDLE__->p_instance)
412 #define __HAL_I2S_RESET_TXDMA(__HANDLE__) WRITE_REG((__HANDLE__)->p_instance->RST_TX_DMA, I2S_RST_TX_DMA_RST_TX_DMA)
418 #define __HAL_I2S_ENABLE_DMA_MODE(__HANDLE__) ll_i2s_enable_dma_mode(__HANDLE__->p_instance)
424 #define __HAL_I2S_DISABLE_DMA_MODE(__HANDLE__) ll_i2s_disable_dma_mode(__HANDLE__->p_instance)
431 #define __HAL_I2S_RESET_RXDMA(__HANDLE__) WRITE_REG((__HANDLE__)->p_instance->RST_RX_DMA, I2S_RST_RX_DMA_RST_RX_DMA)
444 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BITS((__HANDLE__)->p_instance->INT_MASK, (__INTERRUPT__))
457 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) SET_BITS((__HANDLE__)->p_instance->INT_MASK, (__INTERRUPT__))
470 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((READ_BITS((__HANDLE__)->p_instance->INT_STAT, (__FLAG__)) != 0) ? SET : RESET)
481 #define __HAL_I2S_CLEAR_FLAG(__HANDLE__, __FLAG__) do { \
482 if ((__FLAG__) & I2S_FLAG_RXFO) \
484 READ_BITS((__HANDLE__)->p_instance->RX_OVER, I2S_RX_OVER_RX_CLR_FDO);\
486 if ((__FLAG__) & I2S_FLAG_TXFO) \
488 READ_BITS((__HANDLE__)->p_instance->TX_OVER, I2S_TX_OVER_TX_CLR_FDO);\
503 #define IS_I2S_DIRECTION(__MODE__) (((__MODE__) == I2S_DIRECTION_FULL_DUPLEX) || \
504 ((__MODE__) == I2S_DIRECTION_SIMPLEX_TX) || \
505 ((__MODE__) == I2S_DIRECTION_SIMPLEX_RX))
511 #define IS_I2S_DATASIZE(__DATASIZE__) (((__DATASIZE__) == I2S_DATASIZE_12BIT) || \
512 ((__DATASIZE__) == I2S_DATASIZE_16BIT) || \
513 ((__DATASIZE__) == I2S_DATASIZE_20BIT) || \
514 ((__DATASIZE__) == I2S_DATASIZE_24BIT) || \
515 ((__DATASIZE__) == I2S_DATASIZE_32BIT))
521 #define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_POLARITY_LOW) || \
522 ((__CPOL__) == I2S_POLARITY_HIGH))
528 #define IS_I2S_AUDIO_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) > 0) && ((__FREQUENCY__) <= 1500000))
534 #define IS_I2S_FIFO_THRESHOLD(__THR__) (((__THR__) >= 0) && ((__THR__) <= I2S_TX_FIFO_LEVEL_MAX))
hal_status_t hal_i2s_init(i2s_handle_t *p_i2s)
Initialize the I2S according to the specified parameters in the i2s_init_t and initialize the associa...
hal_status_t hal_i2s_receive_it(i2s_handle_t *p_i2s, uint16_t *p_data, uint32_t length)
Receive an amount of data in non-blocking mode with Interrupt.
hal_lock_t
HAL Lock structures definition.
hal_status_t hal_i2s_deinit(i2s_handle_t *p_i2s)
De-initialize the I2S peripheral.
hal_status_t hal_i2s_transmit_receive_dma(i2s_handle_t *p_i2s, uint16_t *p_tx_data, uint16_t *p_rx_data, uint32_t length)
Transmit and Receive an amount of data in non-blocking mode with DMA.
void hal_i2s_tx_cplt_callback(i2s_handle_t *p_i2s)
TX Transfer completed callback.
hal_status_t hal_i2s_receive(i2s_handle_t *p_i2s, uint16_t *p_data, uint32_t length, uint32_t timeout)
Receive an amount of data in blocking mode.
void(* write_fifo)(struct _i2s_handle *p_i2s)
void hal_i2s_error_callback(i2s_handle_t *p_i2s)
I2S error callback.
void(* read_fifo)(struct _i2s_handle *p_i2s)
hal_status_t hal_i2s_abort(i2s_handle_t *p_i2s)
Abort ongoing transfer (blocking mode).
struct _i2s_init i2s_init_t
I2S init Structure definition.
hal_status_t hal_i2s_transmit_receive_dma_sg_llp(i2s_handle_t *p_i2s, uint16_t *p_tx_data, uint16_t *p_rx_data, uint32_t length, dma_sg_llp_config_t *p_sg_llp_config)
Transmit and Receive an amount of data in non-blocking mode with DMA.
hal_status_t hal_i2s_receive_dma(i2s_handle_t *p_i2s, uint16_t *p_data, uint32_t length)
Receive an amount of data in non-blocking mode with DMA.
hal_status_t hal_i2s_transmit_receive_it(i2s_handle_t *p_i2s, uint16_t *p_tx_data, uint16_t *p_rx_data, uint32_t length)
Transmit and Receive an amount of data in non-blocking mode with Interrupt.
void(* i2s_tx_cplt_callback)(i2s_handle_t *p_i2s)
void(* i2s_msp_init)(i2s_handle_t *p_i2s)
void(* i2s_msp_deinit)(i2s_handle_t *p_i2s)
void hal_i2s_tx_rx_cplt_callback(i2s_handle_t *p_i2s)
TX/RX Transfer completed callback.
hal_status_t hal_i2s_transmit_it(i2s_handle_t *p_i2s, uint16_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode with Interrupt.
__IO uint32_t tx_xfer_count
LL DMA sg and llp config definition.
void hal_i2s_rx_cplt_callback(i2s_handle_t *p_i2s)
RX Transfer completed callback.
uint32_t hal_i2s_get_tx_fifo_threshold(i2s_handle_t *p_i2s)
Get the TX FIFO threshold.
hal_status_t hal_i2s_transmit_dma(i2s_handle_t *p_i2s, uint16_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode with DMA.
struct _i2s_handle i2s_handle_t
I2S handle Structure definition.
hal_status_t hal_i2s_resume_reg(i2s_handle_t *p_i2s)
Restore some registers related to I2S configuration after sleep. This function must be used in conjun...
hal_status_t hal_i2s_transmit_dma_sg_llp(i2s_handle_t *p_i2s, uint16_t *p_data, uint32_t length, dma_sg_llp_config_t *p_sg_llp_config)
Transmit an amount of data in non-blocking mode with DMA.
void(* i2s_tx_rx_cplt_callback)(i2s_handle_t *p_i2s)
Header file containing functions prototypes of I2S LL library.
hal_i2s_state_t hal_i2s_get_state(i2s_handle_t *p_i2s)
Return the I2S handle state.
uint32_t hal_i2s_get_rx_fifo_threshold(i2s_handle_t *p_i2s)
Get the RX FIFO threshold.
I2S handle Structure definition.
__IO hal_i2s_state_t state
hal_status_t hal_i2s_start_clock(i2s_handle_t *p_i2s)
Start the I2S master clock.
__IO uint32_t tx_xfer_size
void(* i2s_rx_cplt_callback)(i2s_handle_t *p_i2s)
hal_status_t hal_i2s_transmit_receive(i2s_handle_t *p_i2s, uint16_t *p_tx_data, uint16_t *p_rx_data, uint32_t length, uint32_t timeout)
Transmit and Receive an amount of data in blocking mode.
I2S init Structure definition.
HAL_I2S Callback function definition.
hal_status_t
HAL Status structures definition.
hal_status_t hal_i2s_receive_dma_sg_llp(i2s_handle_t *p_i2s, uint16_t *p_data, uint32_t length, dma_sg_llp_config_t *p_sg_llp_config)
Receive an amount of data in non-blocking mode with DMA.
@ HAL_I2S_STATE_BUSY_TX_RX
void(* i2s_error_callback)(i2s_handle_t *p_i2s)
hal_status_t hal_i2s_suspend_reg(i2s_handle_t *p_i2s)
Suspend some registers related to I2S configuration before sleep.
hal_status_t hal_i2s_transmit(i2s_handle_t *p_i2s, uint16_t *p_data, uint32_t length, uint32_t timeout)
Transmit an amount of data in blocking mode.
struct _hal_i2s_callback hal_i2s_callback_t
HAL_I2S Callback function definition.
hal_status_t hal_i2s_set_tx_fifo_threshold(i2s_handle_t *p_i2s, uint32_t threshold)
Set the TX FIFO threshold.
uint32_t hal_i2s_get_error(i2s_handle_t *p_i2s)
Return the I2S error code.
void hal_i2s_msp_init(i2s_handle_t *p_i2s)
Initialize the I2S MSP.
__IO uint32_t rx_xfer_count
void hal_i2s_irq_handler(i2s_handle_t *p_i2s)
Handle I2S interrupt request.
hal_i2s_state_t
HAL I2S State Enumerations definition.
void hal_i2s_msp_deinit(i2s_handle_t *p_i2s)
De-initialize the I2S MSP.
hal_status_t hal_i2s_stop_clock(i2s_handle_t *p_i2s)
Stop the I2S master clock.
DMA handle Structure definition.
This file contains HAL common definitions, enumeration, macros and structures definitions.
__IO uint32_t rx_xfer_size
hal_status_t hal_i2s_set_rx_fifo_threshold(i2s_handle_t *p_i2s, uint32_t threshold)
Set the RX FIFO threshold.