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52 #ifndef __APP_GRAPHICS_GRAPHICS_DC_H__
53 #define __APP_GRAPHICS_GRAPHICS_DC_H__
58 #include "hal_gdc_regs.h"
59 #include "hal_gdc_mipi.h"
316 #define GRAPHICS_DC_CSN_PORT APP_IO_TYPE_GPIOB
317 #define GRAPHICS_DC_CSN_PIN APP_IO_PIN_11
318 #define GRAPHICS_DC_CSN_PIN_MUX APP_IO_MUX_1
320 #define GRAPHICS_DC_CLK_PORT APP_IO_TYPE_GPIOB
321 #define GRAPHICS_DC_CLK_PIN APP_IO_PIN_0
322 #define GRAPHICS_DC_CLK_PIN_MUX APP_IO_MUX_1
324 #define GRAPHICS_DC_IO0_PORT APP_IO_TYPE_GPIOB
325 #define GRAPHICS_DC_IO0_PIN APP_IO_PIN_1
326 #define GRAPHICS_DC_IO0_PIN_MUX APP_IO_MUX_1
328 #define GRAPHICS_DC_IO1_PORT APP_IO_TYPE_GPIOB
329 #define GRAPHICS_DC_IO1_PIN APP_IO_PIN_2
330 #define GRAPHICS_DC_IO1_PIN_MUX APP_IO_MUX_1
332 #define GRAPHICS_DC_IO2_PORT APP_IO_TYPE_GPIOB
333 #define GRAPHICS_DC_IO2_PIN APP_IO_PIN_3
334 #define GRAPHICS_DC_IO2_PIN_MUX APP_IO_MUX_1
336 #define GRAPHICS_DC_IO3_PORT APP_IO_TYPE_GPIOB
337 #define GRAPHICS_DC_IO3_PIN APP_IO_PIN_4
338 #define GRAPHICS_DC_IO3_PIN_MUX APP_IO_MUX_1
340 #define GRAPHICS_DC_DCX_PORT APP_IO_TYPE_GPIOB
341 #define GRAPHICS_DC_DCX_PIN APP_IO_PIN_13
342 #define GRAPHICS_DC_DCX_PIN_MUX APP_IO_MUX_5
348 #define GRAPHICS_DC_LAYER_0 0u
349 #define GRAPHICS_DC_LAYER_1 1u
355 #define GDC_IRQ_EVT_FRAME_TRANSMITION_END 0x01
356 #define GDC_IRQ_EVT_CMD_TRANSMITION_END 0x02
362 #define GRAPHICS_DC_BASEADDR 0xA3FF4000
void app_graphics_dc_dspi_send_cmd_data_in_4wire_2lane(uint16_t cmd, uint16_t data)
Send cmd &data in 4-wire mode for DSPI (DCX as SD1, and 1 more MSB Bit for cmd/data indicator)
@ GDC_FRAME_RES_UNSUPPORT
QSPI IO configuration Structures.
void graphics_dc_pins_reinit(void)
re-init i/o for Graphics DC dev with pre-init i/o setting
graphics_dc_tcsu_cycle_e tcsu_cycle
app_graphics_dc_pin_t io2
void app_graphics_dc_dspi_send_cmd_in_3wire_1lane(uint8_t cmd)
Send single cmd in 3-wire mode for DSPI (no DCX and 1 more MSB Bit for cmd indicator)
void graphics_dc_deinit(void)
de-init Graphics DC dev, just called when needed to reboot/reset
graphics_dc_clock_mode_e
Define Clock Mode for DC.
graphics_dc_clock_freq_e
Define Clock Frequency for DC.
app_graphics_dc_frame_timing_e frame_timing
@ GDC_DATA_FORMAT_RGBA8888
void(* graphics_dc_set_refresh_area_cb)(uint32_t mark, uint32_t x_start, uint32_t x_end, uint32_t y_start, uint32_t y_end)
DC Refresh callback definition.
graphics_dc_power_state_e
Display Controller Power Mode Enumerations definition.
@ GDC_MIPICFG_DSPI_RGB565_OPT0
app_io_pull_t
GPIO pull Enumerations definition.
app_graphics_dc_pin_t io0
void app_graphics_dc_spi_send(uint8_t cmd_8bit, uint32_t address_24bit, uint8_t *data, uint32_t length)
Send 1 Byte CMD,3 Byte ADDR And N Byte Data in 1-wire SPI Mode.
@ GDC_DATA_FORMAT_BGRA8888
app_graphics_dc_frame_result_e
Define frame output result for DC.
@ GDC_FRAME_ADDRESS_WIDTH_NONE
app_graphics_dc_pin_t dcx
app_graphics_dc_frame_result_e app_graphics_dc_send_single_frame(uint32_t which_layer, app_graphics_dc_framelayer_t *frame_layer, app_graphics_dc_cmd_t *dc_cmd, app_graphics_dc_access_type_e access_type)
Send one whole frame by DC.
Define init params for DC.
@ GDC_MIPICFG_DSPI_RGB888_OPT1
graphics_dc_data_format_e data_format
@ GDC_MIPICFG_DSPI_RGB888_OPT0
@ GDC_QSPI_FRAME_TIMING_1
Define DC Frame Layer configuration.
graphics_dc_clock_freq_e clock_freq
graphics_dc_layer_mode_e
Define work layers for DC.
Header file containing functions prototypes of GPIO app library.
app_graphics_dc_pins_t pins_cfg
app_graphics_dc_pin_t clk
Define Control Command for DC Frame.
app_graphics_dc_frame_timing_e
Define the Output Frame Timing for DC.
@ GDC_OUT_PIXEL_BITS_NOT_SUPPORT
graphics_dc_mipi_format_e mipicfg_format
void app_graphics_dc_dspi_send_cmd_data_in_3wire_1lane(uint8_t cmd, uint8_t data)
Send single cmd &data in 3-wire mode for DSPI (no DCX and 1 more MSB Bit for cmd/data indicator)
void(* graphics_dc_irq_event_notify_cb)(uint32_t evt)
DC IRQ callback definition.
@ GDC_FRAME_ADDRESS_WIDTH_08BIT
graphics_dc_mspi_e
Define SPI work Mode for DC.
@ GDC_FRAME_ADDRESS_WIDTH_24BIT
app_graphics_dc_frame_address_width_e
Define the bits of address phase for DC Frame.
@ GDC_MIPICFG_SPI_RGB565_OPT0
graphics_dc_data_format_e
Define the data format for frame buffer of DC.
app_graphics_dc_pin_t io3
@ GDC_MIPICFG_QSPI_RGB888_OPT0
graphics_dc_clock_mode_e clock_mode
@ GDC_MIPICFG_SPI_RGB888_OPT0
void app_graphics_dc_freq_set(graphics_dc_clock_freq_e clock_freq)
DC clock frequency set.
app_graphics_dc_pin_t csn
@ GDC_DATA_FORMAT_ARGB8888
graphics_dc_tcsu_cycle_e
Define Delay Clock for DC Tcsu.
app_graphics_dc_pin_t io1
graphics_dc_mipi_format_e
Define the Output MIPI Timing for DATA Phase of DC Timing of MIPICFG_2RGB888_OPT1 is True MIPICFG_2RG...
void app_graphics_dc_set_power_state(graphics_dc_power_state_e state)
Switch power state for DC module.
@ GDC_MIPICFG_QSPI_RGB565_OPT0
void app_graphics_dc_dspi_send_cmd_datas_in_4wire_2lane(uint16_t cmd, uint16_t *data, int length)
Send cmd &data in 4-wire mode for DSPI (DCX as SD1, and 1 more MSB Bit for cmd/data indicator)
@ GDC_DSPI_FRAME_TIMING_0
@ GDC_FRAME_ADDRESS_WIDTH_16BIT
graphics_dc_out_pixel_bits_e
Define the Output pixel bits for DC.
app_graphics_dc_access_type_e
Define access type for DC.
@ GDC_FRAME_RES_ASYNC_WAIT
uint16_t graphics_dc_init(app_graphics_dc_params_t *dc_params, graphics_dc_irq_event_notify_cb evt_cb)
init Graphics DC dev
@ GDC_DATA_FORMAT_ABGR8888
@ GDC_QSPI_FRAME_TIMING_0
graphics_dc_layer_mode_e layer_mode
graphics_dc_mspi_e mspi_mode
app_graphics_dc_frame_address_width_e address_width