52 #ifndef __GR55XX_LL_dvs_H_
53 #define __GR55XX_LL_dvs_H_
69 #define LL_ANALOG_VOLTAGE_SCALE_DIS (0U)
70 #define LL_ANALOG_VOLTAGE_SCALE_EN (1U)
76 #define LL_ANALOG_VOLTAGE_SCALE_LOWER_TYPE (0U)
77 #define LL_ANALOG_VOLTAGE_SCALE_HIGHER_TYPE (1U)
83 #define LL_ANALOG_VOLTAGE_SCALE_LIMIT_DIS (0U)
84 #define LL_ANALOG_VOLTAGE_SCALE_LIMIT_EN (1U)
101 MODIFY_REG(AON_PMU->DVS_DCDC, AON_PMU_DVS_DCDC_EN_VTBIAS, (enable << AON_PMU_DVS_DCDC_EN_VTBIAS_Pos));
113 return ((READ_BITS(AON_PMU->DVS_DCDC, AON_PMU_DVS_DCDC_EN_VTBIAS)) >> AON_PMU_DVS_DCDC_EN_VTBIAS_Pos);
125 MODIFY_REG(AON_PMU->DVS_DCDC, AON_PMU_DVS_DCDC_VTBIAS_SLOPE_CTRL, (type << AON_PMU_DVS_DCDC_VTBIAS_SLOPE_CTRL_Pos));
137 return ((READ_BITS(AON_PMU->DVS_DCDC, AON_PMU_DVS_DCDC_VTBIAS_SLOPE_CTRL)) >> AON_PMU_DVS_DCDC_VTBIAS_SLOPE_CTRL_Pos);
149 MODIFY_REG(AON_PMU->DVS_DCDC, AON_PMU_DVS_DCDC_EN_LIMITER, (enable << AON_PMU_DVS_DCDC_EN_LIMITER_Pos));
161 return ((READ_BITS(AON_PMU->DVS_DCDC, AON_PMU_DVS_DCDC_EN_LIMITER)) >> AON_PMU_DVS_DCDC_EN_LIMITER_Pos);
173 MODIFY_REG(AON_PMU->DVS_DCDC, AON_PMU_DVS_DCDC_VTBIAS_CTRL_VT_2_0, (vt << AON_PMU_DVS_DCDC_VTBIAS_CTRL_VT_2_0_Pos));
185 return ((READ_BITS(AON_PMU->DVS_DCDC, AON_PMU_DVS_DCDC_VTBIAS_CTRL_VT_2_0)) >> AON_PMU_DVS_DCDC_VTBIAS_CTRL_VT_2_0_Pos);
197 MODIFY_REG(AON_PMU->DVS_DCDC, AON_PMU_DVS_DCDC_VTBIAS_CTRL_LIMIT_2_0, (limit << AON_PMU_DVS_DCDC_VTBIAS_CTRL_LIMIT_2_0_Pos));
209 return ((READ_BITS(AON_PMU->DVS_DCDC, AON_PMU_DVS_DCDC_VTBIAS_CTRL_LIMIT_2_0)) >> AON_PMU_DVS_DCDC_VTBIAS_CTRL_LIMIT_2_0_Pos);
221 MODIFY_REG(AON_PMU->DVS_DIGCORE, AON_PMU_DVS_DIGCORE_EN_VTBIAS, (enable << AON_PMU_DVS_DIGCORE_EN_VTBIAS_Pos));
233 return ((READ_BITS(AON_PMU->DVS_DIGCORE, AON_PMU_DVS_DIGCORE_EN_VTBIAS)) >> AON_PMU_DVS_DIGCORE_EN_VTBIAS_Pos);
245 MODIFY_REG(AON_PMU->DVS_DIGCORE, AON_PMU_DVS_DIGCORE_VTBIAS_SLOPE_CTRL, (type << AON_PMU_DVS_DIGCORE_VTBIAS_SLOPE_CTRL_Pos));
257 return ((READ_BITS(AON_PMU->DVS_DIGCORE, AON_PMU_DVS_DIGCORE_VTBIAS_SLOPE_CTRL)) >> AON_PMU_DVS_DIGCORE_VTBIAS_SLOPE_CTRL_Pos);
269 MODIFY_REG(AON_PMU->DVS_DIGCORE, AON_PMU_DVS_DIGCORE_EN_LIMITER, (enable << AON_PMU_DVS_DIGCORE_EN_LIMITER_Pos));
281 return ((READ_BITS(AON_PMU->DVS_DIGCORE, AON_PMU_DVS_DIGCORE_EN_LIMITER)) >> AON_PMU_DVS_DIGCORE_EN_LIMITER_Pos);
293 MODIFY_REG(AON_PMU->DVS_DIGCORE, AON_PMU_DVS_DIGCORE_VTBIAS_CTRL_VT_2_0, (vt << AON_PMU_DVS_DIGCORE_VTBIAS_CTRL_VT_2_0_Pos));
305 return ((READ_BITS(AON_PMU->DVS_DIGCORE, AON_PMU_DVS_DIGCORE_VTBIAS_CTRL_VT_2_0)) >> AON_PMU_DVS_DIGCORE_VTBIAS_CTRL_VT_2_0_Pos);
317 MODIFY_REG(AON_PMU->DVS_DIGCORE, AON_PMU_DVS_DIGCORE_VTBIAS_CTRL_LIMIT_2_0, (limit << AON_PMU_DVS_DIGCORE_VTBIAS_CTRL_LIMIT_2_0_Pos));
329 return ((READ_BITS(AON_PMU->DVS_DIGCORE, AON_PMU_DVS_DIGCORE_VTBIAS_CTRL_LIMIT_2_0)) >> AON_PMU_DVS_DIGCORE_VTBIAS_CTRL_LIMIT_2_0_Pos);