Functions

__STATIC_INLINE void ll_aon_rf_enable_test_mux (void)
 Enable the test mux 0 tri state. More...
 
__STATIC_INLINE void ll_aon_rf_disable_test_mux (void)
 Disable the test mux 0 tri state. More...
 
__STATIC_INLINE void ll_aon_rf_enable_cpll_cp_reset (void)
 Enable the cpll reset. More...
 
__STATIC_INLINE void ll_aon_rf_disable_cpll_cp_reset (void)
 Disable the cpll reset. More...
 
__STATIC_INLINE void ll_aon_rf_enable_cpll_drift_detection (void)
 Enable the cpll drift detection. More...
 
__STATIC_INLINE void ll_aon_rf_disable_cpll_drift_detection (void)
 Disable the cpll drift detection. More...
 
__STATIC_INLINE void ll_aon_rf_set_cpll_m_div (uint32_t value)
 Set the cpll m div,Pre division before CP (00- no division / 11 divide by 16). More...
 
__STATIC_INLINE void ll_aon_rf_set_threshold (uint32_t l_threshold, uint32_t h_threshold)
 Set the cpll drift detection. More...
 
__STATIC_INLINE void ll_aon_rf_set_cpll_kvco_ctrl (uint32_t code)
 Set the cpll drift CPLL VCO KVCO control. More...
 
__STATIC_INLINE void ll_aon_rf_set_xo_ibias (uint32_t hi_value, uint32_t lo_value)
 Set XO core current programmability. More...
 
__STATIC_INLINE void ll_aon_rf_set_rf_reg9 (uint32_t value)
 Set the RF_REG9. More...
 
__STATIC_INLINE uint32_t ll_aon_rf_get_rf_reg9 (void)
 Get the RF_REG9. More...
 
__STATIC_INLINE void ll_aon_rf_set_xo_cap (uint32_t hi_value, uint32_t lo_value)
 Set the xo cap value,cload programmability from 50fF to 26pF on each side. More...
 
__STATIC_INLINE uint32_t ll_aon_rf_get_cpll_crscde (void)
 Get the cpll crscde. More...
 
__STATIC_INLINE void ll_aon_rf_set_su_enable (void)
 Set SU enable. More...
 
__STATIC_INLINE void ll_mcu_set_cpll_drift_irq_enable (void)
 Set cpll drift irq enable. More...
 

Detailed Description

Function Documentation

◆ ll_aon_rf_disable_cpll_cp_reset()

__STATIC_INLINE void ll_aon_rf_disable_cpll_cp_reset ( void  )

Disable the cpll reset.

Register|BitsName --------|-------- RF6 | CPLL_CP_EN

Definition at line 113 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_disable_cpll_drift_detection()

__STATIC_INLINE void ll_aon_rf_disable_cpll_drift_detection ( void  )

Disable the cpll drift detection.

Register|BitsName --------|-------- RF6 | PLL_LOCK_DET_EN

Definition at line 139 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_disable_test_mux()

__STATIC_INLINE void ll_aon_rf_disable_test_mux ( void  )

Disable the test mux 0 tri state.

Register|BitsName --------|-------- RF5 | TEST_MUX_EN

Definition at line 87 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_enable_cpll_cp_reset()

__STATIC_INLINE void ll_aon_rf_enable_cpll_cp_reset ( void  )

Enable the cpll reset.

Register|BitsName --------|-------- RF6 | CPLL_CP_EN

Definition at line 100 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_enable_cpll_drift_detection()

__STATIC_INLINE void ll_aon_rf_enable_cpll_drift_detection ( void  )

Enable the cpll drift detection.

Register|BitsName --------|-------- RF6 | PLL_LOCK_DET_EN

Definition at line 126 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_enable_test_mux()

__STATIC_INLINE void ll_aon_rf_enable_test_mux ( void  )

Enable the test mux 0 tri state.

Register|BitsName --------|-------- RF5 | TEST_MUX_EN

Definition at line 74 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_get_cpll_crscde()

__STATIC_INLINE uint32_t ll_aon_rf_get_cpll_crscde ( void  )

Get the cpll crscde.

Register|BitsName --------|-------- RF_RD_REG_0 | CPLL_CRSCDE

Return values
cpllcrscde.

Definition at line 266 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_get_rf_reg9()

__STATIC_INLINE uint32_t ll_aon_rf_get_rf_reg9 ( void  )

Get the RF_REG9.

Register|BitsName --------|-------- RF9 | ALL

Return values
TheRF_REG9 value.

Definition at line 233 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_set_cpll_kvco_ctrl()

__STATIC_INLINE void ll_aon_rf_set_cpll_kvco_ctrl ( uint32_t  code)

Set the cpll drift CPLL VCO KVCO control.

Register|BitsName --------|-------- RF7 | cpll_kvco_dig_ctrl_2_0

Parameters
code

Definition at line 185 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_set_cpll_m_div()

__STATIC_INLINE void ll_aon_rf_set_cpll_m_div ( uint32_t  value)

Set the cpll m div,Pre division before CP (00- no division / 11 divide by 16).

Register|BitsName --------|-------- RF6 | CPLL_M_DIV_CTRL

Parameters
valueThe cpll m div value.

Definition at line 154 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_set_rf_reg9()

__STATIC_INLINE void ll_aon_rf_set_rf_reg9 ( uint32_t  value)

Set the RF_REG9.

Register|BitsName --------|-------- RF9 | ALL

Parameters
valueThe RF_REG9 value.

Definition at line 218 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_set_su_enable()

__STATIC_INLINE void ll_aon_rf_set_su_enable ( void  )

Set SU enable.

Register|BitsName --------|-------- RF8 | SU_ENABLE

Return values
None

Definition at line 280 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_set_threshold()

__STATIC_INLINE void ll_aon_rf_set_threshold ( uint32_t  l_threshold,
uint32_t  h_threshold 
)

Set the cpll drift detection.

Register|BitsName --------|-------- RF7 | L_H_THRESHOLD

Parameters
l_thresholdL Threshold.
h_thresholdH Threshold.

Definition at line 170 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_set_xo_cap()

__STATIC_INLINE void ll_aon_rf_set_xo_cap ( uint32_t  hi_value,
uint32_t  lo_value 
)

Set the xo cap value,cload programmability from 50fF to 26pF on each side.

Register|BitsName --------|-------- RF9 | XO_CAP

Parameters
hi_valueThe xo cap value.
lo_valueThe xo cap value.

Definition at line 250 of file gr55xx_ll_aon_rf.h.

◆ ll_aon_rf_set_xo_ibias()

__STATIC_INLINE void ll_aon_rf_set_xo_ibias ( uint32_t  hi_value,
uint32_t  lo_value 
)

Set XO core current programmability.

Register|BitsName --------|-------- RF8 | XO_IBIAS_CTRL_4_0

Parameters
hi_valueThe xo core current programmability
lo_valueThe xo core current programmability
Return values
None

Definition at line 202 of file gr55xx_ll_aon_rf.h.

◆ ll_mcu_set_cpll_drift_irq_enable()

__STATIC_INLINE void ll_mcu_set_cpll_drift_irq_enable ( void  )

Set cpll drift irq enable.

Register|BitsName --------|-------- CPLL_IRQ_CFG | MCU_SUB_CPLL_IRQ_CFG_DRIFT_IRQ_EN

Return values
None

Definition at line 294 of file gr55xx_ll_aon_rf.h.