Macros | |
#define | LL_QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPI 0x0 |
#define | LL_QSPI_CONCURRENT_XIP_INST_IN_SPI_ADDR_IN_SPIFRF 0x1 |
#define | LL_QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPIFRF 0x2 |
#define LL_QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPI 0x0 |
Instruction and address are sent in SPI mode
Definition at line 625 of file gr55xx_ll_qspi.h.
#define LL_QSPI_CONCURRENT_XIP_INST_ADDR_ALL_IN_SPIFRF 0x2 |
Instruction and address are sent in Daul/Quad SPI mode
Definition at line 627 of file gr55xx_ll_qspi.h.
#define LL_QSPI_CONCURRENT_XIP_INST_IN_SPI_ADDR_IN_SPIFRF 0x1 |
Instruction is in sent in SPI mode and address is sent in Daul/Quad SPI mode
Definition at line 626 of file gr55xx_ll_qspi.h.