Functions | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_cache (xqspi_regs_t *XQSPIx) |
Enable cache function. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_cache (xqspi_regs_t *XQSPIx) |
Disable cache function. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_cache (xqspi_regs_t *XQSPIx) |
Check if cache function is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_cache_direct_map_enable (xqspi_regs_t *XQSPIx) |
Enable cache direct map function. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_cache_direct_map_disable (xqspi_regs_t *XQSPIx) |
Disable cache direct map function. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_cache_direct_map_is_enabled (xqspi_regs_t *XQSPIx) |
Check if cache direct map function is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_cache_flush (xqspi_regs_t *XQSPIx) |
Enable tag memory flush. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_cache_flush (xqspi_regs_t *XQSPIx) |
Disable tag memory flush. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_cache_flush (xqspi_regs_t *XQSPIx) |
Check if tag memory flush is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_cache_clk_force_en (xqspi_regs_t *XQSPIx) |
Set cache gating dynamically. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_cache_fifo (xqspi_regs_t *XQSPIx, uint32_t mode) |
Set FIFO mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_cache_fifo (xqspi_regs_t *XQSPIx) |
Get FIFO mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_cache_hitmiss (xqspi_regs_t *XQSPIx, uint32_t mode) |
Set HIT/MISS mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_cache_hitmiss (xqspi_regs_t *XQSPIx) |
Get HIT/MISS mode. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_set_cache_dbgbus (xqspi_regs_t *XQSPIx, uint32_t sel) |
Set debugbus configurations signals. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_cache_dbgbus (xqspi_regs_t *XQSPIx) |
Get debugbus configurations signals. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_enable_cache_dbgmux (xqspi_regs_t *XQSPIx) |
Enable debug bus mux. More... | |
SECTION_RAM_CODE __STATIC_INLINE void | ll_xqspi_disable_cache_dbgmux (xqspi_regs_t *XQSPIx) |
Disable debug bus mux. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_is_enabled_cache_dbgmux (xqspi_regs_t *XQSPIx) |
Check if debug bus mux is enabled. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_cache_hitcount (xqspi_regs_t *XQSPIx) |
Get hit counter. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_cache_misscount (xqspi_regs_t *XQSPIx) |
Get miss counter. More... | |
SECTION_RAM_CODE __STATIC_INLINE uint32_t | ll_xqspi_get_cache_flag (xqspi_regs_t *XQSPIx) |
Get cache status. More... | |
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_cache_direct_map_disable | ( | xqspi_regs_t * | XQSPIx | ) |
Disable cache direct map function.
Register|BitsName --------|-------- CTRL0 |DIRECT_MAP
XQSPIx | XQSPI instance |
None |
Definition at line 494 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_cache_direct_map_enable | ( | xqspi_regs_t * | XQSPIx | ) |
Enable cache direct map function.
Register|BitsName --------|-------- CTRL0 |DIRECT_MAP
XQSPIx | XQSPI instance |
None |
Definition at line 477 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_cache_direct_map_is_enabled | ( | xqspi_regs_t * | XQSPIx | ) |
Check if cache direct map function is enabled.
Register|BitsName --------|-------- CTRL0 |DIRECT_MAP
XQSPIx | XQSPI instance |
State | of bit (1 or 0). |
Definition at line 510 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_cache | ( | xqspi_regs_t * | XQSPIx | ) |
Disable cache function.
Register|BitsName --------|-------- CTRL0 |EN
XQSPIx | XQSPI instance |
None |
Definition at line 445 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_cache_dbgmux | ( | xqspi_regs_t * | XQSPIx | ) |
Disable debug bus mux.
Register|BitsName --------|-------- CTRL1 |DBGMUX_EN
XQSPIx | XQSPI instance |
None |
Definition at line 710 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_cache_flush | ( | xqspi_regs_t * | XQSPIx | ) |
Disable tag memory flush.
Register|BitsName --------|-------- CTRL0 |TAG
XQSPIx | XQSPI instance |
None |
Definition at line 542 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_cache | ( | xqspi_regs_t * | XQSPIx | ) |
Enable cache function.
Register|BitsName --------|-------- CTRL0 |EN
XQSPIx | XQSPI instance |
None |
Definition at line 428 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_cache_dbgmux | ( | xqspi_regs_t * | XQSPIx | ) |
Enable debug bus mux.
Register|BitsName --------|-------- CTRL1 |DBGMUX_EN
XQSPIx | XQSPI instance |
None |
Definition at line 694 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_cache_flush | ( | xqspi_regs_t * | XQSPIx | ) |
Enable tag memory flush.
Register|BitsName --------|-------- CTRL0 |TAG
XQSPIx | XQSPI instance |
None |
Definition at line 526 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_cache_dbgbus | ( | xqspi_regs_t * | XQSPIx | ) |
Get debugbus configurations signals.
Register|BitsName --------|-------- CTRL1 |DBGBUS_SEL
XQSPIx | XQSPI instance |
Returned | Value can between: 0 ~ 0x7 |
Definition at line 678 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_cache_fifo | ( | xqspi_regs_t * | XQSPIx | ) |
Get FIFO mode.
Register|BitsName --------|-------- CTRL0 |FIFO
XQSPIx | XQSPI instance |
Returned | Value can be one of the following values: |
Definition at line 609 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_cache_flag | ( | xqspi_regs_t * | XQSPIx | ) |
Get cache status.
Register|BitsName --------|-------- STAT |STAT
XQSPIx | XQSPI instance |
Returned | Value can between: 0 ~ 1 |
Definition at line 773 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_cache_hitcount | ( | xqspi_regs_t * | XQSPIx | ) |
Get hit counter.
Register|BitsName --------|-------- HIT_COUNT|HITCOUNT
XQSPIx | XQSPI instance |
Returned | Value can between: 0 ~ 0xFFFFFFFF |
Definition at line 741 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_cache_hitmiss | ( | xqspi_regs_t * | XQSPIx | ) |
Get HIT/MISS mode.
Register|BitsName --------|-------- CTRL0 |HITMISS
XQSPIx | XQSPI instance |
Returned | Value can be one of the following values: |
Definition at line 646 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_cache_misscount | ( | xqspi_regs_t * | XQSPIx | ) |
Get miss counter.
Register|BitsName --------|-------- MISS_COUNT|MISSCOUNT
XQSPIx | XQSPI instance |
Returned | Value can between: 0 ~ 0xFFFFFFFF |
Definition at line 757 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_cache | ( | xqspi_regs_t * | XQSPIx | ) |
Check if cache function is enabled.
Register|BitsName --------|-------- CTRL0 |EN
XQSPIx | XQSPI instance |
State | of bit (1 or 0). |
Definition at line 461 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_cache_dbgmux | ( | xqspi_regs_t * | XQSPIx | ) |
Check if debug bus mux is enabled.
Register|BitsName --------|-------- CTRL1 |DBGMUX_EN
XQSPIx | XQSPI instance |
State | of bit (1 or 0). |
Definition at line 725 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_cache_flush | ( | xqspi_regs_t * | XQSPIx | ) |
Check if tag memory flush is enabled.
Register|BitsName --------|-------- CTRL0 |TAG
XQSPIx | XQSPI instance |
State | of bit (1 or 0). |
Definition at line 557 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_cache_clk_force_en | ( | xqspi_regs_t * | XQSPIx | ) |
Set cache gating dynamically.
Register|BitsName --------|-------- CTRL0 |CLK_FORCE_EN
XQSPIx | XQSPI instance |
None |
Definition at line 572 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_cache_dbgbus | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | sel | ||
) |
Set debugbus configurations signals.
Register|BitsName --------|-------- CTRL1 |DBGBUS_SEL
XQSPIx | XQSPI instance |
sel | This parameter can between: 0 ~ 0x7 |
None |
Definition at line 663 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_cache_fifo | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | mode | ||
) |
Set FIFO mode.
Register|BitsName --------|-------- CTRL0 |FIFO
XQSPIx | XQSPI instance |
mode | This parameter can be one of the following values: |
None |
Definition at line 591 of file gr55xx_ll_xqspi.h.
SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_cache_hitmiss | ( | xqspi_regs_t * | XQSPIx, |
uint32_t | mode | ||
) |
Set HIT/MISS mode.
Register|BitsName --------|-------- CTRL0 |HITMISS
XQSPIx | XQSPI instance |
mode | This parameter can be one of the following values: |
None |
Definition at line 628 of file gr55xx_ll_xqspi.h.