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52 #ifndef __GR55xx_HAL_SPI_H__
53 #define __GR55xx_HAL_SPI_H__
140 #define SPI_SOFT_CS_MAGIC_NUMBER 0xDEADBEAF
149 #define CS_STA_STATE_POLL_TX 0x01
150 #define CS_STA_STATE_POLL_RX 0x02
151 #define CS_STA_STATE_POLL_TX_RX 0x03
152 #define CS_STA_STATE_POLL_EEPREAD 0x04
153 #define CS_STA_STATE_IT_TX 0x05
154 #define CS_STA_STATE_IT_RX 0x06
155 #define CS_STA_STATE_IT_TX_RX 0x07
156 #define CS_STA_STATE_IT_EEPREAD 0x08
157 #define CS_STA_STATE_DMA_TX 0x09
158 #define CS_STA_STATE_DMA_RX 0x0A
159 #define CS_STA_STATE_DMA_TX_RX 0x0B
160 #define CS_STA_STATE_DMA_EEPREAD 0x0C
161 #define CS_STA_STATE_DMA_LLP_TX 0x0D
162 #define CS_STA_STATE_DMA_SCATTER_RX 0x0E
171 #define CS_END_STATE_POLL_TX 0x81
172 #define CS_END_STATE_POLL_RX 0x82
173 #define CS_END_STATE_POLL_TX_RX 0x83
174 #define CS_END_STATE_POLL_EEPREAD 0x84
175 #define CS_END_STATE_TX_CPLT 0x90
176 #define CS_END_STATE_RX_CPLT 0x91
177 #define CS_END_STATE_TX_RX_CPLT 0x92
178 #define CS_END_STATE_XFER_ERR 0x93
179 #define CS_END_STATE_TX_ABORT_CPLT 0x94
180 #define CS_END_STATE_RX_ABORT_CPLT 0x95
181 #define CS_END_STATE_ABORT_CPLT 0x96
283 #define SPI_DIRECTION_FULL_DUPLEX LL_SPI_FULL_DUPLEX
284 #define SPI_DIRECTION_SIMPLEX_TX LL_SPI_SIMPLEX_TX
285 #define SPI_DIRECTION_SIMPLEX_RX LL_SPI_SIMPLEX_RX
286 #define SPI_DIRECTION_READ_EEPROM LL_SPI_READ_EEPROM
293 #define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000)
294 #define HAL_SPI_ERROR_TIMEOUT ((uint32_t)0x00000001)
295 #define HAL_SPI_ERROR_TRANSFER ((uint32_t)0x00000002)
296 #define HAL_SPI_ERROR_DMA ((uint32_t)0x00000004)
297 #define HAL_SPI_ERROR_INVALID_PARAM ((uint32_t)0x00000008)
304 #define SPI_DATASIZE_4BIT LL_SPI_DATASIZE_4BIT
305 #define SPI_DATASIZE_5BIT LL_SPI_DATASIZE_5BIT
306 #define SPI_DATASIZE_6BIT LL_SPI_DATASIZE_6BIT
307 #define SPI_DATASIZE_7BIT LL_SPI_DATASIZE_7BIT
308 #define SPI_DATASIZE_8BIT LL_SPI_DATASIZE_8BIT
309 #define SPI_DATASIZE_9BIT LL_SPI_DATASIZE_9BIT
310 #define SPI_DATASIZE_10BIT LL_SPI_DATASIZE_10BIT
311 #define SPI_DATASIZE_11BIT LL_SPI_DATASIZE_11BIT
312 #define SPI_DATASIZE_12BIT LL_SPI_DATASIZE_12BIT
313 #define SPI_DATASIZE_13BIT LL_SPI_DATASIZE_13BIT
314 #define SPI_DATASIZE_14BIT LL_SPI_DATASIZE_14BIT
315 #define SPI_DATASIZE_15BIT LL_SPI_DATASIZE_15BIT
316 #define SPI_DATASIZE_16BIT LL_SPI_DATASIZE_16BIT
317 #define SPI_DATASIZE_17BIT LL_SPI_DATASIZE_17BIT
318 #define SPI_DATASIZE_18BIT LL_SPI_DATASIZE_18BIT
319 #define SPI_DATASIZE_19BIT LL_SPI_DATASIZE_19BIT
320 #define SPI_DATASIZE_20BIT LL_SPI_DATASIZE_20BIT
321 #define SPI_DATASIZE_21BIT LL_SPI_DATASIZE_21BIT
322 #define SPI_DATASIZE_22BIT LL_SPI_DATASIZE_22BIT
323 #define SPI_DATASIZE_23BIT LL_SPI_DATASIZE_23BIT
324 #define SPI_DATASIZE_24BIT LL_SPI_DATASIZE_24BIT
325 #define SPI_DATASIZE_25BIT LL_SPI_DATASIZE_25BIT
326 #define SPI_DATASIZE_26BIT LL_SPI_DATASIZE_26BIT
327 #define SPI_DATASIZE_27BIT LL_SPI_DATASIZE_27BIT
328 #define SPI_DATASIZE_28BIT LL_SPI_DATASIZE_28BIT
329 #define SPI_DATASIZE_29BIT LL_SPI_DATASIZE_29BIT
330 #define SPI_DATASIZE_30BIT LL_SPI_DATASIZE_30BIT
331 #define SPI_DATASIZE_31BIT LL_SPI_DATASIZE_31BIT
332 #define SPI_DATASIZE_32BIT LL_SPI_DATASIZE_32BIT
340 #define SPI_POLARITY_LOW LL_SPI_SCPOL_LOW
341 #define SPI_POLARITY_HIGH LL_SPI_SCPOL_HIGH
349 #define SPI_PHASE_1EDGE LL_SPI_SCPHA_1EDGE
350 #define SPI_PHASE_2EDGE LL_SPI_SCPHA_2EDGE
357 #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000)
359 #define SPI_TIMODE_ENABLE LL_SPI_PROTOCOL_TI
367 #define SPI_SLAVE_SELECT_0 LL_SPI_SLAVE0
368 #define SPI_SLAVE_SELECT_1 LL_SPI_SLAVE1
369 #define SPI_SLAVE_SELECT_ALL (LL_SPI_SLAVE0 | LL_SPI_SLAVE1)
376 #define SPI_TX_FIFO_LEVEL_MAX 8
377 #define SPI_RX_FIFO_LEVEL_MAX 8
384 #define SPI_FLAG_DCOL LL_SPI_SR_DCOL
385 #define SPI_FLAG_TXE LL_SPI_SR_TXE
386 #define SPI_FLAG_RFF LL_SPI_SR_RFF
387 #define SPI_FLAG_RFNE LL_SPI_SR_RFNE
388 #define SPI_FLAG_TFE LL_SPI_SR_TFE
389 #define SPI_FLAG_TFNF LL_SPI_SR_TFNF
390 #define SPI_FLAG_BUSY LL_SPI_SR_BUSY
398 #define SPI_IT_MST LL_SPI_IS_MST
399 #define SPI_IT_RXF LL_SPI_IS_RXF
400 #define SPI_IT_RXO LL_SPI_IS_RXO
401 #define SPI_IT_RXU LL_SPI_IS_RXU
402 #define SPI_IT_TXO LL_SPI_IS_TXO
403 #define SPI_IT_TXE LL_SPI_IS_TXE
410 #define HAL_SPI_TIMEOUT_DEFAULT_VALUE ((uint32_t)5000)
424 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->state = HAL_SPI_STATE_RESET)
431 #define __HAL_SPI_ENABLE(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->SSI_EN, SPI_SSI_EN)
438 #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->SSI_EN, SPI_SSI_EN)
445 #define __HAL_SPI_ENABLE_DMATX(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->DMA_CTRL, SPI_DMA_CTRL_TX_DMA_EN)
452 #define __HAL_SPI_ENABLE_DMARX(__HANDLE__) SET_BITS((__HANDLE__)->p_instance->DMA_CTRL, SPI_DMA_CTRL_RX_DMA_EN)
459 #define __HAL_SPI_DISABLE_DMATX(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->DMA_CTRL, SPI_DMA_CTRL_TX_DMA_EN)
466 #define __HAL_SPI_DISABLE_DMARX(__HANDLE__) CLEAR_BITS((__HANDLE__)->p_instance->DMA_CTRL, SPI_DMA_CTRL_RX_DMA_EN)
481 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BITS((__HANDLE__)->p_instance->INT_MASK, (__INTERRUPT__))
496 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BITS((__HANDLE__)->p_instance->INT_MASK, (__INTERRUPT__))
511 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_BITS((__HANDLE__)->p_instance->INT_STAT, (__INTERRUPT__)) == (__INTERRUPT__))
527 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((READ_BITS((__HANDLE__)->p_instance->STAT, (__FLAG__)) != 0) ? SET : RESET)
543 #define __HAL_SPI_CLEAR_FLAG(__HANDLE__, __FLAG__) READ_BITS((__HANDLE__)->p_instance->STAT, (__FLAG__))
557 #define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_FULL_DUPLEX) || \
558 ((__MODE__) == SPI_DIRECTION_SIMPLEX_TX) || \
559 ((__MODE__) == SPI_DIRECTION_SIMPLEX_RX) || \
560 ((__MODE__) == SPI_DIRECTION_READ_EEPROM))
567 #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) >= SPI_DATASIZE_4BIT) && \
568 ((__DATASIZE__) <= SPI_DATASIZE_32BIT))
574 #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \
575 ((__CPOL__) == SPI_POLARITY_HIGH))
581 #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \
582 ((__CPHA__) == SPI_PHASE_2EDGE))
588 #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) ((__PRESCALER__) <= 0xFFFF)
594 #define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \
595 ((__MODE__) == SPI_TIMODE_ENABLE))
601 #define IS_SPI_SLAVE(__SLAVE__) (((__SLAVE__) == SPI_SLAVE_SELECT_0) || \
602 ((__SLAVE__) == SPI_SLAVE_SELECT_1) || \
603 ((__SLAVE__) == SPI_SLAVE_SELECT_ALL))
609 #define IS_SPI_RX_SAMPLE_DLY(__DLY__) (((__DLY__) >= 0) && ((__DLY__) <= 7))
617 #define IS_SPI_FIFO_THRESHOLD(__THR__) (((__THR__) >= 0) && ((__THR__) <= (LL_SPI_M_FIFO_DEPTH - 1)))
void hal_spi_abort_cplt_callback(spi_handle_t *p_spi)
SPI Abort Completed callback.
hal_spi_state_t hal_spi_get_state(spi_handle_t *p_spi)
Return the SPI handle state.
hal_status_t hal_spi_transmit_dma_with_ia_32addr(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length)
32addr: Transmit an amount of data in non-blocking mode with DMA. Support Setting C&A
void(* spi_rx_cplt_callback)(spi_handle_t *p_spi)
SPI handle Structure definition.
hal_status_t hal_spi_deinit(spi_handle_t *p_spi)
De-initialize the SPI peripheral.
void(* spi_soft_cs_deassert)(spi_handle_t *p_spi, uint32_t state)
hal_lock_t
HAL Lock structures definition.
hal_status_t hal_spi_abort(spi_handle_t *p_spi)
Abort ongoing transfer (blocking mode).
void(* spi_abort_cplt_callback)(spi_handle_t *p_spi)
void(* spi_tx_cplt_callback)(spi_handle_t *p_spi)
struct _hal_spi_callback hal_spi_callback_t
HAL_SPI Callback function definition.
void hal_spi_error_callback(spi_handle_t *p_spi)
SPI error callback.
void(* read_fifo)(struct _spi_handle *p_spi)
hal_status_t hal_spi_init(spi_handle_t *p_spi)
Initialize the SPI according to the specified parameters in the spi_init_t and initialize the associa...
uint32_t hal_spi_get_tx_fifo_threshold(spi_handle_t *p_spi)
Get the TX FIFO threshold.
hal_status_t hal_spi_transmit_dma(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode with DMA.
hal_status_t hal_spi_transmit(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length, uint32_t timeout)
Transmit an amount of data in blocking mode.
hal_status_t hal_spi_read_eeprom_dma(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data)
Read an amount of data from EEPROM in non-blocking mode with DMA.
SPI init Structure definition.
__IO uint32_t tx_xfer_count
hal_status_t hal_spi_receive_dma(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length)
Receive an amount of data in non-blocking mode with DMA.
hal_status_t hal_spi_transmit_with_ia(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length, uint32_t timeout)
Transmit an amount of data in non-blocking mode with polling. Support Setting C&A.
void hal_spi_tx_cplt_callback(spi_handle_t *p_spi)
Tx Transfer completed callback.
void hal_spi_soft_cs_assert(spi_handle_t *p_spi, uint32_t state)
Assert the CS Singal line by software (When activate the soft-cs mode)
hal_status_t hal_spi_read_eeprom(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data, uint32_t timeout)
Read an amount of data from EEPROM in blocking mode.
hal_spi_state_t
HAL SPI State Enumerations definition.
void hal_spi_rx_cplt_callback(spi_handle_t *p_spi)
Rx Transfer completed callback.
void(* spi_error_callback)(spi_handle_t *p_spi)
__IO uint32_t rx_xfer_count
void hal_spi_irq_handler(spi_handle_t *p_spi)
Handle SPI interrupt request.
void(* spi_msp_init)(spi_handle_t *p_spi)
hal_status_t hal_spi_suspend_reg(spi_handle_t *p_spi)
Suspend some registers related to SPI configuration before sleep.
void(* spi_tx_rx_cplt_callback)(spi_handle_t *p_spi)
__IO uint32_t tx_xfer_size
hal_status_t hal_spi_resume_reg(spi_handle_t *p_spi)
Restore some registers related to SPI configuration after sleep. This function must be used in conjun...
void hal_spi_soft_cs_deassert(spi_handle_t *p_spi, uint32_t state)
De-Assert the CS Singal line by software (When activate the soft-cs mode)
__IO uint32_t soft_cs_magic
hal_status_t hal_spi_transmit_receive(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length, uint32_t timeout)
Transmit and Receive an amount of data in blocking mode.
hal_status_t hal_spi_set_rx_fifo_threshold(spi_handle_t *p_spi, uint32_t threshold)
Set the RX FIFO threshold.
uint32_t hal_spi_get_rx_fifo_threshold(spi_handle_t *p_spi)
Get the RX FIFO threshold.
void(* spi_soft_cs_assert)(spi_handle_t *p_spi, uint32_t state)
struct _spi_handle spi_handle_t
SPI handle Structure definition.
hal_status_t hal_spi_transmit_dma_with_ia(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode with DMA. Support Setting C&A.
hal_status_t hal_spi_abort_it(spi_handle_t *p_spi)
Abort ongoing transfer (Interrupt mode).
hal_status_t hal_spi_transmit_it(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode with Interrupt.
hal_status_t hal_spi_transmit_with_ia_32addr(spi_handle_t *p_spi, uint8_t inst, uint32_t addr, uint8_t *p_data, uint32_t length, uint32_t timeout)
32addr: Transmit an amount of data in non-blocking mode with polling. Support Setting C&A
hal_status_t hal_spi_receive_it(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length)
Receive an amount of data in non-blocking mode with Interrupt.
@ HAL_SPI_STATE_BUSY_TX_RX
Header file containing functions prototypes of SPI LL library.
void hal_spi_msp_deinit(spi_handle_t *p_spi)
De-initialize the SPI MSP.
hal_status_t hal_spi_receive(spi_handle_t *p_spi, uint8_t *p_data, uint32_t length, uint32_t timeout)
Receive an amount of data in blocking mode.
struct _spi_init spi_init_t
SPI init Structure definition.
void(* spi_msp_deinit)(spi_handle_t *p_spi)
hal_status_t
HAL Status structures definition.
uint32_t baudrate_prescaler
hal_status_t hal_spi_set_tx_fifo_threshold(spi_handle_t *p_spi, uint32_t threshold)
Set the TX FIFO threshold.
void(* read_write_fifo)(struct _spi_handle *p_spi)
void hal_spi_msp_init(spi_handle_t *p_spi)
Initialize the SPI MSP.
LL DMA llp config definition.
__IO hal_spi_state_t state
void hal_spi_tx_rx_cplt_callback(spi_handle_t *p_spi)
Tx and Rx Transfer completed callback.
__IO uint32_t rx_xfer_size
hal_status_t hal_spi_transmit_receive_dma(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length)
Transmit and Receive an amount of data in non-blocking mode with DMA.
hal_status_t hal_spi_read_eeprom_it(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t tx_number_data, uint32_t rx_number_data)
Read an amount of data from EEPROM in non-blocking mode with Interrupt.
hal_status_t hal_spi_transmit_receive_it(spi_handle_t *p_spi, uint8_t *p_tx_data, uint8_t *p_rx_data, uint32_t length)
Transmit and Receive an amount of data in non-blocking mode with Interrupt.
hal_status_t hal_spi_read_eeprom_dma_scatter(spi_handle_t *p_spi, uint8_t *p_tx_data, uint32_t tx_data_length, uint8_t *p_rx_data, uint32_t rx_data_length, uint32_t sct_interval, uint32_t sct_count)
Receive an amount of data in non-blocking mode with DMA.
uint32_t hal_spi_get_error(spi_handle_t *p_spi)
Return the SPI error code.
HAL_SPI Callback function definition.
hal_status_t hal_spi_transmit_dma_llp(spi_handle_t *p_spi, dma_llp_config_t *p_llp_config, uint32_t data_length)
Transmit an amount of data in non-blocking mode with DMA LLP.
DMA handle Structure definition.
This file contains HAL common definitions, enumeration, macros and structures definitions.
void(* write_fifo)(struct _spi_handle *p_spi)
void hal_spi_set_timeout(spi_handle_t *p_spi, uint32_t timeout)
Set the SPI internal process timeout value.