app_qspi.h
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1 /**
2  ****************************************************************************************
3  *
4  * @file app_qspi.h
5  * @author BLE Driver Team
6  * @brief Header file containing functions prototypes of QSPI app library.
7  *
8  ****************************************************************************************
9  * @attention
10  #####Copyright (c) 2019 GOODIX
11  All rights reserved.
12 
13  Redistribution and use in source and binary forms, with or without
14  modification, are permitted provided that the following conditions are met:
15  * Redistributions of source code must retain the above copyright
16  notice, this list of conditions and the following disclaimer.
17  * Redistributions in binary form must reproduce the above copyright
18  notice, this list of conditions and the following disclaimer in the
19  documentation and/or other materials provided with the distribution.
20  * Neither the name of GOODIX nor the names of its contributors may be used
21  to endorse or promote products derived from this software without
22  specific prior written permission.
23 
24  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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30  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34  POSSIBILITY OF SUCH DAMAGE.
35  ****************************************************************************************
36  */
37 
38 /** @addtogroup PERIPHERAL Peripheral Driver
39  * @{
40  */
41 
42 /** @addtogroup APP_DRIVER APP DRIVER
43  * @{
44  */
45 
46 /** @defgroup APP_QSPI QSPI
47  * @brief QSPI APP module driver.
48  * @{
49  */
50 
51 
52 #ifndef _APP_QSPI_H_
53 #define _APP_QSPI_H_
54 
55 #include "app_drv_config.h"
56 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5332X)
57 #include "gr533x_hal.h"
58 #else
59 #include "gr55xx_hal.h"
60 #endif
61 
62 #include "app_io.h"
63 #include "app_dma.h"
64 #include "app_drv_error.h"
65 #include "app_drv_config.h"
66 #include "stdbool.h"
67 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
68 #include "app_qspi_user_config.h"
69 #endif
70 #ifdef __cplusplus
71 extern "C" {
72 #endif
73 
74 #ifdef HAL_QSPI_MODULE_ENABLED
75 
76 /**
77  * @defgroup APP_QSPI_MACRO Defines
78  * @{
79  */
80 
81 /* Exported constants --------------------------------------------------------*/
82 /** @defgroup APP_QSPI_Exported_Constants QSPI Exported Constants
83  * @{
84  */
85 
86 /** @addtogroup APP_QSPI_PIN Qspi pin defines
87  * @{
88  */
89 #define APP_QSPI_PIN_ENABLE 1 /**< QSPI pin enable */
90 #define APP_QSPI_PIN_DISABLE 0 /**< QSPI pin disable */
91 /** @} */
92 
93 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
94 /** @defgroup APP_MAX_XFER MAX_XREF Defines
95  * @{
96  */
97 #define QSPI_MAX_XFER_SIZE_ONCE (0xFFFCu) /**< max xfer beat in every qspi xfer */
98 #define DMA_MAX_XFER_SIZE_ONCE (4095u) /**< max xfer beat in every dma xfer */
99 /** @} */
100 
101 //#define APP_STORAGE_RAM_ID 0xf /**< Special ID to handle RAM Source */
102 #endif
103 /** @} */
104 
105 /** @} */
106 
107 
108 /** @addtogroup APP_QSPI_ENUM Enumerations
109  * @{
110  */
111 
112 /**
113  * @brief QSPI module Enumerations definition
114  */
115 typedef enum
116 {
117  APP_QSPI_ID_0, /**< QSPI module 0 */
118  APP_QSPI_ID_1, /**< QSPI module 1 */
119 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
120  APP_QSPI_ID_2, /**< QSPI module 2 */
121 #endif
122  APP_QSPI_ID_MAX, /**< Only for check parameter, not used as input parameters. */
123 
125 } app_qspi_id_t;
126 
127 /**
128 * @brief APP QSPI Event Type
129 */
130 typedef enum
131 {
132  APP_QSPI_EVT_ERROR, /**< Error reported by QSPI peripheral. */
133  APP_QSPI_EVT_TX_CPLT, /**< Requested TX transfer completed. */
134  APP_QSPI_EVT_RX_DATA, /**< Requested RX transfer completed. */
135  APP_QSPI_EVT_ABORT, /**< Abort reported by QSPI peripheral. */
136 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
137  APP_QSPI_EVT_ASYNC_WR_SCRN_CPLT, /**< ASYNC-Write Quad Screen Complete */
138  APP_QSPI_EVT_ASYNC_WR_SCRN_FAIL, /**< ASYNC-Write Quad Screen Fail */
139 #endif
141 
142 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
143 /**
144  * @brief QSPI Memory-Mapped Endian Mode
145  */
146 typedef enum {
147  APP_QSPI_MMAP_ENDIAN_MODE_0 = 0, /**< MMAP Endian Mode 0 */
148  APP_QSPI_MMAP_ENDIAN_MODE_1, /**< MMAP Endian Mode 1 */
149  APP_QSPI_MMAP_ENDIAN_MODE_2, /**< MMAP Endian Mode 2 */
150 } app_qspi_mmap_endian_mode_e;
151 
152 /**
153  * @brief QSPI Device supporting Memory-Mapped Mode
154  */
155 typedef enum {
156  APP_QSPI_DEVICE_UNSET = 0, /**< UnSet Device */
157  APP_QSPI_DEVICE_FLASH = 1, /**< Flash Device */
158  APP_QSPI_DEVICE_PSRAM = 2, /**< PSRAM Device */
159 } app_qspi_device_e;
160 
161 /**
162  * @brief Define PSRAM's Read Command for Memory-Mapped Mode
163  */
164 typedef enum {
165  PSRAM_MMAP_CMD_QREAD_0BH = 0x00, /**< 0BH in Quad */
166  PSRAM_MMAP_CMD_QREAD_EBH = 0x01, /**< EBH in Quad */
167  PSRAM_MMAP_CMD_READ_MAX
168 } app_qspi_psram_mmap_rd_cmd_e;
169 
170 /**
171  * @brief Define PSRAM's Write Command for Memory-Mapped Mode
172  */
173 typedef enum {
174  PSRAM_MMAP_CMD_QWRITE_02H = 0x00, /**< 02H in Quad */
175  PSRAM_MMAP_CMD_QWRITE_38H = 0x01, /**< 38H in Quad */
176  PSRAM_MMAP_CMD_WRITE_MAX
177 } app_qspi_psram_mmap_wr_cmd_e;
178 
179 /**
180  * @brief Define Flash's Read Command for Memory-Mapped Mode
181  */
182 typedef enum {
183  FLASH_MMAP_CMD_DREAD_3BH = 0x00, /**< 3BH in Dual */
184  FLASH_MMAP_CMD_2READ_BBH = 0x01, /**< BBH in 2Read */
185  FLASH_MMAP_CMD_2READ_BBH_SIOO = 0x02, /**< BBH in 2Read with SIOO mode */
186 
187  FLASH_MMAP_CMD_QREAD_6BH = 0x03, /**< 6BH in QRead */
188  FLASH_MMAP_CMD_4READ_EBH = 0x04, /**< EBH in 4Read */
189  FLASH_MMAP_CMD_4READ_EBH_SIOO = 0x05, /**< EBH in 4Read with SIOO mode */
190  FLASH_MMAP_CMD_READ_MAX,
191 } app_qspi_flash_mmap_rd_cmd_e;
192 
193 /**
194 * @brief APP QSPI interface type when drawing screen
195 */
196 typedef enum {
197  DRAW_TYPE_IF_NONE = 0x00,
198  DRAW_TYPE_IF_DUAL_SCREEN,
199  DRAW_TYPE_IF_VERI_LINKED_SCREEN,
200 } app_qspi_draw_screen_interface_type_e;
201 
202 /**
203  * @brief Define Pin Groups for QSPI
204  */
205 typedef enum {
206 
207  QSPI0_PIN_GROUP_0 = 0x00, /**< QSPI0 Pinmux Group */
208  QSPI1_PIN_GROUP_0 = 0x01, /**< QSPI1 Pinmux Group 0 */
209  QSPI2_PIN_GROUP_0 = 0x02, /**< QSPI2 Pinmux Group 0 */
210  QSPIx_PIN_GROUP_MAX,
211 } qspi_pins_group_e;
212 
213 /**
214  * @brief Define BLIT Mode By DMA
215  */
216 typedef enum {
217  BLIT_BY_DMA_SG = 0, /**< need enable BLIT_IMAGE_FEATURE_SUPPORT */
218  BLIT_BY_DMA_LLP = 1, /**< need enable PSRAM_LLP_FEATURE_SUPPORT */
219 } blit_xfer_type_e;
220 
221 /** @} */
222 
223 /** @addtogroup APP_QSPI_STRUCTURES Structures
224  * @{
225  */
226 
227 /**
228  * @brief QSPI memory-mapped configuration Structures
229  */
230 typedef struct {
231  app_qspi_device_e dev_type; /**< Specifies the device type of QSPI */
232  app_qspi_psram_mmap_wr_cmd_e psram_wr; /**< Specifies the write command for PSRAM, Flash does not support this */
233  union {
234  app_qspi_flash_mmap_rd_cmd_e flash_rd; /**< Read command for flash device */
235  app_qspi_psram_mmap_rd_cmd_e psram_rd; /**< Read command for psram device */
236  } rd; /**< Specifies read command by real device */
237  void * set; /**< Reserved */
238 } app_qspi_mmap_device_t;
239 #endif
240 
241 /**
242  * @brief QSPI IO configuration Structures
243  */
244 typedef struct
245 {
246  app_io_type_t type; /**< Specifies the type of QSPI IO. */
247  app_io_mux_t mux; /**< Specifies the Peripheral to be connected to the selected pins. */
248  uint32_t pin; /**< Specifies the IO pins to be configured.
249  This parameter can be any value of @ref GR5xxx_pins. */
250  app_io_mode_t mode; /**< Specifies the IO Mode for pins. */
251  app_io_pull_t pull; /**< Specifies the Pull-up or Pull-Down activation for the selected pins. */
252  uint8_t enable; /**< Enable or disable the pin. */
254 
255 /**
256  * @brief QSPI configuration Structures
257  */
258 typedef struct
259 {
260  app_qspi_pin_t cs; /**< Set the configuration of QSPI CS pin. */
261  app_qspi_pin_t clk; /**< Set the configuration of QSPI CLK pin. */
262  app_qspi_pin_t io_0; /**< Set the configuration of QSPI IO0 pin. */
263  app_qspi_pin_t io_1; /**< Set the configuration of QSPI IO1 pin. */
264  app_qspi_pin_t io_2; /**< Set the configuration of QSPI IO2 pin. */
265  app_qspi_pin_t io_3; /**< Set the configuration of QSPI IO3 pin. */
267 
268 /**
269  * @brief QSPI DMA configuration structure definition
270  */
271 typedef struct
272 {
273  dma_regs_t * dma_instance; /**< Specifies the dma instance of QSPI. */
274  dma_channel_t dma_channel; /**< Specifies the dma channel of QSPI. */
275 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
276  uint32_t wait_timeout_ms; /**< Specifies timeout time of polling and dead wait, ms. */
277  uint32_t extend; /**< Specifies extend segment, to use */
278 #endif
280 /** @} */
281 
282 /** @addtogroup APP_QSPI_TYPEDEFS Type Definitions
283  * @{
284  */
285 
286 /**
287  * @brief QSPI command structure definition
288  */
290 /** @} */
291 
292 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
293 /** @addtogroup APP_QSPI_STRUCTURES Structures
294  * @{
295  */
296 typedef struct
297 {
298  uint32_t instruction; /**< Specifies the Instruction to be sent.
299  This parameter can be a value (8-bit) between 0x00 and 0xFF. */
300 
301  uint32_t leading_address; /**< Specifies the Address to be sent (Size from 1 to 4 bytes according AddressSize).
302  This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF. */
303 
304  uint32_t ongoing_address; /**< Specifies the Address to be sent (Size from 1 to 4 bytes according AddressSize).
305  This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF. */
306 
307  uint32_t instruction_size; /**< Specifies the Instruction Size.
308  This parameter can be a value of @ref QSPI_Instruction_Size. */
309 
310  uint32_t address_size; /**< Specifies the Address Size.
311  This parameter can be a value of @ref QSPI_Address_Size. */
312 
313  uint32_t dummy_cycles; /**< Specifies the Number of Dummy Cycles.
314  This parameter can be a number between 0 and 31. */
315 
316  uint32_t data_size; /**< Specifies the QSPI address width.
317  This parameter can be a value of @ref QSPI_Data_Size. */
318 
319  uint32_t instruction_address_mode; /**< Specifies the Instruction and Address Mode.
320  This parameter can be a value of @ref QSPI_Inst_Addr_Mode. */
321 
322  uint32_t data_mode; /**< Specifies the Data Mode (used for dummy cycles and data phases).
323  This parameter can be a value of @ref QSPI_Data_Mode. */
324 
325  bool is_one_take_cs; /**< Sent all data in one take CS or in multiple independent CS */
326 
327 } app_qspi_screen_command_t;
328 /** @} */
329 #endif
330 
331 /** @addtogroup APP_QSPI_STRUCTURES Structures
332  * @{
333  */
334 /**
335  * @brief QSPI event structure definition
336  */
337 typedef struct
338 {
339  app_qspi_evt_type_t type; /**< Type of event. */
340  union
341  {
342  uint32_t error_code; /**< QSPI Error code . */
343  uint16_t size; /**< QSPI transmitted/received counter. */
344  } data; /**< Event data. */
346 
347 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
348 /**
349  * @brief Screen Info. structure definition
350  */
351 typedef struct {
352  unsigned int scrn_pixel_stride; /**< screen pixel stride, such as 390 */
353  unsigned int scrn_pixel_width; /**< screen pixel width, such as 390, width must be less or equal than stride */
354  unsigned int scrn_pixel_height; /**< screen pixel height, such as 390 */
355  unsigned int scrn_pixel_depth; /**< pixel depth, unit: byte, such as 2 */
356 } app_qspi_screen_info_t;
357 
358 
359 /**
360  * @brief Scroll-Screen structure definition
361  */
362 typedef struct {
363  uint32_t first_frame_start_address; /**< if scroll the screen horizontally : first stands for left image, second stands for right image */
364  uint32_t second_frame_start_address; /**< if scroll the screen vertically : first stands for up image, second stands for down image */
365  uint32_t scroll_coordinate; /**< scroll to where , must be even number, belongs to [0, SCREEN_PIXEL_WIDTH] */
366  bool is_horizontal_scroll; /**< true : screen horizontally ; false : screen vertically */
367 } app_qspi_screen_scroll_t;
368 
369 /**
370  * @brief Vertical Scroll-Screen Linked List Structure
371  */
372 typedef struct _screen_veri_link_scroll_t {
373  uint32_t frame_ahb_start_address; /**< Start AHB address for current frame */
374  uint32_t frame_offset_lines; /**< Offset lines for current frame */
375  uint32_t frame_draw_lines; /**< Drawing lines (start from offset line) for current frame */
376  struct _screen_veri_link_scroll_t * next; /**< Linked to next node, if empty, Set NULL */
377 } app_qspi_screen_veri_link_scroll_t;
378 
379 /**
380  * @brief One block of screen Structure
381  */
382 typedef struct {
383  uint32_t frame_ahb_start_address; /**< Start AHB address for current block */
384  uint32_t frame_offset_lines; /**< Offset lines for current block */
385  uint32_t frame_draw_lines; /**< Drawing lines (start from offset line) for current block */
386 } app_qspi_screen_block_t;
387 
388 /**
389  * @brief Dual Screen (HOR/VER) Scroll Structure, just used for inner driver
390  */
391 typedef struct {
392  app_qspi_screen_scroll_t scroll_config; /**< Start AHB address for current frame */
393  uint32_t image_1_ahb_address; /**< Record first frame starting AHB address */
394  uint32_t image_2_ahb_address; /**< Record second frame starting AHB address */
395  uint32_t this_send_lines; /**< Record current sent lines */
396  uint32_t total_sent_lines; /**< Record total sent lines already */
397  uint32_t sent_line_order; /**< Record current line order */
398 } dual_screen_scroll_t;
399 
400 /**
401  * @brief Vertical Linked List Screen-Scroll Structure, just used for inner driver
402  */
403 typedef struct {
404  app_qspi_screen_veri_link_scroll_t vl_scroll; /**< Start AHB address for current frame */
405  app_qspi_screen_veri_link_scroll_t * p_cur_scroll; /**< Record current linked node */
406  uint32_t total_sent_lines; /**< Record total sent lines */
407 } veri_linked_screen_scroll_t;
408 
409 /**
410  * @brief Async Draw Screen Structure, just used for inner driver
411  */
412 typedef struct {
413  app_qspi_draw_screen_interface_type_e if_type; /**< drawing interface type */
414  app_qspi_id_t screen_id; /**< Specify the Screen ID */
415  app_qspi_id_t storage_id; /**< Specify the Memory ID */
416  uint32_t llp_cfg_right_shift_bit; /**< Record the llp shift bit configure */
417  uint32_t llp_cfg_ctrl_low; /**< Record the llp control bits configure */
418  app_qspi_screen_info_t screen_info; /**< Record the basic screen info */
419  app_qspi_screen_command_t qspi_screen_command; /**< Record the basic screen command */
420  union {
421  dual_screen_scroll_t dual_ss; /**< info for dual screen-scroll */
422  veri_linked_screen_scroll_t veri_linked_ss; /**< info for veri linked screen-scroll */
423  } ss; /**< union record */
424 } app_qspi_async_draw_screen_info_t;
425 
426 
427 /**
428  * @brief Blit Image structure definition
429  */
430 typedef struct {
431  uint32_t src_img_address; /**< source address, just offset in storage device */
432  uint32_t src_img_w; /**< pixel width of source image */
433  uint32_t src_img_h; /**< pixel height of source image */
434  uint32_t src_img_x; /**< x-coordinate of source image, left-top point is Coordinate origin */
435  uint32_t src_img_x_delta; /**< blit image width in pixel, do not multiple pixel depth */
436  uint32_t src_img_y; /**< y-coordinate of source image, left-top point is Coordinate origin */
437  uint32_t src_img_y_delta; /**< blit image height in pixel, do not multiple pixel depth */
438  uint32_t dst_buff_address; /**< destination buffer address */
439  uint32_t dst_buff_width; /**< pixel width of destination buffer */
440  uint32_t dst_buff_height; /**< pixel height of destination buffer */
441  uint32_t dst_buff_x; /**< x-coordinate of destination buffer, left-top point is Coordinate origin */
442  uint32_t dst_buff_y; /**< y-coordinate of destination buffer, left-top point is Coordinate origin */
443  uint32_t pixel_depth; /**< pixel depth in byte */
444 } blit_image_config_t;
445 #endif
446 /** @} */
447 
448 /** @addtogroup APP_QSPI_TYPEDEFS Type Definitions
449  * @{
450  */
451 
452 /**
453  * @brief QSPI event callback definition
454  */
455 typedef void (*app_qspi_evt_handler_t)(app_qspi_evt_t *p_evt);
456 /** @} */
457 
458 /** @addtogroup APP_QSPI_ENUM Enumerations
459  * @{
460  */
461 /**@brief App qspi state types. */
462 typedef enum
463 {
466 #ifdef APP_DRIVER_WAKEUP_CALL_FUN
467  APP_QSPI_SLEEP,
468 #endif
470 
471 /**@brief App qspi dma_state types. */
472 typedef enum
473 {
477 
478 /** @} */
479 
480 /** @addtogroup APP_QSPI_STRUCTURES Structures
481  * @{
482  */
483 
484 /**
485  * @brief QSPI device structure definition
486  */
487 typedef struct {
488  qspi_handle_t handle; /**< QSPI handle Structure. */
489 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
490  app_qspi_dma_cfg_t dma_cfg; /**< QSPI DMA configuration structure. */
491 #endif
492  app_qspi_pin_cfg_t *p_pin_cfg; /**< QSPI configuration Structures. */
493  dma_id_t dma_id; /**< DMA id. */
494  app_qspi_state_t qspi_state; /**< App qspi state types. */
495  app_qspi_dma_state_t qspi_dma_state; /**< App qspi dma_state types. */
496  volatile bool start_flag; /**< start flag. */
497  app_qspi_evt_handler_t evt_handler; /**< QSPI event callback. */
498 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
499  app_qspi_mmap_device_t mounted_mmap_device; /**< QSPI memory-mapped configuration Structures. */
500 
501  volatile uint8_t mmap_endian_mode; /**< mmap endian mode. */
502  volatile bool is_mmap_inited; /**< mmap inited. */
503  volatile bool is_mmap_prefetch_en; /**< mmap prefetch. */
504 #endif
505 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
506  volatile bool is_used_dma; /**< used dma. */
507  volatile bool is_dma_mode_m2m; /**< dma mode. */
508 #endif
509  volatile bool is_rx_done; /**< rx done. */
510  volatile bool is_tx_done; /**< tx done. */
511  volatile bool is_xfer_err; /**< xfer err. */
512 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
513  volatile bool is_dma_done; /**< dma done. */
514  volatile bool is_async_write_screen; /**< async write screen. */
515 #endif
516 }qspi_env_t;
517 
518 /**
519  * @brief QSPI parameters structure definition
520  */
521 typedef struct
522 {
523  app_qspi_id_t id; /**< specified QSPI module ID. */
524  app_qspi_pin_cfg_t pin_cfg; /**< the pin configuration information for the specified QSPI module. */
525  app_qspi_dma_cfg_t dma_cfg; /**< QSPI DMA configuration. */
526  qspi_init_t init; /**< QSPI communication parameters. */
527  qspi_env_t qspi_env; /**< QSPI device structure definition. */
529 /** @} */
530 
531 
532 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
533 /** @addtogroup HAL_APP_QSPI_DRIVER_CONSTANTS Constants
534  * @{
535  */
536 
537 /**
538  * @brief The Reference to pin groups define
539  */
540 extern const app_qspi_pin_cfg_t g_qspi_pin_groups[QSPIx_PIN_GROUP_MAX];
541 
542 /** @} */
543 #endif
544 
545 
546 /* Exported functions --------------------------------------------------------*/
547 /** @addtogroup HAL_APP_QSPI_DRIVER_FUNCTIONS Functions
548  * @{
549  */
550 /**
551  ****************************************************************************************
552  * @brief Initialize the APP QSPI DRIVER according to the specified parameters
553  * in the app_qspi_params_t and app_qspi_evt_handler_t.
554  * @note If interrupt mode is set, you can use blocking mode. Conversely, if blocking mode
555  * is set, you can't use interrupt mode.
556  *
557  * @param[in] p_params: Pointer to app_qspi_params_t parameter which contains the
558  * configuration information for the specified QSPI module.
559  * @param[in] evt_handler: QSPI user callback function.
560  *
561  * @return Result of initialization.
562  ****************************************************************************************
563  */
564 uint16_t app_qspi_init(app_qspi_params_t *p_params, app_qspi_evt_handler_t evt_handler);
565 
566 /**
567  ****************************************************************************************
568  * @brief De-initialize the APP QSPI DRIVER peripheral.
569  *
570  * @param[in] id: De-initialize for a specific ID.
571  *
572  * @return Result of De-initialization.
573  ****************************************************************************************
574  */
576 
577 /**
578  ****************************************************************************************
579  * @brief Abort qspi communication with Interrupt.
580  *
581  * @param[in] id: QSPI module ID.
582  *
583  * @return Result of operation.
584  ****************************************************************************************
585  */
587 
588 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
589 /**
590  ****************************************************************************************
591  * @brief Config the memory mapped mode (also called XIP mode) and Active the mode
592  *
593  * @param[in] id : QSPI module ID.
594  * @param[in] dev: device config for mmapped mode
595  *
596  * @return true/false
597  ****************************************************************************************
598  */
599 bool app_qspi_config_memory_mappped(app_qspi_id_t id, app_qspi_mmap_device_t dev);
600 
601 /**
602  ****************************************************************************************
603  * @brief Active or Deactive memory mapped mode (also called XIP mode)
604  *
605  * @param[in] id : QSPI module ID.
606  * @param[in] is_active: true - Active the mode; false - Deactive the mode
607  *
608  * @return true/false
609  ****************************************************************************************
610  */
611 bool app_qspi_active_memory_mappped(app_qspi_id_t id, bool is_active);
612 #endif
613 
614 /**
615  ****************************************************************************************
616  * @brief Receive an amount of data with the specified instruction, address and dummy cycles in blocking mode.
617  * @note This function is used only in Indirect Read Mode.
618  * @param[in] id: which QSPI module want to receive.
619  * @param[in] p_cmd: Pointer to a app_qspi_command_t structure that contains the instruction and address for data transfer.
620  * @param[out] p_data: Pointer to data buffer
621  * @param[in] timeout: Timeout duration
622  *
623  * @return Result of operation.
624  ****************************************************************************************
625  */
626 uint16_t app_qspi_command_receive_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout);
627 
628 /**
629  ****************************************************************************************
630  * @brief Receive an amount of data with the specified instruction, address and dummy cycles in non-blocking mode with Interrupt.
631  * @note This function is used only in Indirect Read Mode.
632  * @param[in] id: which QSPI module want to receive.
633  * @param[in] p_cmd: Pointer to a app_qspi_command_t structure that contains the instruction and address for data transfer.
634  * @param[out] p_data: Pointer to data buffer
635  *
636  * @return Result of operation.
637  ****************************************************************************************
638  */
640 
641 /**
642  ****************************************************************************************
643  * @brief Receive an amount of data with the specified instruction, address and dummy cycles in blocking mode.
644  * @note This function is used only in Indirect Read Mode.
645  * @param[in] id: which QSPI module want to transmit.
646  * @param[in] p_cmd: Pointer to a app_qspi_command_t structure that contains the instruction and address for data transfer.
647  * @param[out] p_data: Pointer to data buffer
648  * @param[in] timeout: Timeout duration
649  *
650  * @return Result of operation.
651  ****************************************************************************************
652  */
653 uint16_t app_qspi_command_transmit_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout);
654 
655 /**
656  ****************************************************************************************
657  * @brief Receive an amount of data with the specified instruction, address and dummy cycles in non-blocking mode with Interrupt.
658  * @note This function is used only in Indirect Read Mode.
659  * @param[in] id: which QSPI module want to transmit.
660  * @param[in] p_cmd: Pointer to a app_qspi_command_t structure that contains the instruction and address for data transfer.
661  * @param[out] p_data: Pointer to data buffer
662  *
663  * @return Result of operation.
664  ****************************************************************************************
665  */
667 
668 /**
669  ****************************************************************************************
670  * @brief Transmit only instruction in blocking mode.
671  * @note This function is used only in Indirect Write Mode.
672  * @param[in] id: which QSPI module want to transmit command.
673  * @param[in] p_cmd: Pointer to a app_qspi_command_t structure that contains the instruction and address for data transfer.
674  * @param[in] timeout: Timeout duration
675  *
676  * @return Result of operation.
677  ****************************************************************************************
678  */
679 uint16_t app_qspi_command_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint32_t timeout);
680 
681 /**
682  ****************************************************************************************
683  * @brief Transmit instruction in non-blocking mode with Interrupt.
684  * @note This function is used only in Indirect Write Mode.
685  * @param[in] id: which QSPI module want to transmit command.
686  * @param[in] p_cmd: Pointer to a app_qspi_command_t structure that contains the instruction and address for data transfer.
687  *
688  * @return Result of operation.
689  ****************************************************************************************
690  */
692 
693 /**
694  ****************************************************************************************
695  * @brief Transmit data without command, support std/dual/quad mode
696  *
697  * @param[in] id : QSPI module ID.
698  * @param[in] qspi_mode : @ref QSPI_DATA_MODE_SPI
699  * @ref QSPI_DATA_MODE_DUALSPI
700  * @ref QSPI_DATA_MODE_QUADSPI
701  * @param[in] data_width :@ref QSPI_DATASIZE_08_BITS
702  * @ref QSPI_DATASIZE_16_BITS
703  * @ref QSPI_DATASIZE_32_BITS
704  * @param[in] p_data : data Pointer to transmit
705  * @param[in] length : byte length of data
706  * @param[in] timeout: Timeout duration
707  *
708  * @return true/false
709  ****************************************************************************************
710  */
711 uint16_t app_qspi_transmit_sync_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length, uint32_t timeout);
712 
713 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
714 /**
715  ****************************************************************************************
716  * @brief Transmit an amount of data in blocking mode with standard SPI.
717  * @note This function is used only in Indirect Write Mode.
718  * @param[in] id: which QSPI module want to transmit.
719  * @param[in] p_data: Pointer to data buffer
720  * @param[in] length: Amount of data to be sent in bytes
721  * @param[in] timeout: Timeout duration
722  *
723  * @return Result of operation.
724  ****************************************************************************************
725  */
726 uint16_t app_qspi_transmit_sync(app_qspi_id_t id, uint8_t *p_data, uint32_t length, uint32_t timeout);
727 #endif
728 
729 /**
730  ****************************************************************************************
731  * @brief Transmit data without command, support std/dual/quad mode
732  *
733  * @param[in] id : QSPI module ID.
734  * @param[in] qspi_mode : @ref QSPI_DATA_MODE_SPI
735  * @ref QSPI_DATA_MODE_DUALSPI
736  * @ref QSPI_DATA_MODE_QUADSPI
737  * @param[in] data_width :@ref QSPI_DATASIZE_08_BITS
738  * @ref QSPI_DATASIZE_16_BITS
739  * @ref QSPI_DATASIZE_32_BITS
740  * @param[in] p_data : data Pointer to transmit
741  * @param[in] length : byte length of data
742  *
743  * @return true/false
744  ****************************************************************************************
745  */
746 uint16_t app_qspi_transmit_async_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length);
747 
748 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
749 /**
750  ****************************************************************************************
751  * @brief Transmit an amount of data in non-blocking mode at standard SPI with Interrupt.
752  * @note This function is used only in Indirect Write Mode.
753  * @param[in] id: which QSPI module want to transmit.
754  * @param[in] p_data: Pointer to data buffer
755  * @param[in] length: Amount of data to be sent in bytes
756  *
757  * @return Result of operation.
758  ****************************************************************************************
759  */
760 uint16_t app_qspi_transmit_async(app_qspi_id_t id, uint8_t *p_data, uint32_t length);
761 #endif
762 
763 /**
764  ****************************************************************************************
765  * @brief Receive data without command, support std/dual/quad mode
766  *
767  * @param[in] id : QSPI module ID.
768  * @param[in] qspi_mode : @ref QSPI_DATA_MODE_SPI
769  * @ref QSPI_DATA_MODE_DUALSPI
770  * @ref QSPI_DATA_MODE_QUADSPI
771  * @param[in] data_width :@ref QSPI_DATASIZE_08_BITS
772  * @ref QSPI_DATASIZE_16_BITS
773  * @ref QSPI_DATASIZE_32_BITS
774  * @param[in] p_data : data Pointer to transmit
775  * @param[in] length : byte length of data
776  * @param[in] timeout: Timeout duration
777  *
778  * @return true/false
779  ****************************************************************************************
780  */
781 uint16_t app_qspi_receive_sync_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length, uint32_t timeout);
782 
783 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
784 /**
785  ****************************************************************************************
786  * @brief Receive an amount of data in blocking mode with standard SPI.
787  * @note This function is used only in Indirect Read Mode.
788  * @param[in] id: which QSPI module want to receive.
789  * @param[out] p_data: Pointer to data buffer
790  * @param[in] length: Amount of data to be received in bytes
791  * @param[in] timeout: Timeout duration
792  *
793  * @return Result of operation.
794  ****************************************************************************************
795  */
796 uint16_t app_qspi_receive_sync(app_qspi_id_t id, uint8_t *p_data, uint32_t length, uint32_t timeout);
797 #endif
798 
799 /**
800  ****************************************************************************************
801  * @brief Receive data without command, support std/dual/quad mode
802  *
803  * @param[in] id : QSPI module ID.
804  * @param[in] qspi_mode : @ref QSPI_DATA_MODE_SPI
805  * @ref QSPI_DATA_MODE_DUALSPI
806  * @ref QSPI_DATA_MODE_QUADSPI
807  * @param[in] data_width :@ref QSPI_DATASIZE_08_BITS
808  * @ref QSPI_DATASIZE_16_BITS
809  * @ref QSPI_DATASIZE_32_BITS
810  * @param[in] p_data : data Pointer to transmit
811  * @param[in] length : byte length of data
812  *
813  * @return true/false
814  ****************************************************************************************
815  */
816 uint16_t app_qspi_receive_async_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length);
817 
818 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
819 /**
820  ****************************************************************************************
821  * @brief Receive an amount of data in non-blocking mode at standard SPI with Interrupt.
822  * @note This function is used only in Indirect Read Mode.
823  * @param[in] id: which QSPI module want to receive.
824  * @param[out] p_data: Pointer to data buffer
825  * @param[in] length: Amount of data to be received in bytes
826  *
827  * @return Result of operation.
828  ****************************************************************************************
829  */
830 uint16_t app_qspi_receive_async(app_qspi_id_t id, uint8_t *p_data, uint32_t length);
831 #endif
832 
833 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5526X) || (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR5525X)
834 /**
835  ****************************************************************************************
836  * @brief Set Data Endian Mode to Read in Memory mapped Mode(XIP Mode)
837  *
838  * @param[in] id : QSPI module ID.
839  * @param[in] mode : endian mode
840  * @return true/false
841  ****************************************************************************************
842  */
843 bool app_qspi_mmap_set_endian_mode(app_qspi_id_t id, app_qspi_mmap_endian_mode_e mode);
844 
845 /**
846  ****************************************************************************************
847  * @brief Read U8 Data in Memory mapped Mode(XIP Mode), can be used in flash/psram device
848  *
849  * @param[in] id : QSPI module ID.
850  * @param[in] address : the address of device connected to QSPI, start from 0x000000
851  * @return the read data
852  ****************************************************************************************
853  */
854 uint8_t app_qspi_mmap_read_u8(app_qspi_id_t id, uint32_t address) ;
855 
856 /**
857  ****************************************************************************************
858  * @brief Read U16 Data in Memory mapped Mode(XIP Mode), The Data is ordered by the order in flash/psram device
859  *
860  * @param[in] id : QSPI module ID.
861  * @param[in] address : the address of device connected to QSPI, start from 0x000000
862  * @return the read data
863  ****************************************************************************************
864  */
865 uint16_t app_qspi_mmap_read_u16(app_qspi_id_t id, uint32_t address);
866 
867 /**
868  ****************************************************************************************
869  * @brief Read U32 Data in Memory mapped Mode(XIP Mode), The Data is ordered by the order in flash/psram device
870  *
871  * @param[in] id : QSPI module ID.
872  * @param[in] address : the address of device connected to QSPI, start from 0x000000
873  * @return the read data
874  ****************************************************************************************
875  */
876 uint32_t app_qspi_mmap_read_u32(app_qspi_id_t id, uint32_t address);
877 
878 /**
879  ****************************************************************************************
880  * @brief Read data block in Memory mapped Mode(XIP Mode), The Data is ordered by the order in flash/psram device
881  *
882  * @param[in] id : QSPI module ID.
883  * @param[in] address : the address of device connected to QSPI, start from 0x000000
884  * @param[in] buffer : memory pointer to save the read data
885  * @param[in] length : the read length in byte
886  * @return true/false
887  ****************************************************************************************
888  */
889 bool app_qspi_mmap_read_block(app_qspi_id_t id, uint32_t address, uint8_t * buffer, uint32_t length);
890 
891 /**
892  ****************************************************************************************
893  * @brief Return the XIP Base Address of QSPI Instance.
894  *
895  * @param[in] id: QSPI module ID.
896  *
897  * @return The XIP base address.
898  ****************************************************************************************
899  */
900 uint32_t app_qspi_get_xip_base_address(app_qspi_id_t id);
901 
902 #endif
903 
904 #if (APP_DRIVER_CHIP_TYPE == APP_DRIVER_GR551X)
905 /**
906  ****************************************************************************************
907  * @brief Transmit an amount of data in QPI mode (Async Mode).
908  * @param[in] id: Which QSPI module want to Transmit.
909  * @param[in] data_width: Just support @ref QSPI_DATASIZE_08_BITS @ref QSPI_DATASIZE_16_BITS @ref QSPI_DATASIZE_32_BITS
910  * @param[in] p_data: Pointer to data buffer
911  * @param[in] length: Amount of data to be transmitted in bytes
912  *
913  * @return Result of operation.
914  ****************************************************************************************
915  */
916 uint16_t app_qspi_transmit_in_qpi_async(app_qspi_id_t id, uint32_t data_width, uint8_t *p_data, uint32_t length);
917 #endif
918 
919 /**
920  ****************************************************************************************
921  * @brief Return the QSPI handle.
922  *
923  * @param[in] id: QSPI module ID.
924  *
925  * @return Pointer to the specified ID's QSPI handle.
926  ****************************************************************************************
927  */
929 
930 /** @} */
931 
932 #endif
933 
934 #ifdef __cplusplus
935 }
936 #endif
937 
938 #endif
939 
940 /** @} */
941 
942 /** @} */
943 
944 /** @} */
app_qspi_command_receive_sync
uint16_t app_qspi_command_receive_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout)
Receive an amount of data with the specified instruction, address and dummy cycles in blocking mode.
app_qspi_command_t
qspi_command_t app_qspi_command_t
QSPI command structure definition.
Definition: app_qspi.h:289
app_qspi_evt_t::size
uint16_t size
Definition: app_qspi.h:343
app_qspi_get_handle
qspi_handle_t * app_qspi_get_handle(app_qspi_id_t id)
Return the QSPI handle.
app_qspi_pin_t::pull
app_io_pull_t pull
Definition: app_qspi.h:251
qspi_env_t::handle
qspi_handle_t handle
Definition: app_qspi.h:488
app_qspi_params_t::id
app_qspi_id_t id
Definition: app_qspi.h:523
APP_QSPI_ID_1
@ APP_QSPI_ID_1
Definition: app_qspi.h:118
qspi_env_t::qspi_dma_state
app_qspi_dma_state_t qspi_dma_state
Definition: app_qspi.h:495
app_qspi_transmit_sync_ex
uint16_t app_qspi_transmit_sync_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length, uint32_t timeout)
Transmit data without command, support std/dual/quad mode.
app_qspi_transmit_async
uint16_t app_qspi_transmit_async(app_qspi_id_t id, uint8_t *p_data, uint32_t length)
Transmit an amount of data in non-blocking mode at standard SPI with Interrupt.
qspi_env_t
QSPI device structure definition.
Definition: app_qspi.h:487
app_qspi_pin_cfg_t::io_3
app_qspi_pin_t io_3
Definition: app_qspi.h:265
app_qspi_pin_t
QSPI IO configuration Structures.
Definition: app_qspi.h:245
app_qspi_command_transmit_async
uint16_t app_qspi_command_transmit_async(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data)
Receive an amount of data with the specified instruction, address and dummy cycles in non-blocking mo...
app_qspi_state_t
app_qspi_state_t
App qspi state types.
Definition: app_qspi.h:463
APP_QSPI_ID_0
@ APP_QSPI_ID_0
Definition: app_qspi.h:117
app_qspi_params_t::qspi_env
qspi_env_t qspi_env
Definition: app_qspi.h:527
app_qspi_evt_t
QSPI event structure definition.
Definition: app_qspi.h:338
app_io_pull_t
app_io_pull_t
GPIO pull Enumerations definition.
Definition: app_io.h:183
app_io_type_t
app_io_type_t
GPIO type Enumerations definition.
Definition: app_io.h:147
app_qspi_deinit
uint16_t app_qspi_deinit(app_qspi_id_t id)
De-initialize the APP QSPI DRIVER peripheral.
_qspi_init_t
QSPI init Structure definition.
Definition: gr55xx_hal_qspi.h:137
APP_QSPI_EVT_ERROR
@ APP_QSPI_EVT_ERROR
Definition: app_qspi.h:132
app_qspi_receive_sync_ex
uint16_t app_qspi_receive_sync_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length, uint32_t timeout)
Receive data without command, support std/dual/quad mode.
qspi_env_t::is_tx_done
volatile bool is_tx_done
Definition: app_qspi.h:510
app_qspi_pin_cfg_t::cs
app_qspi_pin_t cs
Definition: app_qspi.h:260
app_qspi_evt_t::error_code
uint32_t error_code
Definition: app_qspi.h:342
_qspi_command_t
QSPI command Structure definition.
Definition: gr55xx_hal_qspi.h:200
app_qspi_pin_t::mux
app_io_mux_t mux
Definition: app_qspi.h:247
app_io_mode_t
app_io_mode_t
GPIO mode Enumerations definition.
Definition: app_io.h:163
APP_QSPI_EVT_RX_DATA
@ APP_QSPI_EVT_RX_DATA
Definition: app_qspi.h:134
qspi_env_t::is_rx_done
volatile bool is_rx_done
Definition: app_qspi.h:509
app_qspi_id_t
app_qspi_id_t
QSPI module Enumerations definition.
Definition: app_qspi.h:116
app_qspi_dma_cfg_t
QSPI DMA configuration structure definition.
Definition: app_qspi.h:272
app_io.h
Header file containing functions prototypes of GPIO app library.
app_qspi_abort
uint16_t app_qspi_abort(app_qspi_id_t id)
Abort qspi communication with Interrupt.
app_qspi_pin_cfg_t
QSPI configuration Structures.
Definition: app_qspi.h:259
app_qspi_evt_handler_t
void(* app_qspi_evt_handler_t)(app_qspi_evt_t *p_evt)
QSPI event callback definition.
Definition: app_qspi.h:455
app_qspi_command_receive_async
uint16_t app_qspi_command_receive_async(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data)
Receive an amount of data with the specified instruction, address and dummy cycles in non-blocking mo...
app_qspi_command_sync
uint16_t app_qspi_command_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint32_t timeout)
Transmit only instruction in blocking mode.
app_qspi_pin_t::pin
uint32_t pin
Definition: app_qspi.h:248
APP_QSPI_DMA_INVALID
@ APP_QSPI_DMA_INVALID
Definition: app_qspi.h:474
app_qspi_dma_state_t
app_qspi_dma_state_t
App qspi dma_state types.
Definition: app_qspi.h:473
qspi_env_t::dma_id
dma_id_t dma_id
Definition: app_qspi.h:493
APP_QSPI_EVT_ABORT
@ APP_QSPI_EVT_ABORT
Definition: app_qspi.h:135
app_qspi_receive_async_ex
uint16_t app_qspi_receive_async_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length)
Receive data without command, support std/dual/quad mode.
app_qspi_transmit_async_ex
uint16_t app_qspi_transmit_async_ex(app_qspi_id_t id, uint32_t qspi_mode, uint32_t data_width, uint8_t *p_data, uint32_t length)
Transmit data without command, support std/dual/quad mode.
app_qspi_user_config.h
app_qspi_pin_t::enable
uint8_t enable
Definition: app_qspi.h:252
app_qspi_receive_sync
uint16_t app_qspi_receive_sync(app_qspi_id_t id, uint8_t *p_data, uint32_t length, uint32_t timeout)
Receive an amount of data in blocking mode with standard SPI.
APP_QSPI_ACTIVITY
@ APP_QSPI_ACTIVITY
Definition: app_qspi.h:465
app_qspi_pin_cfg_t::io_1
app_qspi_pin_t io_1
Definition: app_qspi.h:263
APP_QSPI_EVT_TX_CPLT
@ APP_QSPI_EVT_TX_CPLT
Definition: app_qspi.h:133
app_qspi_params_t::init
qspi_init_t init
Definition: app_qspi.h:526
APP_STORAGE_RAM_ID
@ APP_STORAGE_RAM_ID
Definition: app_qspi.h:124
qspi_env_t::p_pin_cfg
app_qspi_pin_cfg_t * p_pin_cfg
Definition: app_qspi.h:492
app_qspi_params_t::pin_cfg
app_qspi_pin_cfg_t pin_cfg
Definition: app_qspi.h:524
qspi_env_t::qspi_state
app_qspi_state_t qspi_state
Definition: app_qspi.h:494
app_dma.h
Header file containing functions prototypes of DMA app library.
gr55xx_hal.h
This file contains all the functions prototypes for the HAL module driver.
app_qspi_command_async
uint16_t app_qspi_command_async(app_qspi_id_t id, app_qspi_command_t *p_cmd)
Transmit instruction in non-blocking mode with Interrupt.
app_qspi_receive_async
uint16_t app_qspi_receive_async(app_qspi_id_t id, uint8_t *p_data, uint32_t length)
Receive an amount of data in non-blocking mode at standard SPI with Interrupt.
app_qspi_transmit_in_qpi_async
uint16_t app_qspi_transmit_in_qpi_async(app_qspi_id_t id, uint32_t data_width, uint8_t *p_data, uint32_t length)
Transmit an amount of data in QPI mode (Async Mode).
app_qspi_pin_cfg_t::clk
app_qspi_pin_t clk
Definition: app_qspi.h:261
APP_QSPI_ID_MAX
@ APP_QSPI_ID_MAX
Definition: app_qspi.h:122
app_qspi_evt_type_t
app_qspi_evt_type_t
APP QSPI Event Type.
Definition: app_qspi.h:131
app_qspi_params_t::dma_cfg
app_qspi_dma_cfg_t dma_cfg
Definition: app_qspi.h:525
app_qspi_dma_cfg_t::dma_instance
dma_regs_t * dma_instance
Definition: app_qspi.h:273
app_io_mux_t
app_io_mux_t
GPIO mux Enumerations definition.
Definition: app_io.h:255
qspi_env_t::evt_handler
app_qspi_evt_handler_t evt_handler
Definition: app_qspi.h:497
APP_QSPI_DMA_ACTIVITY
@ APP_QSPI_DMA_ACTIVITY
Definition: app_qspi.h:475
app_qspi_evt_t::type
app_qspi_evt_type_t type
Definition: app_qspi.h:339
app_qspi_pin_t::mode
app_io_mode_t mode
Definition: app_qspi.h:250
app_qspi_transmit_sync
uint16_t app_qspi_transmit_sync(app_qspi_id_t id, uint8_t *p_data, uint32_t length, uint32_t timeout)
Transmit an amount of data in blocking mode with standard SPI.
app_qspi_pin_cfg_t::io_2
app_qspi_pin_t io_2
Definition: app_qspi.h:264
app_drv_error.h
Header file of app driver error code.
app_drv_config.h
Header file of app driver config code.
app_qspi_pin_t::type
app_io_type_t type
Definition: app_qspi.h:246
app_qspi_init
uint16_t app_qspi_init(app_qspi_params_t *p_params, app_qspi_evt_handler_t evt_handler)
Initialize the APP QSPI DRIVER according to the specified parameters in the app_qspi_params_t and app...
_qspi_handle
QSPI handle Structure definition.
Definition: gr55xx_hal_qspi.h:157
qspi_env_t::is_xfer_err
volatile bool is_xfer_err
Definition: app_qspi.h:511
app_qspi_command_transmit_sync
uint16_t app_qspi_command_transmit_sync(app_qspi_id_t id, app_qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout)
Receive an amount of data with the specified instruction, address and dummy cycles in blocking mode.
app_qspi_params_t
QSPI parameters structure definition.
Definition: app_qspi.h:522
dma_id_t
int16_t dma_id_t
DMA id definition.
Definition: app_dma.h:98
app_qspi_pin_cfg_t::io_0
app_qspi_pin_t io_0
Definition: app_qspi.h:262
app_qspi_dma_cfg_t::dma_channel
dma_channel_t dma_channel
Definition: app_qspi.h:274
qspi_env_t::start_flag
volatile bool start_flag
Definition: app_qspi.h:496
dma_channel_t
dma_channel_t
HAL DMA Channel Enumerations definition.
Definition: gr55xx_hal_dma.h:94
APP_QSPI_INVALID
@ APP_QSPI_INVALID
Definition: app_qspi.h:464