app_graphics_dc.h
Go to the documentation of this file.
1 /**
2  ****************************************************************************************
3  *
4  * @file app_graphics_dc.h
5  * @author BLE Driver Team
6  * @brief Header file containing functions prototypes of DC app library.
7  *
8  ****************************************************************************************
9  * @attention
10  #####Copyright (c) 2021 GOODIX
11  All rights reserved.
12 
13  Redistribution and use in source and binary forms, with or without
14  modification, are permitted provided that the following conditions are met:
15  * Redistributions of source code must retain the above copyright
16  notice, this list of conditions and the following disclaimer.
17  * Redistributions in binary form must reproduce the above copyright
18  notice, this list of conditions and the following disclaimer in the
19  documentation and/or other materials provided with the distribution.
20  * Neither the name of GOODIX nor the names of its contributors may be used
21  to endorse or promote products derived from this software without
22  specific prior written permission.
23 
24  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34  POSSIBILITY OF SUCH DAMAGE.
35  ****************************************************************************************
36  */
37 
38 
39 /** @addtogroup PERIPHERAL Peripheral Driver
40  * @{
41  */
42 
43 /** @addtogroup APP_DRIVER APP DRIVER
44  * @{
45  */
46 
47 /** @defgroup APP_GRAPHICS_DC DC
48  * @brief GRAPHICS_DC APP module driver.
49  * @{
50  */
51 
52 #ifndef __APP_GRAPHICS_GRAPHICS_DC_H__
53 #define __APP_GRAPHICS_GRAPHICS_DC_H__
54 
55 #include "gr55xx.h"
56 #include "app_io.h"
57 #include "hal_gdc.h"
58 #include "hal_gdc_regs.h"
59 #include "hal_gdc_mipi.h"
60 
61 /** @addtogroup APP_GRAPHICS_DC_ENUM Enumerations
62  * @{
63  */
64 
65 /**
66  * @brief Define SPI work Mode for DC
67  */
68 typedef enum {
69  GDC_MODE_SPI = 0, /**< By 1-wire SPI */
70  GDC_MODE_DSPI, /**< 1bit cmd + 8bit data, and DCX signal */
71  GDC_MODE_QSPI, /**< By Quad SPI */
73 
74 
75 /**
76  * @brief Define Clock Frequency for DC
77  */
78 typedef enum {
79  GDC_CLOCK_FREQ_48MHz = 0x00, /**< DC clock, 48MHz */
80  GDC_CLOCK_FREQ_24MHz = 0x03, /**< DC clock, 24MHz */
81  GDC_CLOCK_FREQ_12MHz = 0x05, /**< DC clock, 12MHz */
82  GDC_CLOCK_FREQ_6MHz = 0x09, /**< DC clock, 6MHz */
83  GDC_CLOCK_FREQ_3MHz = 0x11, /**< DC clock, 3MHz */
85 
86 
87 /**
88  * @brief Define Clock Mode for DC
89  */
90 typedef enum {
91  GDC_CLOCK_MODE_0 = 0x00, /**< DC clock mode 0 */
92  GDC_CLOCK_MODE_1 = 0x01, /**< DC clock mode 1 */
93  GDC_CLOCK_MODE_2 = 0x02, /**< DC clock mode 2 */
94  GDC_CLOCK_MODE_3 = 0x03, /**< DC clock mode 3 */
96 
97 
98 /**
99  * @brief Define Delay Clock for DC Tcsu
100  */
101 typedef enum {
102  GDC_TCSU_CYCLE_0 = 0x00, /**< delay 0 clock cycle */
103  GDC_TCSU_CYCLE_1 = 0x01, /**< delay 1 clock cycle */
104  GDC_TCSU_CYCLE_2 = 0x02, /**< delay 2 clock cycle */
105  GDC_TCSU_CYCLE_3 = 0x03, /**< delay 3 clock cycle */
106  GDC_TCSU_CYCLE_4 = 0x04, /**< delay 4 clock cycle */
108 
109 /**
110  * @brief Display Controller Power Mode Enumerations definition
111  */
112 typedef enum {
113  GDC_POWER_STATE_SLEEP = 0, /* sleep state */
114  GDC_POWER_STATE_ACTIVE = 1, /* active state */
116 
117 /** @} */
118 
119 
120 /** @addtogroup APP_GRAPHICS_DC_STRUCTURES Structures
121  * @{
122  */
123 
124 /** @defgroup GRAPHICS_DC_Configuration GRAPHICS DC Configuration
125  * @{
126  */
127 /**
128  * @brief QSPI IO configuration Structures
129  */
130 typedef struct
131 {
132  app_io_pull_t pull; /**< Specifies the Pull-up or Pull-Down activation for the selected pins. */
133  uint8_t enable; /**< Enable or disable the pin. */
135 
136 
137 /**
138  * @brief define DC pins
139  */
140 typedef struct
141 {
142  app_graphics_dc_pin_t csn; /**< Set the configuration of QSPI CS pin. */
143  app_graphics_dc_pin_t clk; /**< Set the configuration of QSPI CLK pin. */
144  app_graphics_dc_pin_t io0; /**< Set the configuration of QSPI IO0 pin. */
145  app_graphics_dc_pin_t io1; /**< Set the configuration of QSPI IO1 pin. */
146  app_graphics_dc_pin_t io2; /**< Set the configuration of QSPI IO2 pin. */
147  app_graphics_dc_pin_t io3; /**< Set the configuration of QSPI IO3 pin. */
148  app_graphics_dc_pin_t dcx; /**< Set the configuration of QSPI IO3 pin. */
150 /** @} */
151 
152 /** @} */
153 
154 
155 /** @addtogroup APP_GRAPHICS_DC_ENUM Enumerations
156  * @{
157  */
158 /**
159  * @brief Define work layers for DC
160  */
161 typedef enum {
162  GDC_ONE_LAYER_MODE = 0x00, /**< 1 layer mode */
163  GDC_TWO_LAYER_MODE = 0x01, /**< 2 layer mode */
165 
166 
167 /**
168  * @brief Define the data format for frame buffer of DC
169  */
170 typedef enum {
171  GDC_DATA_FORMAT_RGB565 = HAL_GDC_RGB565, /**< FrameBuffer is RGA565, 16bit, no Alpha */
172  GDC_DATA_FORMAT_RGB24 = HAL_GDC_RGB24, /**< FrameBuffer is RGA24, 24bit, no Alpha */
173  GDC_DATA_FORMAT_RGBA8888 = HAL_GDC_RGBA8888, /**< FrameBuffer is RGBA8888, 32bit with Alpha */
174  GDC_DATA_FORMAT_ABGR8888 = HAL_GDC_ABGR8888, /**< FrameBuffer is ABGR8888, 32bit with Alpha */
175  GDC_DATA_FORMAT_ARGB8888 = HAL_GDC_ARGB8888, /**< FrameBuffer is ARGB8888, 32bit with Alpha */
176  GDC_DATA_FORMAT_BGRA8888 = HAL_GDC_BGRA8888, /**< FrameBuffer is BGRA8888, 32bit with Alpha */
177  GDC_DATA_FORMAT_TSC4 = HAL_GDC_TSC4, /**< FrameBuffer is RGB565 compressed by TSC4 */
178  GDC_DATA_FORMAT_TSC6 = HAL_GDC_TSC6, /**< FrameBuffer is *888 compressed by TSC6 */
179  GDC_DATA_FORMAT_TSC6A = HAL_GDC_TSC6A, /**< FrameBuffer is *8888 compressed by TSC6A */
181 
182 
183 /**
184  * @brief Define the Output MIPI Timing for DATA Phase of DC
185  * Timing of MIPICFG_2RGB888_OPT1 is True MIPICFG_2RGB888_OPT0, and
186  * Timing of MIPICFG_2RGB888_OPT0 is True MIPICFG_2RGB888_OPT1, They need to exchange !!!
187  */
188 typedef enum {
189  GDC_MIPICFG_SPI_RGB565_OPT0 = MIPICFG_1RGB565_OPT0, /**< Sent in SPI Mode, Output format is RGB565 with option.0 */
190  GDC_MIPICFG_SPI_RGB888_OPT0 = MIPICFG_1RGB888_OPT0, /**< Sent in SPI Mode, Output format is RGB565 with option.0 */
191  GDC_MIPICFG_DSPI_RGB565_OPT0 = MIPICFG_2RGB565_OPT0, /**< Sent in DSPI Mode, Output format is RGB565 with option.0 */
192  GDC_MIPICFG_DSPI_RGB888_OPT0 = MIPICFG_2RGB888_OPT1, /**< Sent in DSPI Mode, Output format is RGB888 with option.0 */
193  GDC_MIPICFG_DSPI_RGB888_OPT1 = MIPICFG_2RGB888_OPT0, /**< Sent in DSPI Mode, Output format is RGB888 with option.1 */
194  GDC_MIPICFG_QSPI_RGB565_OPT0 = MIPICFG_4RGB565_OPT0, /**< Sent in QSPI Mode, Output format is RGB565 with option.0 */
195  GDC_MIPICFG_QSPI_RGB888_OPT0 = MIPICFG_4RGB888_OPT0, /**< Sent in QSPI Mode, Output format is RGB888 with option.0 */
197 
198 
199 /**
200  * @brief Define the Output pixel bits for DC
201  */
202 typedef enum {
203  GDC_OUT_PIXEL_BITS_16 = 16, /**< Output pixel 16 bits */
204  GDC_OUT_PIXEL_BITS_24 = 24, /**< Output pixel 24 bits */
205  GDC_OUT_PIXEL_BITS_NOT_SUPPORT = 0xFF, /**< Not support */
207 
208 /**
209  * @brief Define the Output Frame Timing for DC
210  */
211 typedef enum {
212  GDC_SPI_FRAME_TIMING_0 = 0x00, /**< 8Bit CMD::24Bit ADDR::Ndata, All Sent in SPI */
213  GDC_DSPI_FRAME_TIMING_0, /**< 8Bit CMD Sent in SPI::NO ADDR::Ndata Sent in DSPI, with DCX */
214  GDC_QSPI_FRAME_TIMING_0, /**< 8Bit CMD::24Bit ADDR Sent in SPI, All Data Sent in QSPI */
215  GDC_QSPI_FRAME_TIMING_1, /**< 8Bit CMD Sent in SPI, 24Bit ADDR and All data Sent in QSPI */
217 
218 
219 /**
220  * @brief Define the bits of address phase for DC Frame
221  */
222 typedef enum {
223  GDC_FRAME_ADDRESS_WIDTH_NONE = 0xFF, /**< Not support */
224  GDC_FRAME_ADDRESS_WIDTH_08BIT = MIPI_CMD08, /**< Frame address width 8bits */
225  GDC_FRAME_ADDRESS_WIDTH_16BIT = MIPI_CMD16, /**< Frame address width 16bits */
226  GDC_FRAME_ADDRESS_WIDTH_24BIT = MIPI_CMD24, /**< Frame address width 24bits */
228 
229 /**
230  * @brief Define access type for DC
231  */
232 typedef enum {
233  GDC_ACCESS_TYPE_SYNC = 0, /**< SYNC access type */
234  GDC_ACCESS_TYPE_ASYNC, /**< ASYNC access type */
236 
237 
238 /**
239  * @brief Define frame output result for DC
240  */
241 typedef enum {
242  GDC_FRAME_RES_SUCCESS = 0x00, /**< frame sent success */
243  GDC_FRAME_RES_ASYNC_WAIT, /**< frame sent, but need to get the result in async callback */
244  GDC_FRAME_RES_FAIL, /**< frame sent fail */
245  GDC_FRAME_RES_UNSUPPORT, /**< frame format/command not support,please check config params */
247 
248 /** @} */
249 
250 /** @addtogroup APP_GRAPHICS_DC_STRUCTURES Structures
251  * @{
252  */
253 
254 /**
255  * @brief Define init params for DC
256  */
257 typedef struct {
258  graphics_dc_mspi_e mspi_mode; /**< Specify spi mode, Ref Optional values of graphics_dc_mspi_e */
259  graphics_dc_clock_freq_e clock_freq; /**< Specify dc clock freq, Ref Optional values of graphics_dc_clock_freq_e */
260  graphics_dc_clock_mode_e clock_mode; /**< Specify dc clock mode, Ref Optional values of graphics_dc_clock_mode_e */
261  graphics_dc_tcsu_cycle_e tcsu_cycle; /**< Specify cs setup delay, Ref Optional values of graphics_dc_tcsu_cycle_e */
262  graphics_dc_layer_mode_e layer_mode; /**< Specify which layer to flush, Ref Optional values of graphics_dc_layer_mode_e */
263  graphics_dc_mipi_format_e mipicfg_format; /**< Specify mipi timing format, Ref Optional values of graphics_dc_mipi_format_e */
264  uint16_t resolution_x; /**< Specify the x resolution in pixels */
265  uint16_t resolution_y; /**< Specify the y resolution in pixels */
266  app_graphics_dc_pins_t pins_cfg; /**< Specify pins state */
268 
269 /**
270  * @brief Define DC Frame Layer configuration
271  */
272 typedef struct {
273  void * frame_baseaddr ; /**< Frame Address */
274  uint32_t resolution_x; /**< Resolution X */
275  uint32_t resolution_y; /**< Resolution Y */
276  int32_t row_stride; /**< Stride */
277  int32_t start_x; /**< Start Rendering X Coordinator */
278  int32_t start_y; /**< Start Rendering Y Coordinator */
279  uint32_t size_x; /**< Rendering Size X */
280  uint32_t size_y; /**< Rendering Size Y */
281  uint8_t alpha; /**< Alpha */
282  uint8_t blendmode; /**< Blending Mode */
285 
286 
287 /**
288  * @brief Define Control Command for DC Frame
289  */
290 typedef struct {
291  uint8_t command; /**< Command phase for display timing */
292  uint32_t address; /**< Address phase for display timing,if no address phase, ignore this */
293  app_graphics_dc_frame_address_width_e address_width; /**< Optional values: @ref GDC_FRAME_ADDRESS_WIDTH_NONE
294  @ref GDC_FRAME_ADDRESS_WIDTH_08BIT
295  @ref GDC_FRAME_ADDRESS_WIDTH_16BIT
296  @ref GDC_FRAME_ADDRESS_WIDTH_24BIT */
297  app_graphics_dc_frame_timing_e frame_timing; /**< Specify the supported frame timing */
299 
300 /** @} */
301 
302 
303 /**
304  * @defgroup APP_GRAPHICS_DC_MACRO Defines
305  * @{
306  */
307 
308 /* Exported constants --------------------------------------------------------*/
309 /** @defgroup GRAPHICS_DC_Exported_Constants DC Exported Constants
310  * @{
311  */
312 
313 /** @defgroup GRAPHICS_DC_PIN DC Pins Define
314  * @{
315  */
316 #define GRAPHICS_DC_CSN_PORT APP_IO_TYPE_GPIOB /**< Define DC CSN PORT */
317 #define GRAPHICS_DC_CSN_PIN APP_IO_PIN_11 /**< Define DC CSN PIN */
318 #define GRAPHICS_DC_CSN_PIN_MUX APP_IO_MUX_1 /**< Define DC CSN PIN.MUX */
319 
320 #define GRAPHICS_DC_CLK_PORT APP_IO_TYPE_GPIOB /**< Define DC CLK PORT */
321 #define GRAPHICS_DC_CLK_PIN APP_IO_PIN_0 /**< Define DC CLK PIN */
322 #define GRAPHICS_DC_CLK_PIN_MUX APP_IO_MUX_1 /**< Define DC CLK PIN.MUX */
323 
324 #define GRAPHICS_DC_IO0_PORT APP_IO_TYPE_GPIOB /**< Define DC IO0 PORT */
325 #define GRAPHICS_DC_IO0_PIN APP_IO_PIN_1 /**< Define DC IO0 PIN */
326 #define GRAPHICS_DC_IO0_PIN_MUX APP_IO_MUX_1 /**< Define DC IO0 PIN.MUX */
327 
328 #define GRAPHICS_DC_IO1_PORT APP_IO_TYPE_GPIOB /**< Define DC IO1 PORT */
329 #define GRAPHICS_DC_IO1_PIN APP_IO_PIN_2 /**< Define DC IO1 PIN */
330 #define GRAPHICS_DC_IO1_PIN_MUX APP_IO_MUX_1 /**< Define DC IO1 PIN.MUX */
331 
332 #define GRAPHICS_DC_IO2_PORT APP_IO_TYPE_GPIOB /**< Define DC IO2 PORT */
333 #define GRAPHICS_DC_IO2_PIN APP_IO_PIN_3 /**< Define DC IO2 PIN */
334 #define GRAPHICS_DC_IO2_PIN_MUX APP_IO_MUX_1 /**< Define DC IO2 PIN.MUX */
335 
336 #define GRAPHICS_DC_IO3_PORT APP_IO_TYPE_GPIOB /**< Define DC IO3 PORT */
337 #define GRAPHICS_DC_IO3_PIN APP_IO_PIN_4 /**< Define DC IO3 PIN */
338 #define GRAPHICS_DC_IO3_PIN_MUX APP_IO_MUX_1 /**< Define DC IO3 PIN.MUX */
339 
340 #define GRAPHICS_DC_DCX_PORT APP_IO_TYPE_GPIOB /**< Define DC DCX PORT */
341 #define GRAPHICS_DC_DCX_PIN APP_IO_PIN_13 /**< Define DC DCX PIN */
342 #define GRAPHICS_DC_DCX_PIN_MUX APP_IO_MUX_5 /**< Define DC DCX PIN.MUX */
343 /** @} */
344 
345 /** @defgroup GRAPHICS_DC_LAYER DC Layers Define
346  * @{
347  */
348 #define GRAPHICS_DC_LAYER_0 0u /**< Define DC Layer 0 */
349 #define GRAPHICS_DC_LAYER_1 1u /**< Define DC Layer 1 */
350 /** @} */
351 
352 /** @defgroup GRAPHICS_DC_EVT IRQ callback events Define
353  * @{
354  */
355 #define GDC_IRQ_EVT_FRAME_TRANSMITION_END 0x01 /**< Define Frame Xfer End event */
356 #define GDC_IRQ_EVT_CMD_TRANSMITION_END 0x02 /**< Define CMD Xfer End event */
357 /** @} */
358 
359 /** @defgroup GRAPHICS_DC_BASEADDR DC registers memory base address Define
360  * @{
361  */
362 #define GRAPHICS_DC_BASEADDR 0xA3FF4000 /**< Define DC registers memory base address */
363 /** @} */
364 
365 /** @} */
366 
367 /** @} */
368 
369 
370 /** @addtogroup APP_GRAPHICS_DC_TYPEDEFS Type definitions
371  * @{
372  */
373 /**
374  * @brief DC IRQ callback definition
375  */
376 typedef void (* graphics_dc_irq_event_notify_cb )(uint32_t evt);
377 
378 /**
379  * @brief DC Refresh callback definition
380  */
381 typedef void (* graphics_dc_set_refresh_area_cb )(uint32_t mark, uint32_t x_start, uint32_t x_end, uint32_t y_start, uint32_t y_end);
382 
383 /** @} */
384 
385 
386 /** @addtogroup APP_GRAPHICS_DC_DRIVER_FUNCTIONS Functions
387  * @{
388  */
389 
390 /**
391  ****************************************************************************************
392  * @brief init Graphics DC dev
393  *
394  * @param[in] dc_params: pointer to dc init params
395  * @param[in] evt_cb: event callback
396  * Note: GDC_IRQ_EVT_FRAME_TRANSMITION_END & GDC_IRQ_EVT_CMD_TRANSMITION_END
397  * @retval ::APP_DRV_SUCCESS
398  * @retval ::APP_DRV_ERR_HAL
399  * @retval ::APP_DRV_ERR_POINTER_NULL
400  ****************************************************************************************
401  */
403 
404 /**
405  ****************************************************************************************
406  * @brief de-init Graphics DC dev, just called when needed to reboot/reset
407  *
408  ****************************************************************************************
409  */
411 
412 /**
413  ****************************************************************************************
414  * @brief re-init i/o for Graphics DC dev with pre-init i/o setting
415  *
416  ****************************************************************************************
417  */
419 
420 /**
421  *****************************************************************************************
422  * @brief Switch power state for DC module
423  *
424  * @param[in] state: power state to switch
425  *
426  * @return none
427  *****************************************************************************************
428  */
430 
431 /**
432  *****************************************************************************************
433  * @brief DC clock frequency set
434  *
435  * @param[in] clock_freq: DC clock frequency
436  *
437  * @return none
438  *****************************************************************************************
439  */
441 
442 /**
443  ****************************************************************************************
444  * @brief Send 1 Byte CMD,3 Byte ADDR And N Byte Data in 1-wire SPI Mode
445  * @note Timing Diagram :
446  * CSN: |_________________________________________________|
447  * CLK: __|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|___
448  * IO0: __[ -1Byte CMD- ][ -3Byte CMD- ][ -NByte Data- ]__
449  * @param[in] cmd_8bit: 8bits command
450  * @param[in] address_24bit: 24bits address
451  * @param[in] data: Pointer to data buffer
452  * @param[in] length: Data length
453  ****************************************************************************************
454  */
455 void app_graphics_dc_spi_send(uint8_t cmd_8bit, uint32_t address_24bit, uint8_t * data, uint32_t length);
456 
457 
458 /**
459  ****************************************************************************************
460  * @brief Send single cmd in 3-wire mode for DSPI (no DCX and 1 more MSB Bit for cmd indicator)
461  * @note Timing Diagram :
462  * CSN: |______________________________________|
463  * CLK: __|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|__
464  * SD0: __[0][ ---------8Bit CMD----------- ]__ (9-Bit in All)
465  * DCX: _______________________________________ (Always Low)
466  * @param[in] cmd: 8bits command
467  ****************************************************************************************
468  */
470 
471 
472 /**
473  ****************************************************************************************
474  * @brief Send single cmd &data in 3-wire mode for DSPI (no DCX and 1 more MSB Bit for cmd/data indicator)
475  * @note Timing Diagram :
476  * CSN: |_________________________________________________________________________|
477  * CLK: __|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|__
478  * SD0: __[0][ ---------8Bit CMD------------][1][ ---------8Bit DATA----------- ]__ (18-Bit in All)
479  * DCX: ___________________________________________________________________________ (Always Low)
480  * @param[in] cmd: 8bits command
481  * @param[in] data: 8bits data
482  ****************************************************************************************
483  */
484 void app_graphics_dc_dspi_send_cmd_data_in_3wire_1lane(uint8_t cmd, uint8_t data) ;
485 
486 
487 /**
488  ****************************************************************************************
489  * @brief Send cmd &data in 4-wire mode for DSPI (DCX as SD1, and 1 more MSB Bit for cmd/data indicator)
490  * @note Timing Diagram :
491  * CSN: |___________________________________________|
492  * CLK: __|-|_|-|_|...|-|_|-|_|-|_|-|_|....|-|_|-|___
493  * SD0: __[0][ ---H8Bit CMD--][1][ --H8Bit DATA-- ]__ (18Bit in All )
494  * DCX: __[0][ ---L8Bit CMD--][1][ --L8Bit DATA-- ]__ (use DCX as SD1)
495  * @param[in] cmd: 16bits command
496  * @param[in] data: 16bits data
497  ****************************************************************************************
498  */
499 void app_graphics_dc_dspi_send_cmd_data_in_4wire_2lane(uint16_t cmd, uint16_t data);
500 
501 
502 /**
503  ****************************************************************************************
504  * @brief Send cmd &data in 4-wire mode for DSPI (DCX as SD1, and 1 more MSB Bit for cmd/data indicator)
505  * @note Timing Diagram :
506  * CSN: |___________________________________________________________________________|
507  * CLK: __|-|_|-|_|...|-|_|-|_|-|_|-|_|....|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|...-|__
508  * SD0: __[0][ ---H8Bit CMD--][1][ --H8Bit DATA-- ][1][ --H8Bit DATA-- ][1][......]__ (Nx9Bit in All )
509  * DCX: __[0][ ---L8Bit CMD--][1][ --L8Bit DATA-- ][1][ --L8Bit DATA-- ][1][......]__ (use DCX as SD1)
510  * @param[in] cmd: 16bits command
511  * @param[in] data: Pointer to data buffer
512  * @param[in] length: Data length
513  ****************************************************************************************
514  */
515 void app_graphics_dc_dspi_send_cmd_datas_in_4wire_2lane(uint16_t cmd, uint16_t * data , int length);
516 
517 
518 /**
519  ****************************************************************************************
520  * @brief Send one whole frame by DC
521  *
522  * @param[in] which_layer:
523  * @arg @ref GRAPHICS_DC_LAYER_0
524  * @arg @ref GRAPHICS_DC_LAYER_1
525  * @param[in] frame_layer: pointer to dc layer setting
526  * @param[in] dc_cmd: pointer to DC control command
527  * @param[in] access_type:
528  * @arg @ref GDC_ACCESS_TYPE_SYNC, send frame sync
529  * @arg @ref GDC_ACCESS_TYPE_ASYNC, send frame async, must handle the frame result in callback
530  ****************************************************************************************
531  */
533 
534 /** @} */
535 
536 #ifdef __cplusplus
537 }
538 #endif
539 
540 #endif /* __APP_GRAPHICS_GRAPHICS_DC_H__ */
541 
542 /** @} */
543 /** @} */
544 /** @} */
app_graphics_dc_dspi_send_cmd_data_in_4wire_2lane
void app_graphics_dc_dspi_send_cmd_data_in_4wire_2lane(uint16_t cmd, uint16_t data)
Send cmd &data in 4-wire mode for DSPI (DCX as SD1, and 1 more MSB Bit for cmd/data indicator)
GDC_SPI_FRAME_TIMING_0
@ GDC_SPI_FRAME_TIMING_0
Definition: app_graphics_dc.h:212
GDC_FRAME_RES_UNSUPPORT
@ GDC_FRAME_RES_UNSUPPORT
Definition: app_graphics_dc.h:245
app_graphics_dc_framelayer_t::size_x
uint32_t size_x
Definition: app_graphics_dc.h:279
GDC_POWER_STATE_SLEEP
@ GDC_POWER_STATE_SLEEP
Definition: app_graphics_dc.h:113
GDC_CLOCK_FREQ_6MHz
@ GDC_CLOCK_FREQ_6MHz
Definition: app_graphics_dc.h:82
GDC_CLOCK_MODE_2
@ GDC_CLOCK_MODE_2
Definition: app_graphics_dc.h:93
app_graphics_dc_pin_t
QSPI IO configuration Structures.
Definition: app_graphics_dc.h:131
graphics_dc_pins_reinit
void graphics_dc_pins_reinit(void)
re-init i/o for Graphics DC dev with pre-init i/o setting
app_graphics_dc_params_t::tcsu_cycle
graphics_dc_tcsu_cycle_e tcsu_cycle
Definition: app_graphics_dc.h:261
app_graphics_dc_pins_t::io2
app_graphics_dc_pin_t io2
Definition: app_graphics_dc.h:146
GDC_ACCESS_TYPE_SYNC
@ GDC_ACCESS_TYPE_SYNC
Definition: app_graphics_dc.h:233
GDC_FRAME_RES_FAIL
@ GDC_FRAME_RES_FAIL
Definition: app_graphics_dc.h:244
GDC_TCSU_CYCLE_3
@ GDC_TCSU_CYCLE_3
Definition: app_graphics_dc.h:105
app_graphics_dc_dspi_send_cmd_in_3wire_1lane
void app_graphics_dc_dspi_send_cmd_in_3wire_1lane(uint8_t cmd)
Send single cmd in 3-wire mode for DSPI (no DCX and 1 more MSB Bit for cmd indicator)
GDC_MODE_SPI
@ GDC_MODE_SPI
Definition: app_graphics_dc.h:69
app_graphics_dc_pin_t::enable
uint8_t enable
Definition: app_graphics_dc.h:133
GDC_CLOCK_FREQ_48MHz
@ GDC_CLOCK_FREQ_48MHz
Definition: app_graphics_dc.h:79
graphics_dc_deinit
void graphics_dc_deinit(void)
de-init Graphics DC dev, just called when needed to reboot/reset
graphics_dc_clock_mode_e
graphics_dc_clock_mode_e
Define Clock Mode for DC.
Definition: app_graphics_dc.h:90
GDC_ACCESS_TYPE_ASYNC
@ GDC_ACCESS_TYPE_ASYNC
Definition: app_graphics_dc.h:234
GDC_TCSU_CYCLE_1
@ GDC_TCSU_CYCLE_1
Definition: app_graphics_dc.h:103
graphics_dc_clock_freq_e
graphics_dc_clock_freq_e
Define Clock Frequency for DC.
Definition: app_graphics_dc.h:78
app_graphics_dc_cmd_t::frame_timing
app_graphics_dc_frame_timing_e frame_timing
Definition: app_graphics_dc.h:297
app_graphics_dc_cmd_t::address
uint32_t address
Definition: app_graphics_dc.h:292
GDC_DATA_FORMAT_RGBA8888
@ GDC_DATA_FORMAT_RGBA8888
Definition: app_graphics_dc.h:173
graphics_dc_set_refresh_area_cb
void(* graphics_dc_set_refresh_area_cb)(uint32_t mark, uint32_t x_start, uint32_t x_end, uint32_t y_start, uint32_t y_end)
DC Refresh callback definition.
Definition: app_graphics_dc.h:381
GDC_CLOCK_MODE_3
@ GDC_CLOCK_MODE_3
Definition: app_graphics_dc.h:94
GDC_CLOCK_MODE_1
@ GDC_CLOCK_MODE_1
Definition: app_graphics_dc.h:92
graphics_dc_power_state_e
graphics_dc_power_state_e
Display Controller Power Mode Enumerations definition.
Definition: app_graphics_dc.h:112
GDC_MIPICFG_DSPI_RGB565_OPT0
@ GDC_MIPICFG_DSPI_RGB565_OPT0
Definition: app_graphics_dc.h:191
GDC_CLOCK_FREQ_3MHz
@ GDC_CLOCK_FREQ_3MHz
Definition: app_graphics_dc.h:83
GDC_DATA_FORMAT_TSC6
@ GDC_DATA_FORMAT_TSC6
Definition: app_graphics_dc.h:178
GDC_CLOCK_FREQ_24MHz
@ GDC_CLOCK_FREQ_24MHz
Definition: app_graphics_dc.h:80
app_graphics_dc_params_t::resolution_x
uint16_t resolution_x
Definition: app_graphics_dc.h:264
app_io_pull_t
app_io_pull_t
GPIO pull Enumerations definition.
Definition: app_io.h:183
app_graphics_dc_pins_t::io0
app_graphics_dc_pin_t io0
Definition: app_graphics_dc.h:144
app_graphics_dc_spi_send
void app_graphics_dc_spi_send(uint8_t cmd_8bit, uint32_t address_24bit, uint8_t *data, uint32_t length)
Send 1 Byte CMD,3 Byte ADDR And N Byte Data in 1-wire SPI Mode.
GDC_DATA_FORMAT_RGB565
@ GDC_DATA_FORMAT_RGB565
Definition: app_graphics_dc.h:171
GDC_DATA_FORMAT_BGRA8888
@ GDC_DATA_FORMAT_BGRA8888
Definition: app_graphics_dc.h:176
app_graphics_dc_frame_result_e
app_graphics_dc_frame_result_e
Define frame output result for DC.
Definition: app_graphics_dc.h:241
GDC_FRAME_ADDRESS_WIDTH_NONE
@ GDC_FRAME_ADDRESS_WIDTH_NONE
Definition: app_graphics_dc.h:223
app_graphics_dc_pins_t::dcx
app_graphics_dc_pin_t dcx
Definition: app_graphics_dc.h:148
app_graphics_dc_send_single_frame
app_graphics_dc_frame_result_e app_graphics_dc_send_single_frame(uint32_t which_layer, app_graphics_dc_framelayer_t *frame_layer, app_graphics_dc_cmd_t *dc_cmd, app_graphics_dc_access_type_e access_type)
Send one whole frame by DC.
app_graphics_dc_params_t
Define init params for DC.
Definition: app_graphics_dc.h:257
GDC_MIPICFG_DSPI_RGB888_OPT1
@ GDC_MIPICFG_DSPI_RGB888_OPT1
Definition: app_graphics_dc.h:193
app_graphics_dc_framelayer_t::data_format
graphics_dc_data_format_e data_format
Definition: app_graphics_dc.h:283
GDC_MIPICFG_DSPI_RGB888_OPT0
@ GDC_MIPICFG_DSPI_RGB888_OPT0
Definition: app_graphics_dc.h:192
GDC_QSPI_FRAME_TIMING_1
@ GDC_QSPI_FRAME_TIMING_1
Definition: app_graphics_dc.h:215
app_graphics_dc_framelayer_t
Define DC Frame Layer configuration.
Definition: app_graphics_dc.h:272
GDC_OUT_PIXEL_BITS_16
@ GDC_OUT_PIXEL_BITS_16
Definition: app_graphics_dc.h:203
app_graphics_dc_params_t::clock_freq
graphics_dc_clock_freq_e clock_freq
Definition: app_graphics_dc.h:259
GDC_CLOCK_FREQ_12MHz
@ GDC_CLOCK_FREQ_12MHz
Definition: app_graphics_dc.h:81
graphics_dc_layer_mode_e
graphics_dc_layer_mode_e
Define work layers for DC.
Definition: app_graphics_dc.h:161
app_graphics_dc_framelayer_t::row_stride
int32_t row_stride
Definition: app_graphics_dc.h:276
app_io.h
Header file containing functions prototypes of GPIO app library.
app_graphics_dc_params_t::pins_cfg
app_graphics_dc_pins_t pins_cfg
Definition: app_graphics_dc.h:266
app_graphics_dc_pins_t::clk
app_graphics_dc_pin_t clk
Definition: app_graphics_dc.h:143
app_graphics_dc_params_t::resolution_y
uint16_t resolution_y
Definition: app_graphics_dc.h:265
GDC_DATA_FORMAT_TSC6A
@ GDC_DATA_FORMAT_TSC6A
Definition: app_graphics_dc.h:179
app_graphics_dc_cmd_t
Define Control Command for DC Frame.
Definition: app_graphics_dc.h:290
app_graphics_dc_frame_timing_e
app_graphics_dc_frame_timing_e
Define the Output Frame Timing for DC.
Definition: app_graphics_dc.h:211
GDC_OUT_PIXEL_BITS_NOT_SUPPORT
@ GDC_OUT_PIXEL_BITS_NOT_SUPPORT
Definition: app_graphics_dc.h:205
app_graphics_dc_params_t::mipicfg_format
graphics_dc_mipi_format_e mipicfg_format
Definition: app_graphics_dc.h:263
app_graphics_dc_framelayer_t::resolution_x
uint32_t resolution_x
Definition: app_graphics_dc.h:274
GDC_TCSU_CYCLE_0
@ GDC_TCSU_CYCLE_0
Definition: app_graphics_dc.h:102
GDC_TCSU_CYCLE_4
@ GDC_TCSU_CYCLE_4
Definition: app_graphics_dc.h:106
GDC_TWO_LAYER_MODE
@ GDC_TWO_LAYER_MODE
Definition: app_graphics_dc.h:163
app_graphics_dc_dspi_send_cmd_data_in_3wire_1lane
void app_graphics_dc_dspi_send_cmd_data_in_3wire_1lane(uint8_t cmd, uint8_t data)
Send single cmd &data in 3-wire mode for DSPI (no DCX and 1 more MSB Bit for cmd/data indicator)
GDC_POWER_STATE_ACTIVE
@ GDC_POWER_STATE_ACTIVE
Definition: app_graphics_dc.h:114
graphics_dc_irq_event_notify_cb
void(* graphics_dc_irq_event_notify_cb)(uint32_t evt)
DC IRQ callback definition.
Definition: app_graphics_dc.h:376
app_graphics_dc_framelayer_t::resolution_y
uint32_t resolution_y
Definition: app_graphics_dc.h:275
GDC_FRAME_ADDRESS_WIDTH_08BIT
@ GDC_FRAME_ADDRESS_WIDTH_08BIT
Definition: app_graphics_dc.h:224
app_graphics_dc_pins_t
define DC pins
Definition: app_graphics_dc.h:141
graphics_dc_mspi_e
graphics_dc_mspi_e
Define SPI work Mode for DC.
Definition: app_graphics_dc.h:68
app_graphics_dc_framelayer_t::alpha
uint8_t alpha
Definition: app_graphics_dc.h:281
GDC_FRAME_ADDRESS_WIDTH_24BIT
@ GDC_FRAME_ADDRESS_WIDTH_24BIT
Definition: app_graphics_dc.h:226
app_graphics_dc_frame_address_width_e
app_graphics_dc_frame_address_width_e
Define the bits of address phase for DC Frame.
Definition: app_graphics_dc.h:222
GDC_MIPICFG_SPI_RGB565_OPT0
@ GDC_MIPICFG_SPI_RGB565_OPT0
Definition: app_graphics_dc.h:189
graphics_dc_data_format_e
graphics_dc_data_format_e
Define the data format for frame buffer of DC.
Definition: app_graphics_dc.h:170
app_graphics_dc_cmd_t::command
uint8_t command
Definition: app_graphics_dc.h:291
app_graphics_dc_framelayer_t::size_y
uint32_t size_y
Definition: app_graphics_dc.h:280
app_graphics_dc_pins_t::io3
app_graphics_dc_pin_t io3
Definition: app_graphics_dc.h:147
app_graphics_dc_framelayer_t::start_y
int32_t start_y
Definition: app_graphics_dc.h:278
GDC_MIPICFG_QSPI_RGB888_OPT0
@ GDC_MIPICFG_QSPI_RGB888_OPT0
Definition: app_graphics_dc.h:195
app_graphics_dc_framelayer_t::frame_baseaddr
void * frame_baseaddr
Definition: app_graphics_dc.h:273
app_graphics_dc_params_t::clock_mode
graphics_dc_clock_mode_e clock_mode
Definition: app_graphics_dc.h:260
GDC_MIPICFG_SPI_RGB888_OPT0
@ GDC_MIPICFG_SPI_RGB888_OPT0
Definition: app_graphics_dc.h:190
GDC_ONE_LAYER_MODE
@ GDC_ONE_LAYER_MODE
Definition: app_graphics_dc.h:162
app_graphics_dc_freq_set
void app_graphics_dc_freq_set(graphics_dc_clock_freq_e clock_freq)
DC clock frequency set.
app_graphics_dc_pins_t::csn
app_graphics_dc_pin_t csn
Definition: app_graphics_dc.h:142
GDC_DATA_FORMAT_ARGB8888
@ GDC_DATA_FORMAT_ARGB8888
Definition: app_graphics_dc.h:175
graphics_dc_tcsu_cycle_e
graphics_dc_tcsu_cycle_e
Define Delay Clock for DC Tcsu.
Definition: app_graphics_dc.h:101
app_graphics_dc_pins_t::io1
app_graphics_dc_pin_t io1
Definition: app_graphics_dc.h:145
graphics_dc_mipi_format_e
graphics_dc_mipi_format_e
Define the Output MIPI Timing for DATA Phase of DC Timing of MIPICFG_2RGB888_OPT1 is True MIPICFG_2RG...
Definition: app_graphics_dc.h:188
app_graphics_dc_set_power_state
void app_graphics_dc_set_power_state(graphics_dc_power_state_e state)
Switch power state for DC module.
GDC_TCSU_CYCLE_2
@ GDC_TCSU_CYCLE_2
Definition: app_graphics_dc.h:104
GDC_FRAME_RES_SUCCESS
@ GDC_FRAME_RES_SUCCESS
Definition: app_graphics_dc.h:242
GDC_MIPICFG_QSPI_RGB565_OPT0
@ GDC_MIPICFG_QSPI_RGB565_OPT0
Definition: app_graphics_dc.h:194
app_graphics_dc_pin_t::pull
app_io_pull_t pull
Definition: app_graphics_dc.h:132
GDC_MODE_DSPI
@ GDC_MODE_DSPI
Definition: app_graphics_dc.h:70
app_graphics_dc_dspi_send_cmd_datas_in_4wire_2lane
void app_graphics_dc_dspi_send_cmd_datas_in_4wire_2lane(uint16_t cmd, uint16_t *data, int length)
Send cmd &data in 4-wire mode for DSPI (DCX as SD1, and 1 more MSB Bit for cmd/data indicator)
GDC_DSPI_FRAME_TIMING_0
@ GDC_DSPI_FRAME_TIMING_0
Definition: app_graphics_dc.h:213
app_graphics_dc_framelayer_t::blendmode
uint8_t blendmode
Definition: app_graphics_dc.h:282
GDC_FRAME_ADDRESS_WIDTH_16BIT
@ GDC_FRAME_ADDRESS_WIDTH_16BIT
Definition: app_graphics_dc.h:225
GDC_MODE_QSPI
@ GDC_MODE_QSPI
Definition: app_graphics_dc.h:71
graphics_dc_out_pixel_bits_e
graphics_dc_out_pixel_bits_e
Define the Output pixel bits for DC.
Definition: app_graphics_dc.h:202
GDC_OUT_PIXEL_BITS_24
@ GDC_OUT_PIXEL_BITS_24
Definition: app_graphics_dc.h:204
app_graphics_dc_access_type_e
app_graphics_dc_access_type_e
Define access type for DC.
Definition: app_graphics_dc.h:232
GDC_CLOCK_MODE_0
@ GDC_CLOCK_MODE_0
Definition: app_graphics_dc.h:91
GDC_FRAME_RES_ASYNC_WAIT
@ GDC_FRAME_RES_ASYNC_WAIT
Definition: app_graphics_dc.h:243
graphics_dc_init
uint16_t graphics_dc_init(app_graphics_dc_params_t *dc_params, graphics_dc_irq_event_notify_cb evt_cb)
init Graphics DC dev
app_graphics_dc_framelayer_t::start_x
int32_t start_x
Definition: app_graphics_dc.h:277
GDC_DATA_FORMAT_ABGR8888
@ GDC_DATA_FORMAT_ABGR8888
Definition: app_graphics_dc.h:174
GDC_DATA_FORMAT_TSC4
@ GDC_DATA_FORMAT_TSC4
Definition: app_graphics_dc.h:177
GDC_QSPI_FRAME_TIMING_0
@ GDC_QSPI_FRAME_TIMING_0
Definition: app_graphics_dc.h:214
GDC_DATA_FORMAT_RGB24
@ GDC_DATA_FORMAT_RGB24
Definition: app_graphics_dc.h:172
app_graphics_dc_params_t::layer_mode
graphics_dc_layer_mode_e layer_mode
Definition: app_graphics_dc.h:262
app_graphics_dc_params_t::mspi_mode
graphics_dc_mspi_e mspi_mode
Definition: app_graphics_dc.h:258
app_graphics_dc_cmd_t::address_width
app_graphics_dc_frame_address_width_e address_width
Definition: app_graphics_dc.h:293