Macros | |
#define | LL_AON_WD_TIMER_CLK_SEL_RNG (0x0U << AON_WDT_CLK_SEL_Pos) |
#define | LL_AON_WD_TIMER_CLK_SEL_XO (0x1U << AON_WDT_CLK_SEL_Pos) |
#define | LL_AON_WD_TIMER_CLK_SEL_RNG2 (0x2U << AON_WDT_CLK_SEL_Pos) |
#define | LL_AON_WD_TIMER_CLK_SEL_RTC (0x3U << AON_WDT_CLK_SEL_Pos) |
#define LL_AON_WD_TIMER_CLK_SEL_RNG (0x0U << AON_WDT_CLK_SEL_Pos) |
Select RNG clcok source
Definition at line 69 of file gr55xx_ll_aon_wdt.h.
#define LL_AON_WD_TIMER_CLK_SEL_RNG2 (0x2U << AON_WDT_CLK_SEL_Pos) |
Select RNG2 clcok source
Definition at line 71 of file gr55xx_ll_aon_wdt.h.
#define LL_AON_WD_TIMER_CLK_SEL_RTC (0x3U << AON_WDT_CLK_SEL_Pos) |
Select RTC clcok source
Definition at line 72 of file gr55xx_ll_aon_wdt.h.
#define LL_AON_WD_TIMER_CLK_SEL_XO (0x1U << AON_WDT_CLK_SEL_Pos) |
Select XO clcok source
Definition at line 70 of file gr55xx_ll_aon_wdt.h.