gr5405_chip_trim.h
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1 /**
2 *******************************************************************************
3 *
4 * @file gr5405_chip_trim.h
5 *
6 * @brief
7 *
8 *******************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 *****************************************************************************************
36 */
37
38 /**
39 @addtogroup SYSTEM
40 @{
41 */
42
43 /**
44 * @addtogroup SYS System SDK
45 * @{
46 * @brief Definitions and prototypes for the system SDK interface.
47 */
48
49 #ifndef __GR5405_CHIP_TRIM_H__
50 #define __GR5405_CHIP_TRIM_H__
51
52 #include<stdio.h>
53 #include<stdint.h>
54
55 #define CHIP_TRIM_PATTERN (0x4744)
56
57 #define OTP_UNSPECIFIED_U16_VALUE (0xFFFFU)
58
59 typedef struct
60 {
61 uint16_t ate_version;
62 uint16_t hw_version;
63 uint16_t chip_id;
64 uint16_t package;
65 uint16_t flash_size;
66 uint16_t ram_size;
67 uint8_t unused[12];
68 } __attribute__ ((packed)) production_t;
69
70 typedef struct
71 {
72 uint8_t tx_power;
73 uint8_t rssi_cali;
74 uint8_t hp_gain;
75 uint8_t unused[1];
76 } __attribute__ ((packed)) rf_trim_t;
77
78 typedef struct
79 {
80 uint8_t dcdc_1p05;
81 uint8_t dcdc_1p15;
82 uint8_t dig_ldo_0p9_coarse;
83 uint8_t dig_ldo_0P9_fine;
84 uint8_t dig_ldo_1p05_coarse;
85 uint8_t dig_ldo_1p05_fine;
86 uint8_t sys_ldo_1p05;
87 uint8_t sys_ldo_1p15;
88 uint8_t io_ldo_1p8;
89 uint8_t io_ldo_3p0;
90 uint8_t stb_io_ldo_1P8;
91 uint8_t stb_io_ldo_3p0;
92 uint16_t ringo_dig_0p9;
93 uint16_t ringo_dig_1p05;
94 } __attribute__ ((packed)) pmu_trim_t;
95
96 typedef struct
97 {
98 uint16_t offset_int_0p8; /* Offset based on internal reference(0.85V) */
99 uint16_t slope_int_0p8; /* Slope based on internal reference(0.85V) */
100 uint16_t offset_int_1p2; /* Offset based on internal reference(1.28V) */
101 uint16_t slope_int_1p2; /* Slope based on internal reference(1.28V) */
102 uint16_t offset_int_1p6; /* Offset based on internal reference(0.85V) */
103 uint16_t slope_int_1p6; /* Offset based on internal reference(0.85V) */
104 uint16_t offset_ext_1p0; /* Offset based on internal reference(1.6V) */
105 uint16_t slope_ext_1p0; /* Slope based on internal reference(1.6V) */
106 uint16_t temp; /* Offset based on internal reference(0.85V) */
107 uint16_t temp_ref; /* Chip temperature sensor reference temperature. E.g. Decimal 2618: 26.18C */
108 uint16_t vbat_div; /* Chip internal resistance voltage ratio. E.g. Decimal 358:3.58 */
109 uint8_t unused;
110 uint8_t cali_mode; /* ADC calibration mode */
111 } __attribute__ ((packed)) sadc_trim_t;
112
113 typedef struct
114 {
115 uint16_t hf_osc_192m;
116 uint16_t hf_osc_192m_fine;
117 uint8_t unused[4];
118 } __attribute__ ((packed)) clk_trim_t;
119
120 typedef struct
121 {
122 uint8_t flash_manufacturer; /* flash manufacturer type PUYA: P25Q40SU: 0x11 */
123 uint8_t feature; /* 0bit: 1 ~ support 512byte write, 0 ~ not support 512 byte write */
124 uint8_t flash_tVSL; /* VCC(min.) to device operation. Uint: 10us */
125 uint8_t flash_tESL; /* Erase suspend latency. Uint: 5us */
126 uint8_t flash_tPSL; /* Program suspend latency. Uint: 5us */
127 uint8_t flash_tPRS; /* Latency between program resume and next suspend. Uint: 5us */
128 uint8_t flash_tERS; /* Latency between erase resume and next suspend. Uint: 5us */
129 uint8_t flash_tDP; /* CS# High to Deep Power-down Mode. Uint: 5us */
130 uint8_t flash_tRES2; /* CS# High To Standby Mode With Electronic Signature Read. Uint: 5us */
131 uint8_t flash_tRDINT; /* Read status register interval when wait busy. Uint: 5us */
132 uint8_t unused[2];
133 } __attribute__ ((packed)) flash_timing_t;
134
135 typedef struct
136 {
137 uint16_t xo_cap; /* XO capacitance. Trim at FT1, only used at FT2&FT3. */
138 uint8_t unused[24];
139 } __attribute__ ((packed)) xo_trim_t;
140
141 typedef struct
142 {
143 uint16_t valid_ind; /* Indicates whether PMU2 is valid .0xFFFF: Unused. 0x4744: Used */
144 uint8_t dig_ldo_1p0; /* Core LDO output 1.0V(Coarse) A814 bit<21:20> */
145 uint8_t dig_ldo_1p0_fine; /* Core LDO output 1.0V(Fine) A8C0 bit8=1; A8C4 bit<13:8> trimming */
146 uint8_t lpd_ldo_0p9; /* LPD LDO output 0.9V A804 bit<22:20> */
147 } __attribute__ ((packed)) pmu2_trim_t;
148
149 typedef struct {
150 uint16_t pattern;
151 uint16_t item_end;
152 uint32_t check_sum;
153 production_t prod;
154 rf_trim_t rf;
155 pmu_trim_t pmu;
156 sadc_trim_t sadc;
157 clk_trim_t clk;
158 flash_timing_t flash;
159 xo_trim_t xo_trim;
160 pmu2_trim_t pmu2;
161 } __attribute__ ((packed)) chip_trim0_t;
162
163 typedef struct {
164 uint8_t bt_addr[6];
165 uint16_t xo_offset;
166 } __attribute__ ((packed)) chip_trim1_t;
167
168 /* EFUSE data struct */
169 typedef struct {
170 /* Configurations 1Byte*/
171 uint8_t isp_uart_bypass : 1; /* 0: Support UART ISP, 1: Not Support UART ISP */
172 uint8_t isp_jlink_bypass : 1; /* 0: Support JLINK ISP, 1: Not Support JLINK ISP */
173 uint8_t swd_disable : 1; /* 0: SWD enable, 1: SWD disable */
174 uint8_t io_ldo_adjust_en : 1; /* IO LDO adjust enable, 0:disable, 1:enable */
175 uint8_t io_ldo_sel : 1; /* IO voltage, 0: 1.8v, 1:3.0v */
176 uint8_t io_ldo_bypass : 1; /* 0: no bypass, 1: bypass */
177 uint8_t reserved : 2;
178 } __attribute__ ((packed)) config_t;
179
180 typedef struct
181 {
182 uint8_t uid_fab[3];
183 uint8_t uid_year;
184 uint8_t uid_mon;
185 uint8_t uid_lot_id[8];
186 uint8_t uid_wafer_id;
187 uint8_t uid_wafer_x;
188 uint8_t uid_wafer_y;
189 uint8_t sram_size; /* 0: 96KB, 1: 80KB, 2: 64KB, 3: 48KB */
190 uint32_t flash_otp_addr1 : 24;
191 uint32_t flash_otp_addr2 : 24;
192 uint8_t bod_trim;
193 config_t config;
194 uint8_t io_ldo_1p8;
195 uint8_t io_ldo_3p0;
196 uint8_t test_pass_flag; /* Used by GR5405 only. */
197 uint8_t user[4];
198 } __attribute__ ((packed)) boot_efuse_ctrl_t;
199
200 /** @} */
201 #endif
202
203 /** @} */
__attribute__::rssi_cali
uint8_t rssi_cali
Definition: gr5405_chip_trim.h:73
__attribute__::dig_ldo_0P9_fine
uint8_t dig_ldo_0P9_fine
Definition: gr5405_chip_trim.h:83
__attribute__::temp
uint16_t temp
Definition: gr5405_chip_trim.h:106
__attribute__::uid_wafer_id
uint8_t uid_wafer_id
Definition: gr5405_chip_trim.h:186
__attribute__::rf
rf_trim_t rf
Definition: gr5405_chip_trim.h:154
__attribute__::offset_int_1p2
uint16_t offset_int_1p2
Definition: gr5405_chip_trim.h:100
__attribute__::swd_disable
uint8_t swd_disable
Definition: gr5405_chip_trim.h:173
__attribute__::stb_io_ldo_1P8
uint8_t stb_io_ldo_1P8
Definition: gr5405_chip_trim.h:90
__attribute__::chip_id
uint16_t chip_id
Definition: gr5405_chip_trim.h:63
__attribute__::feature
uint8_t feature
Definition: gr5405_chip_trim.h:123
__attribute__::flash_tRES2
uint8_t flash_tRES2
Definition: gr5405_chip_trim.h:130
__attribute__::package
uint16_t package
Definition: gr5405_chip_trim.h:64
__attribute__::xo_cap
uint16_t xo_cap
Definition: gr5405_chip_trim.h:137
__attribute__::check_sum
uint32_t check_sum
Definition: gr5405_chip_trim.h:152
__attribute__::ringo_dig_0p9
uint16_t ringo_dig_0p9
Definition: gr5405_chip_trim.h:92
__attribute__::prod
production_t prod
Definition: gr5405_chip_trim.h:153
__attribute__::pattern
uint16_t pattern
Definition: gr5405_chip_trim.h:150
__attribute__::dcdc_1p05
uint8_t dcdc_1p05
Definition: gr5405_chip_trim.h:80
__attribute__::reserved
uint8_t reserved
Definition: gr5405_chip_trim.h:177
__attribute__::flash_tVSL
uint8_t flash_tVSL
Definition: gr5405_chip_trim.h:124
__attribute__::cali_mode
uint8_t cali_mode
Definition: gr5405_chip_trim.h:110
__attribute__::ram_size
uint16_t ram_size
Definition: gr5405_chip_trim.h:66
__attribute__::valid_ind
uint16_t valid_ind
Definition: gr5405_chip_trim.h:143
__attribute__::pmu2
pmu2_trim_t pmu2
Definition: gr5405_chip_trim.h:160
__attribute__::dig_ldo_1p0_fine
uint8_t dig_ldo_1p0_fine
Definition: gr5405_chip_trim.h:145
__attribute__::config
config_t config
Definition: gr5405_chip_trim.h:193
__attribute__::dcdc_1p15
uint8_t dcdc_1p15
Definition: gr5405_chip_trim.h:81
__attribute__::hw_version
uint16_t hw_version
Definition: gr5405_chip_trim.h:62
__attribute__::ringo_dig_1p05
uint16_t ringo_dig_1p05
Definition: gr5405_chip_trim.h:93
__attribute__::slope_int_1p6
uint16_t slope_int_1p6
Definition: gr5405_chip_trim.h:103
__attribute__::hf_osc_192m_fine
uint16_t hf_osc_192m_fine
Definition: gr5405_chip_trim.h:116
__attribute__::uid_wafer_y
uint8_t uid_wafer_y
Definition: gr5405_chip_trim.h:188
__attribute__::flash_otp_addr2
uint32_t flash_otp_addr2
Definition: gr5405_chip_trim.h:191
__attribute__::hf_osc_192m
uint16_t hf_osc_192m
Definition: gr5405_chip_trim.h:115
__attribute__::offset_int_1p6
uint16_t offset_int_1p6
Definition: gr5405_chip_trim.h:102
__attribute__::sys_ldo_1p05
uint8_t sys_ldo_1p05
Definition: gr5405_chip_trim.h:86
__attribute__::offset_int_0p8
uint16_t offset_int_0p8
Definition: gr5405_chip_trim.h:98
__attribute__::ate_version
uint16_t ate_version
Definition: gr5405_chip_trim.h:61
__attribute__::bod_trim
uint8_t bod_trim
Definition: gr5405_chip_trim.h:192
__attribute__::dig_ldo_1p05_coarse
uint8_t dig_ldo_1p05_coarse
Definition: gr5405_chip_trim.h:84
__attribute__::io_ldo_bypass
uint8_t io_ldo_bypass
Definition: gr5405_chip_trim.h:176
__attribute__::isp_uart_bypass
uint8_t isp_uart_bypass
Definition: gr5405_chip_trim.h:171
__attribute__::uid_mon
uint8_t uid_mon
Definition: gr5405_chip_trim.h:184
__attribute__::io_ldo_adjust_en
uint8_t io_ldo_adjust_en
Definition: gr5405_chip_trim.h:174
__attribute__::dig_ldo_1p0
uint8_t dig_ldo_1p0
Definition: gr5405_chip_trim.h:144
__attribute__::sadc
sadc_trim_t sadc
Definition: gr5405_chip_trim.h:156
__attribute__::io_ldo_3p0
uint8_t io_ldo_3p0
Definition: gr5405_chip_trim.h:89
__attribute__::xo_trim
xo_trim_t xo_trim
Definition: gr5405_chip_trim.h:159
__attribute__::io_ldo_sel
uint8_t io_ldo_sel
Definition: gr5405_chip_trim.h:175
__attribute__::clk
clk_trim_t clk
Definition: gr5405_chip_trim.h:157
__attribute__::offset_ext_1p0
uint16_t offset_ext_1p0
Definition: gr5405_chip_trim.h:104
__attribute__::flash_manufacturer
uint8_t flash_manufacturer
Definition: gr5405_chip_trim.h:122
__attribute__::flash_otp_addr1
uint32_t flash_otp_addr1
Definition: gr5405_chip_trim.h:190
__attribute__::isp_jlink_bypass
uint8_t isp_jlink_bypass
Definition: gr5405_chip_trim.h:172
__attribute__::tx_power
uint8_t tx_power
Definition: gr5405_chip_trim.h:72
__attribute__::vbat_div
uint16_t vbat_div
Definition: gr5405_chip_trim.h:108
__attribute__::slope_int_0p8
uint16_t slope_int_0p8
Definition: gr5405_chip_trim.h:99
__attribute__::slope_ext_1p0
uint16_t slope_ext_1p0
Definition: gr5405_chip_trim.h:105
__attribute__::io_ldo_1p8
uint8_t io_ldo_1p8
Definition: gr5405_chip_trim.h:88
__attribute__::stb_io_ldo_3p0
uint8_t stb_io_ldo_3p0
Definition: gr5405_chip_trim.h:91
__attribute__::sram_size
uint8_t sram_size
Definition: gr5405_chip_trim.h:189
__attribute__::pmu
pmu_trim_t pmu
Definition: gr5405_chip_trim.h:155
__attribute__::temp_ref
uint16_t temp_ref
Definition: gr5405_chip_trim.h:107
__attribute__::flash_tESL
uint8_t flash_tESL
Definition: gr5405_chip_trim.h:125
__attribute__::test_pass_flag
uint8_t test_pass_flag
Definition: gr5405_chip_trim.h:196
__attribute__::hp_gain
uint8_t hp_gain
Definition: gr5405_chip_trim.h:74
__attribute__::flash_tERS
uint8_t flash_tERS
Definition: gr5405_chip_trim.h:128
__attribute__::flash_tPRS
uint8_t flash_tPRS
Definition: gr5405_chip_trim.h:127
__attribute__::uid_wafer_x
uint8_t uid_wafer_x
Definition: gr5405_chip_trim.h:187
__attribute__::dig_ldo_0p9_coarse
uint8_t dig_ldo_0p9_coarse
Definition: gr5405_chip_trim.h:82
__attribute__::flash
flash_timing_t flash
Definition: gr5405_chip_trim.h:158
__attribute__::sys_ldo_1p15
uint8_t sys_ldo_1p15
Definition: gr5405_chip_trim.h:87
__attribute__::item_end
uint16_t item_end
Definition: gr5405_chip_trim.h:151
__attribute__::flash_size
uint16_t flash_size
Definition: gr5405_chip_trim.h:65
__attribute__::uid_year
uint8_t uid_year
Definition: gr5405_chip_trim.h:183
__attribute__
struct __attribute__((packed))
Electronic Shelf Label Service display information format.
Definition: esls.h:280
__attribute__::flash_tRDINT
uint8_t flash_tRDINT
Definition: gr5405_chip_trim.h:131
__attribute__::dig_ldo_1p05_fine
uint8_t dig_ldo_1p05_fine
Definition: gr5405_chip_trim.h:85
__attribute__::lpd_ldo_0p9
uint8_t lpd_ldo_0p9
Definition: gr5405_chip_trim.h:146
__attribute__::xo_offset
uint16_t xo_offset
Definition: gr5405_chip_trim.h:165
__attribute__::flash_tDP
uint8_t flash_tDP
Definition: gr5405_chip_trim.h:129
__attribute__::slope_int_1p2
uint16_t slope_int_1p2
Definition: gr5405_chip_trim.h:101
__attribute__::flash_tPSL
uint8_t flash_tPSL
Definition: gr5405_chip_trim.h:126