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Recruitment Life at Goodix

Senior Design Engineer

• At R&D firm, engage in register transfer level (RTL) design, modification, modeling, simulation, & verification of innovative high-performance digital IP, complex state-machines, & mixed signal integrated circuits & systems in commercially available CMOS process nodes. 

• Create architectural & microarchitectural specifications including RTL description. 

• Write & modify firmware driving the designed hardware. 

• Coordinate interface specs for assigned block. drive physical convergence of the functional unit assigned to meet power, performance & area targets. 

• Analyze timing & power reports & propose design improvements. guide creation of functional test plans w/verification team. 

• Perform constrained random verification. 

• Create & debug test cases. 

• Work on gate level netlist simulations & post silicon debugging. 

• Use Simulink, Matlab, System Verilog & VHDL to perform duties. 

Reference Job #101 & send CV to a.acker@goodix.com or job location: Goodix Technology Inc, 901 South Mopac Expressway, Bldg II, Ste 375, Austin TX 78746.

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